[flashrom] DO NOT REBOOT OR POWEROFF (ASUS P5GDC-Delux)

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Fri Sep 10 03:38:25 CEST 2010


Hi Alexander,

we will help you. Please run

flashrom -Vv oldbios.dat

If it says "VERIFIED", everything is OK and you can reboot.

We have to add support for your mainboard. Please check if this is the
P5GDC Deluxe or the P5GDC-V Deluxe or the P5GDC Pro. We also need the
output of
superiotool -deV
lspci -nnvvvxxx

BIOS download is here:
http://dlcdnet.asus.com/pub/ASUS/mb/socket775/P5GDC%20Deluxe/P5GDCDELUXE1012002.zip

On 10.09.2010 01:09, Alexander Mikhnovets wrote:
> I add to attach full output of dmidecode.
>
> 10 сентября 2010 г. 2:05 пользователь Alexander Mikhnovets
> <alexander.mikhnovets at gmail.com> написал:
>   
>> I used utility flashrom. I downloaded binary file with BIOS from
>> www.asus.com, unpacked, and runned flashrom.
>>
>> My motherboard is ASUS P5GDC-Delux.
>> My OS is Linux:
>> Description:    Ubuntu 10.04 LTS
>> Linux stas-desktop 2.6.32-21-generic #32-Ubuntu SMP Fri Apr 16
>> 08:10:02 UTC 2010 i686 GNU/Linux
>>
>>
>> When I runed flashrum, I see following output:
>>
>> stas at stas-desktop:~/Рабочий стол$ sudo flashrom -w P5GDC-ASUS-DELUXE-1012.002.rom
>> flashrom v0.9.1-r946
>> Found chipset "Intel ICH6/ICH6R", enabling flash write... OK.
>> This chipset supports the following protocols: FWH.
>> Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000.
>> Flash image seems to be a legacy BIOS. Disabling checks.
>> Writing flash chip... Erasing flash chip... 
>> ERASE FAILED at 0x00000f98! Expected=0xff, Read=0x44, failed byte count from 0x00000000-0x00000fff: 0x4d
>> [...]
>> ERASE FAILED at 0x00000f98! Expected=0xff, Read=0x44, failed byte count from 0x00000000-0x0000ffff: 0xee4d
>>
>>
>> Befor bios updating, I backuped old bios by command:
>>
>> $ sudo flashrom -r oldbios.dat
>> flashrom v0.9.1-r946
>> No coreboot table found.
>> Found chipset "Intel ICH6/ICH6R", enabling flash write... OK.
>> This chipset supports the following protocols: FWH.
>> Calibrating delay loop... OK.
>> Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000.
>> Reading flash... done.
>>     


Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/





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