From fabio.capoeira at bol.com.br  Thu Dec  1 00:33:57 2011
From: fabio.capoeira at bol.com.br (Fabio)
Date: Wed, 30 Nov 2011 21:33:57 -0200
Subject: [flashrom] "Intel H61" with PCI ID 8086:1c5c. including a
 verbose (-V) log
In-Reply-To: <201111302236.pAUMac3k028133@mail2.student.tuwien.ac.at>
References: <20111128212208.5c7fca81@bol.com.br>
	<201111302236.pAUMac3k028133@mail2.student.tuwien.ac.at>
Message-ID: <20111130213357.40eea5ab@bol.com.br>

Hi Stefan,

Das Board ist ein MSI h61mu-e35 (b3)

writing hab ich schiss es zu verschroten, ist nagelneu und brauche auch
bis jetzt kein bios-update (obwohl neueres bios released).

reading habe ich gerade probiert:

----------
[studio at myhost ~]$ sudo flashrom -r ~/temp/flashread
flashrom v0.9.4-r1395 on Linux 3.0-rt (i686), built with libpci 3.1.8,
GCC 4.6.2, little endian flashrom is free software, get the source code
at http://www.flashrom.org

Calibrating delay loop... OK.
sh: dmidecode: comando n?o encontrado
dmidecode execution unsuccessful - continuing without DMI info
Found chipset "Intel H61". 
This chipset is marked as untested. If you are using an up-to-date
version of flashrom please email a report to flashrom at flashrom.org
including a verbose (-V) log. Thank you!
Enabling flash write... OK.
This chipset supports the following protocols: FWH, SPI.
Found Winbond flash chip "W25Q32" (4096 kB, SPI) at physical address
0xffc00000. Reading flash... done.
----------


Gruss
F?bio




Em Wed, 30 Nov 2011 23:37:13 +0100
Stefan Tauner <stefan.tauner at student.tuwien.ac.at> escreveu:

> Hello Fabio!
> 
> From what i can tell from your log, the board will most probably be
> fully supported by flashrom. Have you tried reading and or writing?
> Which mainboard is it?



From novoagansk at gmail.com  Thu Dec  1 01:59:31 2011
From: novoagansk at gmail.com (novoagansk at gmail.com)
Date: Thu, 1 Dec 2011 06:59:31 +0600
Subject: [flashrom] P8H61 PRO
In-Reply-To: <201111302230.pAUMTwrS020929@mail2.student.tuwien.ac.at>
References: <CAJuAjbgLzmAaWXHFp_p6Vfcc8weWbvLXTkn7vtXE8Jd5TBLRTw@mail.gmail.com>
	<201111302230.pAUMTwrS020929@mail2.student.tuwien.ac.at>
Message-ID: <1539999166.20111201065931@gmail.com>

> On Thu, 1 Dec 2011 01:45:03 +0600
> Pavel Petrov <novoagansk at gmail.com> wrote:

>> 0x5C: 0x017f0001 (FREG2: Management Engine)
>> 0x00001000-0x0017ffff is locked

> Hello Pavel,

> thanks for your report!

> The problem is the locked ME region as quoted above. We are working on
> unlocking it, but intel does not provide us any documentation so please
> do not expect a solution soon.

> I have added the board to our list of (un)supported boards (with an
> appropriate note) and will commit that later together with other small
> changes.

If i send to you utility from asus and flash image,
it may be happy to help make you flashrom program better?

I have kubuntu linux 32bit on my computer and i can experimental run your
next beta version flashrom program to help make this program better...

If flashrom program make system unbootable - i have a programmer to reprogram
bios and i have soldering iron and smd rework station to get bios from
motherboard to programmer.

Pavel.

Hello from Siberia. Russia.

novoagansk.ru site of Novoagansk
http://agansk.ru/gorod/index.html - fotos



From michael at fuckner.net  Fri Dec  2 06:26:10 2011
From: michael at fuckner.net (Michael Fuckner)
Date: Fri, 02 Dec 2011 06:26:10 +0100
Subject: [flashrom] Supermicro X9SCA-F with Intel C204 chipset
Message-ID: <4ED86172.2040603@fuckner.net>

I just tried to read Flash from Supermicros X9SCA-F, but it doesn't 
work. Anything else I should try?

Regards,
  Michael!
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From nikita.schmidt at gmail.com  Fri Dec  2 19:46:13 2011
From: nikita.schmidt at gmail.com (Nikita Schmidt)
Date: Fri, 2 Dec 2011 19:46:13 +0100
Subject: [flashrom] Numonyx M25P40 - erase & write OK
Message-ID: <CAKrwbvEzuVEGcdgENp2S0=8C+cGuRZFkHap=a5uMTgThnQE2FQ@mail.gmail.com>

Hello,

I have successfully used flashrom to program Numonyx M25P40-VMB6TPB,
which identifies itself as an ST M25P40.
The report is attached.

Nikita
-------------- next part --------------
$ flashrom -p ft2232_spi:type=2232H,port=B -Vw obj/test_mec.flashimg
flashrom v0.9.4-r1394 on Linux 3.0.0-14-generic (x86_64), built with libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2110M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 993 us, 10000 myus = 10023 us, 4 myus = 5 us, OK.
Initializing ft2232_spi programmer
Using device type FTDI FT2232H interface B
Disable divide-by-5 front stage
Set clock divisor
MPSSE clock: 60.000000 MHz divisor: 3 SPI clock: 10.000000 MHz
No loopback of TDI/DO TDO/DI
Set data bits
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xff, id2 0xff
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x12, id2 0x12
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found ST flash chip "M25P40" (512 kB, SPI) on ft2232_spi.
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xff, id2 0xff
===
This flash part has status UNTESTED for operations: ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:S, 0x020000-0x02ffff:S, 0x030000-0x03ffff:S, 0x040000-0x04ffff:S, 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:S
Erase/write done.
Verifying flash... VERIFIED.          

From svn at flashrom.org  Fri Dec  2 22:48:18 2011
From: svn at flashrom.org (repository service)
Date: Fri, 02 Dec 2011 22:48:18 +0100
Subject: [flashrom] [commit] r1471 - trunk
Message-ID: <E1RWaxu-00066V-FM@ra.coresystems.de>

Author: stefanct
Date: Fri Dec  2 22:48:17 2011
New Revision: 1471
URL: http://flashrom.org/trac/flashrom/changeset/1471

Log:
Add a bunch of new/tested stuff and various small changes 9

Tested mainboards:
OK:
- ABIT NF-M2S
  http://www.flashrom.org/pipermail/flashrom/2011-October/008155.html
- ASUS P5K-VM
  http://www.flashrom.org/pipermail/flashrom/2011-October/008172.html
- ASUS M5A99X EVO
  http://www.flashrom.org/pipermail/flashrom/2011-October/008152.html
- ASUS Z8PE-D12
  http://www.flashrom.org/pipermail/flashrom/2011-November/008195.html
- PC Engines Alix.2d3
  http://www.flashrom.org/pipermail/flashrom/2011-November/008244.html
NOT OK:
- ASUS P8H61 PRO
  http://www.flashrom.org/pipermail/flashrom/2011-November/008308.html
- ASUS P8P67 (rev. 3.1)
  http://www.flashrom.org/pipermail/flashrom/2011-November/008292.html
- MSI MS-7613 (Iona-GL8E)
  http://www.flashrom.org/pipermail/flashrom/2011-November/008295.html
- MSI MS-7635 (H55M-ED55)
  http://www.flashrom.org/pipermail/flashrom/2011-October/008167.html
- Supermicro X9SCL
  http://www.flashrom.org/pipermail/flashrom/2011-November/008254.html
- ZOTAC H67-ITX WiFi
  http://paste.flashrom.org/view.php?id=902

Tested flash chips:
- mark Pm29F002T as TEST_OK_PREW
  http://www.flashrom.org/pipermail/flashrom/2011-October/008171.html
- mark AMIC A49LF040A as TEST_OK_PREW
  http://www.flashrom.org/pipermail/flashrom/2011-November/008244.html
- mark Winbond W39V040FC as TEST_OK_PREW
  http://www.flashrom.org/pipermail/flashrom/2011-November/008281.html

- source format fixes

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/flashchips.c
   trunk/print.c

Modified: trunk/flashchips.c
==============================================================================
--- trunk/flashchips.c	Wed Nov 23 10:13:48 2011	(r1470)
+++ trunk/flashchips.c	Fri Dec  2 22:48:17 2011	(r1471)
@@ -1288,7 +1288,7 @@
 		.total_size	= 512,
 		.page_size	= 64 * 1024,
 		.feature_bits	= FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
-		.tested		= TEST_OK_PRE,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
 		.probe_timing	= TIMING_ZERO,	/* routine is wrapper to probe_jedec (pm49fl00x.c) */
 		.block_erasers	=
@@ -5204,9 +5204,9 @@
 		.total_size	= 256,
 		.page_size	= 8 * 1024,
 		.feature_bits	= FEATURE_ADDR_2AA | FEATURE_EITHER_RESET,
-		.tested		= TEST_OK_PRE,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
-		.probe_timing	= TIMING_FIXME, 
+		.probe_timing	= TIMING_FIXME,
 		.block_erasers	=
 		{
 			{
@@ -8649,7 +8649,7 @@
 		.total_size	= 512,
 		.page_size	= 64 * 1024,
 		.feature_bits	= FEATURE_REGISTERMAP | FEATURE_EITHER_RESET,
-		.tested		= TEST_UNTESTED,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
 		.probe_timing	= 10,
 		.block_erasers	=
@@ -9027,6 +9027,7 @@
 		.probe		= probe_spi_rdid,
 		.write		= NULL,
 	},
+
 	{
 		.vendor		= "Generic",
 		.name		= "unknown SPI chip (REMS)",

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Wed Nov 23 10:13:48 2011	(r1470)
+++ trunk/print.c	Fri Dec  2 22:48:17 2011	(r1471)
@@ -545,6 +545,7 @@
 	B("abit",	"IS-10",		0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", "Reported by deejkuba at aol.com to flashrom at coreboot.org, no public archive. Missing board enable and/or M50FW040 unlocking. May work now."),
 	B("abit",	"KN8 Ultra",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra", NULL),
 	B("abit",	"NF-M2 nView",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
+	B("abit",	"NF-M2S",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2", NULL),
 	B("abit",	"NF7-S",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
 	B("abit",	"VA6",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6", NULL),
 	B("abit",	"VT6X4",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
@@ -622,6 +623,7 @@
 	B("ASUS",	"M4A79T Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=lhJiLTN5huPfCVkW", NULL),
 	B("ASUS",	"M4A87TD/USB3",		1, "http://www.asus.com/product.aspx?P_ID=nlWYrI9wlNIYHAaa", NULL),
 	B("ASUS",	"M4A89GTD PRO",		1, "http://www.asus.com/product.aspx?P_ID=Gdf0vtpVf72LTYgs", NULL),
+	B("ASUS",	"M5A99X EVO",		1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
 	B("ASUS",	"M6Ne",			0, "http://www.asus.com/Product.aspx?P_ID=IbqN4JCxeRiep4WN", "Untested board enable."),
 	B("ASUS",	"MEW-AM",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
 	B("ASUS",	"MEW-VM",		0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
@@ -657,8 +659,10 @@
 	B("ASUS",	"P5GDC Deluxe",		1, "http://www.asus.com/product.aspx?P_ID=AbeoopyNpI2TZixg", NULL),
 	B("ASUS",	"P5GDC-V Deluxe",	1, NULL, NULL),
 	B("ASUS",	"P5GD2/C variants",	0, NULL, "Untested board enable."),
+	B("ASUS",	"P5K-VM",		1, "http://www.asus.com/product.aspx?P_ID=EJybwaQ3J8goocW2", NULL),
 	B("ASUS",	"P5KC",			1, "http://www.asus.com/product.aspx?P_ID=fFZ8oUIGmLpwNMjj", NULL),
 	B("ASUS",	"P5L-MX",		1, "http://www.asus.com/product.aspx?P_ID=X70d3NCzH2DE9vWH", NULL),
+	B("ASUS",	"P5L-VM 1394",		1, "http://www.asus.com/product.aspx?P_ID=G0BQ4fIXoM1P38TZ", NULL),
 	B("ASUS",	"P5LD2",		0, NULL, "Untested board enable."),
 	B("ASUS",	"P5LP-LE (Lithium-UL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
 	B("ASUS",	"P5LP-LE (Epson OEM)",	1, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
@@ -677,7 +681,10 @@
 	B("ASUS",	"P7H55-M LX",		0, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
 	B("ASUS",	"P8B-E/4L",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8B WS",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H61 PRO",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8P67 (rev. 3.1)",	0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/product.aspx?P_ID=k81cpN8uEB01BpQ6", NULL),
+	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/product.aspx?P_ID=z1K4qLpLmyLfwXtw", NULL),
 	B("BCOM",	"WinNET100",		1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
 	B("Biostar",	"N68S3+",		1, NULL, NULL),
 	B("Biostar",	"M6TBA",		0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
@@ -818,7 +825,9 @@
 	B("MSI",	"MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
 	B("MSI",	"MS-7529 (G31TM-P21)",  1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
 	B("MSI",	"MS-7596 (785GM-E51)",  1, "http://www.msi.com/product/mb/785GM-E51.html", NULL),
-	B("MSI",	"MS-7599 (870-C45)",    1, "http://www.msi.com/product/mb/870-C45.html", NULL),
+	B("MSI",	"MS-7599 (870-C45)",	1, "http://www.msi.com/product/mb/870-C45.html", NULL),
+	B("MSI",	"MS-7613 (Iona-GL8E)",	0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("MSI",	"MS-7635 (H55M-ED55)",	0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("MSI",	"MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
 	B("MSI",	"MS-7642 (890GXM-G65)",	1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
 	B("MSI",	"MS-7696 (A75MA-G55)",	1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
@@ -830,6 +839,7 @@
 	B("PC Engines",	"Alix.1c",		1, "http://pcengines.ch/alix1c.htm", NULL),
 	B("PC Engines",	"Alix.2c2",		1, "http://pcengines.ch/alix2c2.htm", NULL),
 	B("PC Engines",	"Alix.2c3",		1, "http://pcengines.ch/alix2c3.htm", NULL),
+	B("PC Engines",	"Alix.2d3",		1, "http://pcengines.ch/alix2d3.htm", NULL),
 	B("PC Engines",	"Alix.3c3",		1, "http://pcengines.ch/alix3c3.htm", NULL),
 	B("PC Engines",	"Alix.3d3",		1, "http://pcengines.ch/alix3d3.htm", NULL),
 	B("PC Engines",	"WRAP.2E",		1, "http://pcengines.ch/wrap2e1.htm", NULL),
@@ -863,6 +873,7 @@
 	B("Supermicro",	"X8DTU-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
 	B("Supermicro",	"X8SIE(-F)",		0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
 	B("Supermicro",	"X8STi",		1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
+	B("Supermicro",	"X9SCL",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("T-Online",	"S-100",		1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
 	B("Tekram",	"P6Pro-A5",		1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
 	B("Termtek",	"TK-3370 (Rev:2.5B)",	1, NULL, NULL),
@@ -911,6 +922,7 @@
 	B("VIA",	"VB700X",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490", NULL),
 	B("ZOTAC",	"Fusion-ITX WiFi (FUSION350-A-E)", 1, NULL, NULL),
 	B("ZOTAC",	"GeForce 8200",		1, "http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92", NULL),
+	B("ZOTAC",	"H67-ITX WiFi (H67ITX-C-E)", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ZOTAC",	"ZBOX HD-ID11",		1, "http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75", NULL),
 #endif
 


From dhendrix at google.com  Sat Dec  3 02:38:20 2011
From: dhendrix at google.com (David Hendricks)
Date: Fri, 2 Dec 2011 17:38:20 -0800
Subject: [flashrom] Patches + RFC: Deal with locked ICH flash descriptor
	regions transparently
Message-ID: <CAKOoyUfnemMeEe6u7ZSQAynYsSbxbCcoz5N3yFSPxkLhBZ_+ag@mail.gmail.com>

The following patches (attached and in-lined below) add support for
"graceful" handling of certain errors and in particular the read/write
errors that occur on newer Intel chipsets. With a little work, it could be
extended to handle SPI hardware write protection schema, too.

Note: I think we should probably add a "I_want_a_brick" programmer
parameter for those daring enough to try this. I suspect certain OEM tools
use unknown Mebx
commands<http://support.dell.com/support/edocs/systems/latd630/en/amt/MEBX.htm>to
disable ME read/write protection when they do updates. Perhaps that
stuff can be added later as a board_enable thing.

The impetus for this is to overcome difficulties in dealing with new Intel
platforms which use their flash descriptor layout, like this (using Pontus'
H57 verbose output):
0x54: 0x00000000 (FREG0: Flash Descriptor)
0x00000000-0x00000fff is read-only
0x58: 0x07ff0600 (FREG1: BIOS)
0x00600000-0x007fffff is read-write
0x5C: 0x05ff0001 (FREG2: Management Engine)
0x00001000-0x005fffff is locked
0x60: 0x00000fff (FREG3: Gigabit Ethernet)
Gigabit Ethernet region is unused.
0x64: 0x00000fff (FREG4: Platform Data)
Platform Data region is unused.

In this case, the flashrom will abort due to a transaction error when it
attempts to read or write offsets 0x001000-0x05fffff, or when it attempt to
write new content to 0x000000-0x000fff.

With the patches applied, the low-level ICH code will handle all the
details of checking the address associated with an opcode against the
permissions set in the flash descriptor. If an operation cannot be
performed on a given region, an error code is propagated up the stack so
that high-level read/write logic can decide to skip that region. As is, the
patch will make the high-level logic fill in unreadable regions with 0xff
bytes (for reads) and will quietly skip over unwriteable regions (for
writes).

The biggest downside is, of course, that read/write operations no longer do
exactly what one might expect. A full read operation (flashrom -r) will
give you a ROM-sized image with 0xff bytes wherever read is forbidden (e.g.
where the management engine firmware lives). A full write operation will
skip forbidden regions (e.g. flash descriptor and ME) which may leave stuff
in an inconsistent and potentially unusable state (thanks, Intel!).

Signed-off-by: David Hendricks <dhendrix at google.com>

1-3_error_handling_helper_function.diff:
Index: flashrom-me/flash.h
===================================================================
--- flashrom-me.orig/flash.h
+++ flashrom-me/flash.h
@@ -226,12 +226,25 @@ int write_buf_to_file(unsigned char *buf
 #define OK 0
 #define NT 1    /* Not tested */

+/* what to do in case of an error */
+enum error_action {
+       error_fail,     /* fail immediately */
+       error_ignore,   /* non-fatal error; continue */
+};
+
 /* Something happened that shouldn't happen, but we can go on. */
 #define ERROR_NONFATAL 0x100

 /* Something happened that shouldn't happen, we'll abort. */
 #define ERROR_FATAL -0xee

+/* Operation failed due to access restriction set in programmer or flash
chip */
+#define ACCESS_DENIED -7
+extern enum error_action access_denied_action;
+
+/* convenience function for checking return codes */
+extern int ignore_error(int x);
+
 /* cli_output.c */
 /* Let gcc and clang check for correct printf-style format strings. */
 int print(int type, const char *fmt, ...) __attribute__((format(printf, 2,
3)));
Index: flashrom-me/flashrom.c
===================================================================
--- flashrom-me.orig/flashrom.c
+++ flashrom-me/flashrom.c
@@ -42,6 +42,25 @@ const char flashrom_version[] = FLASHROM
 char *chip_to_probe = NULL;
 int verbose = 0;

+/* error handling stuff */
+enum error_action access_denied_action = error_ignore;
+
+/* returns boolean (1 if caller should ignore error code, 0 if not) */
+int ignore_error(int err) {
+       int ret = 0;
+
+       switch(err) {
+       case ACCESS_DENIED:
+               if (access_denied_action == error_ignore)
+                       ret = 1;
+               break;
+       default:
+               break;
+       }
+
+       return ret;
+}
+
 static enum programmer programmer = PROGRAMMER_INVALID;

 static char *programmer_param = NULL;

2-3_update_spi_error_handling.diff:
Index: flashrom-me/spi.c
===================================================================
--- flashrom-me.orig/spi.c
+++ flashrom-me/spi.c
@@ -100,25 +100,35 @@ int default_spi_send_multicommand(struct
 int default_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int
start, unsigned int len)
 {
        unsigned int max_data = spi_programmer->max_data_read;
+       int ret;
        if (max_data == MAX_DATA_UNSPECIFIED) {
                msg_perr("%s called, but SPI read chunk size not defined "
                         "on this hardware. Please report a bug at "
                         "flashrom at flashrom.org\n", __func__);
                return 1;
        }
-       return spi_read_chunked(flash, buf, start, len, max_data);
+       rc = spi_read_chunked(flash, buf, start, len, max_data);
+       /* translate SPI-specific access denied error to generic error */
+       if (ret == SPI_ACCESS_DENIED)
+               rc = ACCESS_DENIED;
+       return ret;
 }

 int default_spi_write_256(struct flashchip *flash, uint8_t *buf, unsigned
int start, unsigned int len)
 {
        unsigned int max_data = spi_programmer->max_data_write;
+       int ret;
        if (max_data == MAX_DATA_UNSPECIFIED) {
                msg_perr("%s called, but SPI write chunk size not defined "
                         "on this hardware. Please report a bug at "
                         "flashrom at flashrom.org\n", __func__);
                return 1;
        }
-       return spi_write_chunked(flash, buf, start, len, max_data);
+       ret = spi_write_chunked(flash, buf, start, len, max_data);
+       /* translate SPI-specific access denied error to generic error */
+       if (ret == SPI_ACCESS_DENIED)
+               ret = ACCESS_DENIED;
+       return ret;
 }

 int spi_chip_read(struct flashchip *flash, uint8_t *buf, unsigned int
start, unsigned int len)
Index: flashrom-me/spi.h
===================================================================
--- flashrom-me.orig/spi.h
+++ flashrom-me/spi.h
@@ -125,5 +125,6 @@
 #define SPI_INVALID_LENGTH     -4
 #define SPI_FLASHROM_BUG       -5
 #define SPI_PROGRAMMER_ERROR   -6
+#define SPI_ACCESS_DENIED      -7

 #endif         /* !__SPI_H__ */
Index: flashrom-me/spi25.c
===================================================================
--- flashrom-me.orig/spi25.c
+++ flashrom-me/spi25.c
@@ -916,8 +916,10 @@ int spi_nbyte_program(unsigned int addr,

        result = spi_send_multicommand(cmds);
        if (result) {
-               msg_cerr("%s failed during command execution at address
0x%x\n",
-                       __func__, addr);
+               if (result != SPI_ACCESS_DENIED) {
+                       msg_cerr("%s failed during command execution at
address 0x%x\n",
+                               __func__, addr);
+               }
        }
        return result;
 }
@@ -970,7 +972,7 @@ int spi_nbyte_read(unsigned int address,
  */
 int spi_read_chunked(struct flashchip *flash, uint8_t *buf, unsigned int
start, unsigned int len, unsigned int chunksize)
 {
-       int rc = 0;
+       int rc = 0, chunk_status = 0;
        unsigned int i, j, starthere, lenhere, toread;
        unsigned int page_size = flash->page_size;

@@ -990,12 +992,26 @@ int spi_read_chunked(struct flashchip *f
                /* Length of bytes in the range in this page. */
                lenhere = min(start + len, (i + 1) * page_size) - starthere;
                for (j = 0; j < lenhere; j += chunksize) {
+                       uint8_t *bytes = buf + starthere - start + j;
+
                        toread = min(chunksize, lenhere - j);
-                       rc = spi_nbyte_read(starthere + j, buf + starthere
- start + j, toread);
-                       if (rc)
-                               break;
+                       chunk_status = spi_nbyte_read(starthere + j, bytes,
toread);
+
+                       if (chunk_status) {
+                               if (ignore_error(chunk_status)) {
+                                       /* fill this chunk with 0xff bytes
and
+                                          let caller know about the error
*/
+                                       memset(bytes, 0xff, toread);
+                                       rc = chunk_status;
+                                       chunk_status = 0;
+                                       continue;
+                               } else {
+                                       rc = chunk_status;
+                                       break;
+                               }
+                       }
                }
-               if (rc)
+               if (chunk_status)
                        break;
        }

Index: flashrom-me/flashrom.c
===================================================================
--- flashrom-me.orig/flashrom.c
+++ flashrom-me/flashrom.c
@@ -583,6 +583,7 @@ int verify_range(struct flashchip *flash
        unsigned int i;
        uint8_t *readbuf = malloc(len);
        int ret = 0, failcount = 0;
+       unsigned int chunksize;

        if (!len)
                goto out_free;
@@ -606,23 +607,35 @@ int verify_range(struct flashchip *flash
        if (!message)
                message = "VERIFY";

-       ret = flash->read(flash, readbuf, start, len);
-       if (ret) {
-               msg_gerr("Verification impossible because read failed "
-                        "at 0x%x (len 0x%x)\n", start, len);
-               return ret;
-       }
+       chunksize = min(flash->page_size, len);
+       for (i = 0; i < len; i += chunksize) {
+               int tmp, j;
+
+               tmp = flash->read(flash, readbuf + i, start + i, chunksize);
+
+               if (tmp) {
+                       ret = tmp;
+                       if (ignore_error(tmp)) {
+                               chunksize = min(flash->page_size, len - i);
+                               continue;
+                       } else {
+                               goto out_free;
+                       }
+               }

-       for (i = 0; i < len; i++) {
-               if (cmpbuf[i] != readbuf[i]) {
-                       /* Only print the first failure. */
-                       if (!failcount++)
-                               msg_cerr("%s FAILED at 0x%08x! "
-                                        "Expected=0x%02x, Read=0x%02x,",
-                                        message, start + i, cmpbuf[i],
-                                        readbuf[i]);
+               for (j = 0; j < chunksize; j++) {
+                       if (cmpbuf[i + j] != readbuf[i + j]) {
+                               /* Only print the first failure. */
+                               if (!failcount++)
+                                       msg_cerr("%s FAILED at 0x%08x! "
+                                                "Expected=0x%02x,
Read=0x%02x,",
+                                                message, start + i + j,
cmpbuf[i + j],
+                                                readbuf[j]);
+                       }
                }
+               chunksize = min(flash->page_size, len - i);
        }
+
        if (failcount) {
                msg_cerr(" failed byte count from 0x%08x-0x%08x: 0x%x\n",
                         start, start + len - 1, failcount);
@@ -1057,6 +1070,16 @@ int verify_flash(struct flashchip *flash

        ret = verify_range(flash, buf, 0, total_size, NULL);

+       if (ret == ACCESS_DENIED) {
+               msg_gdbg("Could not fully verify due to access error, ");
+               if (access_denied_action == error_ignore) {
+                       msg_gdbg("ignoring\n");
+                       ret = 0;
+               } else {
+                       msg_gdbg("aborting\n");
+               }
+       }
+
        if (!ret)
                msg_cinfo("VERIFIED.          \n");

@@ -1139,10 +1162,15 @@ int read_flash_to_file(struct flashchip
                ret = 1;
                goto out_free;
        }
-       if (flash->read(flash, buf, 0, size)) {
-               msg_cerr("Read operation failed!\n");
-               ret = 1;
-               goto out_free;
+
+       ret = flash->read(flash, buf, 0, size);
+       if (ret) {
+               if (ignore_error(ret)) {
+                       ret = 0;
+               } else {
+                       msg_cerr("Read operation failed!\n");
+                       goto out_free;
+               }
        }

        ret = write_buf_to_file(buf, size, filename);
@@ -1243,8 +1271,14 @@ static int erase_and_write_block_helper(
        if (need_erase(curcontents, newcontents, len, gran)) {
                msg_cdbg("E");
                ret = erasefn(flash, start, len);
-               if (ret)
+               if (ret) {
+                       if (ret == ACCESS_DENIED)
+                               msg_cdbg("D");
+                       else
+                               msg_cerr("ERASE FAILED!\n");
                        return ret;
+               }
+
                if (check_erased_range(flash, start, len)) {
                        msg_cerr("ERASE FAILED!\n");
                        return -1;
@@ -1262,8 +1296,11 @@ static int erase_and_write_block_helper(
                /* Needs the partial write function signature. */
                ret = flash->write(flash, newcontents + starthere,
                                   start + starthere, lenhere);
-               if (ret)
+               if (ret) {
+                       if (ret == ACCESS_DENIED)
+                               msg_cdbg("D");
                        return ret;
+               }
                starthere += lenhere;
                skip = 0;
        }
@@ -1284,7 +1321,7 @@ static int walk_eraseregions(struct flas
                                                        unsigned int len)),
                             void *param1, void *param2)
 {
-       int i, j;
+       int i, j, ret = 0;
        unsigned int start = 0;
        unsigned int len;
        struct block_eraser eraser = flash->block_erasers[erasefunction];
@@ -1300,15 +1337,19 @@ static int walk_eraseregions(struct flas
                                msg_cdbg(", ");
                        msg_cdbg("0x%06x-0x%06x", start,
                                     start + len - 1);
-                       if (do_something(flash, start, len, param1, param2,
-                                        eraser.block_erase)) {
-                               return 1;
+                       ret = do_something(flash, start, len, param1,
param2,
+                                          eraser.block_erase);
+                       if (ret) {
+                               if (ignore_error(ret))
+                                       ret = 0;
+                               else
+                                       return ret;
                        }
                        start += len;
                }
        }
        msg_cdbg("\n");
-       return 0;
+       return ret;
 }

 static int check_block_eraser(const struct flashchip *flash, int k, int
log)
@@ -1695,7 +1736,7 @@ int doit(struct flashchip *flash, int fo
 {
        uint8_t *oldcontents;
        uint8_t *newcontents;
-       int ret = 0;
+       int ret = 0, tmp;
        unsigned long size = flash->total_size * 1024;

        if (chip_safety_check(flash, force, read_it, write_it, erase_it,
verify_it)) {
@@ -1768,10 +1809,15 @@ int doit(struct flashchip *flash, int fo
         * takes time as well.
         */
        msg_cinfo("Reading old flash chip contents... ");
-       if (flash->read(flash, oldcontents, 0, size)) {
-               ret = 1;
-               msg_cinfo("FAILED.\n");
-               goto out;
+       tmp = flash->read(flash, oldcontents, 0, size);
+       if (tmp) {
+               if (ignore_error(tmp)) {
+                       msg_gdbg("ignoring error\n");
+               } else {
+                       ret = 1;
+                       msg_cinfo("FAILED.\n");
+                       goto out;
+               }
        }
        msg_cinfo("done.\n");


3-3_ichspi_deal_with_locked_regions.diff:
Index: flashrom-me/ichspi.c
===================================================================
--- flashrom-me.orig/ichspi.c
+++ flashrom-me/ichspi.c
@@ -983,6 +983,95 @@ static int run_opcode(OPCODE op, uint32_
        }
 }

+#define DEFAULT_NUM_FD_REGIONS 5
+static int num_fd_regions;
+
+const char *const region_names[] = {
+       "Flash Descriptor", "BIOS", "Management Engine",
+       "Gigabit Ethernet", "Platform Data"
+};
+
+enum fd_access_level {
+       FD_REGION_LOCKED,
+       FD_REGION_READ_ONLY,
+       FD_REGION_WRITE_ONLY,
+       FD_REGION_READ_WRITE,
+};
+
+struct fd_region_permission {
+       enum fd_access_level level;
+       const char *name;
+} fd_region_permissions[] = {
+       /* order corresponds to FRAP bitfield */
+       { FD_REGION_LOCKED, "locked" },
+       { FD_REGION_READ_ONLY, "read-only" },
+       { FD_REGION_WRITE_ONLY, "write-only" },
+       { FD_REGION_READ_WRITE, "read-write" },
+};
+
+/* FIXME: Replace usage of access_names with the region_access struct */
+const char *const access_names[4] = {
+       "locked", "read-only", "write-only", "read-write"
+};
+
+struct fd_region {
+       const char *name;
+       struct fd_region_permission *permission;
+       uint32_t base;
+       uint32_t limit;
+} fd_regions[] = {
+       /* order corresponds to flash descriptor */
+       { .name = "Flash Descriptor" },
+       { .name = "BIOS" },
+       { .name = "Management Engine" },
+       { .name = "Gigabit Ethernet" },
+       { .name = "Platform Data" },
+};
+
+static int check_fd_permissions(OPCODE *opcode, uint32_t addr, int count)
+{
+       int i;
+       uint8_t type = opcode->spi_type;
+       int ret = 0;
+
+       /* check flash descriptor permissions (if present) */
+       for (i = 0; i < num_fd_regions; i++) {
+               const char *name = fd_regions[i].name;
+               enum fd_access_level level;
+
+               if ((addr + count - 1 < fd_regions[i].base) ||
+                   (addr > fd_regions[i].limit))
+                       continue;
+
+               if (!fd_regions[i].permission) {
+                       msg_perr("No permissions set for flash region %s\n",
+                                 fd_regions[i].name);
+                       break;
+               }
+
+               level = fd_regions[i].permission->level;
+
+               if (type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS) {
+                       if (level != FD_REGION_READ_ONLY &&
+                           level != FD_REGION_READ_WRITE) {
+                               msg_pspew("%s: Cannot read address 0x%08x
in "
+                                         "region %s\n",
__func__,addr,name);
+                               ret = SPI_ACCESS_DENIED;
+                       }
+               } else if (type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) {
+                       if (level != FD_REGION_WRITE_ONLY &&
+                           level != FD_REGION_READ_WRITE) {
+                               msg_pspew("%s: Cannot write to address
0x%08x in"
+                                         "region %s\n",
__func__,addr,name);
+                               ret = SPI_ACCESS_DENIED;
+                       }
+               }
+               break;
+       }
+
+       return ret;
+}
+
 static int ich_spi_send_command(unsigned int writecnt, unsigned int
readcnt,
                    const unsigned char *writearr, unsigned char *readarr)
 {
@@ -1045,19 +1134,6 @@ static int ich_spi_send_command(unsigned
                return SPI_INVALID_LENGTH;
        }

-       /* if opcode-type requires an address */
-       if (opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS ||
-           opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) {
-               addr = (writearr[1] << 16) |
-                   (writearr[2] << 8) | (writearr[3] << 0);
-               if (addr < ichspi_bbar) {
-                       msg_perr("%s: Address 0x%06x below allowed "
-                                "range 0x%06x-0xffffff\n", __func__,
-                                addr, ichspi_bbar);
-                       return SPI_INVALID_ADDRESS;
-               }
-       }
-
        /* Translate read/write array/count.
         * The maximum data length is identical for the maximum read length
and
         * for the maximum write length excluding opcode and address.
Opcode and
@@ -1076,6 +1152,24 @@ static int ich_spi_send_command(unsigned
                count = readcnt;
        }

+       /* if opcode-type requires an address */
+       if (opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS ||
+           opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) {
+               addr = (writearr[1] << 16) |
+                   (writearr[2] << 8) | (writearr[3] << 0);
+               if (addr < ichspi_bbar) {
+                       msg_perr("%s: Address 0x%06x below allowed "
+                                "range 0x%06x-0xffffff\n", __func__,
+                                addr, ichspi_bbar);
+                       return SPI_INVALID_ADDRESS;
+               }
+               if (num_fd_regions > 0) {
+                       result = check_fd_permissions(opcode, addr, count);
+                       if (result)
+                               return result;
+               }
+       }
+
        result = run_opcode(*opcode, addr, count, data);
        if (result) {
                msg_pdbg("Running OPCODE 0x%02x failed ", opcode->opcode);
@@ -1421,32 +1515,25 @@ static int ich_spi_send_multicommand(str

 static void do_ich9_spi_frap(uint32_t frap, int i)
 {
-       static const char *const access_names[4] = {
-               "locked", "read-only", "write-only", "read-write"
-       };
-       static const char *const region_names[5] = {
-               "Flash Descriptor", "BIOS", "Management Engine",
-               "Gigabit Ethernet", "Platform Data"
-       };
-       uint32_t base, limit;
        int rwperms = (((ICH_BRWA(frap) >> i) & 1) << 1) |
                      (((ICH_BRRA(frap) >> i) & 1) << 0);
        int offset = ICH9_REG_FREG0 + i * 4;
        uint32_t freg = mmio_readl(ich_spibar + offset);

        msg_pdbg("0x%02X: 0x%08x (FREG%i: %s)\n",
-                    offset, freg, i, region_names[i]);
+                    offset, freg, i, fd_regions[i].name);

-       base  = ICH_FREG_BASE(freg);
-       limit = ICH_FREG_LIMIT(freg);
-       if (base > limit) {
+       fd_regions[i].base  = ICH_FREG_BASE(freg);
+       fd_regions[i].limit = ICH_FREG_LIMIT(freg) | 0x0fff;
+       fd_regions[i].permission = &fd_region_permissions[rwperms];
+       if (fd_regions[i].base > fd_regions[i].limit) {
                /* this FREG is disabled */
                msg_pdbg("%s region is unused.\n", region_names[i]);
                return;
        }

-       msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
-                access_names[rwperms]);
+       msg_pdbg("0x%08x-0x%08x is %s\n", fd_regions[i].base,
+                fd_regions[i].limit, fd_regions[i].permission->name);
 }

        /* In contrast to FRAP and the master section of the descriptor the
bits
@@ -1460,9 +1547,6 @@ static void do_ich9_spi_frap(uint32_t fr

 static void prettyprint_ich9_reg_pr(int i)
 {
-       static const char *const access_names[4] = {
-               "locked", "read-only", "write-only", "read-write"
-       };
        uint8_t off = ICH9_REG_PR0 + (i * 4);
        uint32_t pr = mmio_readl(ich_spibar + off);
        int rwperms = ICH_PR_PERMS(pr);
@@ -1647,6 +1731,7 @@ int ich_init_spi(struct pci_dev *dev, ui
                ich_init_opcodes();

                if (desc_valid) {
+                       num_fd_regions = DEFAULT_NUM_FD_REGIONS;
                        tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFC);
                        msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2);
                        prettyprint_ich9_reg_hsfc(tmp2);
@@ -1664,15 +1749,15 @@ int ich_init_spi(struct pci_dev *dev, ui
                        msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp));

                        /* Decode and print FREGx and FRAP registers */
-                       for (i = 0; i < 5; i++)
+                       for (i = 0; i < num_fd_regions; i++)
                                do_ich9_spi_frap(tmp, i);
                }

                /* try to disable PR locks before printing them */
                if (!ichspi_lock)
-                       for (i = 0; i < 5; i++)
+                       for (i = 0; i < num_fd_regions; i++)
                                ich9_set_pr(i, 0, 0);
-               for (i = 0; i < 5; i++)
+               for (i = 0; i < num_fd_regions; i++)
                        prettyprint_ich9_reg_pr(i);

                tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS);

-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
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From ronslinux at gmail.com  Sat Dec  3 16:10:05 2011
From: ronslinux at gmail.com (Ron Hossack)
Date: Sat, 3 Dec 2011 07:10:05 -0800
Subject: [flashrom] Gigabyte GA-MA785GM-US2H motherboard supported
Message-ID: <CAPVQmFHh9rLMB=d1iu8qJgOa=0AWqGxsM-hZA4iCjRz-Y2U7qA@mail.gmail.com>

I didn't find my specific MB listed and wanted to check and see if it's ok
to use flashrom with this one.

Info: http://www.gigabyte.us/products/product-page.aspx?pid=3141&dl=1#ov

Thanks
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From c-d.hailfinger.devel.2006 at gmx.net  Mon Dec  5 03:00:29 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 05 Dec 2011 03:00:29 +0100
Subject: [flashrom] [PATCH] Cross-compilation fixes
Message-ID: <4EDC25BD.1090704@gmx.net>

Switch from host OS detection to target OS detection.
Complain about unknown target OS/architecture.
Disable annoying format string warnings on DJGPP.

Native and cross-compilation now usually just require setting CC.
Examples:
make CC=i586-pc-msdosdjgpp-gcc
make CC="clang -m64"
make CC=i686-w64-mingw32-gcc

I tested the following compilation types:
i386 Linux native (gcc, clang)
i386 Linux -> x86_64 Linux (clang)
i386 Linux -> MinGW32
i386 Linux -> DJGPP

I'd appreciate tests for:
x86_64 Linux native
MinGW native
Cygwin native
powerpc Linux native
mips Linux native
Mac OS X native
*BSD native
cross-compile for anything you want to test
libpayload

Please check if the final executable has the right type (arch/OS) and
filename extension, and if make detects the right target arch/OS.

I expect problems with Cygwin. Please check and report.
There is a new target: "make libpayload" in case you don't want to
specify all tools by hand.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-crosscompile/os.h
===================================================================
--- flashrom-crosscompile/os.h	(Revision 0)
+++ flashrom-crosscompile/os.h	(Revision 0)
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2011 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/*
+ * Header file for OS checking.
+ */
+
+// Solaris
+#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#define __FLASHROM_OS__ "SunOS"
+// OS X
+#elif defined(__MACH__) && defined(__APPLE__)
+#define __FLASHROM_OS__ "Darwin"
+// FreeBSD
+#elif defined(__FreeBSD__)
+#define __FLASHROM_OS__ "FreeBSD"
+// DragonFlyBSD
+#elif defined(__DragonFly__)
+#define __FLASHROM_OS__ "DragonFlyBSD"
+// NetBSD
+#elif defined(__NetBSD__)
+#define __FLASHROM_OS__ "NetBSD"
+// OpenBSD
+#elif defined(__OpenBSD__)
+#define __FLASHROM_OS__ "OpenBSD"
+// DJGPP
+#elif defined(__DJGPP__)
+#define __FLASHROM_OS__ "DOS"
+// MinGW (always has _WIN32 available)
+#elif defined(__MINGW32__)
+#define __FLASHROM_OS__ "MinGW"
+// Cygwin (usually without _WIN32)
+#elif defined( __CYGWIN__)
+#define __FLASHROM_OS__ "Cygwin"
+// libpayload
+#elif defined(__LIBPAYLOAD__)
+#define __FLASHROM_OS__ "libpayload"
+// Linux
+#elif defined(__linux__)
+#define __FLASHROM_OS__ "Linux"
+#endif
+__FLASHROM_OS__
Index: flashrom-crosscompile/Makefile
===================================================================
--- flashrom-crosscompile/Makefile	(Revision 1471)
+++ flashrom-crosscompile/Makefile	(Arbeitskopie)
@@ -37,27 +37,40 @@
 CFLAGS += -Werror
 endif
 
-# FIXME We have to differentiate between host and target OS architecture.
-OS_ARCH	?= $(shell uname)
-ifneq ($(OS_ARCH), SunOS)
+# HOST_OS is only used to work around local toolchain issues.
+HOST_OS	?= $(shell uname)
+ifeq ($(HOST_OS), MINGW32_NT-5.1)
+# Explicitly set CC = gcc on MinGW, otherwise: "cc: command not found".
+CC = gcc
+endif
+ifneq ($(HOST_OS), SunOS)
 STRIP_ARGS = -s
 endif
-ifeq ($(OS_ARCH), Darwin)
+
+# Determine the destination processor architecture.
+# IMPORTANT: The following line must be placed before TARGET_OS is ever used
+# (of course), but should come after any lines setting CC because the line
+# below uses CC itself.
+override TARGET_OS := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E os.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
+
+ifeq ($(TARGET_OS), Darwin)
 CPPFLAGS += -I/opt/local/include -I/usr/local/include
 # DirectHW framework can be found in the DirectHW library.
 LDFLAGS += -framework IOKit -framework DirectHW -L/opt/local/lib -L/usr/local/lib
 endif
-ifeq ($(OS_ARCH), FreeBSD)
+ifeq ($(TARGET_OS), FreeBSD)
 CPPFLAGS += -I/usr/local/include
 LDFLAGS += -L/usr/local/lib
 endif
-ifeq ($(OS_ARCH), OpenBSD)
+ifeq ($(TARGET_OS), OpenBSD)
 CPPFLAGS += -I/usr/local/include
 LDFLAGS += -L/usr/local/lib
 endif
-ifeq ($(OS_ARCH), DOS)
+ifeq ($(TARGET_OS), DOS)
 EXEC_SUFFIX := .exe
 CPPFLAGS += -I../libgetopt -I../libpci/include
+# DJGPP has odd uint*_t definitions which cause lots of format string warnings.
+CPPFLAGS += -Wno-format
 # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt
 LIBS += ../libgetopt/libgetopt.a
 # Bus Pirate and Serprog are not supported under DOS (missing serial support).
@@ -84,9 +97,9 @@
 endif
 endif
 
-ifeq ($(OS_ARCH), MINGW32_NT-5.1)
-# Explicitly set CC = gcc on MinGW, otherwise: "cc: command not found".
-CC = gcc
+# FIXME: Should we check for Cygwin/MSVC as well?
+ifeq ($(TARGET_OS), MinGW)
+EXEC_SUFFIX := .exe
 # MinGW doesn't have the ffs() function, but we can use gcc's __builtin_ffs().
 CFLAGS += -Dffs=__builtin_ffs
 # libusb-win32/libftdi stuff is usually installed in /usr/local.
@@ -166,10 +179,7 @@
 endif
 endif
 
-ifeq ($(OS_ARCH), libpayload)
-CC:=CC=i386-elf-gcc lpgcc
-AR:=i386-elf-ar
-RANLIB:=i386-elf-ranlib
+ifeq ($(TARGET_OS), libpayload)
 CPPFLAGS += -DSTANDALONE
 ifeq ($(CONFIG_DUMMY), yes)
 UNSUPPORTED_FEATURES += CONFIG_DUMMY=yes
@@ -202,10 +212,10 @@
 # Determine the destination processor architecture.
 # IMPORTANT: The following line must be placed before ARCH is ever used
 # (of course), but should come after any lines setting CC because the line
-# below uses CC itself. In some cases we set CC based on OS_ARCH, see above.
-override ARCH := $(strip $(shell LC_ALL=C $(CC) -E arch.h 2>/dev/null | grep -v '^\#'))
+# below uses CC itself.
+override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
 
-ifeq ($(ARCH), "ppc")
+ifeq ($(ARCH), ppc)
 # There's no PCI port I/O support on PPC/PowerPC, yet.
 ifeq ($(CONFIG_NIC3COM), yes)
 UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes
@@ -348,7 +358,7 @@
 ifeq ($(CONFIG_INTERNAL), yes)
 FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1'
 PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o
-ifeq ($(ARCH),"x86")
+ifeq ($(ARCH),x86)
 PROGRAMMER_OBJS += it87spi.o it85spi.o sb600spi.o wbsio_spi.o mcp6x_spi.o
 PROGRAMMER_OBJS += ichspi.o ich_descriptors.o
 else
@@ -476,7 +486,7 @@
 endif
 
 ifeq ($(NEED_NET), yes)
-ifeq ($(OS_ARCH), SunOS)
+ifeq ($(TARGET_OS), SunOS)
 LIBS += -lsocket
 endif
 endif
@@ -485,18 +495,18 @@
 CHECK_LIBPCI = yes
 FEATURE_CFLAGS += -D'NEED_PCI=1'
 PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o
-ifeq ($(OS_ARCH), NetBSD)
+ifeq ($(TARGET_OS), NetBSD)
 # The libpci we want is called libpciutils on NetBSD and needs NetBSD libpci.
 LIBS += -lpciutils -lpci
 # For (i386|x86_64)_iopl(2).
 LIBS += -l$(shell uname -p)
 else
-ifeq ($(OS_ARCH), DOS)
+ifeq ($(TARGET_OS), DOS)
 # FIXME There needs to be a better way to do this
 LIBS += ../libpci/lib/libpci.a
 else
 LIBS += -lpci
-ifeq ($(OS_ARCH), OpenBSD)
+ifeq ($(TARGET_OS), OpenBSD)
 # For (i386|amd64)_iopl(2).
 LIBS += -l$(shell uname -m)
 endif
@@ -564,11 +574,16 @@
 		echo "found." || ( echo "not found."; \
 		rm -f .test.c .test$(EXEC_SUFFIX); exit 1)
 	@rm -f .test.c .test$(EXEC_SUFFIX)
-	@printf "ARCH is "
+	@printf "Target arch is "
 	@# FreeBSD wc will output extraneous whitespace.
-	@echo $(ARCH)|wc -l|grep -q '^[[:blank:]]*1[[:blank:]]*$$' ||	\
+	@echo $(ARCH)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' ||	\
 		( echo "unknown. Aborting."; exit 1)
 	@printf "%s\n" '$(ARCH)'
+	@printf "Target OS is "
+	@# FreeBSD wc will output extraneous whitespace.
+	@echo $(TARGET_OS)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' ||	\
+		( echo "unknown. Aborting."; exit 1)
+	@printf "%s\n" '$(TARGET_OS)'
 
 define LIBPCI_TEST
 /* Avoid a failing test due to libpci header symbol shadowing breakage */
@@ -684,7 +699,9 @@
 	@echo Created $(EXPORTDIR)/flashrom-$(RELEASENAME).tar.bz2
 
 djgpp-dos: clean
-	make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip WARNERROR=no OS_ARCH=DOS
+	make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip
+libpayload: clean
+	make CC="CC=i386-elf-gcc lpgcc" AR=i386-elf-ar RANLIB=i386-elf-ranlib
 
 .PHONY: all clean distclean compiler pciutils features export tarball dos featuresavailable
 


-- 
http://www.hailfinger.org/



From antonio.gottlieb at googlemail.com  Mon Dec  5 20:00:45 2011
From: antonio.gottlieb at googlemail.com (Antonio Gottlieb)
Date: Mon, 5 Dec 2011 20:00:45 +0100
Subject: [flashrom] (no subject)
Message-ID: <CAB0WHtyRsU7ZUU0mDH6+4MSEU0XS6bN6PvB+7t2jAK+u3xJAiw@mail.gmail.com>

flashrom v0.9.1-r946
No coreboot table found.
DMI string system-manufacturer: "To Be Filled By O.E.M."
DMI string system-product-name: "To Be Filled By O.E.M."
DMI string system-version: "To Be Filled By O.E.M."
DMI string baseboard-manufacturer: "                      "
DMI string baseboard-product-name: "AM2NF6G-VSTA"
DMI string baseboard-version: "                      "
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP61", enabling flash write... This chipset is
not really supported yet. Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
Guessed flash bus type is LPC
Found SMBus device 10de:03eb at 00:01:1
SPI BAR is at 0xbc000000, after clearing low bits BAR is at 0xbc000000
Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.
Please send the output of "flashrom -V" to flashrom at flashrom.org to
help us finish support for your chipset. Thanks.
OK.
This chipset supports the following protocols: LPC.
Calibrating delay loop... 653M loops per second, 100 myus = 213 us. OK.
Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for AMD Am29F040B, 512 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for ASD AE49F2008, 256 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT26F004, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT29C512, 64 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Atmel AT29C020, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for AMIC A25L40PT, 512 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for AMIC A25L40PU, 512 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for AMIC A29002B, 256 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for AMIC A29002T, 256 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for AMIC A29040B, 512 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for EMST F49B002UA, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Eon EN25B05, 64 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B05T, 64 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B10, 128 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B10T, 128 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B20, 256 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B20T, 256 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B40, 512 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B40T, 512 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B80, 1024 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B80T, 1024 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B16, 2048 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B16T, 2048 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B32, 4096 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B32T, 4096 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B64, 8192 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25B64T, 8192 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25D16, 2048 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25F05, 64 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25F10, 128 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25F20, 256 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25F40, 512 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25F80, 1024 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25F16, 2048 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN25F32, 4096 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for Eon EN29F010, 128 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type LPC
and chip bus type Parallel are incompatible.
Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type LPC
and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type LPC
and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type LPC
and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type LPC
and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type LPC
and chip bus type Parallel are incompatible.
Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Intel 28F004S5, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Intel 82802AB, 512 KB: skipped. Host bus type LPC and chip
bus type FWH are incompatible.
Probing for Intel 82802AC, 1024 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for Macronix MX25L512, 64 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Numonyx M25PE40, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for PMC Pm29F002T, 256 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for PMC Pm29F002B, 256 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Sharp LHF00L04, 1024 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for Spansion S25FL008A, 1024 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for SST SST25VF040B, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for SST SST28SF040A, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST29EE010, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST29LE010, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST29EE020A, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST29LE020, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST39SF512, 64 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for SST SST39SF010A, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST39SF020A, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST39SF040, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST39VF512, 64 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for SST SST39VF010, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST39VF020, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST39VF040, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST39VF080, 1024 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SST SST49LF002A/B, 256 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for SST SST49LF003A/B, 384 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for SST SST49LF004A/B, 512 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for SST SST49LF004C, 512 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for SST SST49LF008A, 1024 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for SST SST49LF008C, 1024 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for SST SST49LF016C, 2048 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for ST M25P05-A, 64 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P05.RES, 64 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P10-A, 128 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P10.RES, 128 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P20, 256 KB: skipped. Host bus type LPC and chip bus
type SPI are incompatible.
Probing for ST M25P40, 512 KB: skipped. Host bus type LPC and chip bus
type SPI are incompatible.
Probing for ST M25P40-old, 512 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P80, 1024 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P16, 2048 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P32, 4096 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P64, 8192 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M25P128, 16384 KB: skipped. Host bus type LPC and chip
bus type SPI are incompatible.
Probing for ST M29F002B, 256 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for ST M29F040B, 512 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for ST M29F400BT, 512 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for ST M29W010B, 128 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for ST M29W040B, 512 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for ST M29W512B, 64 KB: skipped. Host bus type LPC and chip
bus type Parallel are incompatible.
Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for ST M50FW002, 256 KB: skipped. Host bus type LPC and chip
bus type FWH are incompatible.
Probing for ST M50FW016, 2048 KB: skipped. Host bus type LPC and chip
bus type FWH are incompatible.
Probing for ST M50FW040, 512 KB: skipped. Host bus type LPC and chip
bus type FWH are incompatible.
Probing for ST M50FW080, 1024 KB: skipped. Host bus type LPC and chip
bus type FWH are incompatible.
Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff
Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Winbond W25x10, 128 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Winbond W25x20, 256 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Winbond W25x40, 512 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Winbond W25x80, 1024 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Winbond W25x16, 2048 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Winbond W25x32, 4096 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Winbond W25x64, 8192 KB: skipped. Host bus type LPC and
chip bus type SPI are incompatible.
Probing for Winbond W29C011, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Winbond W29C020C, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Winbond W29C040P, 512 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Winbond W29EE011, 128 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0xda, id2 0x54
Found chip "Winbond W39V040B" (512 KB, LPC) at physical address 0xfff80000.
Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0xda,
id2 0x54
Probing for Winbond W39V040FA, 512 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W49F002U, 256 KB: skipped. Host bus type LPC and
chip bus type Parallel are incompatible.
Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0xda, id2 0x54
Probing for Winbond W49V002FA, 256 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for Winbond W39V080FA, 1024 KB: skipped. Host bus type LPC and
chip bus type FWH are incompatible.
Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Host bus
type LPC and chip bus type FWH are incompatible.
Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type
LPC and chip bus type SPI are incompatible.
Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host
bus type LPC and chip bus type SPI are incompatible.
Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type LPC
and chip bus type SPI are incompatible.
Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type
LPC and chip bus type SPI are incompatible.
Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus
type LPC and chip bus type SPI are incompatible.
Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus
type LPC and chip bus type SPI are incompatible.
===
This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
Please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -rV,
-wV, -EV), and mention which mainboard or programmer you tested.
Thanks for your help!
===
No operations were specified.


From bblaauw at home.nl  Tue Dec  6 19:39:56 2011
From: bblaauw at home.nl (Bernd Blaauw)
Date: Tue, 06 Dec 2011 19:39:56 +0100
Subject: [flashrom] (no subject)
In-Reply-To: <CAB0WHtyRsU7ZUU0mDH6+4MSEU0XS6bN6PvB+7t2jAK+u3xJAiw@mail.gmail.com>
References: <CAB0WHtyRsU7ZUU0mDH6+4MSEU0XS6bN6PvB+7t2jAK+u3xJAiw@mail.gmail.com>
Message-ID: <4EDE617C.80803@home.nl>

Op 5-12-2011 20:00, Antonio Gottlieb schreef:
> flashrom v0.9.1-r946

There's a decent chance people will ask you to retest against either 
latest officially released version, or build your own from most recent 
sourcecode. All bits help though :)


From zakrzewskim at wp.pl  Tue Dec  6 20:33:05 2011
From: zakrzewskim at wp.pl (Marek Zakrzewski)
Date: Tue, 6 Dec 2011 20:33:05 +0100
Subject: [flashrom] ASUS P8H67-M PRO not working
Message-ID: <6555375D69694322A989477975794E7F@MacPro>

flashrom -V

 

flashrom v0.9.4-r1395 on Linux 2.6.32-131.17.1.el6.x86_64 (x86_64), built
with libpci 3.1.4, GCC 4.4.5 20110214 (Red Hat 4.4.5-6), little endian

flashrom is free software, get the source code at http://www.flashrom.org

 

Calibrating delay loop... OS timer resolution is 1 usecs, 3409M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus
= 10003 us, 4 myus = 4 us, OK.

Initializing internal programmer

No coreboot table found.

DMI string system-manufacturer: "System manufacturer"

DMI string system-product-name: "System Product Name"

DMI string system-version: "System Version"

DMI string baseboard-manufacturer: "ASUSTeK Computer INC."

DMI string baseboard-product-name: "P8H67-M PRO"

DMI string baseboard-version: "Rev 1.xx"

DMI string chassis-type: "Desktop"

Found chipset "Intel H67" with PCI ID 8086:1c4a. 

This chipset is marked as untested. If you are using an up-to-date version

of flashrom please email a report to flashrom at flashrom.org including a

verbose (-V) log. Thank you!

Enabling flash write... 

0xfff80000/0xffb80000 FWH IDSEL: 0x0

0xfff00000/0xffb00000 FWH IDSEL: 0x0

0xffe80000/0xffa80000 FWH IDSEL: 0x1

0xffe00000/0xffa00000 FWH IDSEL: 0x1

0xffd80000/0xff980000 FWH IDSEL: 0x2

0xffd00000/0xff900000 FWH IDSEL: 0x2

0xffc80000/0xff880000 FWH IDSEL: 0x3

0xffc00000/0xff800000 FWH IDSEL: 0x3

0xff700000/0xff300000 FWH IDSEL: 0x4

0xff600000/0xff200000 FWH IDSEL: 0x5

0xff500000/0xff100000 FWH IDSEL: 0x6

0xff400000/0xff000000 FWH IDSEL: 0x7

0xfff80000/0xffb80000 FWH decode enabled

0xfff00000/0xffb00000 FWH decode enabled

0xffe80000/0xffa80000 FWH decode enabled

0xffe00000/0xffa00000 FWH decode enabled

0xffd80000/0xff980000 FWH decode enabled

0xffd00000/0xff900000 FWH decode enabled

0xffc80000/0xff880000 FWH decode enabled

0xffc00000/0xff800000 FWH decode enabled

0xff700000/0xff300000 FWH decode disabled

0xff600000/0xff200000 FWH decode disabled

0xff500000/0xff100000 FWH decode disabled

0xff400000/0xff000000 FWH decode disabled

Maximum FWH chip size: 0x100000 bytes

BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0

 

Root Complex Register Block address = 0xfed1c000

GCS = 0xc24: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x3 (LPC)

Top Swap : not enabled

SPIBAR = 0xfed1c000 + 0x3800

0x04: 0x6008 (HSFS)

HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0

0x06: 0x0000 (HSFC)

HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0

0x08: 0x00000000 (FADDR)

0x50: 0x00000a0b (FRAP)

BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b

0x54: 0x00000000 (FREG0: Flash Descriptor)

0x00000000-0x00000fff is read-only

0x58: 0x03ff0180 (FREG1: BIOS)

0x00180000-0x003fffff is read-write

0x5C: 0x017f0001 (FREG2: Management Engine)

0x00001000-0x0017ffff is locked

0x60: 0x00000fff (FREG3: Gigabit Ethernet)

Gigabit Ethernet region is unused.

0x64: 0x00000fff (FREG4: Platform Data)

Platform Data region is unused.

0x74: 0x00000000 (PR0)

0x78: 0x00000000 (PR1)

0x7C: 0x00000000 (PR2)

0x80: 0x00000000 (PR3)

0x84: 0x00000000 (PR4)

0x90: 0x84 (SSFS)

SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0

0x91: 0xf84140 (SSFC)

SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=1, SME=0, SCF=0

0x94: 0x0006     (PREOP)

0x96: 0x043b     (OPTYPE)

0x98: 0x05200302 (OPMENU)

0x9C: 0x0000019f (OPMENU+4)

0xA0: 0x00000000 (BBAR)

0xD0: 0x00000000 (FPB)

Programming OPCODES... 

program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190

done

preop0=0x06, preop1=0x50

op[0]=0x02, 3, 0

op[1]=0x03, 2, 0

op[2]=0xd8, 3, 0

op[3]=0x05, 0, 0

op[4]=0x90, 2, 0

op[5]=0x01, 1, 0

op[6]=0x9f, 0, 0

op[7]=0xc7, 1, 0

 

SPI Read Configuration: prefetching disabled, caching enabled, OK.

This chipset supports the following protocols: FWH, SPI.

Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Chip status register is 00

Chip status register: Status Register Write Disable (SRWD) is not set

Chip status register: Bit 6 is not set

Chip status register: Bit 5 / Block Protect 3 (BP3) is not set

Chip status register: Bit 4 / Block Protect 2 (BP2) is not set

Chip status register: Bit 3 / Block Protect 1 (BP1) is not set

Chip status register: Bit 2 / Block Protect 0 (BP0) is not set

Chip status register: Write Enable Latch (WEL) is not set

Chip status register: Write In Progress (WIP/BUSY) is not set

Found Macronix flash chip "MX25L3205" (4096 kB, SPI) at physical address
0xffc00000.

Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content

Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x15

Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15

Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25LF040A.RES, 512 kB: 

program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190

on-the-fly OPCODE (0xAB) re-programmed, op-pos=2

probe_spi_res2: id1 0x15, id2 0x15

Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15

Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xac, id2
0x94, id1 parity violation, id1 is normal flash content, id2 is normal flash
content

Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content

Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content

Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content

Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.

Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.

Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.

Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported
size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content

Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xc2, id2 0x2016

Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2,
id2 0x15

No operations were specified.

Restoring MMIO space at 0x7f5a8d0b58a0

Restoring MMIO space at 0x7f5a8d0b589c

Restoring MMIO space at 0x7f5a8d0b5898

Restoring MMIO space at 0x7f5a8d0b5896

Restoring MMIO space at 0x7f5a8d0b5894

Restoring PCI config space for 00:1f:0 reg 0xdc

 

flashrom -w -V

 

flashrom v0.9.4-r1395 on Linux 2.6.32-131.17.1.el6.x86_64 (x86_64), built
with libpci 3.1.4, GCC 4.4.5 20110214 (Red Hat 4.4.5-6), little endian

flashrom is free software, get the source code at http://www.flashrom.org

 

Calibrating delay loop... OS timer resolution is 1 usecs, 3409M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus
= 10003 us, 4 myus = 4 us, OK.

Initializing internal programmer

No coreboot table found.

DMI string system-manufacturer: "System manufacturer"

DMI string system-product-name: "System Product Name"

DMI string system-version: "System Version"

DMI string baseboard-manufacturer: "ASUSTeK Computer INC."

DMI string baseboard-product-name: "P8H67-M PRO"

DMI string baseboard-version: "Rev 1.xx"

DMI string chassis-type: "Desktop"

Found chipset "Intel H67" with PCI ID 8086:1c4a. 

This chipset is marked as untested. If you are using an up-to-date version

of flashrom please email a report to flashrom at flashrom.org including a

verbose (-V) log. Thank you!

Enabling flash write... 

0xfff80000/0xffb80000 FWH IDSEL: 0x0

0xfff00000/0xffb00000 FWH IDSEL: 0x0

0xffe80000/0xffa80000 FWH IDSEL: 0x1

0xffe00000/0xffa00000 FWH IDSEL: 0x1

0xffd80000/0xff980000 FWH IDSEL: 0x2

0xffd00000/0xff900000 FWH IDSEL: 0x2

0xffc80000/0xff880000 FWH IDSEL: 0x3

0xffc00000/0xff800000 FWH IDSEL: 0x3

0xff700000/0xff300000 FWH IDSEL: 0x4

0xff600000/0xff200000 FWH IDSEL: 0x5

0xff500000/0xff100000 FWH IDSEL: 0x6

0xff400000/0xff000000 FWH IDSEL: 0x7

0xfff80000/0xffb80000 FWH decode enabled

0xfff00000/0xffb00000 FWH decode enabled

0xffe80000/0xffa80000 FWH decode enabled

0xffe00000/0xffa00000 FWH decode enabled

0xffd80000/0xff980000 FWH decode enabled

0xffd00000/0xff900000 FWH decode enabled

0xffc80000/0xff880000 FWH decode enabled

0xffc00000/0xff800000 FWH decode enabled

0xff700000/0xff300000 FWH decode disabled

0xff600000/0xff200000 FWH decode disabled

0xff500000/0xff100000 FWH decode disabled

0xff400000/0xff000000 FWH decode disabled

Maximum FWH chip size: 0x100000 bytes

BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0

 

Root Complex Register Block address = 0xfed1c000

GCS = 0xc24: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x3 (LPC)

Top Swap : not enabled

SPIBAR = 0xfed1c000 + 0x3800

0x04: 0x6008 (HSFS)

HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0

0x06: 0x0000 (HSFC)

HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0

0x08: 0x00001000 (FADDR)

0x50: 0x00000a0b (FRAP)

BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b

0x54: 0x00000000 (FREG0: Flash Descriptor)

0x00000000-0x00000fff is read-only

0x58: 0x03ff0180 (FREG1: BIOS)

0x00180000-0x003fffff is read-write

0x5C: 0x017f0001 (FREG2: Management Engine)

0x00001000-0x0017ffff is locked

0x60: 0x00000fff (FREG3: Gigabit Ethernet)

Gigabit Ethernet region is unused.

0x64: 0x00000fff (FREG4: Platform Data)

Platform Data region is unused.

0x74: 0x00000000 (PR0)

0x78: 0x00000000 (PR1)

0x7C: 0x00000000 (PR2)

0x80: 0x00000000 (PR3)

0x84: 0x00000000 (PR4)

0x90: 0x84 (SSFS)

SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0

0x91: 0xf80000 (SSFC)

SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0

0x94: 0x0006     (PREOP)

0x96: 0x043b     (OPTYPE)

0x98: 0x05200302 (OPMENU)

0x9C: 0x0000019f (OPMENU+4)

0xA0: 0x00000000 (BBAR)

0xD0: 0x00000000 (FPB)

Programming OPCODES... 

program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190

done

preop0=0x06, preop1=0x50

op[0]=0x02, 3, 0

op[1]=0x03, 2, 0

op[2]=0xd8, 3, 0

op[3]=0x05, 0, 0

op[4]=0x90, 2, 0

op[5]=0x01, 1, 0

op[6]=0x9f, 0, 0

op[7]=0xc7, 1, 0

 

SPI Read Configuration: prefetching disabled, caching enabled, OK.

This chipset supports the following protocols: FWH, SPI.

Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Chip status register is 00

Chip status register: Status Register Write Disable (SRWD) is not set

Chip status register: Bit 6 is not set

Chip status register: Bit 5 / Block Protect 3 (BP3) is not set

Chip status register: Bit 4 / Block Protect 2 (BP2) is not set

Chip status register: Bit 3 / Block Protect 1 (BP1) is not set

Chip status register: Bit 2 / Block Protect 0 (BP0) is not set

Chip status register: Write Enable Latch (WEL) is not set

Chip status register: Write In Progress (WIP/BUSY) is not set

Found Macronix flash chip "MX25L3205" (4096 kB, SPI) at physical address
0xffc00000.

Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content

Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content

Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x15

Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15

Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST25LF040A.RES, 512 kB: 

program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190

on-the-fly OPCODE (0xAB) re-programmed, op-pos=2

probe_spi_res2: id1 0x15, id2 0x15

Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15

Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xac, id2
0x94, id1 parity violation, id1 is normal flash content, id2 is normal flash
content

Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content

Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content

Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content

Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.

Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.

Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.

Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported
size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content

Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016

Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content

Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content

Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content

Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xc2, id2 0x2016

Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016

Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016

Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xc2, id2 0x2016

Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2,
id2 0x15

Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.

Reading old flash chip contents... SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0

SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0

Running OPCODE 0x03 failed at address 0x001000 (payload length was 64).

FAILED.

Restoring MMIO space at 0x7fe2d4fca8a0

Restoring MMIO space at 0x7fe2d4fca89c

Restoring MMIO space at 0x7fe2d4fca898

Restoring MMIO space at 0x7fe2d4fca896

Restoring MMIO space at 0x7fe2d4fca894

Restoring PCI config space for 00:1f:0 reg 0xdc

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From 000666 at dr.com  Sun Dec  4 17:01:39 2011
From: 000666 at dr.com (panagiotis lianeas)
Date: Sun, 04 Dec 2011 11:01:39 -0500
Subject: [flashrom] (no subject)
Message-ID: <20111204160140.134680@gmx.com>

hi my name is Pete....I'm trying to replace my bios with core-boot.....i did the con-fig as seen on the net....
 i also saw the warning.....IF SOMETHING GOES WRONG etc. i was wondering if somebody can guide me
 so nothing will go wrong....be happy to call one of you guys...and if applicable make a donation...

 thanks for your time.....
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From paulepanter at users.sourceforge.net  Wed Dec  7 08:49:22 2011
From: paulepanter at users.sourceforge.net (Paul Menzel)
Date: Wed, 07 Dec 2011 08:49:22 +0100
Subject: [flashrom] ASUS P8H67-M PRO not working: Running OPCODE 0x03
 failed at address 0x001000 (payload length was 64).
In-Reply-To: <6555375D69694322A989477975794E7F@MacPro>
References: <6555375D69694322A989477975794E7F@MacPro>
Message-ID: <1323244162.32367.37.camel@mattotaupa>

Dear Marek,


thank you for your message.

Please do just send plain text message and no HTML message [1].


Am Dienstag, den 06.12.2011, 20:33 +0100 schrieb Marek Zakrzewski:
> flashrom -V
>
> flashrom v0.9.4-r1395 on Linux 2.6.32-131.17.1.el6.x86_64 (x86_64), built
> with libpci 3.1.4, GCC 4.4.5 20110214 (Red Hat 4.4.5-6), little endian

You can also install the version from SVN as in documented in [2]. You
can skip `sudo make install` and just run `sudo ./flashrom` from the
directory you ran `make` in.

> flashrom is free software, get the source code at http://www.flashrom.org
> 
>  
> 
> Calibrating delay loop... OS timer resolution is 1 usecs, 3409M loops per
> second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus
> = 10003 us, 4 myus = 4 us, OK.
> 
> Initializing internal programmer
> 
> No coreboot table found.
> 
> DMI string system-manufacturer: "System manufacturer"
> 
> DMI string system-product-name: "System Product Name"
> 
> DMI string system-version: "System Version"
> 
> DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
> 
> DMI string baseboard-product-name: "P8H67-M PRO"
> 
> DMI string baseboard-version: "Rev 1.xx"
> 
> DMI string chassis-type: "Desktop"
> 
> Found chipset "Intel H67" with PCI ID 8086:1c4a. 
> 
> This chipset is marked as untested. If you are using an up-to-date version
> 
> of flashrom please email a report to flashrom at flashrom.org including a
> 
> verbose (-V) log. Thank you!

[?]

> flashrom -w -V

It looks like you did not pass any file name for the write operation.

> flashrom v0.9.4-r1395 on Linux 2.6.32-131.17.1.el6.x86_64 (x86_64), built
> with libpci 3.1.4, GCC 4.4.5 20110214 (Red Hat 4.4.5-6), little endian
> 
> flashrom is free software, get the source code at http://www.flashrom.org
> 
>  
> 
> Calibrating delay loop... OS timer resolution is 1 usecs, 3409M loops per
> second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus
> = 10003 us, 4 myus = 4 us, OK.
> 
> Initializing internal programmer
> 
> No coreboot table found.
> 
> DMI string system-manufacturer: "System manufacturer"
> 
> DMI string system-product-name: "System Product Name"
> 
> DMI string system-version: "System Version"
> 
> DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
> 
> DMI string baseboard-product-name: "P8H67-M PRO"
> 
> DMI string baseboard-version: "Rev 1.xx"
> 
> DMI string chassis-type: "Desktop"
> 
> Found chipset "Intel H67" with PCI ID 8086:1c4a. 
> 
> This chipset is marked as untested. If you are using an up-to-date version
> 
> of flashrom please email a report to flashrom at flashrom.org including a
> 
> verbose (-V) log. Thank you!
> 
> Enabling flash write... 

[?]

> Reading old flash chip contents... SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0
> 
> SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0
> 
> Running OPCODE 0x03 failed at address 0x001000 (payload length was 64).
> 
> FAILED.
> 
> Restoring MMIO space at 0x7fe2d4fca8a0
> 
> Restoring MMIO space at 0x7fe2d4fca89c
> 
> Restoring MMIO space at 0x7fe2d4fca898
> 
> Restoring MMIO space at 0x7fe2d4fca896
> 
> Restoring MMIO space at 0x7fe2d4fca894
> 
> Restoring PCI config space for 00:1f:0 reg 0xdc

You should try the version from SVN and then try to read the chip
content first. For writing you should make sure you have means to
recover and be sure that a developer is around for example on IRC if
something went wrong.


Thanks,

Paul


[1] http://email.about.com/cs/outlooktips/qt/et070203.htm
[2] http://flashrom.org/Downloads
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From zakrzewskim at wp.pl  Wed Dec  7 08:54:24 2011
From: zakrzewskim at wp.pl (Marek Zakrzewski)
Date: Wed, 7 Dec 2011 08:54:24 +0100
Subject: [flashrom] ASUS P8H67-M PRO not working
Message-ID: <CB31876A034F4017B454C0E7B856E8AF@MacPro>

Flashrom latest version from SVN.

flashrom -V

flashrom v0.9.4-r1395 on Linux 2.6.32-131.17.1.el6.x86_64 (x86_64), built
with libpci 3.1.4, GCC 4.4.5 20110214 (Red Hat 4.4.5-6), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 3409M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus
= 10003 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "System manufacturer"
DMI string system-product-name: "System Product Name"
DMI string system-version: "System Version"
DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
DMI string baseboard-product-name: "P8H67-M PRO"
DMI string baseboard-version: "Rev 1.xx"
DMI string chassis-type: "Desktop"
Found chipset "Intel H67" with PCI ID 8086:1c4a. 
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... 
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode enabled
0xffe00000/0xffa00000 FWH decode enabled
0xffd80000/0xff980000 FWH decode enabled
0xffd00000/0xff900000 FWH decode enabled
0xffc80000/0xff880000 FWH decode enabled
0xffc00000/0xff800000 FWH decode enabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0

Root Complex Register Block address = 0xfed1c000
GCS = 0xc24: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x3 (LPC)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x6008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x00000000 (FADDR)
0x50: 0x00000a0b (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b
0x54: 0x00000000 (FREG0: Flash Descriptor)
0x00000000-0x00000fff is read-only
0x58: 0x03ff0180 (FREG1: BIOS)
0x00180000-0x003fffff is read-write
0x5C: 0x017f0001 (FREG2: Management Engine)
0x00001000-0x0017ffff is locked
0x60: 0x00000fff (FREG3: Gigabit Ethernet)
Gigabit Ethernet region is unused.
0x64: 0x00000fff (FREG4: Platform Data)
Platform Data region is unused.
0x74: 0x00000000 (PR0)
0x78: 0x00000000 (PR1)
0x7C: 0x00000000 (PR2)
0x80: 0x00000000 (PR3)
0x84: 0x00000000 (PR4)
0x90: 0x84 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0xf84140 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=1, SME=0, SCF=0
0x94: 0x0006???? (PREOP)
0x96: 0x043b???? (OPTYPE)
0x98: 0x05200302 (OPMENU)
0x9C: 0x0000019f (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xD0: 0x00000000 (FPB)
Programming OPCODES... 
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
preop0=0x06, preop1=0x50
op[0]=0x02, 3, 0
op[1]=0x03, 2, 0
op[2]=0xd8, 3, 0
op[3]=0x05, 0, 0
op[4]=0x90, 2, 0
op[5]=0x01, 1, 0
op[6]=0x9f, 0, 0
op[7]=0xc7, 1, 0

SPI Read Configuration: prefetching disabled, caching enabled, OK.
This chipset supports the following protocols: FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found Macronix flash chip "MX25L3205" (4096 kB, SPI) at physical address
0xffc00000.
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x15
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25LF040A.RES, 512 kB: 
program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190
on-the-fly OPCODE (0xAB) re-programmed, op-pos=2
probe_spi_res2: id1 0x15, id2 0x15
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xac, id2
0x94, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported
size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xc2, id2 0x2016
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2,
id2 0x15
No operations were specified.
Restoring MMIO space at 0x7f5a8d0b58a0
Restoring MMIO space at 0x7f5a8d0b589c
Restoring MMIO space at 0x7f5a8d0b5898
Restoring MMIO space at 0x7f5a8d0b5896
Restoring MMIO space at 0x7f5a8d0b5894
Restoring PCI config space for 00:1f:0 reg 0xdc

flashrom -w -V

flashrom v0.9.4-r1395 on Linux 2.6.32-131.17.1.el6.x86_64 (x86_64), built
with libpci 3.1.4, GCC 4.4.5 20110214 (Red Hat 4.4.5-6), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 3409M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus
= 10003 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "System manufacturer"
DMI string system-product-name: "System Product Name"
DMI string system-version: "System Version"
DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
DMI string baseboard-product-name: "P8H67-M PRO"
DMI string baseboard-version: "Rev 1.xx"
DMI string chassis-type: "Desktop"
Found chipset "Intel H67" with PCI ID 8086:1c4a. 
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... 
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode enabled
0xffe00000/0xffa00000 FWH decode enabled
0xffd80000/0xff980000 FWH decode enabled
0xffd00000/0xff900000 FWH decode enabled
0xffc80000/0xff880000 FWH decode enabled
0xffc00000/0xff800000 FWH decode enabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0

Root Complex Register Block address = 0xfed1c000
GCS = 0xc24: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x3 (LPC)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x6008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x00001000 (FADDR)
0x50: 0x00000a0b (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b
0x54: 0x00000000 (FREG0: Flash Descriptor)
0x00000000-0x00000fff is read-only
0x58: 0x03ff0180 (FREG1: BIOS)
0x00180000-0x003fffff is read-write
0x5C: 0x017f0001 (FREG2: Management Engine)
0x00001000-0x0017ffff is locked
0x60: 0x00000fff (FREG3: Gigabit Ethernet)
Gigabit Ethernet region is unused.
0x64: 0x00000fff (FREG4: Platform Data)
Platform Data region is unused.
0x74: 0x00000000 (PR0)
0x78: 0x00000000 (PR1)
0x7C: 0x00000000 (PR2)
0x80: 0x00000000 (PR3)
0x84: 0x00000000 (PR4)
0x90: 0x84 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0xf80000 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0
0x94: 0x0006???? (PREOP)
0x96: 0x043b???? (OPTYPE)
0x98: 0x05200302 (OPMENU)
0x9C: 0x0000019f (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xD0: 0x00000000 (FPB)
Programming OPCODES... 
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
preop0=0x06, preop1=0x50
op[0]=0x02, 3, 0
op[1]=0x03, 2, 0
op[2]=0xd8, 3, 0
op[3]=0x05, 0, 0
op[4]=0x90, 2, 0
op[5]=0x01, 1, 0
op[6]=0x9f, 0, 0
op[7]=0xc7, 1, 0

SPI Read Configuration: prefetching disabled, caching enabled, OK.
This chipset supports the following protocols: FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found Macronix flash chip "MX25L3205" (4096 kB, SPI) at physical address
0xffc00000.
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x15
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST25LF040A.RES, 512 kB: 
program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190
on-the-fly OPCODE (0xAB) re-programmed, op-pos=2
probe_spi_res2: id1 0x15, id2 0x15
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x15
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xac, id2
0x94, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported
size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x57, id2 0x51, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x71, id2 0xfd, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2016
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x71, id2
0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2016
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2016
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xc2, id2 0x2016
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2,
id2 0x15
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0
SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0
Running OPCODE 0x03 failed at address 0x001000 (payload length was 64).
FAILED.
Restoring MMIO space at 0x7fe2d4fca8a0
Restoring MMIO space at 0x7fe2d4fca89c
Restoring MMIO space at 0x7fe2d4fca898
Restoring MMIO space at 0x7fe2d4fca896
Restoring MMIO space at 0x7fe2d4fca894
Restoring PCI config space for 00:1f:0 reg 0xdc



From stefan.tauner at student.tuwien.ac.at  Wed Dec  7 13:19:11 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 7 Dec 2011 13:19:11 +0100
Subject: [flashrom] Patches + RFC: Deal with locked ICH flash descriptor
 regions transparently
In-Reply-To: <CAKOoyUfnemMeEe6u7ZSQAynYsSbxbCcoz5N3yFSPxkLhBZ_+ag@mail.gmail.com>
References: <CAKOoyUfnemMeEe6u7ZSQAynYsSbxbCcoz5N3yFSPxkLhBZ_+ag@mail.gmail.com>
Message-ID: <201112071218.pB7CIGji021768@mail2.student.tuwien.ac.at>

hey and thanks for working on getting stuff back upstream!

i have very little time at the moment (and the next few weeks) so i
just skimmed over the patches a few days ago and will just mention the
main points i noticed.

On Fri, 2 Dec 2011 17:38:20 -0800
David Hendricks <dhendrix at google.com> wrote:

> The following patches (attached and in-lined below) add support for
> "graceful" handling of certain errors and in particular the read/write
> errors that occur on newer Intel chipsets. With a little work, it could be
> extended to handle SPI hardware write protection schema, too.

1. the patches seemed to be divided in a little bit odd way, but that
might actually be because i did not read that carefully. btw please
post one patch per mail so that patchwork recognize them all.

> Note: I think we should probably add a "I_want_a_brick" programmer
> parameter for those daring enough to try this. I suspect certain OEM tools
> use unknown Mebx
> commands<http://support.dell.com/support/edocs/systems/latd630/en/amt/MEBX.htm>to
> disable ME read/write protection when they do updates. Perhaps that
> stuff can be added later as a board_enable thing.

2. i dont know enough about MEBx, but i have not found any mention of
it in any official documentation about ME unlocking - public or otherwise.
the user interface as shown on the dell screenshot might not be
accessible for users. i need to test if the MEBx settings have any
influence on the ICH registers on my ICH10 based (and locked) intel
board. wont happen soon though.

3. the official way to disabled the ME locking is via an HECI?/MEI?
service? with? the? HMRFPO? Enable? Intel? command?. the MEI protocol is
packet-based and well documented including an open source linux kernel
module. i have ported this to flashrom and will try to get it into a
mergeable state in the future. the only missing part then is the right
MEI command/reply sequence to unlock the ME region. the integration
would not use board enables but the unlocking would be done
automatically in ich_init (and re-enabling in shutdown, if we could
figure out how... not that important imho because it is security be
obscurity anyway). the HMRFPO command is documented in the BIOS writer
guide(s).

> With the patches applied, the low-level ICH code will handle all the
> details of checking the address associated with an opcode against the
> permissions set in the flash descriptor. If an operation cannot be
> performed on a given region, an error code is propagated up the stack so
> that high-level read/write logic can decide to skip that region. As is, the
> patch will make the high-level logic fill in unreadable regions with 0xff
> bytes (for reads) and will quietly skip over unwriteable regions (for
> writes).
> 
> The biggest downside is, of course, that read/write operations no longer do
> exactly what one might expect. A full read operation (flashrom -r) will
> give you a ROM-sized image with 0xff bytes wherever read is forbidden (e.g.
> where the management engine firmware lives). A full write operation will
> skip forbidden regions (e.g. flash descriptor and ME) which may leave stuff
> in an inconsistent and potentially unusable state (thanks, Intel!).

4. i dont like the overall approach of the patches at all. they
complicate the most complicated parts of flashrom even more (chunked
read/erase/write) for little gain for an even littler target
audience (no offense google :). the init code can already tell the
upper level code which parts are accessible and which are not. there is
no need to fiddle around with the opcodes on the fly (in addition to
what we do to reprogram opcodes because we are forced to... :)

i would like to do this in a less intrusive and more generic way by
means of layout(file)s.
patches for enabling the usage of layouts in all program modes exists
already and would give anyone who dares an easy way to operate on any
accessible region on its own (reviews are welcome! :P).
an additional layout file generation by programmer init code (when told
so) or a generic automagic mode that queries the programmer, the flash
chip and maybe other modules for access rights to plan the whole
operation before really issuing read/erase/write commands (a level
above your implementation) would give us the same functionality, but
also would be useful for non-ich users, generic to be extended in the
future and most importantly: it would not touch the core read/write
functions.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From zakrzewskim at wp.pl  Wed Dec  7 14:16:32 2011
From: zakrzewskim at wp.pl (Marek Zakrzewski)
Date: Wed, 7 Dec 2011 14:16:32 +0100
Subject: [flashrom] ASUS P8H67-M PRO not working
In-Reply-To: <4EDF6196.5040302@gmail.com>
References: <CB31876A034F4017B454C0E7B856E8AF@MacPro>
	<4EDF6196.5040302@gmail.com>
Message-ID: <BAA15AD357EE487CB2228E231C7414EA@MacPro>



-----Original Message-----
From: Joshua Roys [mailto:roysjosh at gmail.com] 
Sent: Wednesday, December 07, 2011 1:53 PM
To: flashrom at flashrom.org
Cc: Marek Zakrzewski
Subject: Re: [flashrom] ASUS P8H67-M PRO not working

On 12/07/2011 02:54 AM, Marek Zakrzewski wrote:
> 0x54: 0x00000000 (FREG0: Flash Descriptor)
> 0x00000000-0x00000fff is read-only
> 0x58: 0x03ff0180 (FREG1: BIOS)
> 0x00180000-0x003fffff is read-write
> 0x5C: 0x017f0001 (FREG2: Management Engine)
> 0x00001000-0x0017ffff is locked
> 0x60: 0x00000fff (FREG3: Gigabit Ethernet)
> Gigabit Ethernet region is unused.
> 0x64: 0x00000fff (FREG4: Platform Data)
> Platform Data region is unused.

> Running OPCODE 0x03 failed at address 0x001000 (payload length was 64).
> FAILED.

Hello,

> Otherwise it is recommended to use the vendor BIOS update utility.

That's what I did. It's much safer for UEFI BIOS.

Thanks,
Marek



From roysjosh at gmail.com  Wed Dec  7 13:52:38 2011
From: roysjosh at gmail.com (Joshua Roys)
Date: Wed, 07 Dec 2011 07:52:38 -0500
Subject: [flashrom] ASUS P8H67-M PRO not working
In-Reply-To: <CB31876A034F4017B454C0E7B856E8AF@MacPro>
References: <CB31876A034F4017B454C0E7B856E8AF@MacPro>
Message-ID: <4EDF6196.5040302@gmail.com>

On 12/07/2011 02:54 AM, Marek Zakrzewski wrote:
> 0x54: 0x00000000 (FREG0: Flash Descriptor)
> 0x00000000-0x00000fff is read-only
> 0x58: 0x03ff0180 (FREG1: BIOS)
> 0x00180000-0x003fffff is read-write
> 0x5C: 0x017f0001 (FREG2: Management Engine)
> 0x00001000-0x0017ffff is locked
> 0x60: 0x00000fff (FREG3: Gigabit Ethernet)
> Gigabit Ethernet region is unused.
> 0x64: 0x00000fff (FREG4: Platform Data)
> Platform Data region is unused.

> Running OPCODE 0x03 failed at address 0x001000 (payload length was 64).
> FAILED.

Hello,

Your vendor has locked down your BIOS through the Intel chipset.  Intel 
has not released documentation on how to disable this protection or 
otherwise update these locked/read-only regions.  However, some recent 
patches from David Hendricks at Google work around this by simply 
ignoring writes and reads to sections which would result in errors. 
This is very new code, and the result of only updating part of your BIOS 
is not guaranteed to be sane or even bootable.  If you would like to try 
nonetheless with these risks fully understood, please examine the 
patches here and let us know how they work for you:
http://patchwork.coreboot.org/patch/3471/

Otherwise it is recommended to use the vendor BIOS update utility.

Thanks,

Josh


From Andy.Loso at harmonicinc.com  Wed Dec  7 19:22:18 2011
From: Andy.Loso at harmonicinc.com (Andy Loso)
Date: Wed, 7 Dec 2011 10:22:18 -0800
Subject: [flashrom] QM67 based board is working
In-Reply-To: <mailman.1457.1323244979.4301.flashrom@flashrom.org>
References: <mailman.1457.1323244979.4301.flashrom@flashrom.org>
Message-ID: <10F3A135D608214B9D0679FE69361F78090D7CBF20@EXCH-CMS.hlit.local>

Seems to read/erase/write correctly.
Also correctly identifies a Macronix flash chip "MX25L6405" (8192 kB, SPI).
Flashrom -Vr

flashrom v0.9.4-r1470 on Linux 2.6.39.4-sisters (x86_64), built with libpci 2.2.4, GCC 4.1.2 20070925 (Red Hat 4.1.2-27), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2097M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus = 10419 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "To be filled by O.E.M."
DMI string system-product-name: "To be filled by O.E.M."
DMI string system-version: "To be filled by O.E.M."
DMI string baseboard-manufacturer: "INTEL Corporation"
DMI string baseboard-product-name: "HURONRIVER"
DMI string baseboard-version: "To be filled by O.E.M."
DMI string chassis-type: "Desktop"
Found chipset "Intel QM67" with PCI ID 8086:1c4f.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write...
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x4
0x7fffffff/0x7fffffff FWH IDSEL: 0x5
0x7fffffff/0x7fffffff FWH IDSEL: 0x6
0x7fffffff/0x7fffffff FWH IDSEL: 0x7
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0
Root Complex Register Block address = 0xfed1c000
GCS = 0xc61: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0xe008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
WARNING: SPI Configuration Lockdown activated.
Reading OPCODES... done
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x00602a43 (FADDR)
0x50: 0x0000ffff (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff
0x54: 0x00000000 (FREG0: Flash Descriptor)
0x00000000-0x00000fff is read-write
0x58: 0x07ff0600 (FREG1: BIOS)
0x00600000-0x007fffff is read-write
0x5C: 0x05ff0023 (FREG2: Management Engine)
0x00023000-0x005fffff is read-write
0x60: 0x00220021 (FREG3: Gigabit Ethernet)
0x00021000-0x00022fff is read-write
0x64: 0x00200001 (FREG4: Platform Data)
0x00001000-0x00020fff is read-write
0x90: 0x80 (SSFS)
SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
0x91: 0xf94010 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=0, SME=0, SCF=1
0x94: 0x0006     (PREOP)
0x96: 0x043b     (OPTYPE)
0x98: 0x05200302 (OPMENU)
0x9C: 0x0000019f (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xC4: 0x00802005 (LVSCC)
LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1
0xC8: 0x00002005 (UVSCC)
UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xD0: 0x00000000 (FPB)

SPI Read Configuration: prefetching disabled, caching enabled, OK.
This programmer supports the following protocols: FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000.
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute.
Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute.
Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute.
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute.
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute.
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute.
Found Macronix flash chip "MX25L6405" (8192 kB, SPI).
===
This flash part has status UNTESTED for operations: READ ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Reading flash... done.
Restoring MMIO space at 0x7fd380f4f8a0
Restoring PCI config space for 00:1f:0 reg 0xdc

Flashrom -Vw

flashrom v0.9.4-r1470 on Linux 2.6.39.4-sisters (x86_64), built with libpci 2.2.4, GCC 4.1.2 20070925 (Red Hat 4.1.2-27), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2097M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10003 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "To be filled by O.E.M."
DMI string system-product-name: "To be filled by O.E.M."
DMI string system-version: "To be filled by O.E.M."
DMI string baseboard-manufacturer: "INTEL Corporation"
DMI string baseboard-product-name: "HURONRIVER"
DMI string baseboard-version: "To be filled by O.E.M."
DMI string chassis-type: "Desktop"
Found chipset "Intel QM67" with PCI ID 8086:1c4f.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write...
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x0
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x1
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x2
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x3
0x7fffffff/0x7fffffff FWH IDSEL: 0x4
0x7fffffff/0x7fffffff FWH IDSEL: 0x5
0x7fffffff/0x7fffffff FWH IDSEL: 0x6
0x7fffffff/0x7fffffff FWH IDSEL: 0x7
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
0x7fffffff/0x7fffffff FWH decode enabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0
Root Complex Register Block address = 0xfed1c000
GCS = 0xc61: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0xe008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
WARNING: SPI Configuration Lockdown activated.
Reading OPCODES... done
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x007fffc0 (FADDR)
0x50: 0x0000ffff (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff
0x54: 0x00000000 (FREG0: Flash Descriptor)
0x00000000-0x00000fff is read-write
0x58: 0x07ff0600 (FREG1: BIOS)
0x00600000-0x007fffff is read-write
0x5C: 0x05ff0023 (FREG2: Management Engine)
0x00023000-0x005fffff is read-write
0x60: 0x00220021 (FREG3: Gigabit Ethernet)
0x00021000-0x00022fff is read-write
0x64: 0x00200001 (FREG4: Platform Data)
0x00001000-0x00020fff is read-write
0x90: 0x84 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0xf97f10 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=1
0x94: 0x0006     (PREOP)
0x96: 0x043b     (OPTYPE)
0x98: 0x05200302 (OPMENU)
0x9C: 0x0000019f (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xC4: 0x00802005 (LVSCC)
LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1
0xC8: 0x00002005 (UVSCC)
UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xD0: 0x00000000 (FPB)

SPI Read Configuration: prefetching disabled, caching enabled, OK.
This programmer supports the following protocols: FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found Macronix flash chip "MX25L6405" (8192 kB, SPI) at physical address 0xff800000.
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25LF040A, 512 kB: Invalid OPCODE 0xab, will not execute.
Probing for SST SST25LF080A, 1024 kB: Invalid OPCODE 0xab, will not execute.
Probing for SST SST25VF010, 128 kB: Invalid OPCODE 0x90, will not execute.
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF040, 512 kB: Invalid OPCODE 0x90, will not execute.
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST25VF040B.REMS, 512 kB: Invalid OPCODE 0x90, will not execute.
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0x00, id2 0x00, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x24, id2 0x10, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xc2, id2 0xea, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2017
Probing for Generic unknown SPI chip (REMS), 0 kB: Invalid OPCODE 0x90, will not execute.
Found Macronix flash chip "MX25L6405" (8192 kB, SPI).
===
This flash part has status UNTESTED for operations: READ ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:S, 0x010000-0x01ffff:S, 0x020000-0x02ffff:S, 0x030000-0x03ffff:S, 0x040000-0x04ffff:S, 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:S, 0x080000-0x08ffff:S, 0x090000-0x09ffff:S, 0x0a0000-0x0affff:S, 0x0b0000-0x0bffff:S, 0x0c0000-0x0cffff:S, 0x0d0000-0x0dffff:S, 0x0e0000-0x0effff:S, 0x0f0000-0x0fffff:S, 0x100000-0x10ffff:S, 0x110000-0x11ffff:S, 0x120000-0x12ffff:S, 0x130000-0x13ffff:S, 0x140000-0x14ffff:S, 0x150000-0x15ffff:S, 0x160000-0x16ffff:S, 0x170000-0x17ffff:S, 0x180000-0x18ffff:S, 0x190000-0x19ffff:S, 0x1a0000-0x1affff:S, 0x1b0000-0x1bffff:S, 0x1c0000-0x1cffff:S, 0x1d0000-0x1dffff:S, 0x1e0000-0x1effff:S, 0x1f0000-0x1fffff:S, 0x200000-0x20ffff:S, 0x210000-0x21ffff:S, 0x220000-0x22ffff:S, 0x230000-0x23ffff:S, 0x240000-0x24ffff:S, 0x250000-0x25ffff:S, 0x260000-0x26ffff:S, 0x270000-0x27ffff:S, 0x280000-0x28ffff:S, 0x290000-0x29ffff:S, 0x2a0000-0x2affff:S, 0x2b0000-0x2bffff:S, 0x2c0000-0x2cffff:S, 0x2d0000-0x2dffff:S, 0x2e0000-0x2effff:S, 0x2f0000-0x2fffff:S, 0x300000-0x30ffff:S, 0x310000-0x31ffff:S, 0x320000-0x32ffff:S, 0x330000-0x33ffff:S, 0x340000-0x34ffff:S, 0x350000-0x35ffff:S, 0x360000-0x36ffff:S, 0x370000-0x37ffff:S, 0x380000-0x38ffff:S, 0x390000-0x39ffff:S, 0x3a0000-0x3affff:S, 0x3b0000-0x3bffff:S, 0x3c0000-0x3cffff:S, 0x3d0000-0x3dffff:S, 0x3e0000-0x3effff:S, 0x3f0000-0x3fffff:S, 0x400000-0x40ffff:S, 0x410000-0x41ffff:S, 0x420000-0x42ffff:S, 0x430000-0x43ffff:S, 0x440000-0x44ffff:S, 0x450000-0x45ffff:S, 0x460000-0x46ffff:S, 0x470000-0x47ffff:S, 0x480000-0x48ffff:S, 0x490000-0x49ffff:S, 0x4a0000-0x4affff:S, 0x4b0000-0x4bffff:S, 0x4c0000-0x4cffff:S, 0x4d0000-0x4dffff:S, 0x4e0000-0x4effff:S, 0x4f0000-0x4fffff:S, 0x500000-0x50ffff:S, 0x510000-0x51ffff:S, 0x520000-0x52ffff:S, 0x530000-0x53ffff:S, 0x540000-0x54ffff:S, 0x550000-0x55ffff:S, 0x560000-0x56ffff:S, 0x570000-0x57ffff:S, 0x580000-0x58ffff:S, 0x590000-0x59ffff:S, 0x5a0000-0x5affff:S, 0x5b0000-0x5bffff:S, 0x5c0000-0x5cffff:S, 0x5d0000-0x5dffff:S, 0x5e0000-0x5effff:S, 0x5f0000-0x5fffff:S, 0x600000-0x60ffff:S, 0x610000-0x61ffff:S, 0x620000-0x62ffff:S, 0x630000-0x63ffff:S, 0x640000-0x64ffff:S, 0x650000-0x65ffff:S, 0x660000-0x66ffff:S, 0x670000-0x67ffff:S, 0x680000-0x68ffff:S, 0x690000-0x69ffff:S, 0x6a0000-0x6affff:S, 0x6b0000-0x6bffff:S, 0x6c0000-0x6cffff:S, 0x6d0000-0x6dffff:S, 0x6e0000-0x6effff:S, 0x6f0000-0x6fffff:S, 0x700000-0x70ffff:S, 0x710000-0x71ffff:S, 0x720000-0x72ffff:S, 0x730000-0x73ffff:S, 0x740000-0x74ffff:S, 0x750000-0x75ffff:S, 0x760000-0x76ffff:S, 0x770000-0x77ffff:S, 0x780000-0x78ffff:S, 0x790000-0x79ffff:S, 0x7a0000-0x7affff:S, 0x7b0000-0x7bffff:S, 0x7c0000-0x7cffff:S, 0x7d0000-0x7dffff:S, 0x7e0000-0x7effff:S, 0x7f0000-0x7fffff:S
Erase/write done.
Verifying flash... VERIFIED.
Restoring MMIO space at 0x7f757c3e28a0
Restoring PCI config space for 00:1f:0 reg 0xdc






From lehmann at ans-netz.de  Wed Dec  7 11:37:25 2011
From: lehmann at ans-netz.de (Oliver Lehmann)
Date: Wed, 07 Dec 2011 11:37:25 +0100
Subject: [flashrom] untested configuration
Message-ID: <20111207113725.Horde.YMlXSaQd9PdO30HlNfyoYQA@avocado.salatschuessel.net>



Hi,



I hope this helps....



> flashrom -V --read /root/bios.img

flashrom v0.9.4-r1395 on FreeBSD 9.0-BETA2 (amd64), built with libpci  

3.1.8, GCC 4.2.2 20070831 prerelease [FreeBSD], little endian

flashrom is free software, get the source code at http://www.flashrom.org



Calibrating delay loop... OS timer resolution is 2 usecs, 782M loops  

per second, 10 myus = 11 us, 100 myus = 99 us, 1000 myus = 987 us,  

10000 myus = 9996 us, 8 myus = 10 us, OK.

Initializing internal programmer

No coreboot table found.

DMI string system-manufacturer: "System manufacturer"

DMI string system-product-name: "System Product Name"

DMI string system-version: "System Version"

DMI string baseboard-manufacturer: "ASUSTeK Computer INC."

DMI string baseboard-product-name: "AT3N7A-I"

DMI string baseboard-version: "Rev X.0x"

DMI string chassis-type: "Desktop"

Found ITE Super I/O, ID 0x8720 on port 0x2e

Found chipset "NVIDIA MCP79" with PCI ID 10de:0aad.

This chipset is marked as untested. If you are using an up-to-date version

of flashrom please email a report to flashrom at flashrom.org including a

verbose (-V) log. Thank you!

Enabling flash write... This chipset is not really supported yet. Guesswork...

ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0

Flash bus type is SPI

SPI on this chipset is WIP. Please report any success or failure by  

mailing us the verbose output to flashrom at flashrom.org, thanks!

Found SMBus device 10de:0aa2 at 00:03:2

MCP SPI BAR is at 0xf9e80000

Mapping NVIDIA MCP6x SPI at 0xf9e80000, unaligned size 0x544.

SPI control is 0xc052, req=0, gnt=0

Please send the output of "flashrom -V" to flashrom at flashrom.org with

your board name: flashrom -V as the subject to help us finish support for your

chipset. Thanks.

OK.

This chipset supports the following protocols: SPI.

No IT87* serial flash segment enabled.

Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Chip status register is 00

Chip status register: Status Register Write Disable (SRWD) is not set

Chip status register: Bit 6 is not set

Chip status register: Bit 5 / Block Protect 3 (BP3) is not set

Chip status register: Bit 4 / Block Protect 2 (BP2) is not set

Chip status register: Bit 3 / Block Protect 1 (BP1) is not set

Chip status register: Bit 2 / Block Protect 0 (BP0) is not set

Chip status register: Write Enable Latch (WEL) is not set

Chip status register: Write In Progress (WIP/BUSY) is not set

Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical  

address 0xfff00000.

Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13

Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13

Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13

Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13

Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.

Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.

Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.

Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2,  

id2 0x2014

Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic:  

id1 0xc2, id2 0x2014

Probing for Atmel unknown Atmel SPI chip, 0 kB:  

probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic:  

id1 0xc2, id2 0x2014

Probing for Macronix unknown Macronix SPI chip, 0 kB:  

probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic:  

id1 0xc2, id2 0x2014

Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic:  

id1 0xc2, id2 0x2014

Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1  

0xc2, id2 0x2014

Probing for Sanyo unknown Sanyo SPI chip, 0 kB:  

probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Generic unknown SPI chip (RDID), 0 kB:  

probe_spi_rdid_generic: id1 0xc2, id2 0x2014

Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1  

0xc2, id2 0x13

Reading flash... done.

>





From svn at flashrom.org  Thu Dec  8 08:49:11 2011
From: svn at flashrom.org (repository service)
Date: Thu, 08 Dec 2011 08:49:11 +0100
Subject: [flashrom] [commit] r1472 - trunk
Message-ID: <E1RYYj9-00075N-SB@ra.coresystems.de>

Author: hailfinger
Date: Thu Dec  8 08:49:11 2011
New Revision: 1472
URL: http://flashrom.org/trac/flashrom/changeset/1472

Log:
Update URLs in print.c

Move Asus A8Jm, Asus M6Ne to the laptop section.
No working URL for the A8Jm found.

Signed-off-by: Benjamin Bellec <b.bellec at gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/print.c

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Fri Dec  2 22:48:17 2011	(r1471)
+++ trunk/print.c	Thu Dec  8 08:49:11 2011	(r1472)
@@ -570,61 +570,59 @@
 	B("ASRock",	"K8S8X",		1, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
 	B("ASRock",	"M3A790GXH/128M",	1, "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
 	B("ASRock",	"P4i65GV",		1, "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
-	B("ASUS",	"A7N8X Deluxe",		1, "http://www.asus.com/product.aspx?P_ID=wAsRYm41KTp78MFC", NULL),
-	B("ASUS",	"A7N8X-E Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=TmQtPJv4jIxmL9C2", NULL),
+	B("ASUS",	"A7N8X Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
+	B("ASUS",	"A7N8X-E Deluxe",	1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
 	B("ASUS",	"A7N8X-VM/400",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
 	B("ASUS",	"A7V133",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
 	B("ASUS",	"A7V333",		1, "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
-	B("ASUS",	"A7V400-MX",		1, "http://www.asus.com/product.aspx?P_ID=hORgEHRBDLMfwAwx", NULL),
-	B("ASUS",	"A7V600-X",		1, "http://www.asus.com/product.aspx?P_ID=L2XYS0rmtCjeOr4k", NULL),
-	B("ASUS",	"A7V8X",		1, "http://www.asus.com/product.aspx?P_ID=qfpaGrAy2kLVo0f2", NULL),
-	B("ASUS",	"A7V8X-MX",		1, "http://www.asus.com/product.aspx?P_ID=SEJOOYqfuQPitx2H", NULL),
-	B("ASUS",	"A7V8X-MX SE",		1, "http://www.asus.com/product.aspx?P_ID=1guVBT1qV5oqhHyZ", NULL),
-	B("ASUS",	"A7V8X-X",		1, "http://www.asus.com/product.aspx?P_ID=YcXfRrWHZ9RKoVmw", NULL),
-	B("ASUS",	"A8Jm",			1, "http://www.asus.com/product.aspx?P_ID=VztICtOgiU6drx4m", NULL),
+	B("ASUS",	"A7V400-MX",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
+	B("ASUS",	"A7V600-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
+	B("ASUS",	"A7V8X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
+	B("ASUS",	"A7V8X-MX",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
+	B("ASUS",	"A7V8X-MX SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
+	B("ASUS",	"A7V8X-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
 	B("ASUS",	"A8M2N-LA (NodusM3-GL8E)",	1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
-	B("ASUS",	"A8N-E",		1, "http://www.asus.com/product.aspx?P_ID=DzbA8hgqchMBOVRz", NULL),
+	B("ASUS",	"A8N-E",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
 	B("ASUS",	"A8N-LA (Nagami-GL8E)",	1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
-	B("ASUS",	"A8N-SLI",		1, "http://www.asus.com/product.aspx?P_ID=J9FKa8z2xVId3pDK", NULL),
+	B("ASUS",	"A8N-SLI",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
 	B("ASUS",	"A8N-SLI Deluxe",	0, NULL, "Untested board enable."),
-	B("ASUS",	"A8N-SLI Premium",	1, "http://www.asus.com/product.aspx?P_ID=nbulqxniNmzf0mH1", NULL),
+	B("ASUS",	"A8N-SLI Premium",	1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
 	B("ASUS",	"A8N-VM",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
-	B("ASUS",	"A8N-VM CSM",		1, "http://www.asus.com/product.aspx?P_ID=JBqqlpj4cspbSa3s", NULL),
+	B("ASUS",	"A8N-VM CSM",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
 	B("ASUS",	"A8NE-FM/S",		1, "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM", NULL),
-	B("ASUS",	"A8V Deluxe",		1, "http://www.asus.com/product.aspx?P_ID=tvpdgPNCPaABZRVU", NULL),
-	B("ASUS",	"A8V-E Deluxe",		1, "http://www.asus.com/product.aspx?P_ID=hQBPIJWEZnnGAZEh", NULL),
-	B("ASUS",	"A8V-E SE",		1, "http://www.asus.com/product.aspx?P_ID=VMfiJJRYTHM4gXIi", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
-	B("ASUS",	"Crosshair II Formula",	1, "http://www.asus.com/product.aspx?P_ID=EIDxaW1Ln3YR9RA2", NULL),
-	B("ASUS",	"Crosshair IV Extreme",	1, "http://www.asus.com/product.aspx?P_ID=lt1ShF6xEn3rlLe7", NULL),
-	B("ASUS",	"E35M1-I DELUXE",	1, "http://www.asus.com/product.aspx?P_ID=9BmKhMwWCwqyl1lz", NULL),
-	B("ASUS",	"K8N",			1, "http://www.asus.com/product.aspx?P_ID=zigzffr75jWJ7j2y", NULL),
-	B("ASUS",	"K8V",			1, "http://www.asus.com/product.aspx?P_ID=fG2KZOWF7v6MRFRm", NULL),
-	B("ASUS",	"K8V SE Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=65HeDI8XM1u6Uy6o", NULL),
-	B("ASUS",	"K8V-X",		1, NULL, NULL),
-	B("ASUS",	"K8V-X SE",		1, "http://www.asus.com/product.aspx?P_ID=lzDXlbBVHkdckHVr", NULL),
-	B("ASUS",	"M2A-MX",		1, "http://www.asus.com/product.aspx?P_ID=BmaOnPewi1JgltOZ", NULL),
-	B("ASUS",	"M2A-VM",		1, "http://www.asus.com/product.aspx?P_ID=St3pWpym8xXpROQS", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html"),
-	B("ASUS",	"M2N32-SLI Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=0jMy2X8lKstYRvev", NULL),
-	B("ASUS",	"M2N-E",		1, "http://www.asus.com/product.aspx?P_ID=NFlvt10av3F7ayQ9", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
-	B("ASUS",	"M2N-E SLI",		1, "http://www.asus.com/product.aspx?P_ID=NJ8fkR6ufRM9XvFC", NULL),
-	B("ASUS",	"M2N-SLI Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=szSFtrap7crpBaQE", NULL),
-	B("ASUS",	"M2NBP-VM CSM",		1, "http://www.asus.com/product.aspx?P_ID=MnOfzTGd2KkwG0rF", NULL),
-	B("ASUS",	"M2NPV-VM",		1, "http://www.asus.com/product.aspx?P_ID=HGTVnGv5nGahCYgK", NULL),
-	B("ASUS",	"M2V",			1, "http://www.asus.com/product.aspx?P_ID=OqYlEDFfF6ZqZGvp", NULL),
-	B("ASUS",	"M2V-MX",		1, "http://www.asus.com/product.aspx?P_ID=7grf8Ci4yxnqzt3z", NULL),
-	B("ASUS",	"M3A",			1, "http://www.asus.com/product.aspx?P_ID=P48rppKk4jrc9pNd", NULL),
-	B("ASUS",	"M3A76-CM",		1, "http://www.asus.com/product.aspx?P_ID=aU8effdifLvraVze", NULL),
-	B("ASUS",	"M3A78-EM",		1, "http://www.asus.com/product.aspx?P_ID=KjpYqzmAd9vsTM2D", NULL),
-	B("ASUS",	"M3N78-VM",		1, "http://www.asus.com/product.aspx?P_ID=ovqEgLFRjnSClhSV", NULL),
-	B("ASUS",	"M4A78-EM",		1, "http://www.asus.com/product.aspx?P_ID=0KyowHKUFAQqH2DO", NULL),
-	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/product.aspx?P_ID=fcsXWSxnhzZE9rnR", NULL),
-	B("ASUS",	"M4A785TD-M EVO",	1, "http://www.asus.com/product.aspx?P_ID=QHbvGVB1mXmmD8qQ", NULL),
-	B("ASUS",	"M4A78LT-M LE",		1, "http://www.asus.com/product.aspx?P_ID=exJL00uovTJaDqxR", NULL),
-	B("ASUS",	"M4A79T Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=lhJiLTN5huPfCVkW", NULL),
-	B("ASUS",	"M4A87TD/USB3",		1, "http://www.asus.com/product.aspx?P_ID=nlWYrI9wlNIYHAaa", NULL),
-	B("ASUS",	"M4A89GTD PRO",		1, "http://www.asus.com/product.aspx?P_ID=Gdf0vtpVf72LTYgs", NULL),
+	B("ASUS",	"A8V Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
+	B("ASUS",	"A8V-E Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
+	B("ASUS",	"A8V-E SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
+	B("ASUS",	"Crosshair II Formula",	1, "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
+	B("ASUS",	"Crosshair IV Extreme",	1, "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
+	B("ASUS",	"E35M1-I DELUXE",	1, "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
+	B("ASUS",	"K8N",			1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
+	B("ASUS",	"K8V",			1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
+	B("ASUS",	"K8V SE Deluxe",	1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
+	B("ASUS",	"K8V-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
+	B("ASUS",	"K8V-X SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
+	B("ASUS",	"M2A-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
+	B("ASUS",	"M2A-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html"),
+	B("ASUS",	"M2N32-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
+	B("ASUS",	"M2N-E",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
+	B("ASUS",	"M2N-E SLI",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
+	B("ASUS",	"M2N-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
+	B("ASUS",	"M2NBP-VM CSM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
+	B("ASUS",	"M2NPV-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
+	B("ASUS",	"M2V",			1, "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
+	B("ASUS",	"M2V-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
+	B("ASUS",	"M3A",			1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
+	B("ASUS",	"M3A76-CM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
+	B("ASUS",	"M3A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
+	B("ASUS",	"M3N78-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
+	B("ASUS",	"M4A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
+	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
+	B("ASUS",	"M4A785TD-M EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
+	B("ASUS",	"M4A78LT-M LE",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
+	B("ASUS",	"M4A79T Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
+	B("ASUS",	"M4A87TD/USB3",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
+	B("ASUS",	"M4A89GTD PRO",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
 	B("ASUS",	"M5A99X EVO",		1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
-	B("ASUS",	"M6Ne",			0, "http://www.asus.com/Product.aspx?P_ID=IbqN4JCxeRiep4WN", "Untested board enable."),
 	B("ASUS",	"MEW-AM",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
 	B("ASUS",	"MEW-VM",		0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
 	B("ASUS",	"P2B",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
@@ -638,53 +636,53 @@
 	B("ASUS",	"P4B266",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
 	B("ASUS",	"P4B266-LM",		1, "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
 	B("ASUS",	"P4B533-E",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
-	B("ASUS",	"P4C800-E Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=cFuVCr9bXXCckmcK", NULL),
-	B("ASUS",	"P4GV-LA (Guppy)",	1, NULL, NULL),
-	B("ASUS",	"P4P800",		1, "http://www.asus.com/product.aspx?P_ID=DYt1Et9MlBChqzLb", NULL),
-	B("ASUS",	"P4P800-E Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=INIJUvLlif7LHp3g", NULL),
-	B("ASUS",	"P4P800-VM",		1, NULL, NULL),
+	B("ASUS",	"P4C800-E Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL),
+	B("ASUS",	"P4GV-LA (Guppy)",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478", NULL),
+	B("ASUS",	"P4P800",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
+	B("ASUS",	"P4P800-E Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL),
+	B("ASUS",	"P4P800-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
 	B("ASUS",	"P4SC-E",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
 	B("ASUS",	"P4SD-LA",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
 	B("ASUS",	"P4S533-X",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
-	B("ASUS",	"P4S800-MX",		1, "http://www.asus.com/product.aspx?P_ID=Bb57zoJhmO1Qkcrh", NULL),
+	B("ASUS",	"P4S800-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
 	B("ASUS",	"P5A",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
 	B("ASUS",	"P5B",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
-	B("ASUS",	"P5B-Deluxe",		1, "http://www.asus.com/product.aspx?P_ID=bswT66IBSb2rEWNa", NULL),
+	B("ASUS",	"P5B-Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL),
 	B("ASUS",	"P5BV-M",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
-	B("ASUS",	"P5GC-MX/1333",		1, "http://www.asus.com/product.aspx?P_ID=PYvbfOokwxUzJky3", NULL),
-	B("ASUS",	"P5GD1 Pro",		1, "http://www.asus.com/product.aspx?P_ID=50M49xQh71EZOeM1", NULL),
+	B("ASUS",	"P5GC-MX/1333",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL),
+	B("ASUS",	"P5GD1 Pro",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
 	B("ASUS",	"P5GD1-VM/S",		1, NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."),
 	B("ASUS",	"P5GD1(-VM)",		0, NULL, "Untested board enable."),
-	B("ASUS",	"P5GD2 Premium",	1, "http://www.asus.it/product.aspx?P_ID=lRKaz1Rb6Xb0OFM7", NULL),
-	B("ASUS",	"P5GDC Deluxe",		1, "http://www.asus.com/product.aspx?P_ID=AbeoopyNpI2TZixg", NULL),
-	B("ASUS",	"P5GDC-V Deluxe",	1, NULL, NULL),
+	B("ASUS",	"P5GD2 Premium",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL),
+	B("ASUS",	"P5GDC Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
+	B("ASUS",	"P5GDC-V Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
 	B("ASUS",	"P5GD2/C variants",	0, NULL, "Untested board enable."),
-	B("ASUS",	"P5K-VM",		1, "http://www.asus.com/product.aspx?P_ID=EJybwaQ3J8goocW2", NULL),
-	B("ASUS",	"P5KC",			1, "http://www.asus.com/product.aspx?P_ID=fFZ8oUIGmLpwNMjj", NULL),
-	B("ASUS",	"P5L-MX",		1, "http://www.asus.com/product.aspx?P_ID=X70d3NCzH2DE9vWH", NULL),
-	B("ASUS",	"P5L-VM 1394",		1, "http://www.asus.com/product.aspx?P_ID=G0BQ4fIXoM1P38TZ", NULL),
+	B("ASUS",	"P5K-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
+	B("ASUS",	"P5KC",			1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
+	B("ASUS",	"P5L-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
+	B("ASUS",	"P5L-VM 1394",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
 	B("ASUS",	"P5LD2",		0, NULL, "Untested board enable."),
 	B("ASUS",	"P5LP-LE (Lithium-UL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
 	B("ASUS",	"P5LP-LE (Epson OEM)",	1, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
 	B("ASUS",	"P5LP-LE",		0, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),
-	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/product.aspx?P_ID=KyHOsOKWujC2QguJ", "Needs a board enable (http://patchwork.coreboot.org/patch/3298/)."),
+	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Needs a board enable (http://patchwork.coreboot.org/patch/3298/)."),
 	B("ASUS",	"P5N-D",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
 	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
-	B("ASUS",	"P5N32-E SLI",		1, "http://www.asus.com/product.aspx?P_ID=vBZLIBtPzYB2bLcb", NULL),
-	B("ASUS",	"P5ND2-SLI Deluxe",	1, "http://www.asus.com/product.aspx?P_ID=WY7XroDuUImVbgp5", NULL),
-	B("ASUS",	"P5PE-VM",		1, "http://www.asus.com/product.aspx?P_ID=k3h0ZFVu9Lo1dUvk", NULL),
+	B("ASUS",	"P5N32-E SLI",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
+	B("ASUS",	"P5ND2-SLI Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
+	B("ASUS",	"P5PE-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
 	B("ASUS",	"P5VD1-X",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
-	B("ASUS",	"P6T SE",		1, "http://www.asus.com/product.aspx?P_ID=t4yhK6y9W9o7iQ9E", NULL),
-	B("ASUS",	"P6T Deluxe",		1, "http://www.asus.com/product.aspx?P_ID=vXixf82co6Q5v0BZ", NULL),
-	B("ASUS",	"P6T Deluxe V2",	1, "http://www.asus.com/product.aspx?P_ID=iRlP8RG9han6saZx", NULL),
+	B("ASUS",	"P6T SE",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
+	B("ASUS",	"P6T Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
+	B("ASUS",	"P6T Deluxe V2",	1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL),
 	B("ASUS",	"P7H57D-V EVO",		1, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL),
 	B("ASUS",	"P7H55-M LX",		0, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
 	B("ASUS",	"P8B-E/4L",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8B WS",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8H61 PRO",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8P67 (rev. 3.1)",	0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/product.aspx?P_ID=k81cpN8uEB01BpQ6", NULL),
-	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/product.aspx?P_ID=z1K4qLpLmyLfwXtw", NULL),
+	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
+	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
 	B("BCOM",	"WinNET100",		1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
 	B("Biostar",	"N68S3+",		1, NULL, NULL),
 	B("Biostar",	"M6TBA",		0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
@@ -934,7 +932,9 @@
 #if defined(__i386__) || defined(__x86_64__)
 	B("Acer",	"Aspire 1520",		1, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
 	B("Acer",	"Aspire One",		0, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
-	B("ASUS",	"Eee PC 701 4G",	0, "http://www.asus.com/product.aspx?P_ID=h6SPd3tEzLEsrEiS", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
+	B("ASUS",	"A8Jm",			1, NULL, NULL),
+	B("ASUS",	"Eee PC 701 4G",	0, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
+	B("ASUS",	"M6Ne",			0, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
 	B("Dell",	"Latitude CPi A366XT",	0, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
 	B("HP/Compaq",	"nx9005",		0, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
 	B("HP/Compaq",	"nx9010",		0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),


From c-d.hailfinger.devel.2006 at gmx.net  Thu Dec  8 08:52:31 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 08 Dec 2011 08:52:31 +0100
Subject: [flashrom] [PATCH] updated motherboards URL in print.c
In-Reply-To: <CANzfOV+Au53=CP+_ZCQkHXpDgUF_gi9P7wBPUSz2Jd1YpWGmOw@mail.gmail.com>
References: <4E07277D.3030603@gmail.com>
	<201106300425.p5U4PbDn000675@mail2.student.tuwien.ac.at>
	<4E121F63.3060701@gmail.com>
	<201107121834.p6CIYLbT021104@mail2.student.tuwien.ac.at>
	<4E2E026A.7000801@gmx.net>
	<CANzfOV+Au53=CP+_ZCQkHXpDgUF_gi9P7wBPUSz2Jd1YpWGmOw@mail.gmail.com>
Message-ID: <4EE06CBF.4060501@gmx.net>

Hi Benjamin,

I have forward ported your changes. Sorry it took me so long.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Committed in r1472 with minor updates.

Regards,
Carl-Daniel


Am 27.07.2011 08:51 schrieb Benjamin:
> Hi,
>
> OK, I guess I have nothing to do now?
>
> Benjamin
>
> 2011/7/26 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
>
>> > Hi Benjamin,
>> >
>> > Am 12.07.2011 20:34 schrieb Stefan Tauner:
>>> > > On Mon, 04 Jul 2011 22:15:31 +0200
>>> > > Benjamin Bellec <b.bellec at gmail.com> wrote:
>>> > >
>>> > >
>>>> > >> Updated motherboards URL, v2
>>>> > >>
>>> > > hello benjamin
>>> > >
>>> > > i am still not sure about the asus urls so i left them out for now.
>>> > > but i have committed all others (with minor changes) locally and will
>>> > > push that to the main svn later. thanks for your work!
>>> > >
>> >
>> > Here is the ASUS URL patch against latest flashrom. Since you wrote it,
>> > I have kept your signoff. There are a few ASUS URLs left which have
>> > product.aspx in there, but unfortunately the automatic redirect fails
>> > for them. Not sure how to proceed.
>> >
>> > Regards,
>> > Carl-Daniel
>> >
>> > Signed-off-by: Benjamin Bellec <b.bellec at gmail.com>
>> >


-- 
http://www.hailfinger.org/



From d.zhekov at gmail.com  Thu Dec  8 17:36:54 2011
From: d.zhekov at gmail.com (Delyan Zhekov)
Date: Thu, 8 Dec 2011 18:36:54 +0200
Subject: [flashrom] Question about using flash programmer for Dell BIOS
Message-ID: <CAKWqAFtL=axaHyuonZNMjZh_hM4cVqcOOkXvXWoV1zHHq4=5uA@mail.gmail.com>

Hello, I found your forum during the great search for answers of mine. It
all has to do with dell optiplex gx240 BIOS. The problem: I have to write a
BIOS file to a SST49LF004A-33-4C-NH chip using a flash programmer. I
downloaded the .exe file and extracted .hdr and .rom files from it and I
have no idea which to use with the programmer. I also found a tool
converting .hdr to .bin but the .bin file is more than 5MB in size. I am
totally lost. Could you give me a direction what file should I use with the
flash programmer. Thank you.

Delyan Zhekov
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From pete at akeo.ie  Thu Dec  8 19:13:00 2011
From: pete at akeo.ie (Pete Batard)
Date: Thu, 08 Dec 2011 18:13:00 +0000
Subject: [flashrom] Question about using flash programmer for Dell BIOS
In-Reply-To: <CAKWqAFtL=axaHyuonZNMjZh_hM4cVqcOOkXvXWoV1zHHq4=5uA@mail.gmail.com>
References: <CAKWqAFtL=axaHyuonZNMjZh_hM4cVqcOOkXvXWoV1zHHq4=5uA@mail.gmail.com>
Message-ID: <4EE0FE2C.1080107@akeo.ie>

On 2011.12.08 16:36, Delyan Zhekov wrote:
> I also found a tool converting .hdr to .bin

What tool did you use?

I remember looking for something like that some time ago, when I had to 
flash a GX BIOS from an HDR, but I wasn't able to locate one then.

In the end, I had to fallback to using dellBiosUpdate, from smbios-utils 
on Linux, instead of flashrom :(

> but the .bin file is more than 5MB
> in size. I am totally lost. Could you give me a direction what file
> should I use with the flash programmer. Thank you.

I'm hoping someone else will be able to give directions on how to be 
able to use flashrom when provided with a Dell HDR file.

In case they don't, you should still be able to flash an HDR using 
Ubuntu (eg. from a live CD) by doing something like this:

o apt-get install smbios-utils firmware-addon-dell
o retreive your HDR from network or USB
o dellBiosUpdate --hdr <your_firmware.hdr>

NB: you may have to issue an apt-get-update first and tweak the settings 
so that the Ubuntu repositories you fetch from include "Universe".

Additional options for dellBiosUpdate are also provided here [1].

Again, if there's any possibility to use flashrom, you should go for it, 
as I remember the dellBiosUpdate seemed very dumb and didn't even 
provide any kind of progress indication.

Regards,

/Pete

[1] http://linux.dell.com/libsmbios/main/dellBiosUpdate.html


From marcosfrm at gmail.com  Thu Dec  8 19:57:14 2011
From: marcosfrm at gmail.com (Marcos Felipe Rasia de Mello)
Date: Thu, 8 Dec 2011 16:57:14 -0200
Subject: [flashrom] Question about using flash programmer for Dell BIOS
In-Reply-To: <CAKWqAFtL=axaHyuonZNMjZh_hM4cVqcOOkXvXWoV1zHHq4=5uA@mail.gmail.com>
References: <CAKWqAFtL=axaHyuonZNMjZh_hM4cVqcOOkXvXWoV1zHHq4=5uA@mail.gmail.com>
Message-ID: <CAJZVDJCSG2ZwHZyDq-_ff0iiJAEzj4C1N5-myRFWX78sS1pbEg@mail.gmail.com>

2011/12/8 Delyan Zhekov <d.zhekov at gmail.com>

> Hello, I found your forum during the great search for answers of mine. It
> all has to do with dell optiplex gx240 BIOS. The problem: I have to write a
> BIOS file to a SST49LF004A-33-4C-NH chip using a flash programmer. I
> downloaded the .exe file and extracted .hdr and .rom files from it and I
> have no idea which to use with the programmer. I also found a tool
> converting .hdr to .bin but the .bin file is more than 5MB in size. I am
> totally lost. Could you give me a direction what file should I use with the
> flash programmer. Thank you.
>
> Delyan Zhekov
>
>
Run the Dell update utility in Windows (or Wine maybe) with "-writeromfile"
and program the .rom file it will create.

Marcos
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From r.marek at assembler.cz  Thu Dec  8 20:38:34 2011
From: r.marek at assembler.cz (Rudolf Marek)
Date: Thu, 08 Dec 2011 20:38:34 +0100
Subject: [flashrom] [PATCH] Cross-compilation fixes
In-Reply-To: <4EDC25BD.1090704@gmx.net>
References: <4EDC25BD.1090704@gmx.net>
Message-ID: <4EE1123A.8040707@assembler.cz>

On 5.12.2011 03:00, Carl-Daniel Hailfinger wrote:
> Switch from host OS detection to target OS detection.
> Complain about unknown target OS/architecture.
> Disable annoying format string warnings on DJGPP.
>
> Native and cross-compilation now usually just require setting CC.
> Examples:
> make CC=i586-pc-msdosdjgpp-gcc
> make CC="clang -m64"
> make CC=i686-w64-mingw32-gcc
>
> I tested the following compilation types:
> i386 Linux native (gcc, clang)
> i386 Linux ->  x86_64 Linux (clang)
> i386 Linux ->  MinGW32
> i386 Linux ->  DJGPP
>
> I'd appreciate tests for:
> x86_64 Linux native
> MinGW native
> Cygwin native
> powerpc Linux native
>    
make CC=powerpc-unknown-linux-gnuspe-gcc
flashrom: ELF 32-bit MSB executable, PowerPC or cisco 4500, version 1 
(SYSV), dynamically linked (uses shared libs), for GNU/Linux 2.6.22, 
with unknown capability 0x41000000 = 0x13676e75, with unknown capability 
0x10000 = 0xb0402, not stripped

This was with e500. There is a lot of powerPCs like 60x and 4xx.

make CC=armel-unknown-linux-gnueabi-gcc
Checking for a C compiler... found.
Target arch is unknown. Aborting.
make: *** [compiler] Error 1

Thanks
Rudolf
Most likely no arm support?


From c-d.hailfinger.devel.2006 at gmx.net  Thu Dec  8 21:18:07 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 08 Dec 2011 21:18:07 +0100
Subject: [flashrom] [PATCH] Cross-compilation fixes
In-Reply-To: <4EE1123A.8040707@assembler.cz>
References: <4EDC25BD.1090704@gmx.net> <4EE1123A.8040707@assembler.cz>
Message-ID: <4EE11B7F.8080200@gmx.net>

Am 08.12.2011 20:38 schrieb Rudolf Marek:
> On 5.12.2011 03:00, Carl-Daniel Hailfinger wrote:
>> Switch from host OS detection to target OS detection.
>> Complain about unknown target OS/architecture.
>> Disable annoying format string warnings on DJGPP.
>>
>> Native and cross-compilation now usually just require setting CC.
>> Examples:
>> make CC=i586-pc-msdosdjgpp-gcc
>> make CC="clang -m64"
>> make CC=i686-w64-mingw32-gcc
>>
>> I tested the following compilation types:
>> i386 Linux native (gcc, clang)
>> i386 Linux ->  x86_64 Linux (clang)
>> i386 Linux ->  MinGW32
>> i386 Linux ->  DJGPP
>>
>> I'd appreciate tests for:
>> x86_64 Linux native
>> MinGW native
>> Cygwin native
>> powerpc Linux native
>>    
> make CC=powerpc-unknown-linux-gnuspe-gcc
> flashrom: ELF 32-bit MSB executable, PowerPC or cisco 4500, version 1
> (SYSV), dynamically linked (uses shared libs), for GNU/Linux 2.6.22,
> with unknown capability 0x41000000 = 0x13676e75, with unknown
> capability 0x10000 = 0xb0402, not stripped
>
> This was with e500. There is a lot of powerPCs like 60x and 4xx.
>
> make CC=armel-unknown-linux-gnueabi-gcc
> Checking for a C compiler... found.
> Target arch is unknown. Aborting.
> make: *** [compiler] Error 1

Thanks a lot for your tests!

> Most likely no arm support?

Indeed, ARM support is missing. I think it is mainy held back by libpci
breakage for which we only have a really hackish workaround.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Fri Dec  9 02:19:16 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 09 Dec 2011 02:19:16 +0100
Subject: [flashrom] [RFC] Add struct flashchip * everywhere
In-Reply-To: <4EB9C67A.50502@gmx.net>
References: <4EB0BEB2.1040701@gmx.net>
	<201111021241.pA2CfGHH021689@mail2.student.tuwien.ac.at>
	<4EB31089.7000902@gmx.net> <4EB9C67A.50502@gmx.net>
Message-ID: <4EE16214.1030407@gmx.net>

Am 09.11.2011 01:16 schrieb Carl-Daniel Hailfinger:
> Am 03.11.2011 23:07 schrieb Carl-Daniel Hailfinger:
>> Am 02.11.2011 13:41 schrieb Stefan Tauner:
>>> another layer of redirection is - as always - also a
>>> possibility: introducing a new struct with pointers to the actual chip
>>> and the programmer to be used (and other information related to the
>>> actual situation/probing... e.g. access right ranges). but that's
>>> probably not needed (yet) and the splitting could be done later anyway
>>> if need be. OTOH if it is clear that there will be more information
>>> stuffed into struct flashchip, that is not really static and does not
>>> need to/should not reside in flashchips.c/struct flashchip, we may
>>> better discuss a separation now(?).
>> We have a big problem: There is almost no information in struct
>> flashchip which is constant in all cases.
>> The name, size and erase structures could be filled in automatically for
>> SFDP stuff. That alone kills the separation idea IMHO.
> Turns out separating struct flashchip and struct flashctx (the flash
> context) is possible, but it required some sed and manual care.
>
> The only difference between struct flashchip and struct flashctx right
> now are the virtual_memory and virtual_registers members.
> Compared to my earlier patch, no function signatures have been changed
> except for flashchip->flashctx replacements. This should make reviews
> easier.
>
> TODO:
> Test if flashing still works on hardware (I tested with dummy).
> Test if printing and wiki printing still works as expected.
>
> Deferred to another patch:
> Adding struct flashctx to the remaining function signatures.
> Check if it makes sense to convert some function signatures to use constant.
>
> If you want to verify this patch, run the following command in an
> unmodified tree:
> sed -i "s/struct flashchip/struct flashctx/g" *.[ch]
> and then compare the result to this patch. A few places like print.c and
> print_wiki.c kept struct flashchip because they don't care about the
> context and act directly on the flashchips array.

New version, updated to apply against svn HEAD.
Please note that this one still duplicates the struct flashchip members
manually in struct flashctx. An alternative version will be posted as
followup.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-struct_flashctx/flash.h
===================================================================
--- flashrom-struct_flashctx/flash.h	(Revision 1472)
+++ flashrom-struct_flashctx/flash.h	(Arbeitskopie)
@@ -93,6 +93,8 @@
 #define FEATURE_WRSR_WREN	(1 << 7)
 #define FEATURE_WRSR_EITHER	(FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
 
+struct flashctx;
+
 struct flashchip {
 	const char *vendor;
 	const char *name;
@@ -119,7 +121,7 @@
 	 */
 	uint32_t tested;
 
-	int (*probe) (struct flashchip *flash);
+	int (*probe) (struct flashctx *flash);
 
 	/* Delay after "enter/exit ID mode" commands in microseconds.
 	 * NB: negative values have special meanings, see TIMING_* below.
@@ -140,20 +142,42 @@
 		} eraseblocks[NUM_ERASEREGIONS];
 		/* a block_erase function should try to erase one block of size
 		 * 'blocklen' at address 'blockaddr' and return 0 on success. */
-		int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
+		int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
 	} block_erasers[NUM_ERASEFUNCTIONS];
 
-	int (*printlock) (struct flashchip *flash);
-	int (*unlock) (struct flashchip *flash);
-	int (*write) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*read) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	struct {
+	int (*printlock) (struct flashctx *flash);
+	int (*unlock) (struct flashctx *flash);
+	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	struct voltage {
 		uint16_t min;
 		uint16_t max;
 	} voltage;
+};
 
+/* struct flashctx must always contain struct flashchip at the beginning. */
+struct flashctx {
+	const char *vendor;
+	const char *name;
+	enum chipbustype bustype;
+	uint32_t manufacture_id;
+	uint32_t model_id;
+	int total_size;
+	int page_size;
+	int feature_bits;
+	uint32_t tested;
+	int (*probe) (struct flashctx *flash);
+	int probe_timing;
+	struct block_eraser block_erasers[NUM_ERASEFUNCTIONS];
+	int (*printlock) (struct flashctx *flash);
+	int (*unlock) (struct flashctx *flash);
+	int (*write) (struct flashctx *flash, uint8_t *buf, int start, int len);
+	int (*read) (struct flashctx *flash, uint8_t *buf, int start, int len);
+	struct voltage voltage;
+	/* struct flashchip ends here. */
+	
+	chipaddr virtual_memory;
 	/* Some flash devices have an additional register space. */
-	chipaddr virtual_memory;
 	chipaddr virtual_registers;
 };
 
@@ -203,23 +227,23 @@
 extern int verbose;
 extern const char flashrom_version[];
 extern char *chip_to_probe;
-void map_flash_registers(struct flashchip *flash);
-int read_memmapped(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int erase_flash(struct flashchip *flash);
-int probe_flash(int startchip, struct flashchip *fill_flash, int force);
-int read_flash_to_file(struct flashchip *flash, const char *filename);
+void map_flash_registers(struct flashctx *flash);
+int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int erase_flash(struct flashctx *flash);
+int probe_flash(int startchip, struct flashctx *fill_flash, int force);
+int read_flash_to_file(struct flashctx *flash, const char *filename);
 int min(int a, int b);
 int max(int a, int b);
 void tolower_string(char *str);
 char *extract_param(char **haystack, const char *needle, const char *delim);
-int verify_range(struct flashchip *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message);
+int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message);
 int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granularity gran);
 char *strcat_realloc(char *dest, const char *src);
 void print_version(void);
 void print_banner(void);
 void list_programmers_linebreak(int startcol, int cols, int paren);
 int selfcheck(void);
-int doit(struct flashchip *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it);
+int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it);
 int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
 int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
 
@@ -259,7 +283,7 @@
 /* layout.c */
 int read_romlayout(char *name);
 int find_romentry(char *name);
-int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents);
+int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */
 struct spi_command {
Index: flashrom-struct_flashctx/it87spi.c
===================================================================
--- flashrom-struct_flashctx/it87spi.c	(Revision 1472)
+++ flashrom-struct_flashctx/it87spi.c	(Arbeitskopie)
@@ -105,9 +105,9 @@
 
 static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			const unsigned char *writearr, unsigned char *readarr);
-static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 				 unsigned int start, unsigned int len);
-static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
 				      unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_it87xx = {
@@ -312,7 +312,7 @@
 }
 
 /* Page size is usually 256 bytes */
-static int it8716f_spi_page_program(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_page_program(struct flashctx *flash, uint8_t *buf,
 				    unsigned int start)
 {
 	unsigned int i;
@@ -340,7 +340,7 @@
  * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
  * Need to read this big flash using firmware cycles 3 byte at a time.
  */
-static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 				 unsigned int start, unsigned int len)
 {
 	fast_spi = 0;
@@ -358,7 +358,7 @@
 	return 0;
 }
 
-static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
 				      unsigned int start, unsigned int len)
 {
 	/*
Index: flashrom-struct_flashctx/jedec.c
===================================================================
--- flashrom-struct_flashctx/jedec.c	(Revision 1472)
+++ flashrom-struct_flashctx/jedec.c	(Arbeitskopie)
@@ -91,7 +91,7 @@
 		msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
 }
 
-static unsigned int getaddrmask(struct flashchip *flash)
+static unsigned int getaddrmask(struct flashctx *flash)
 {
 	switch (flash->feature_bits & FEATURE_ADDR_MASK) {
 	case FEATURE_ADDR_FULL:
@@ -110,7 +110,7 @@
 	}
 }
 
-static void start_program_jedec_common(struct flashchip *flash, unsigned int mask)
+static void start_program_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	chip_writeb(0xAA, bios + (0x5555 & mask));
@@ -118,7 +118,7 @@
 	chip_writeb(0xA0, bios + (0x5555 & mask));
 }
 
-static int probe_jedec_common(struct flashchip *flash, unsigned int mask)
+static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
@@ -237,7 +237,7 @@
 	return 1;
 }
 
-static int erase_sector_jedec_common(struct flashchip *flash, unsigned int page,
+static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page,
 			      unsigned int pagesize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
@@ -267,7 +267,7 @@
 	return 0;
 }
 
-static int erase_block_jedec_common(struct flashchip *flash, unsigned int block,
+static int erase_block_jedec_common(struct flashctx *flash, unsigned int block,
 			     unsigned int blocksize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
@@ -297,7 +297,7 @@
 	return 0;
 }
 
-static int erase_chip_jedec_common(struct flashchip *flash, unsigned int mask)
+static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
@@ -325,7 +325,7 @@
 	return 0;
 }
 
-static int write_byte_program_jedec_common(struct flashchip *flash, uint8_t *src,
+static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src,
 			     chipaddr dst, unsigned int mask)
 {
 	int tried = 0, failed = 0;
@@ -355,7 +355,7 @@
 }
 
 /* chunksize is 1 */
-int write_jedec_1(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i, failed = 0;
 	chipaddr dst = flash->virtual_memory + start;
@@ -376,7 +376,7 @@
 	return failed;
 }
 
-int write_page_write_jedec_common(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int page_size)
+int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int page_size)
 {
 	int i, tried = 0, failed;
 	uint8_t *s = src;
@@ -424,11 +424,11 @@
  * This function is a slightly modified copy of spi_write_chunked.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int write_jedec(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
 {
 	unsigned int i, starthere, lenhere;
 	/* FIXME: page_size is the wrong variable. We need max_writechunk_size
-	 * in struct flashchip to do this properly. All chips using
+	 * in struct flashctx to do this properly. All chips using
 	 * write_jedec have page_size set to max_writechunk_size, so
 	 * we're OK for now.
 	 */
@@ -458,7 +458,7 @@
 }
 
 /* erase chip with block_erase() prototype */
-int erase_chip_block_jedec(struct flashchip *flash, unsigned int addr,
+int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr,
 			   unsigned int blocksize)
 {
 	unsigned int mask;
@@ -472,7 +472,7 @@
 	return erase_chip_jedec_common(flash, mask);
 }
 
-int probe_jedec(struct flashchip *flash)
+int probe_jedec(struct flashctx *flash)
 {
 	unsigned int mask;
 
@@ -480,7 +480,7 @@
 	return probe_jedec_common(flash, mask);
 }
 
-int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int size)
+int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
 {
 	unsigned int mask;
 
@@ -488,7 +488,7 @@
 	return erase_sector_jedec_common(flash, page, size, mask);
 }
 
-int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int size)
+int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
 {
 	unsigned int mask;
 
@@ -496,7 +496,7 @@
 	return erase_block_jedec_common(flash, page, size, mask);
 }
 
-int erase_chip_jedec(struct flashchip *flash)
+int erase_chip_jedec(struct flashctx *flash)
 {
 	unsigned int mask;
 
Index: flashrom-struct_flashctx/serprog.c
===================================================================
--- flashrom-struct_flashctx/serprog.c	(Revision 1472)
+++ flashrom-struct_flashctx/serprog.c	(Arbeitskopie)
@@ -302,7 +302,7 @@
 static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 				    const unsigned char *writearr,
 				    unsigned char *readarr);
-static int serprog_spi_read(struct flashchip *flash, uint8_t *buf,
+static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
 			    unsigned int start, unsigned int len);
 static struct spi_programmer spi_programmer_serprog = {
 	.type		= SPI_CONTROLLER_SERPROG,
@@ -822,7 +822,7 @@
  * the advantage that it is much faster for most chips, but breaks those with
  * non-contiguous address space (like AT45DB161D). When spi_read_chunked is
  * fixed this method can be removed. */
-static int serprog_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int i, cur_len;
 	const unsigned int max_read = spi_programmer_serprog.max_data_read;
Index: flashrom-struct_flashctx/w39.c
===================================================================
--- flashrom-struct_flashctx/w39.c	(Revision 1472)
+++ flashrom-struct_flashctx/w39.c	(Arbeitskopie)
@@ -21,7 +21,7 @@
 
 #include "flash.h"
 
-static int printlock_w39_fwh_block(struct flashchip *flash, unsigned int offset)
+static int printlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
 {
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
@@ -59,7 +59,7 @@
 	return (locking & ((1 << 2) | (1 << 0))) ? -1 : 0;
 }
 
-static int unlock_w39_fwh_block(struct flashchip *flash, unsigned int offset)
+static int unlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
 {
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
@@ -80,7 +80,7 @@
 	return 0;
 }
 
-static uint8_t w39_idmode_readb(struct flashchip *flash, unsigned int offset)
+static uint8_t w39_idmode_readb(struct flashctx *flash, unsigned int offset)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t val;
@@ -127,7 +127,7 @@
 	return 0;
 }
 
-static int printlock_w39_common(struct flashchip *flash, unsigned int offset)
+static int printlock_w39_common(struct flashctx *flash, unsigned int offset)
 {
 	uint8_t lock;
 
@@ -136,7 +136,7 @@
 	return printlock_w39_tblwp(lock);
 }
 
-static int printlock_w39_fwh(struct flashchip *flash)
+static int printlock_w39_fwh(struct flashctx *flash)
 {
 	unsigned int i, total_size = flash->total_size * 1024;
 	int ret = 0;
@@ -148,7 +148,7 @@
 	return ret;
 }
 
-static int unlock_w39_fwh(struct flashchip *flash)
+static int unlock_w39_fwh(struct flashctx *flash)
 {
 	unsigned int i, total_size = flash->total_size * 1024;
 	
@@ -160,7 +160,7 @@
 	return 0;
 }
 
-int printlock_w39l040(struct flashchip * flash)
+int printlock_w39l040(struct flashctx * flash)
 {
 	uint8_t lock;
 	int ret;
@@ -176,7 +176,7 @@
 	return ret;
 }
 
-int printlock_w39v040a(struct flashchip *flash)
+int printlock_w39v040a(struct flashctx *flash)
 {
 	uint8_t lock;
 	int ret = 0;
@@ -194,18 +194,18 @@
 	return ret;
 }
 
-int printlock_w39v040b(struct flashchip *flash)
+int printlock_w39v040b(struct flashctx *flash)
 {
 	return printlock_w39_common(flash, 0x7fff2);
 }
 
-int printlock_w39v040c(struct flashchip *flash)
+int printlock_w39v040c(struct flashctx *flash)
 {
 	/* Typo in the datasheet? The other chips use 0x7fff2. */
 	return printlock_w39_common(flash, 0xfff2);
 }
 
-int printlock_w39v040fa(struct flashchip *flash)
+int printlock_w39v040fa(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -215,7 +215,7 @@
 	return ret;
 }
 
-int printlock_w39v040fb(struct flashchip *flash)
+int printlock_w39v040fb(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -225,7 +225,7 @@
 	return ret;
 }
 
-int printlock_w39v040fc(struct flashchip *flash)
+int printlock_w39v040fc(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -236,12 +236,12 @@
 	return ret;
 }
 
-int printlock_w39v080a(struct flashchip *flash)
+int printlock_w39v080a(struct flashctx *flash)
 {
 	return printlock_w39_common(flash, 0xffff2);
 }
 
-int printlock_w39v080fa(struct flashchip *flash)
+int printlock_w39v080fa(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -251,7 +251,7 @@
 	return ret;
 }
 
-int printlock_w39v080fa_dual(struct flashchip *flash)
+int printlock_w39v080fa_dual(struct flashctx *flash)
 {
 	msg_cinfo("Block locking for W39V080FA in dual mode is "
 		  "undocumented.\n");
@@ -259,7 +259,7 @@
 	return -1;
 }
 
-int unlock_w39v040fb(struct flashchip *flash)
+int unlock_w39v040fb(struct flashctx *flash)
 {
 	if (unlock_w39_fwh(flash))
 		return -1;
@@ -269,7 +269,7 @@
 	return 0;
 }
 
-int unlock_w39v080fa(struct flashchip *flash)
+int unlock_w39v080fa(struct flashctx *flash)
 {
 	if (unlock_w39_fwh(flash))
 		return -1;
Index: flashrom-struct_flashctx/sst49lfxxxc.c
===================================================================
--- flashrom-struct_flashctx/sst49lfxxxc.c	(Revision 1472)
+++ flashrom-struct_flashctx/sst49lfxxxc.c	(Arbeitskopie)
@@ -23,7 +23,7 @@
 #include "flash.h"
 #include "chipdrivers.h"
 
-static int write_lockbits_block_49lfxxxc(struct flashchip *flash, unsigned long address, unsigned char bits)
+static int write_lockbits_block_49lfxxxc(struct flashctx *flash, unsigned long address, unsigned char bits)
 {
 	unsigned long lock = flash->virtual_registers + address + 2;
 	msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock));
@@ -32,7 +32,7 @@
 	return 0;
 }
 
-static int write_lockbits_49lfxxxc(struct flashchip *flash, unsigned char bits)
+static int write_lockbits_49lfxxxc(struct flashctx *flash, unsigned char bits)
 {
 	chipaddr registers = flash->virtual_registers;
 	unsigned int i, left = flash->total_size * 1024;
@@ -54,12 +54,12 @@
 	return 0;
 }
 
-int unlock_49lfxxxc(struct flashchip *flash)
+int unlock_49lfxxxc(struct flashctx *flash)
 {
 	return write_lockbits_49lfxxxc(flash, 0);
 }
 
-int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size)
 {
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;
Index: flashrom-struct_flashctx/sharplhf00l04.c
===================================================================
--- flashrom-struct_flashctx/sharplhf00l04.c	(Revision 1472)
+++ flashrom-struct_flashctx/sharplhf00l04.c	(Arbeitskopie)
@@ -26,7 +26,7 @@
  * FIXME: This file is unused.
  */
 
-int erase_lhf00l04_block(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen)
+int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
 	chipaddr bios = flash->virtual_memory + blockaddr;
 	chipaddr wrprotect = flash->virtual_registers + blockaddr + 2;
Index: flashrom-struct_flashctx/a25.c
===================================================================
--- flashrom-struct_flashctx/a25.c	(Revision 1472)
+++ flashrom-struct_flashctx/a25.c	(Arbeitskopie)
@@ -29,7 +29,7 @@
 		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
 }
 
-int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -45,7 +45,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -60,7 +60,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -78,7 +78,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash)
 {
 	uint8_t status;
 
Index: flashrom-struct_flashctx/dummyflasher.c
===================================================================
--- flashrom-struct_flashctx/dummyflasher.c	(Revision 1472)
+++ flashrom-struct_flashctx/dummyflasher.c	(Arbeitskopie)
@@ -62,7 +62,7 @@
 
 static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr);
-static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_dummyflasher = {
@@ -548,7 +548,7 @@
 	return 0;
 }
 
-static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len)
 {
 	return spi_write_chunked(flash, buf, start, len,
Index: flashrom-struct_flashctx/sst_fwhub.c
===================================================================
--- flashrom-struct_flashctx/sst_fwhub.c	(Revision 1472)
+++ flashrom-struct_flashctx/sst_fwhub.c	(Arbeitskopie)
@@ -24,7 +24,7 @@
 
 #include "flash.h"
 
-static int check_sst_fwhub_block_lock(struct flashchip *flash, int offset)
+static int check_sst_fwhub_block_lock(struct flashctx *flash, int offset)
 {
 	chipaddr registers = flash->virtual_registers;
 	uint8_t blockstatus;
@@ -50,7 +50,7 @@
 	return blockstatus & 0x1;
 }
 
-static int clear_sst_fwhub_block_lock(struct flashchip *flash, int offset)
+static int clear_sst_fwhub_block_lock(struct flashctx *flash, int offset)
 {
 	chipaddr registers = flash->virtual_registers;
 	uint8_t blockstatus;
@@ -68,7 +68,7 @@
 	return blockstatus;
 }
 
-int printlock_sst_fwhub(struct flashchip *flash)
+int printlock_sst_fwhub(struct flashctx *flash)
 {
 	int i;
 
@@ -78,7 +78,7 @@
 	return 0;
 }
 
-int unlock_sst_fwhub(struct flashchip *flash)
+int unlock_sst_fwhub(struct flashctx *flash)
 {
 	int i, ret=0;
 
Index: flashrom-struct_flashctx/cli_classic.c
===================================================================
--- flashrom-struct_flashctx/cli_classic.c	(Revision 1472)
+++ flashrom-struct_flashctx/cli_classic.c	(Arbeitskopie)
@@ -169,8 +169,8 @@
 	unsigned long size;
 	/* Probe for up to three flash chips. */
 	const struct flashchip *flash;
-	struct flashchip flashes[3];
-	struct flashchip *fill_flash;
+	struct flashctx flashes[3];
+	struct flashctx *fill_flash;
 	const char *name;
 	int namelen, opt, i;
 	int startchip = 0, chipcount = 0, option_index = 0, force = 0;
@@ -409,6 +409,7 @@
 	}
 #endif
 
+	/* Does a chip with the requested name exist in the flashchips array? */
 	if (chip_to_probe) {
 		for (flash = flashchips; flash && flash->name; flash++)
 			if (!strcmp(flash->name, chip_to_probe))
Index: flashrom-struct_flashctx/at25.c
===================================================================
--- flashrom-struct_flashctx/at25.c	(Revision 1472)
+++ flashrom-struct_flashctx/at25.c	(Arbeitskopie)
@@ -57,7 +57,7 @@
 	}
 }
 
-int spi_prettyprint_status_register_at25df(struct flashchip *flash)
+int spi_prettyprint_status_register_at25df(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -72,7 +72,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash)
+int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash)
 {
 	/* FIXME: We should check the security lockdown. */
 	msg_cdbg("Ignoring security lockdown (if present)\n");
@@ -80,7 +80,7 @@
 	return spi_prettyprint_status_register_at25df(flash);
 }
 
-int spi_prettyprint_status_register_at25f(struct flashchip *flash)
+int spi_prettyprint_status_register_at25f(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -99,7 +99,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_at25fs010(struct flashchip *flash)
+int spi_prettyprint_status_register_at25fs010(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -123,7 +123,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_at25fs040(struct flashchip *flash)
+int spi_prettyprint_status_register_at25fs040(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -147,7 +147,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash)
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -163,7 +163,7 @@
 	return 0;
 }
 
-int spi_disable_blockprotect_at25df(struct flashchip *flash)
+int spi_disable_blockprotect_at25df(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;
@@ -203,14 +203,14 @@
 	return 0;
 }
 
-int spi_disable_blockprotect_at25df_sec(struct flashchip *flash)
+int spi_disable_blockprotect_at25df_sec(struct flashctx *flash)
 {
 	/* FIXME: We should check the security lockdown. */
 	msg_cinfo("Ignoring security lockdown (if present)\n");
 	return spi_disable_blockprotect_at25df(flash);
 }
 
-int spi_disable_blockprotect_at25f(struct flashchip *flash)
+int spi_disable_blockprotect_at25f(struct flashctx *flash)
 {
 	/* spi_disable_blockprotect_at25df is not really the right way to do
 	 * this, but the side effects of said function work here as well.
@@ -218,7 +218,7 @@
 	return spi_disable_blockprotect_at25df(flash);
 }
 
-int spi_disable_blockprotect_at25fs010(struct flashchip *flash)
+int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;
@@ -252,7 +252,7 @@
 	return 0;
 }
 
-int spi_disable_blockprotect_at25fs040(struct flashchip *flash)
+int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;
Index: flashrom-struct_flashctx/layout.c
===================================================================
--- flashrom-struct_flashctx/layout.c	(Revision 1472)
+++ flashrom-struct_flashctx/layout.c	(Arbeitskopie)
@@ -240,7 +240,7 @@
 	return best_entry;
 }
 
-int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents)
+int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
 	int entry;
Index: flashrom-struct_flashctx/ichspi.c
===================================================================
--- flashrom-struct_flashctx/ichspi.c	(Revision 1472)
+++ flashrom-struct_flashctx/ichspi.c	(Arbeitskopie)
@@ -1175,7 +1175,7 @@
 	return 0;
 }
 
-int ich_hwseq_probe(struct flashchip *flash)
+int ich_hwseq_probe(struct flashctx *flash)
 {
 	uint32_t total_size, boundary;
 	uint32_t erase_size_low, size_low, erase_size_high, size_high;
@@ -1228,7 +1228,7 @@
 	return 1;
 }
 
-int ich_hwseq_block_erase(struct flashchip *flash,
+int ich_hwseq_block_erase(struct flashctx *flash,
 			  unsigned int addr,
 			  unsigned int len)
 {
@@ -1278,7 +1278,7 @@
 	return 0;
 }
 
-int ich_hwseq_read(struct flashchip *flash, uint8_t *buf, unsigned int addr,
+int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, unsigned int addr,
 		   unsigned int len)
 {
 	uint16_t hsfc;
@@ -1316,7 +1316,7 @@
 	return 0;
 }
 
-int ich_hwseq_write(struct flashchip *flash, uint8_t *buf, unsigned int addr,
+int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, unsigned int addr,
 		    unsigned int len)
 {
 	uint16_t hsfc;
Index: flashrom-struct_flashctx/82802ab.c
===================================================================
--- flashrom-struct_flashctx/82802ab.c	(Revision 1472)
+++ flashrom-struct_flashctx/82802ab.c	(Arbeitskopie)
@@ -40,7 +40,7 @@
 	msg_cdbg("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
 }
 
-int probe_82802ab(struct flashchip *flash)
+int probe_82802ab(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2, flashcontent1, flashcontent2;
@@ -89,7 +89,7 @@
 	return 1;
 }
 
-uint8_t wait_82802ab(struct flashchip *flash)
+uint8_t wait_82802ab(struct flashctx *flash)
 {
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;
@@ -107,7 +107,7 @@
 	return status;
 }
 
-int unlock_82802ab(struct flashchip *flash)
+int unlock_82802ab(struct flashctx *flash)
 {
 	int i;
 	//chipaddr wrprotect = flash->virtual_registers + page + 2;
@@ -118,7 +118,7 @@
 	return 0;
 }
 
-int erase_block_82802ab(struct flashchip *flash, unsigned int page,
+int erase_block_82802ab(struct flashctx *flash, unsigned int page,
 			unsigned int pagesize)
 {
 	chipaddr bios = flash->virtual_memory;
@@ -141,7 +141,7 @@
 }
 
 /* chunksize is 1 */
-int write_82802ab(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i;
 	chipaddr dst = flash->virtual_memory + start;
@@ -157,7 +157,7 @@
 	return 0;
 }
 
-int unlock_28f004s5(struct flashchip *flash)
+int unlock_28f004s5(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t mcfg, bcfg, need_unlock = 0, can_unlock = 0;
@@ -209,7 +209,7 @@
 	return 0;
 }
 
-int unlock_lh28f008bjt(struct flashchip *flash)
+int unlock_lh28f008bjt(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t mcfg, bcfg;
Index: flashrom-struct_flashctx/opaque.c
===================================================================
--- flashrom-struct_flashctx/opaque.c	(Revision 1472)
+++ flashrom-struct_flashctx/opaque.c	(Arbeitskopie)
@@ -41,7 +41,7 @@
 
 const struct opaque_programmer *opaque_programmer = &opaque_programmer_none;
 
-int probe_opaque(struct flashchip *flash)
+int probe_opaque(struct flashctx *flash)
 {
 	if (!opaque_programmer->probe) {
 		msg_perr("%s called before register_opaque_programmer. "
@@ -53,7 +53,7 @@
 	return opaque_programmer->probe(flash);
 }
 
-int read_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	if (!opaque_programmer->read) {
 		msg_perr("%s called before register_opaque_programmer. "
@@ -64,7 +64,7 @@
 	return opaque_programmer->read(flash, buf, start, len);
 }
 
-int write_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	if (!opaque_programmer->write) {
 		msg_perr("%s called before register_opaque_programmer. "
@@ -75,7 +75,7 @@
 	return opaque_programmer->write(flash, buf, start, len);
 }
 
-int erase_opaque(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen)
+int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
 	if (!opaque_programmer->erase) {
 		msg_perr("%s called before register_opaque_programmer. "
Index: flashrom-struct_flashctx/dediprog.c
===================================================================
--- flashrom-struct_flashctx/dediprog.c	(Revision 1472)
+++ flashrom-struct_flashctx/dediprog.c	(Arbeitskopie)
@@ -205,7 +205,7 @@
  * @len		length
  * @return	0 on success, 1 on failure
  */
-static int dediprog_spi_bulk_read(struct flashchip *flash, uint8_t *buf,
+static int dediprog_spi_bulk_read(struct flashctx *flash, uint8_t *buf,
 				  unsigned int start, unsigned int len)
 {
 	int ret;
@@ -253,7 +253,7 @@
 	return 0;
 }
 
-static int dediprog_spi_read(struct flashchip *flash, uint8_t *buf,
+static int dediprog_spi_read(struct flashctx *flash, uint8_t *buf,
 			     unsigned int start, unsigned int len)
 {
 	int ret;
@@ -299,7 +299,7 @@
 	return 0;
 }
 
-static int dediprog_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int dediprog_spi_write_256(struct flashctx *flash, uint8_t *buf,
 				  unsigned int start, unsigned int len)
 {
 	int ret;
Index: flashrom-struct_flashctx/spi25.c
===================================================================
--- flashrom-struct_flashctx/spi25.c	(Revision 1472)
+++ flashrom-struct_flashctx/spi25.c	(Arbeitskopie)
@@ -113,7 +113,7 @@
 	return spi_send_command(sizeof(cmd), 0, cmd, NULL);
 }
 
-static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
+static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
 {
 	unsigned char readarr[4];
 	uint32_t id1;
@@ -167,12 +167,12 @@
 	return 0;
 }
 
-int probe_spi_rdid(struct flashchip *flash)
+int probe_spi_rdid(struct flashctx *flash)
 {
 	return probe_spi_rdid_generic(flash, 3);
 }
 
-int probe_spi_rdid4(struct flashchip *flash)
+int probe_spi_rdid4(struct flashctx *flash)
 {
 	/* Some SPI controllers do not support commands with writecnt=1 and
 	 * readcnt=4.
@@ -194,7 +194,7 @@
 	return 0;
 }
 
-int probe_spi_rems(struct flashchip *flash)
+int probe_spi_rems(struct flashctx *flash)
 {
 	unsigned char readarr[JEDEC_REMS_INSIZE];
 	uint32_t id1, id2;
@@ -230,7 +230,7 @@
 	return 0;
 }
 
-int probe_spi_res1(struct flashchip *flash)
+int probe_spi_res1(struct flashctx *flash)
 {
 	static const unsigned char allff[] = {0xff, 0xff, 0xff};
 	static const unsigned char all00[] = {0x00, 0x00, 0x00};
@@ -274,7 +274,7 @@
 	return 1;
 }
 
-int probe_spi_res2(struct flashchip *flash)
+int probe_spi_res2(struct flashctx *flash)
 {
 	unsigned char readarr[2];
 	uint32_t id1, id2;
@@ -410,7 +410,7 @@
 		bpt[(status & 0x1c) >> 2]);
 }
 
-int spi_prettyprint_status_register(struct flashchip *flash)
+int spi_prettyprint_status_register(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -444,7 +444,7 @@
 	return 0;
 }
 
-int spi_chip_erase_60(struct flashchip *flash)
+int spi_chip_erase_60(struct flashctx *flash)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -481,7 +481,7 @@
 	return 0;
 }
 
-int spi_chip_erase_c7(struct flashchip *flash)
+int spi_chip_erase_c7(struct flashctx *flash)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -517,7 +517,7 @@
 	return 0;
 }
 
-int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -563,7 +563,7 @@
  * 32k for SST
  * 4-32k non-uniform for EON
  */
-int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -607,7 +607,7 @@
 /* Block size is usually
  * 4k for PMC
  */
-int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -649,7 +649,7 @@
 }
 
 /* Sector size is usually 4k, though Macronix eliteflash has 64k */
-int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -690,7 +690,7 @@
 	return 0;
 }
 
-int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -700,7 +700,7 @@
 	return spi_chip_erase_60(flash);
 }
 
-int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -728,7 +728,7 @@
  * This is according the SST25VF016 datasheet, who knows it is more
  * generic that this...
  */
-static int spi_write_status_register_ewsr(struct flashchip *flash, int status)
+static int spi_write_status_register_ewsr(struct flashctx *flash, int status)
 {
 	int result;
 	int i = 0;
@@ -776,7 +776,7 @@
 	return 0;
 }
 
-static int spi_write_status_register_wren(struct flashchip *flash, int status)
+static int spi_write_status_register_wren(struct flashctx *flash, int status)
 {
 	int result;
 	int i = 0;
@@ -824,7 +824,7 @@
 	return 0;
 }
 
-int spi_write_status_register(struct flashchip *flash, int status)
+int spi_write_status_register(struct flashctx *flash, int status)
 {
 	int ret = 1;
 
@@ -926,7 +926,7 @@
  * Write 0x00 to the status register. Check if any locks are still set (that
  * part is chip specific). Repeat once.
  */
-int spi_disable_blockprotect(struct flashchip *flash)
+int spi_disable_blockprotect(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;
@@ -968,7 +968,7 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is read separately in chunks with a maximum size of chunksize.
  */
-int spi_read_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, toread;
@@ -1007,12 +1007,12 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int spi_write_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, towrite;
 	/* FIXME: page_size is the wrong variable. We need max_writechunk_size
-	 * in struct flashchip to do this properly. All chips using
+	 * in struct flashctx to do this properly. All chips using
 	 * spi_chip_write_256 have page_size set to max_writechunk_size, so
 	 * we're OK for now.
 	 */
@@ -1055,7 +1055,7 @@
  * (e.g. due to size constraints in IT87* for over 512 kB)
  */
 /* real chunksize is 1, logical chunksize is 1 */
-int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int i;
 	int result = 0;
@@ -1071,7 +1071,7 @@
 	return 0;
 }
 
-int spi_aai_write(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	uint32_t pos = start;
 	int result;
Index: flashrom-struct_flashctx/pm49fl00x.c
===================================================================
--- flashrom-struct_flashctx/pm49fl00x.c	(Revision 1472)
+++ flashrom-struct_flashctx/pm49fl00x.c	(Arbeitskopie)
@@ -36,13 +36,13 @@
 	}
 }
 
-int unlock_49fl00x(struct flashchip *flash)
+int unlock_49fl00x(struct flashctx *flash)
 {
 	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 0, flash->page_size);
 	return 0;
 }
 
-int lock_49fl00x(struct flashchip *flash)
+int lock_49fl00x(struct flashctx *flash)
 {
 	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size);
 	return 0;
Index: flashrom-struct_flashctx/linux_spi.c
===================================================================
--- flashrom-struct_flashctx/linux_spi.c	(Revision 1472)
+++ flashrom-struct_flashctx/linux_spi.c	(Arbeitskopie)
@@ -36,9 +36,9 @@
 static int linux_spi_shutdown(void *data);
 static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			const unsigned char *txbuf, unsigned char *rxbuf);
-static int linux_spi_read(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len);
-static int linux_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_linux = {
@@ -131,13 +131,13 @@
 	return 0;
 }
 
-static int linux_spi_read(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len)
 {
 	return spi_read_chunked(flash, buf, start, len, (unsigned)getpagesize());
 }
 
-static int linux_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len)
 {
 	return spi_write_chunked(flash, buf, start, len, ((unsigned)getpagesize()) - 4);
Index: flashrom-struct_flashctx/w29ee011.c
===================================================================
--- flashrom-struct_flashctx/w29ee011.c	(Revision 1472)
+++ flashrom-struct_flashctx/w29ee011.c	(Arbeitskopie)
@@ -24,7 +24,7 @@
 /* According to the Winbond W29EE011, W29EE012, W29C010M, W29C011A
  * datasheets this is the only valid probe function for those chips.
  */
-int probe_w29ee011(struct flashchip *flash)
+int probe_w29ee011(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
Index: flashrom-struct_flashctx/spi.c
===================================================================
--- flashrom-struct_flashctx/spi.c	(Revision 1472)
+++ flashrom-struct_flashctx/spi.c	(Arbeitskopie)
@@ -97,7 +97,7 @@
 	return result;
 }
 
-int default_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -109,7 +109,7 @@
 	return spi_read_chunked(flash, buf, start, len, max_data);
 }
 
-int default_spi_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -121,7 +121,7 @@
 	return spi_write_chunked(flash, buf, start, len, max_data);
 }
 
-int spi_chip_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int addrbase = 0;
 	if (!spi_programmer->read) {
@@ -160,7 +160,7 @@
  * .write_256 = spi_chip_write_1
  */
 /* real chunksize is up to 256, logical chunksize is 256 */
-int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	if (!spi_programmer->write_256) {
 		msg_perr("%s called, but SPI page write is unsupported on this "
Index: flashrom-struct_flashctx/wbsio_spi.c
===================================================================
--- flashrom-struct_flashctx/wbsio_spi.c	(Revision 1472)
+++ flashrom-struct_flashctx/wbsio_spi.c	(Arbeitskopie)
@@ -62,7 +62,7 @@
 
 static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr);
-static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_wbsio = {
 	.type = SPI_CONTROLLER_WBSIO,
@@ -194,7 +194,7 @@
 	return 0;
 }
 
-static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	return read_memmapped(flash, buf, start, len);
 }
Index: flashrom-struct_flashctx/sst28sf040.c
===================================================================
--- flashrom-struct_flashctx/sst28sf040.c	(Revision 1472)
+++ flashrom-struct_flashctx/sst28sf040.c	(Arbeitskopie)
@@ -30,7 +30,7 @@
 #define RESET			0xFF
 #define READ_ID			0x90
 
-int protect_28sf040(struct flashchip *flash)
+int protect_28sf040(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -45,7 +45,7 @@
 	return 0;
 }
 
-int unprotect_28sf040(struct flashchip *flash)
+int unprotect_28sf040(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -60,7 +60,7 @@
 	return 0;
 }
 
-int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -76,7 +76,7 @@
 }
 
 /* chunksize is 1 */
-int write_28sf040(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
@@ -100,7 +100,7 @@
 	return 0;
 }
 
-static int erase_28sf040(struct flashchip *flash)
+static int erase_28sf040(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -114,7 +114,7 @@
 	return 0;
 }
 
-int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
Index: flashrom-struct_flashctx/stm50flw0x0x.c
===================================================================
--- flashrom-struct_flashctx/stm50flw0x0x.c	(Revision 1472)
+++ flashrom-struct_flashctx/stm50flw0x0x.c	(Arbeitskopie)
@@ -36,7 +36,7 @@
  * The ST M50FLW080B and STM50FLW080B chips have to be unlocked,
  * before you can erase them or write to them.
  */
-static int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
+static int unlock_block_stm50flw0x0x(struct flashctx *flash, int offset)
 {
 	chipaddr wrprotect = flash->virtual_registers + 2;
 	static const uint8_t unlock_sector = 0x00;
@@ -79,7 +79,7 @@
 	return 0;
 }
 
-int unlock_stm50flw0x0x(struct flashchip *flash)
+int unlock_stm50flw0x0x(struct flashctx *flash)
 {
 	int i;
 
@@ -94,7 +94,7 @@
 }
 
 /* This function is unused. */
-int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize)
+int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, unsigned int sectorsize)
 {
 	chipaddr bios = flash->virtual_memory + sector;
 
Index: flashrom-struct_flashctx/flashrom.c
===================================================================
--- flashrom-struct_flashctx/flashrom.c	(Revision 1472)
+++ flashrom-struct_flashctx/flashrom.c	(Arbeitskopie)
@@ -268,7 +268,7 @@
  */
 static int may_register_shutdown = 0;
 
-static int check_block_eraser(const struct flashchip *flash, int k, int log);
+static int check_block_eraser(const struct flashctx *flash, int k, int log);
 
 /* Register a function to be executed on programmer shutdown.
  * The advantage over atexit() is that you can supply a void pointer which will
@@ -404,7 +404,7 @@
 	programmer_table[programmer].delay(usecs);
 }
 
-void map_flash_registers(struct flashchip *flash)
+void map_flash_registers(struct flashctx *flash)
 {
 	size_t size = flash->total_size * 1024;
 	/* Flash registers live 4 MByte below the flash. */
@@ -412,7 +412,7 @@
 	flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size);
 }
 
-int read_memmapped(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
 {
 	chip_readn(buf, flash->virtual_memory + start, len);
 
@@ -523,7 +523,7 @@
 }
 
 /* Returns the number of well-defined erasers for a chip. */
-static unsigned int count_usable_erasers(const struct flashchip *flash)
+static unsigned int count_usable_erasers(const struct flashctx *flash)
 {
 	unsigned int usable_erasefunctions = 0;
 	int k;
@@ -535,7 +535,7 @@
 }
 
 /* start is an offset to the base address of the flash chip */
-int check_erased_range(struct flashchip *flash, unsigned int start, unsigned int len)
+int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
 {
 	int ret;
 	uint8_t *cmpbuf = malloc(len);
@@ -558,7 +558,7 @@
  * @message	string to print in the "FAILED" message
  * @return	0 for success, -1 for failure
  */
-int verify_range(struct flashchip *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len,
+int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len,
 		 const char *message)
 {
 	unsigned int i;
@@ -938,7 +938,7 @@
 	return 1;
 }
 
-int probe_flash(int startchip, struct flashchip *fill_flash, int force)
+int probe_flash(int startchip, struct flashctx *fill_flash, int force)
 {
 	const struct flashchip *flash;
 	unsigned long base = 0;
@@ -976,7 +976,7 @@
 		check_max_decode(buses_common, size);
 
 		/* Start filling in the dynamic data. */
-		*fill_flash = *flash;
+		memcpy(fill_flash, flash, sizeof(struct flashchip));
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
 		fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);
@@ -1029,7 +1029,7 @@
 	return flash - flashchips;
 }
 
-int verify_flash(struct flashchip *flash, uint8_t *buf)
+int verify_flash(struct flashctx *flash, uint8_t *buf)
 {
 	int ret;
 	unsigned int total_size = flash->total_size * 1024;
@@ -1103,7 +1103,7 @@
 	return 0;
 }
 
-int read_flash_to_file(struct flashchip *flash, const char *filename)
+int read_flash_to_file(struct flashctx *flash, const char *filename)
 {
 	unsigned long size = flash->total_size * 1024;
 	unsigned char *buf = calloc(size, sizeof(char));
@@ -1202,11 +1202,11 @@
 	return ret;
 }
 
-static int erase_and_write_block_helper(struct flashchip *flash,
+static int erase_and_write_block_helper(struct flashctx *flash,
 					unsigned int start, unsigned int len,
 					uint8_t *curcontents,
 					uint8_t *newcontents,
-					int (*erasefn) (struct flashchip *flash,
+					int (*erasefn) (struct flashctx *flash,
 							unsigned int addr,
 							unsigned int len))
 {
@@ -1253,14 +1253,14 @@
 	return ret;
 }
 
-static int walk_eraseregions(struct flashchip *flash, int erasefunction,
-			     int (*do_something) (struct flashchip *flash,
+static int walk_eraseregions(struct flashctx *flash, int erasefunction,
+			     int (*do_something) (struct flashctx *flash,
 						  unsigned int addr,
 						  unsigned int len,
 						  uint8_t *param1,
 						  uint8_t *param2,
 						  int (*erasefn) (
-							struct flashchip *flash,
+							struct flashctx *flash,
 							unsigned int addr,
 							unsigned int len)),
 			     void *param1, void *param2)
@@ -1292,7 +1292,7 @@
 	return 0;
 }
 
-static int check_block_eraser(const struct flashchip *flash, int k, int log)
+static int check_block_eraser(const struct flashctx *flash, int k, int log)
 {
 	struct block_eraser eraser = flash->block_erasers[k];
 
@@ -1316,7 +1316,7 @@
 	return 0;
 }
 
-int erase_and_write_flash(struct flashchip *flash, uint8_t *oldcontents,
+int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
 			  uint8_t *newcontents)
 {
 	int k, ret = 1;
@@ -1534,6 +1534,13 @@
 		msg_gerr("Flashchips table miscompilation!\n");
 		ret = 1;
 	}
+	/* Check that virtual_memory in struct flashctx is placed directly
+	 * after the members copied from struct flashchip.
+	 */
+	if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) {
+		msg_gerr("struct flashctx broken!\n");
+		ret = 1;
+	}
 	for (flash = flashchips; flash && flash->name; flash++)
 		if (selfcheck_eraseblocks(flash))
 			ret = 1;
@@ -1559,7 +1566,7 @@
 	return ret;
 }
 
-void check_chip_supported(const struct flashchip *flash)
+void check_chip_supported(const struct flashctx *flash)
 {
 	if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) {
 		msg_cinfo("===\n");
@@ -1611,7 +1618,7 @@
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(struct flashchip *flash, int force, int read_it, int write_it, int erase_it, int verify_it)
+int chip_safety_check(struct flashctx *flash, int force, int read_it, int write_it, int erase_it, int verify_it)
 {
 	if (!programmer_may_write && (write_it || erase_it)) {
 		msg_perr("Write/erase is not working yet on your programmer in "
@@ -1672,7 +1679,7 @@
  * but right now it allows us to split off the CLI code.
  * Besides that, the function itself is a textbook example of abysmal code flow.
  */
-int doit(struct flashchip *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it)
+int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it)
 {
 	uint8_t *oldcontents;
 	uint8_t *newcontents;
Index: flashrom-struct_flashctx/programmer.h
===================================================================
--- flashrom-struct_flashctx/programmer.h	(Revision 1472)
+++ flashrom-struct_flashctx/programmer.h	(Arbeitskopie)
@@ -24,7 +24,7 @@
 #ifndef __PROGRAMMER_H__
 #define __PROGRAMMER_H__ 1
 
-#include "flash.h"	/* for chipaddr and flashchip */
+#include "flash.h"	/* for chipaddr and flashctx */
 
 enum programmer {
 #if CONFIG_INTERNAL == 1
@@ -513,7 +513,7 @@
 extern struct decode_sizes max_rom_decode;
 extern int programmer_may_write;
 extern unsigned long flashbase;
-void check_chip_supported(const struct flashchip *flash);
+void check_chip_supported(const struct flashctx *flash);
 int check_max_decode(enum chipbustype buses, uint32_t size);
 char *extract_programmer_param(const char *param_name);
 
@@ -570,16 +570,16 @@
 	int (*multicommand)(struct spi_command *cmds);
 
 	/* Optimized functions for this programmer */
-	int (*read)(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*write_256)(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 };
 
 extern const struct spi_programmer *spi_programmer;
 int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			     const unsigned char *writearr, unsigned char *readarr);
 int default_spi_send_multicommand(struct spi_command *cmds);
-int default_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int default_spi_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void register_spi_programmer(const struct spi_programmer *programmer);
 
 /* ichspi.c */
@@ -624,10 +624,10 @@
 	int max_data_read;
 	int max_data_write;
 	/* Specific functions for this programmer */
-	int (*probe) (struct flashchip *flash);
-	int (*read) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*write) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
+	int (*probe) (struct flashctx *flash);
+	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
 };
 extern const struct opaque_programmer *opaque_programmer;
 void register_opaque_programmer(const struct opaque_programmer *pgm);
Index: flashrom-struct_flashctx/chipdrivers.h
===================================================================
--- flashrom-struct_flashctx/chipdrivers.h	(Revision 1472)
+++ flashrom-struct_flashctx/chipdrivers.h	(Arbeitskopie)
@@ -19,79 +19,79 @@
  *
  * Header file for flash chip drivers. Included from flash.h.
  * As a general rule, every function listed here should take a pointer to
- * struct flashchip as first parameter.
+ * struct flashctx as first parameter.
  */
 
 #ifndef __CHIPDRIVERS_H__
 #define __CHIPDRIVERS_H__ 1
 
-#include "flash.h"	/* for chipaddr and flashchip */
+#include "flash.h"	/* for chipaddr and flashctx */
 
 /* spi.c, should probably be in spi_chip.c */
-int probe_spi_rdid(struct flashchip *flash);
-int probe_spi_rdid4(struct flashchip *flash);
-int probe_spi_rems(struct flashchip *flash);
-int probe_spi_res1(struct flashchip *flash);
-int probe_spi_res2(struct flashchip *flash);
+int probe_spi_rdid(struct flashctx *flash);
+int probe_spi_rdid4(struct flashctx *flash);
+int probe_spi_rems(struct flashctx *flash);
+int probe_spi_res1(struct flashctx *flash);
+int probe_spi_res2(struct flashctx *flash);
 int spi_write_enable(void);
 int spi_write_disable(void);
-int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int spi_chip_read(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len);
+int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
 uint8_t spi_read_status_register(void);
-int spi_write_status_register(struct flashchip *flash, int status);
+int spi_write_status_register(struct flashctx *flash, int status);
 void spi_prettyprint_status_register_bit(uint8_t status, int bit);
 void spi_prettyprint_status_register_bp3210(uint8_t status, int bp);
 void spi_prettyprint_status_register_welwip(uint8_t status);
-int spi_prettyprint_status_register(struct flashchip *flash);
-int spi_disable_blockprotect(struct flashchip *flash);
+int spi_prettyprint_status_register(struct flashctx *flash);
+int spi_disable_blockprotect(struct flashctx *flash);
 int spi_byte_program(unsigned int addr, uint8_t databyte);
 int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len);
 int spi_nbyte_read(unsigned int addr, uint8_t *bytes, unsigned int len);
-int spi_read_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
-int spi_write_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
-int spi_aai_write(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
+int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
+int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 
 /* opaque.c */
-int probe_opaque(struct flashchip *flash);
-int read_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int write_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int erase_opaque(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
+int probe_opaque(struct flashctx *flash);
+int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
 
 /* a25.c */
-int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash);
-int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash);
-int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash);
-int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash);
+int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash);
+int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash);
+int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash);
 
 /* at25.c */
-int spi_prettyprint_status_register_at25df(struct flashchip *flash);
-int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash);
-int spi_prettyprint_status_register_at25f(struct flashchip *flash);
-int spi_prettyprint_status_register_at25fs010(struct flashchip *flash);
-int spi_prettyprint_status_register_at25fs040(struct flashchip *flash);
-int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash);
-int spi_disable_blockprotect_at25df(struct flashchip *flash);
-int spi_disable_blockprotect_at25df_sec(struct flashchip *flash);
-int spi_disable_blockprotect_at25f(struct flashchip *flash);
-int spi_disable_blockprotect_at25fs010(struct flashchip *flash);
-int spi_disable_blockprotect_at25fs040(struct flashchip *flash);
+int spi_prettyprint_status_register_at25df(struct flashctx *flash);
+int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash);
+int spi_prettyprint_status_register_at25f(struct flashctx *flash);
+int spi_prettyprint_status_register_at25fs010(struct flashctx *flash);
+int spi_prettyprint_status_register_at25fs040(struct flashctx *flash);
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash);
+int spi_disable_blockprotect_at25df(struct flashctx *flash);
+int spi_disable_blockprotect_at25df_sec(struct flashctx *flash);
+int spi_disable_blockprotect_at25f(struct flashctx *flash);
+int spi_disable_blockprotect_at25fs010(struct flashctx *flash);
+int spi_disable_blockprotect_at25fs040(struct flashctx *flash);
 
 /* 82802ab.c */
-uint8_t wait_82802ab(struct flashchip *flash);
-int probe_82802ab(struct flashchip *flash);
-int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize);
-int write_82802ab(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+uint8_t wait_82802ab(struct flashctx *flash);
+int probe_82802ab(struct flashctx *flash);
+int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize);
+int write_82802ab(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void print_status_82802ab(uint8_t status);
-int unlock_82802ab(struct flashchip *flash);
-int unlock_28f004s5(struct flashchip *flash);
-int unlock_lh28f008bjt(struct flashchip *flash);
+int unlock_82802ab(struct flashctx *flash);
+int unlock_28f004s5(struct flashctx *flash);
+int unlock_lh28f008bjt(struct flashctx *flash);
 
 /* jedec.c */
 uint8_t oddparity(uint8_t val);
@@ -99,58 +99,58 @@
 void data_polling_jedec(chipaddr dst, uint8_t data);
 int write_byte_program_jedec(chipaddr bios, uint8_t *src,
 			     chipaddr dst);
-int probe_jedec(struct flashchip *flash);
-int write_jedec(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int write_jedec_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize);
-int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize);
-int erase_chip_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize);
+int probe_jedec(struct flashctx *flash);
+int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int write_jedec_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int pagesize);
+int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize);
+int erase_chip_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize);
 
 /* m29f400bt.c */
-int probe_m29f400bt(struct flashchip *flash);
-int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len);
-int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len);
-int write_m29f400bt(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int probe_m29f400bt(struct flashctx *flash);
+int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
+int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
+int write_m29f400bt(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void protect_m29f400bt(chipaddr bios);
 
 /* pm49fl00x.c */
-int unlock_49fl00x(struct flashchip *flash);
-int lock_49fl00x(struct flashchip *flash);
+int unlock_49fl00x(struct flashctx *flash);
+int lock_49fl00x(struct flashctx *flash);
 
 /* sst28sf040.c */
-int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size);
-int write_28sf040(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int unprotect_28sf040(struct flashchip *flash);
-int protect_28sf040(struct flashchip *flash);
+int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size);
+int write_28sf040(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int unprotect_28sf040(struct flashctx *flash);
+int protect_28sf040(struct flashctx *flash);
 
 /* sst49lfxxxc.c */
-int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size);
-int unlock_49lfxxxc(struct flashchip *flash);
+int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size);
+int unlock_49lfxxxc(struct flashctx *flash);
 
 /* sst_fwhub.c */
-int printlock_sst_fwhub(struct flashchip *flash);
-int unlock_sst_fwhub(struct flashchip *flash);
+int printlock_sst_fwhub(struct flashctx *flash);
+int unlock_sst_fwhub(struct flashctx *flash);
 
 /* w39.c */
-int printlock_w39l040(struct flashchip * flash);
-int printlock_w39v040a(struct flashchip *flash);
-int printlock_w39v040b(struct flashchip *flash);
-int printlock_w39v040c(struct flashchip *flash);
-int printlock_w39v040fa(struct flashchip *flash);
-int printlock_w39v040fb(struct flashchip *flash);
-int printlock_w39v040fc(struct flashchip *flash);
-int printlock_w39v080a(struct flashchip *flash);
-int printlock_w39v080fa(struct flashchip *flash);
-int printlock_w39v080fa_dual(struct flashchip *flash);
-int unlock_w39v040fb(struct flashchip *flash);
-int unlock_w39v080fa(struct flashchip *flash);
+int printlock_w39l040(struct flashctx * flash);
+int printlock_w39v040a(struct flashctx *flash);
+int printlock_w39v040b(struct flashctx *flash);
+int printlock_w39v040c(struct flashctx *flash);
+int printlock_w39v040fa(struct flashctx *flash);
+int printlock_w39v040fb(struct flashctx *flash);
+int printlock_w39v040fc(struct flashctx *flash);
+int printlock_w39v080a(struct flashctx *flash);
+int printlock_w39v080fa(struct flashctx *flash);
+int printlock_w39v080fa_dual(struct flashctx *flash);
+int unlock_w39v040fb(struct flashctx *flash);
+int unlock_w39v080fa(struct flashctx *flash);
 
 /* w29ee011.c */
-int probe_w29ee011(struct flashchip *flash);
+int probe_w29ee011(struct flashctx *flash);
 
 /* stm50flw0x0x.c */
-int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize);
-int unlock_stm50flw0x0x(struct flashchip *flash);
+int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int block, unsigned int blocksize);
+int unlock_stm50flw0x0x(struct flashctx *flash);
 
 #endif /* !__CHIPDRIVERS_H__ */
Index: flashrom-struct_flashctx/m29f400bt.c
===================================================================
--- flashrom-struct_flashctx/m29f400bt.c	(Revision 1472)
+++ flashrom-struct_flashctx/m29f400bt.c	(Arbeitskopie)
@@ -28,7 +28,7 @@
    functions. */
 
 /* chunksize is 1 */
-int write_m29f400bt(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
@@ -55,7 +55,7 @@
 	return 0;
 }
 
-int probe_m29f400bt(struct flashchip *flash)
+int probe_m29f400bt(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
@@ -86,7 +86,7 @@
 	return 0;
 }
 
-int erase_m29f400bt(struct flashchip *flash)
+int erase_m29f400bt(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -105,7 +105,7 @@
 	return 0;
 }
 
-int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len)
+int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len)
 {
 	chipaddr bios = flash->virtual_memory;
 	chipaddr dst = bios + start;
@@ -125,7 +125,7 @@
 	return 0;
 }
 
-int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int address, unsigned int blocklen)
+int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, unsigned int blocklen)
 {
 	if ((address != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",


-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Fri Dec  9 02:33:36 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 09 Dec 2011 02:33:36 +0100
Subject: [flashrom] [RFC] Add struct flashchip * everywhere
In-Reply-To: <4EE16214.1030407@gmx.net>
References: <4EB0BEB2.1040701@gmx.net>
	<201111021241.pA2CfGHH021689@mail2.student.tuwien.ac.at>
	<4EB31089.7000902@gmx.net> <4EB9C67A.50502@gmx.net>
	<4EE16214.1030407@gmx.net>
Message-ID: <4EE16570.4010300@gmx.net>

Am 09.12.2011 02:19 schrieb Carl-Daniel Hailfinger:
> Am 09.11.2011 01:16 schrieb Carl-Daniel Hailfinger:
>> Am 03.11.2011 23:07 schrieb Carl-Daniel Hailfinger:
>>> Am 02.11.2011 13:41 schrieb Stefan Tauner:
>>>> another layer of redirection is - as always - also a
>>>> possibility: introducing a new struct with pointers to the actual chip
>>>> and the programmer to be used (and other information related to the
>>>> actual situation/probing... e.g. access right ranges). but that's
>>>> probably not needed (yet) and the splitting could be done later anyway
>>>> if need be. OTOH if it is clear that there will be more information
>>>> stuffed into struct flashchip, that is not really static and does not
>>>> need to/should not reside in flashchips.c/struct flashchip, we may
>>>> better discuss a separation now(?).
>>> We have a big problem: There is almost no information in struct
>>> flashchip which is constant in all cases.
>>> The name, size and erase structures could be filled in automatically for
>>> SFDP stuff. That alone kills the separation idea IMHO.
>> Turns out separating struct flashchip and struct flashctx (the flash
>> context) is possible, but it required some sed and manual care.
>>
>> The only difference between struct flashchip and struct flashctx right
>> now are the virtual_memory and virtual_registers members.
>> Compared to my earlier patch, no function signatures have been changed
>> except for flashchip->flashctx replacements. This should make reviews
>> easier.
>>
>> TODO:
>> Test if flashing still works on hardware (I tested with dummy).
>> Test if printing and wiki printing still works as expected.
>>
>> Deferred to another patch:
>> Adding struct flashctx to the remaining function signatures.
>> Check if it makes sense to convert some function signatures to use constant.
>>
>> If you want to verify this patch, run the following command in an
>> unmodified tree:
>> sed -i "s/struct flashchip/struct flashctx/g" *.[ch]
>> and then compare the result to this patch. A few places like print.c and
>> print_wiki.c kept struct flashchip because they don't care about the
>> context and act directly on the flashchips array.
> New version, updated to apply against svn HEAD.
> Please note that this one still duplicates the struct flashchip members
> manually in struct flashctx. An alternative version will be posted as
> followup.

I take that back. Moving struct flashchip members to a separate file did
not work for reasons which are not immediately obvious:
struct block_eraser, struct eraseblock and struct voltage are declared
ad-hoc inside struct flashchip. This improves readability because every
member of struct flashchip is defined (and commented) in one central
place without having to hunt down struct definitions elsewhere. However,
repeating that block of code causes compilers to warn about redefining
those same structs. I don't see any good solution for that.

The version I posted a few minutes ago has a check in selfcheck() to
ensure at least some basic sanity:

/* Check that virtual_memory in struct flashctx is placed directly
 * after the members copied from struct flashchip.
 */
if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) {
        msg_gerr("struct flashctx broken!\n");
        ret = 1;
}


Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From dhendrix at google.com  Fri Dec  9 05:02:45 2011
From: dhendrix at google.com (David Hendricks)
Date: Thu, 8 Dec 2011 20:02:45 -0800
Subject: [flashrom] [PATCH] Cross-compilation fixes
In-Reply-To: <4EE11B7F.8080200@gmx.net>
References: <4EDC25BD.1090704@gmx.net> <4EE1123A.8040707@assembler.cz>
	<4EE11B7F.8080200@gmx.net>
Message-ID: <CAKOoyUfUgS-+RkkLxm_NyBqdU_g1zuVeLuQyDhBt0XfZj+0CKA@mail.gmail.com>

On Thu, Dec 8, 2011 at 12:18 PM, Carl-Daniel Hailfinger <
c-d.hailfinger.devel.2006 at gmx.net> wrote:

> > Most likely no arm support?
>
> Indeed, ARM support is missing. I think it is mainy held back by libpci
> breakage for which we only have a really hackish workaround.


For what it's worth, when I tested the patch earlier it worked on ARM with
that libpci hack.

-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
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From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:06:01 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:06:01 +0100
Subject: [flashrom] Supermicro X8DTE-F
In-Reply-To: <4ED34792.4040502@deltacomputer.de>
References: <4ED34792.4040502@deltacomputer.de>
Message-ID: <201112100005.pBA054tQ014780@mail2.student.tuwien.ac.at>

On Mon, 28 Nov 2011 09:34:26 +0100
Michael Fuckner <fuckner at deltacomputer.de> wrote:

> Hi all,
> 
> I have a lot of supermicro boards/ systems at hand and I first tried it 
> this morning and it worked with X8DTE-F, so it will most likely also 
> work with X8DT6 (same bios file). Do you also need flashrom -V or -z?
> 
> I hope I have some time to test other boards available.

Hello Michael,

thanks for your report!
I have added the board to our list of supported boards and will commit
that later together with other small changes.
Boards using the same update file will most probably work yes, but we
do only add boards that were tested specifically.
Next time a verbose (-V) log would be appreciated, but it is not really
necessary. -z is never needed for such reports, we just use it
internally when generating wiki pages (it is not compiled in by default
btw). Looking forward to see more reports, but don't waste your time by
doing BIOS updates just to test flashrom. There are probably better
ways to help us. (It is very much appreciated though!)
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:14:20 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:14:20 +0100
Subject: [flashrom] P8H61 PRO
In-Reply-To: <1539999166.20111201065931@gmail.com>
References: <CAJuAjbgLzmAaWXHFp_p6Vfcc8weWbvLXTkn7vtXE8Jd5TBLRTw@mail.gmail.com>
	<201111302230.pAUMTwrS020929@mail2.student.tuwien.ac.at>
	<1539999166.20111201065931@gmail.com>
Message-ID: <201112100013.pBA0DMBZ018108@mail2.student.tuwien.ac.at>

On Thu, 1 Dec 2011 06:59:31 +0600
novoagansk at gmail.com wrote:

> > On Thu, 1 Dec 2011 01:45:03 +0600
> > Pavel Petrov <novoagansk at gmail.com> wrote:
> 
> If i send to you utility from asus and flash image,
> it may be happy to help make you flashrom program better?
> 
> I have kubuntu linux 32bit on my computer and i can experimental run your
> next beta version flashrom program to help make this program better...
> 
> If flashrom program make system unbootable - i have a programmer to reprogram
> bios and i have soldering iron and smd rework station to get bios from
> motherboard to programmer.

Hello Pavel,

we are aware that the vendor tools are able to unlock the region and of
course we could download them. The problem is not accessing the tools
but that no one has the time and motivation to re-engineer them to find
out how exactly they are doing it.

If you want to help test new code it is probably the best idea to
subscribe to our mailing list and read what is sent by the devs. Be
aware though that much of the traffic are user reports and/or support
questions...
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:21:35 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:21:35 +0100
Subject: [flashrom] "Intel H61" with PCI ID 8086:1c5c. including a
 verbose (-V) log
In-Reply-To: <20111130213357.40eea5ab@bol.com.br>
References: <20111128212208.5c7fca81@bol.com.br>
	<201111302236.pAUMac3k028133@mail2.student.tuwien.ac.at>
	<20111130213357.40eea5ab@bol.com.br>
Message-ID: <201112100020.pBA0KbfY021185@mail2.student.tuwien.ac.at>

On Wed, 30 Nov 2011 21:33:57 -0200
Fabio <fabio.capoeira at bol.com.br> wrote:

> Hi Stefan,
> 
> Das Board ist ein MSI h61mu-e35 (b3)
> 
> writing hab ich schiss es zu verschroten, ist nagelneu und brauche auch
> bis jetzt kein bios-update (obwohl neueres bios released).
> 
> reading habe ich gerade probiert:
> 
> ----------
> [studio at myhost ~]$ sudo flashrom -r ~/temp/flashread
> flashrom v0.9.4-r1395 on Linux 3.0-rt (i686), built with libpci 3.1.8,
> GCC 4.6.2, little endian flashrom is free software, get the source code
> at http://www.flashrom.org
> 
> Calibrating delay loop... OK.
> sh: dmidecode: comando n?o encontrado
> dmidecode execution unsuccessful - continuing without DMI info
> Found chipset "Intel H61". 
> This chipset is marked as untested. If you are using an up-to-date
> version of flashrom please email a report to flashrom at flashrom.org
> including a verbose (-V) log. Thank you!
> Enabling flash write... OK.
> This chipset supports the following protocols: FWH, SPI.
> Found Winbond flash chip "W25Q32" (4096 kB, SPI) at physical address
> 0xffc00000. Reading flash... done.

hello again,

please keep messages to the list in english so that everyone can read
them. it is ok and wise to not write to chips holding the firmware if
you do not have a fallback - no matter which software you are using.
if you are brave sometime in the future we would appreciate another
report (or rant ;)
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:26:42 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:26:42 +0100
Subject: [flashrom] Supermicro X9SCA-F with Intel C204 chipset
In-Reply-To: <4ED86172.2040603@fuckner.net>
References: <4ED86172.2040603@fuckner.net>
Message-ID: <201112100025.pBA0PjZK023110@mail2.student.tuwien.ac.at>

On Fri, 02 Dec 2011 06:26:10 +0100
Michael Fuckner <michael at fuckner.net> wrote:

> 0x5C: 0x03ff0030 (FREG2: Management Engine)
> 0x00030000-0x003fffff is locked

Hello Michael,

thanks for your report!

The problem is the locked ME region as quoted above. We are working on
unlocking it, but intel does not provide us any documentation so please
do not expect a solution soon.

We had another report regarding the X9SCL, so probably none of
Supermicro's X9(SC?) series will work at the moment.

I have added the board to our list of (un)supported boards (with an
appropriate note) and will commit that later together with other small
changes.
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:32:14 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:32:14 +0100
Subject: [flashrom] Numonyx M25P40 - erase & write OK
In-Reply-To: <CAKrwbvEzuVEGcdgENp2S0=8C+cGuRZFkHap=a5uMTgThnQE2FQ@mail.gmail.com>
References: <CAKrwbvEzuVEGcdgENp2S0=8C+cGuRZFkHap=a5uMTgThnQE2FQ@mail.gmail.com>
Message-ID: <201112100031.pBA0VHdl025432@mail2.student.tuwien.ac.at>

On Fri, 2 Dec 2011 19:46:13 +0100
Nikita Schmidt <nikita.schmidt at gmail.com> wrote:

> Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:S, 0x020000-0x02ffff:S, 0x030000-0x03ffff:S, 0x040000-0x04ffff:S, 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:S


Hello Nikita,

thanks for your report!
I have marked the flash chip as fully tested and will commit that later
together with other small changes. Your log shows that only the first
block was erased and written. All others were skipped because the data
was already equal to the input, so this run was not a very thorough
test. I'd like to know if you have done more writes and happen to know
if the other blocks were not skipped in those cases?

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:41:36 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:41:36 +0100
Subject: [flashrom] Gigabyte GA-MA785GM-US2H motherboard supported
In-Reply-To: <CAPVQmFHh9rLMB=d1iu8qJgOa=0AWqGxsM-hZA4iCjRz-Y2U7qA@mail.gmail.com>
References: <CAPVQmFHh9rLMB=d1iu8qJgOa=0AWqGxsM-hZA4iCjRz-Y2U7qA@mail.gmail.com>
Message-ID: <201112100040.pBA0ecrt029511@mail2.student.tuwien.ac.at>

On Sat, 3 Dec 2011 07:10:05 -0800
Ron Hossack <ronslinux at gmail.com> wrote:

> I didn't find my specific MB listed and wanted to check and see if it's ok
> to use flashrom with this one.
> 
> Info: http://www.gigabyte.us/products/product-page.aspx?pid=3141&dl=1#ov
> 
> Thanks

I can't tell from the website/specs alone. Please provide at least a
verbose log of a probing run of flashrom (just flashrom -V).
This is very safe to do and will just look for supported hardware.
We won't know for sure if your board will work with the verbose log
either (but may be able to infer that it surely can not work), you will
have to try.
Usually if it fails there is just a write protection of the
complete flash chip which we have to disable. Failures that brick the
board should not happen with newer versions of flashrom (unless you
really force it to). Please always use at least the latest stable
release (0.9.4 at the moment).
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:47:40 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:47:40 +0100
Subject: [flashrom] ASUS P8H67-M PRO not working
In-Reply-To: <CB31876A034F4017B454C0E7B856E8AF@MacPro>
References: <CB31876A034F4017B454C0E7B856E8AF@MacPro>
Message-ID: <201112100046.pBA0khDL031727@mail2.student.tuwien.ac.at>

Hello Marek,

thanks for your report!

As Joshua explained already the problem is the locked ME region. We are
working on unlocking it, but intel does not provide us any
documentation so please do not expect a solution soon.

I have added the board to our list of (un)supported boards (with an
appropriate note) and will commit that later together with other small
changes.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 01:51:06 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 01:51:06 +0100
Subject: [flashrom] QM67 based board is working
In-Reply-To: <10F3A135D608214B9D0679FE69361F78090D7CBF20@EXCH-CMS.hlit.local>
References: <mailman.1457.1323244979.4301.flashrom@flashrom.org>
	<10F3A135D608214B9D0679FE69361F78090D7CBF20@EXCH-CMS.hlit.local>
Message-ID: <201112100050.pBA0o9OY000743@mail2.student.tuwien.ac.at>

On Wed, 7 Dec 2011 10:22:18 -0800
Andy Loso <Andy.Loso at harmonicinc.com> wrote:

> Seems to read/erase/write correctly.
> Also correctly identifies a Macronix flash chip "MX25L6405" (8192 kB, SPI).

Hello Andy,

thanks for your report!
According to your log flashrom has skipped erasing and writing the chip
completely because the data was already equal to the input data. I
presume that you have generated the log after successfully updating the
firmware and hence it was already there? Can you confirm that at least
some data on the flash chip has really changed in the update (a
version string for example)?

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From michael at fuckner.net  Sat Dec 10 08:15:18 2011
From: michael at fuckner.net (Michael Fuckner)
Date: Sat, 10 Dec 2011 08:15:18 +0100
Subject: [flashrom] Supermicro H8QG6-F works
Message-ID: <4EE30706.2060405@fuckner.net>

Good morning,

reading Bios from Quad Opteron H8QG6-F seems to work.

Regards,
  Michael!
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From michael at fuckner.net  Sat Dec 10 08:15:37 2011
From: michael at fuckner.net (Michael Fuckner)
Date: Sat, 10 Dec 2011 08:15:37 +0100
Subject: [flashrom] Supermicro X8DTE-F
In-Reply-To: <201112100005.pBA054tQ014780@mail2.student.tuwien.ac.at>
References: <4ED34792.4040502@deltacomputer.de>
	<201112100005.pBA054tQ014780@mail2.student.tuwien.ac.at>
Message-ID: <4EE30719.6090309@fuckner.net>

On 12/10/2011 01:06 AM, Stefan Tauner wrote:

> Hello Michael,
>  Looking forward to see more reports,


but don't waste your time by
> doing BIOS updates just to test flashrom. There are probably better
> ways to help us.
for example?

Regards,
  Michael!


From paulepanter at users.sourceforge.net  Sat Dec 10 08:58:45 2011
From: paulepanter at users.sourceforge.net (Paul Menzel)
Date: Sat, 10 Dec 2011 08:58:45 +0100
Subject: [flashrom] Supermicro X8DTE-F
In-Reply-To: <4EE30719.6090309@fuckner.net>
References: <4ED34792.4040502@deltacomputer.de>
	<201112100005.pBA054tQ014780@mail2.student.tuwien.ac.at>
	<4EE30719.6090309@fuckner.net>
Message-ID: <1323503925.25802.66.camel@mattotaupa>

Am Samstag, den 10.12.2011, 08:15 +0100 schrieb Michael Fuckner:
> On 12/10/2011 01:06 AM, Stefan Tauner wrote:

> >  Looking forward to see more reports,

Yes me too. Thank you for doing that.

> > but don't waste your time by
> > doing BIOS updates just to test flashrom. There are probably better
> > ways to help us.
> for example?

When you keep on sending these reports, maybe you could even generate
patches by yourself (svn co` or `git svn` and then `git commit`, `git
format-patch -1` which Stefan just needs to merge in his repository? I
do not know if Stefan agrees though.

Other ways would be to test or even review patches, help people on the
list or IRC and lastly to write code yourself. ;-)

Thanks,

Paul
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From nikita.schmidt at gmail.com  Sat Dec 10 10:00:16 2011
From: nikita.schmidt at gmail.com (Nikita Schmidt)
Date: Sat, 10 Dec 2011 10:00:16 +0100
Subject: [flashrom] Numonyx M25P40 - erase & write OK
In-Reply-To: <201112100031.pBA0VHdl025432@mail2.student.tuwien.ac.at>
References: <CAKrwbvEzuVEGcdgENp2S0=8C+cGuRZFkHap=a5uMTgThnQE2FQ@mail.gmail.com>
	<201112100031.pBA0VHdl025432@mail2.student.tuwien.ac.at>
Message-ID: <CAKrwbvGrRVg09O5y8A+tvoDd57NpM=dM59pzqc179e1oFr-G2w@mail.gmail.com>

Hello Stefan,

Thanks for explaining what the letters mean and why my writes are
usually so quick!
I've done full chip writes, they all went well.  The reports are
identical to the one attached with only minor differences in delay
loop calculations.
Except on one occasion, when flashrom correctly identified a pre-erased block:
Erasing and writing flash chip... Trying erase function 0...
0x000000-0x00ffff:EW, 0x010000-0x01ffff:EW, 0x020000-0x02ffff:W,
0x030000-0x03ffff:EW, 0x040000-0x04ffff:EW, 0x050000-0x05ffff:EW,
0x060000-0x06ffff:EW, 0x070000-0x07ffff:EW

Cheers,
Nikita
-------------- next part --------------
flashrom v0.9.4-r1394 on Linux 3.0.0-14-generic (x86_64), built with libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 946M loops per second, 10 myus = 23 us, 100 myus = 97 us, 1000 myus = 987 us, 10000 myus = 9964 us, 4 myus = 3 us, OK.
Initializing ft2232_spi programmer
Using device type FTDI FT2232H interface B
Disable divide-by-5 front stage
Set clock divisor
MPSSE clock: 60.000000 MHz divisor: 3 SPI clock: 10.000000 MHz
No loopback of TDI/DO TDO/DI
Set data bits
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xff, id2 0xff
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x12, id2 0x12
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found ST flash chip "M25P40" (512 kB, SPI) on ft2232_spi.
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0x20, id2 0x2013
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xff, id2 0xff
===
This flash part has status UNTESTED for operations: ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:EW, 0x020000-0x02ffff:EW, 0x030000-0x03ffff:EW, 0x040000-0x04ffff:EW, 0x050000-0x05ffff:EW, 0x060000-0x06ffff:EW, 0x070000-0x07ffff:EW
Erase/write done.
Verifying flash... VERIFIED.          

From stefan.tauner at student.tuwien.ac.at  Sat Dec 10 12:32:24 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 10 Dec 2011 12:32:24 +0100
Subject: [flashrom] Supermicro X8DTE-F
In-Reply-To: <4EE30719.6090309@fuckner.net>
References: <4ED34792.4040502@deltacomputer.de>
	<201112100005.pBA054tQ014780@mail2.student.tuwien.ac.at>
	<4EE30719.6090309@fuckner.net>
Message-ID: <201112101131.pBABVQjD010267@mail2.student.tuwien.ac.at>

On Sat, 10 Dec 2011 08:15:37 +0100
Michael Fuckner <michael at fuckner.net> wrote:

> On 12/10/2011 01:06 AM, Stefan Tauner wrote:
> 
> > Hello Michael,
> >  Looking forward to see more reports,
> 
> 
> but don't waste your time by
> > doing BIOS updates just to test flashrom. There are probably better
> > ways to help us.
> for example?

besides what paul suggested (although i am not a fan of one-line
patches due to their overhead for everyone) we have also a list of
small tasks for newbies in our wiki:
http://www.flashrom.org/Easy_projects
Of course testing boards is also useful. Maybe we can also come up with
more and/or discuss the existing or your own ideas on IRC (#flashrom on
irc.freenode.net).

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From leewdaugherty at gmail.com  Sun Dec 11 22:07:37 2011
From: leewdaugherty at gmail.com (Lee Daugherty)
Date: Sun, 11 Dec 2011 15:07:37 -0600
Subject: [flashrom] flashrom -V output for NVIDIA MCP79 (Zotac Mag Mini)
Message-ID: <CABSyf6pnBke_iVT7QFOuy1xAuF=XOFQT02o_hxdeW7n6zJscig@mail.gmail.com>

ldaugherty at Nettop-Zotac:~$ sudo flashrom -V > NVIDIA_MCP79.txt
Mapping MCP67 SPI at 0xfae80000, unaligned size 0x544.
ldaugherty at Nettop-Zotac:~$ cat NVIDIA_MCP79.txt
flashrom v0.9.2-r1028 on Linux 3.0.0-0300rc2-generic (i686), built with
libpci 3.0.0, GCC 4.4.4, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 2 usecs, 772M loops per
second, 10 myus = 10 us, 100 myus = 193 us, 1000 myus = 1024 us, 10000 myus
= 9893 us, 8 myus = 9 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "To Be Filled By O.E.M."
DMI string system-product-name: "To Be Filled By O.E.M."
DMI string system-version: "To Be Filled By O.E.M."
DMI string baseboard-manufacturer: "ZOTAC"
DMI string baseboard-product-name: "ION"
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP79", enabling flash write... chipset PCI ID is
10de:0aad, This chipset is not really supported yet. Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Guessed flash bus type is SPI
Found SMBus device 10de:0aa2 at 00:03:2
SPI BAR is at 0xfae80000, after clearing low bits BAR is at 0xfae80000
SPI control is 0xc05a, enable=0, idle=0
Please send the output of "flashrom -V" to flashrom at flashrom.org to help us
finish support for your chipset. Thanks.
SPI on this chipset is not supported yet.
OK.
This chipset supports the following protocols: None.
Probing for AMD Am29F010A/B, 128 KB: skipped.
Probing for AMD Am29F002(N)BB, 256 KB: skipped.
Probing for AMD Am29F002(N)BT, 256 KB: skipped.
Probing for AMD Am29F016D, 2048 KB: skipped.
Probing for AMD Am29F040B, 512 KB: skipped.
Probing for AMD Am29F080B, 1024 KB: skipped.
Probing for AMD Am29LV040B, 512 KB: skipped.
Probing for AMD Am29LV081B, 1024 KB: skipped.
Probing for ASD AE49F2008, 256 KB: skipped.
Probing for Atmel AT25DF021, 256 KB: skipped.
Probing for Atmel AT25DF041A, 512 KB: skipped.
Probing for Atmel AT25DF081, 1024 KB: skipped.
Probing for Atmel AT25DF161, 2048 KB: skipped.
Probing for Atmel AT25DF321, 4096 KB: skipped.
Probing for Atmel AT25DF321A, 4096 KB: skipped.
Probing for Atmel AT25DF641, 8192 KB: skipped.
Probing for Atmel AT25F512B, 64 KB: skipped.
Probing for Atmel AT25FS010, 128 KB: skipped.
Probing for Atmel AT25FS040, 512 KB: skipped.
Probing for Atmel AT26DF041, 512 KB: skipped.
Probing for Atmel AT26DF081A, 1024 KB: skipped.
Probing for Atmel AT26DF161, 2048 KB: skipped.
Probing for Atmel AT26DF161A, 2048 KB: skipped.
Probing for Atmel AT26F004, 512 KB: skipped.
Probing for Atmel AT29C512, 64 KB: skipped.
Probing for Atmel AT29C010A, 128 KB: skipped.
Probing for Atmel AT29C020, 256 KB: skipped.
Probing for Atmel AT29C040A, 512 KB: skipped.
Probing for Atmel AT45CS1282, 16896 KB: skipped.
Probing for Atmel AT45DB011D, 128 KB: skipped.
Probing for Atmel AT45DB021D, 256 KB: skipped.
Probing for Atmel AT45DB041D, 512 KB: skipped.
Probing for Atmel AT45DB081D, 1024 KB: skipped.
Probing for Atmel AT45DB161D, 2048 KB: skipped.
Probing for Atmel AT45DB321C, 4224 KB: skipped.
Probing for Atmel AT45DB321D, 4096 KB: skipped.
Probing for Atmel AT45DB642D, 8192 KB: skipped.
Probing for Atmel AT49BV512, 64 KB: skipped.
Probing for Atmel AT49F002(N), 256 KB: skipped.
Probing for Atmel AT49F002(N)T, 256 KB: skipped.
Probing for AMIC A25L40PT, 512 KB: skipped.
Probing for AMIC A25L40PU, 512 KB: skipped.
Probing for AMIC A29002B, 256 KB: skipped.
Probing for AMIC A29002T, 256 KB: skipped.
Probing for AMIC A29040B, 512 KB: skipped.
Probing for AMIC A49LF040A, 512 KB: skipped.
Probing for EMST F49B002UA, 256 KB: skipped.
Probing for Eon EN25B05, 64 KB: skipped.
Probing for Eon EN25B05T, 64 KB: skipped.
Probing for Eon EN25B10, 128 KB: skipped.
Probing for Eon EN25B10T, 128 KB: skipped.
Probing for Eon EN25B20, 256 KB: skipped.
Probing for Eon EN25B20T, 256 KB: skipped.
Probing for Eon EN25B40, 512 KB: skipped.
Probing for Eon EN25B40T, 512 KB: skipped.
Probing for Eon EN25B80, 1024 KB: skipped.
Probing for Eon EN25B80T, 1024 KB: skipped.
Probing for Eon EN25B16, 2048 KB: skipped.
Probing for Eon EN25B16T, 2048 KB: skipped.
Probing for Eon EN25B32, 4096 KB: skipped.
Probing for Eon EN25B32T, 4096 KB: skipped.
Probing for Eon EN25B64, 8192 KB: skipped.
Probing for Eon EN25B64T, 8192 KB: skipped.
Probing for Eon EN25D16, 2048 KB: skipped.
Probing for Eon EN25F05, 64 KB: skipped.
Probing for Eon EN25F10, 128 KB: skipped.
Probing for Eon EN25F20, 256 KB: skipped.
Probing for Eon EN25F40, 512 KB: skipped.
Probing for Eon EN25F80, 1024 KB: skipped.
Probing for Eon EN25F16, 2048 KB: skipped.
Probing for Eon EN25F32, 4096 KB: skipped.
Probing for Eon EN29F010, 128 KB: skipped.
Probing for EON EN29F002(A)(N)B, 256 KB: skipped.
Probing for EON EN29F002(A)(N)T, 256 KB: skipped.
Probing for Fujitsu MBM29F004BC, 512 KB: skipped.
Probing for Fujitsu MBM29F004TC, 512 KB: skipped.
Probing for Fujitsu MBM29F400BC, 512 KB: skipped.
Probing for Fujitsu MBM29F400TC, 512 KB: skipped.
Probing for Intel 28F001BX-B, 128 KB: skipped.
Probing for Intel 28F001BX-T, 128 KB: skipped.
Probing for Intel 28F004S5, 512 KB: skipped.
Probing for Intel 28F004BV/BE-B, 512 KB: skipped.
Probing for Intel 28F004BV/BE-T, 512 KB: skipped.
Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped.
Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped.
Probing for Intel 82802AB, 512 KB: skipped.
Probing for Intel 82802AC, 1024 KB: skipped.
Probing for Macronix MX25L512, 64 KB: skipped.
Probing for Macronix MX25L1005, 128 KB: skipped.
Probing for Macronix MX25L2005, 256 KB: skipped.
Probing for Macronix MX25L4005, 512 KB: skipped.
Probing for Macronix MX25L8005, 1024 KB: skipped.
Probing for Macronix MX25L1605, 2048 KB: skipped.
Probing for Macronix MX25L1635D, 2048 KB: skipped.
Probing for Macronix MX25L3205, 4096 KB: skipped.
Probing for Macronix MX25L3235D, 4096 KB: skipped.
Probing for Macronix MX25L6405, 8192 KB: skipped.
Probing for Macronix MX25L12805, 16384 KB: skipped.
Probing for Macronix MX29F001B, 128 KB: skipped.
Probing for Macronix MX29F001T, 128 KB: skipped.
Probing for Macronix MX29F002B, 256 KB: skipped.
Probing for Macronix MX29F002T, 256 KB: skipped.
Probing for Macronix MX29LV040, 512 KB: skipped.
Probing for Numonyx M25PE10, 128 KB: skipped.
Probing for Numonyx M25PE20, 256 KB: skipped.
Probing for Numonyx M25PE40, 512 KB: skipped.
Probing for Numonyx M25PE80, 1024 KB: skipped.
Probing for Numonyx M25PE16, 2048 KB: skipped.
Probing for PMC Pm25LV010, 128 KB: skipped.
Probing for PMC Pm25LV016B, 2048 KB: skipped.
Probing for PMC Pm25LV020, 256 KB: skipped.
Probing for PMC Pm25LV040, 512 KB: skipped.
Probing for PMC Pm25LV080B, 1024 KB: skipped.
Probing for PMC Pm25LV512, 64 KB: skipped.
Probing for PMC Pm29F002T, 256 KB: skipped.
Probing for PMC Pm29F002B, 256 KB: skipped.
Probing for PMC Pm39LV010, 128 KB: skipped.
Probing for PMC Pm39LV020, 256 KB: skipped.
Probing for PMC Pm39LV040, 512 KB: skipped.
Probing for PMC Pm49FL002, 256 KB: skipped.
Probing for PMC Pm49FL004, 512 KB: skipped.
Probing for Sanyo LF25FW203A, 2048 KB: skipped.
Probing for Sharp LHF00L04, 1024 KB: skipped.
Probing for Spansion S25FL008A, 1024 KB: skipped.
Probing for Spansion S25FL016A, 2048 KB: skipped.
Probing for SST SST25VF016B, 2048 KB: skipped.
Probing for SST SST25VF032B, 4096 KB: skipped.
Probing for SST SST25VF040.REMS, 512 KB: skipped.
Probing for SST SST25VF040B, 512 KB: skipped.
Probing for SST SST25VF040B.REMS, 512 KB: skipped.
Probing for SST SST25VF080B, 1024 KB: skipped.
Probing for SST SST28SF040A, 512 KB: skipped.
Probing for SST SST29EE010, 128 KB: skipped.
Probing for SST SST29LE010, 128 KB: skipped.
Probing for SST SST29EE020A, 256 KB: skipped.
Probing for SST SST29LE020, 256 KB: skipped.
Probing for SST SST39SF512, 64 KB: skipped.
Probing for SST SST39SF010A, 128 KB: skipped.
Probing for SST SST39SF020A, 256 KB: skipped.
Probing for SST SST39SF040, 512 KB: skipped.
Probing for SST SST39VF512, 64 KB: skipped.
Probing for SST SST39VF010, 128 KB: skipped.
Probing for SST SST39VF020, 256 KB: skipped.
Probing for SST SST39VF040, 512 KB: skipped.
Probing for SST SST39VF080, 1024 KB: skipped.
Probing for SST SST49LF002A/B, 256 KB: skipped.
Probing for SST SST49LF003A/B, 384 KB: skipped.
Probing for SST SST49LF004A/B, 512 KB: skipped.
Probing for SST SST49LF004C, 512 KB: skipped.
Probing for SST SST49LF008A, 1024 KB: skipped.
Probing for SST SST49LF008C, 1024 KB: skipped.
Probing for SST SST49LF016C, 2048 KB: skipped.
Probing for SST SST49LF020, 256 KB: skipped.
Probing for SST SST49LF020A, 256 KB: skipped.
Probing for SST SST49LF040, 512 KB: skipped.
Probing for SST SST49LF040B, 512 KB: skipped.
Probing for SST SST49LF080A, 1024 KB: skipped.
Probing for SST SST49LF160C, 2048 KB: skipped.
Probing for ST M25P05-A, 64 KB: skipped.
Probing for ST M25P05.RES, 64 KB: skipped.
Probing for ST M25P10-A, 128 KB: skipped.
Probing for ST M25P10.RES, 128 KB: skipped.
Probing for ST M25P20, 256 KB: skipped.
Probing for ST M25P40, 512 KB: skipped.
Probing for ST M25P40-old, 512 KB: skipped.
Probing for ST M25P80, 1024 KB: skipped.
Probing for ST M25P16, 2048 KB: skipped.
Probing for ST M25P32, 4096 KB: skipped.
Probing for ST M25P64, 8192 KB: skipped.
Probing for ST M25P128, 16384 KB: skipped.
Probing for ST M29F002B, 256 KB: skipped.
Probing for ST M29F002T/NT, 256 KB: skipped.
Probing for ST M29F040B, 512 KB: skipped.
Probing for ST M29F400BT, 512 KB: skipped.
Probing for ST M29W010B, 128 KB: skipped.
Probing for ST M29W040B, 512 KB: skipped.
Probing for ST M29W512B, 64 KB: skipped.
Probing for ST M50FLW040A, 512 KB: skipped.
Probing for ST M50FLW040B, 512 KB: skipped.
Probing for ST M50FLW080A, 1024 KB: skipped.
Probing for ST M50FLW080B, 1024 KB: skipped.
Probing for ST M50FW002, 256 KB: skipped.
Probing for ST M50FW016, 2048 KB: skipped.
Probing for ST M50FW040, 512 KB: skipped.
Probing for ST M50FW080, 1024 KB: skipped.
Probing for ST M50LPW116, 2048 KB: skipped.
Probing for SyncMOS S29C31004T, 512 KB: skipped.
Probing for SyncMOS S29C51001T, 128 KB: skipped.
Probing for SyncMOS S29C51002T, 256 KB: skipped.
Probing for SyncMOS S29C51004T, 512 KB: skipped.
Probing for TI TMS29F002RB, 256 KB: skipped.
Probing for TI TMS29F002RT, 256 KB: skipped.
Probing for Winbond W25Q80, 1024 KB: skipped.
Probing for Winbond W25Q16, 2048 KB: skipped.
Probing for Winbond W25Q32, 4096 KB: skipped.
Probing for Winbond W25x10, 128 KB: skipped.
Probing for Winbond W25x20, 256 KB: skipped.
Probing for Winbond W25x40, 512 KB: skipped.
Probing for Winbond W25x80, 1024 KB: skipped.
Probing for Winbond W25x16, 2048 KB: skipped.
Probing for Winbond W25x32, 4096 KB: skipped.
Probing for Winbond W25x64, 8192 KB: skipped.
Probing for Winbond W29C011, 128 KB: skipped.
Probing for Winbond W29C020C, 256 KB: skipped.
Probing for Winbond W29C040P, 512 KB: skipped.
Probing for Winbond W29EE011, 128 KB: skipped.
Probing for Winbond W39V040A, 512 KB: skipped.
Probing for Winbond W39V040B, 512 KB: skipped.
Probing for Winbond W39V040C, 512 KB: skipped.
Probing for Winbond W39V040FA, 512 KB: skipped.
Probing for Winbond W39V080A, 1024 KB: skipped.
Probing for Winbond W49F002U, 256 KB: skipped.
Probing for Winbond W49V002A, 256 KB: skipped.
Probing for Winbond W49V002FA, 256 KB: skipped.
Probing for Winbond W39V080FA, 1024 KB: skipped.
Probing for Winbond W39V080FA (dual mode), 512 KB: skipped.
Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped.
Probing for EON unknown EON SPI chip, 0 KB: skipped.
Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped.
Probing for PMC unknown PMC SPI chip, 0 KB: skipped.
Probing for SST unknown SST SPI chip, 0 KB: skipped.
Probing for ST unknown ST SPI chip, 0 KB: skipped.
Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped.
Probing for Generic unknown SPI chip (RDID), 0 KB: skipped.
Probing for Generic unknown SPI chip (REMS), 0 KB: skipped.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
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From leewdaugherty at gmail.com  Mon Dec 12 00:32:51 2011
From: leewdaugherty at gmail.com (Lee Daugherty)
Date: Sun, 11 Dec 2011 17:32:51 -0600
Subject: [flashrom] NVIDIA_MCP79 (SVN Build)
Message-ID: <CABSyf6rn1PC5gaJ61TQR+6sx+Ygx2C7+ryHt2V_D9tHFqAKypA@mail.gmail.com>

ldaugherty at Nettop-Zotac:~/svn/flashrom$ sudo flashrom -V
flashrom v0.9.4-r1472 on Linux 3.0.0-0300rc2-generic (i686), built with
libpci 3.1.7, GCC 4.4.5, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 524M loops per
second, 10 myus = 11 us, 100 myus = 99 us, 1000 myus = 984 us, 10000 myus =
10246 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "To Be Filled By O.E.M."
DMI string system-product-name: "To Be Filled By O.E.M."
DMI string system-version: "To Be Filled By O.E.M."
DMI string baseboard-manufacturer: "ZOTAC"
DMI string baseboard-product-name: "ION"
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP79" with PCI ID 10de:0aad.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Flash bus type is SPI
SPI on this chipset is WIP. Please report any success or failure by mailing
us the verbose output to flashrom at flashrom.org, thanks!
Found SMBus device 10de:0aa2 at 00:03:2
MCP SPI BAR is at 0xfae80000
Mapping NVIDIA MCP6x SPI at 0xfae80000, unaligned size 0x544.
SPI control is 0xc052, req=0, gnt=0
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for
your
chipset. Thanks.
OK.
This programmer supports the following protocols: SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Chip status register is 00
Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address
0xfff00000.
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xef, id2 0x13
Found Winbond flash chip "W25X80" (1024 kB, SPI).
No operations were specified.
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From barry.krauter at gmail.com  Mon Dec 12 01:19:55 2011
From: barry.krauter at gmail.com (Barry Krauter)
Date: Sun, 11 Dec 2011 19:19:55 -0500
Subject: [flashrom] Update BIOS fail
Message-ID: <CAFwFM-FxXSmyE5twDOQX5CjhzgEiTpbj7C3SBHsKh_Sgs-tfyQ@mail.gmail.com>

Hi:

Attempting to replace currbios with 661VS155.BIN upgraded Bios for Shuttle
661V31 motherboard using 3com NIC card.

Can you tell me why this fails?

Thanks

Barry

barry at baerry-desktop:~$ sudo flashrom -p nic3com -r currbios 
flashrom v0.9.1-r946 
Found "3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX" (10b7:9055, BDF 06:02.0). 
Calibrating delay loop... OK. 
Found chip "SST SST39SF020A" (256 KB, Parallel) at physical address 0xfffc0000. 
=== 
This flash part has status UNTESTED for operations: ERASE 
Please email a report to flashrom at flashrom.org if any of the above operations 
work correctly for you with this flash part. Please include the flashrom 
output with the additional -V option for all operations you tested (-V, -rV, 
-wV, -EV), and mention which mainboard or programmer you tested. 
Thanks for your help! 
=== 
Reading flash... done. 
barry at baerry-desktop:~$ sudo flashrom -p nic3com -w /home/barry/661VS155.BIN 
flashrom v0.9.1-r946 
Found "3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX" (10b7:9055, BDF 06:02.0). 
Calibrating delay loop... OK. 
Found chip "SST SST39SF020A" (256 KB, Parallel) at physical address 0xfffc0000. 
=== 
This flash part has status UNTESTED for operations: ERASE 
Please email a report to flashrom at flashrom.org if any of the above operations 
work correctly for you with this flash part. Please include the flashrom 
output with the additional -V option for all operations you tested (-V, -rV, 
-wV, -EV), and mention which mainboard or programmer you tested. 
Thanks for your help! 
=== 
Flash image seems to be a legacy BIOS. Disabling checks. 
Writing flash chip... Erasing flash chip... SUCCESS. 
Programming page: address: 0x00020000 writing sector at 0x20000 failed! 
 writing sector at 0x20400 failed! 
 writing sector at 0x20800 failed! 
 writing sector at 0x20c00 failed! 
address: 0x00021000 writing sector at 0x21000 failed! 
 writing sector at 0x21400 failed! 
 writing sector at 0x21800 failed! 
 writing sector at 0x21c00 failed! 
address: 0x00022000 writing sector at 0x22000 failed! 
 writing sector at 0x22400 failed! 
 writing sector at 0x22800 failed! 
 writing sector at 0x22c00 failed! 
address: 0x00023000 writing sector at 0x23000 failed! 
 writing sector at 0x23400 failed! 
 writing sector at 0x23800 failed! 
 writing sector at 0x23c00 failed! 
address: 0x00024000 writing sector at 0x24000 failed! 
 writing sector at 0x24400 failed! 
 writing sector at 0x24800 failed! 
 writing sector at 0x24c00 failed! 
address: 0x00025000 writing sector at 0x25000 failed! 
 writing sector at 0x25400 failed! 
 writing sector at 0x25800 failed! 
 writing sector at 0x25c00 failed! 
address: 0x00026000 writing sector at 0x26000 failed! 
 writing sector at 0x26400 failed! 
 writing sector at 0x26800 failed! 
 writing sector at 0x26c00 failed! 
address: 0x00027000 writing sector at 0x27000 failed! 
 writing sector at 0x27400 failed! 
 writing sector at 0x27800 failed! 
 writing sector at 0x27c00 failed! 
address: 0x00028000 writing sector at 0x28000 failed! 
 writing sector at 0x28400 failed! 
 writing sector at 0x28800 failed! 
 writing sector at 0x28c00 failed! 
address: 0x00029000 writing sector at 0x29000 failed! 
 writing sector at 0x29400 failed! 
 writing sector at 0x29800 failed! 
 writing sector at 0x29c00 failed! 
address: 0x0002a000 writing sector at 0x2a000 failed! 
 writing sector at 0x2a400 failed! 
 writing sector at 0x2a800 failed! 
 writing sector at 0x2ac00 failed! 
address: 0x0002b000 writing sector at 0x2b000 failed! 
 writing sector at 0x2b400 failed! 
 writing sector at 0x2b800 failed! 
 writing sector at 0x2bc00 failed! 
address: 0x0002c000 writing sector at 0x2c000 failed! 
 writing sector at 0x2c400 failed! 
 writing sector at 0x2c800 failed! 
 writing sector at 0x2cc00 failed! 
address: 0x0002d000 writing sector at 0x2d000 failed! 
 writing sector at 0x2d400 failed! 
 writing sector at 0x2d800 failed! 
 writing sector at 0x2dc00 failed! 
address: 0x0002e000 writing sector at 0x2e000 failed! 
 writing sector at 0x2e400 failed! 
 writing sector at 0x2e800 failed! 
 writing sector at 0x2ec00 failed! 
address: 0x0003f000 
COMPLETE. 
Verifying flash... VERIFY FAILED at 0x00000001! Expected=0xce, Read=0xc6, failed byte count from 0x00000000-0x0003ffff: 0x25f27 
Your flash chip is in an unknown state. 
Get help on IRC at irc.freenode.net (channel #flashrom) or 
mail flashrom at flashrom.org! 
------------------------------------------------------------------------------- 
DO NOT REBOOT OR POWEROFF! 
barry at baerry-desktop:~$ sudo flashrom -p nic3com -w currbios 
flashrom v0.9.1-r946 
Found "3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX" (10b7:9055, BDF 06:02.0). 
Calibrating delay loop... OK. 
Found chip "SST SST39SF020A" (256 KB, Parallel) at physical address 0xfffc0000. 
=== 
This flash part has status UNTESTED for operations: ERASE 
Please email a report to flashrom at flashrom.org if any of the above operations 
work correctly for you with this flash part. Please include the flashrom 
output with the additional -V option for all operations you tested (-V, -rV, 
-wV, -EV), and mention which mainboard or programmer you tested. 
Thanks for your help! 
=== 
Flash image seems to be a legacy BIOS. Disabling checks. 
Writing flash chip... Erasing flash chip... SUCCESS. 
Programming page: address: 0x0003f000 
COMPLETE. 
Verifying flash... VERIFIED.          
barry at baerry-desktop:~$ 

A non-text attachment has been stripped: currbios
It is available for download at http://paste.flashrom.org/view.php?id=962
A non-text attachment has been stripped: 661VS155.BIN
It is available for download at http://paste.flashrom.org/view.php?id=963
An attachment has been inlined as plain text: Flashrom Attemped Update.odt




From c-d.hailfinger.devel.2006 at gmx.net  Mon Dec 12 02:54:32 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 12 Dec 2011 02:54:32 +0100
Subject: [flashrom] Update BIOS fail
In-Reply-To: <CAFwFM-FxXSmyE5twDOQX5CjhzgEiTpbj7C3SBHsKh_Sgs-tfyQ@mail.gmail.com>
References: <CAFwFM-FxXSmyE5twDOQX5CjhzgEiTpbj7C3SBHsKh_Sgs-tfyQ@mail.gmail.com>
Message-ID: <4EE55ED8.5000808@gmx.net>

Hi Barry,

it seems you're using a very old flashrom version. Could you please
retry with latest flashrom or at least version 0.9.4? That might fix the
issue you're seeing.

Am 12.12.2011 01:19 schrieb Barry Krauter:
> Attempting to replace currbios with 661VS155.BIN upgraded Bios for Shuttle
> 661V31 motherboard using 3com NIC card.
>
> Can you tell me why this fails?
>
> barry at baerry-desktop:~$ sudo flashrom -p nic3com -w /home/barry/661VS155.BIN
> flashrom v0.9.1-r946
> Found "3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX" (10b7:9055, BDF 06:02.0).
> Calibrating delay loop... OK.
> Found chip "SST SST39SF020A" (256 KB, Parallel) at physical address 0xfffc0000.

That flash chip is marked as supported in latest flashrom.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Tue Dec 13 00:19:50 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 13 Dec 2011 00:19:50 +0100
Subject: [flashrom] Supermicro H8QG6-F works
In-Reply-To: <4EE30706.2060405@fuckner.net>
References: <4EE30706.2060405@fuckner.net>
Message-ID: <201112122319.pBCNJoxI001868@mail2.student.tuwien.ac.at>

On Sat, 10 Dec 2011 08:15:18 +0100
Michael Fuckner <michael at fuckner.net> wrote:

> Good morning,
> 
> reading Bios from Quad Opteron H8QG6-F seems to work.
> 


Hello Michael,

thanks for your report! Reads should almost always work for supported
chipsets & chips. The interesting bit about specific
platforms/mainboards is if there is a write protection enabled. For SPI
chips this is usually done via the #WP pin. AFAICS the chip used does
report the state of #WP via its status register and it seems there is
no protection. Still, we won't list it as supported until a real
write test succeeded, sorry.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From barry.krauter at gmail.com  Mon Dec 12 05:32:19 2011
From: barry.krauter at gmail.com (Barry Krauter)
Date: Sun, 11 Dec 2011 23:32:19 -0500
Subject: [flashrom] Update BIOS fail
In-Reply-To: <4EE55ED8.5000808@gmx.net>
References: <CAFwFM-FxXSmyE5twDOQX5CjhzgEiTpbj7C3SBHsKh_Sgs-tfyQ@mail.gmail.com>
	<4EE55ED8.5000808@gmx.net>
Message-ID: <CAFwFM-G-pXX4b_1TmRNcFSaVnpZw5nb2EU9L4LC6F7ThXjbhAA@mail.gmail.com>

Hi Carl-Daniel

I got the 9.1 version from Ubuntu Synaptic.



I went to your website and downloaded flashrom-0.9.4.tar.bz2. I copied file
to /home/barry

in Terminal I did $ tar jxf /home/barry/flashrom-0.9.4.tar.bz2

This created /home/barry/flashrom-0.9.4 directory

I then did

cd /home/barry/flashrom-0.9.4

then

# ./configure
# make
# make install

These commands executed with no messages.

When i do command flashrom -R I still see version 9.1.

Any suggestions?

Thanks

Barry

On Sun, Dec 11, 2011 at 8:54 PM, Carl-Daniel Hailfinger <
c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Hi Barry,
>
> it seems you're using a very old flashrom version. Could you please
> retry with latest flashrom or at least version 0.9.4? That might fix the
> issue you're seeing.
>
> Am 12.12.2011 01:19 schrieb Barry Krauter:
> > Attempting to replace currbios with 661VS155.BIN upgraded Bios for
> Shuttle
> > 661V31 motherboard using 3com NIC card.
> >
> > Can you tell me why this fails?
> >
> > barry at baerry-desktop:~$ sudo flashrom -p nic3com -w
> /home/barry/661VS155.BIN
> > flashrom v0.9.1-r946
> > Found "3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"
> (10b7:9055, BDF 06:02.0).
> > Calibrating delay loop... OK.
> > Found chip "SST SST39SF020A" (256 KB, Parallel) at physical address
> 0xfffc0000.
>
> That flash chip is marked as supported in latest flashrom.
>
> Regards,
> Carl-Daniel
>
> --
> http://www.hailfinger.org/
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20111211/9ded966e/attachment.html>

From grazhang at riverbed.com  Tue Dec 13 00:40:59 2011
From: grazhang at riverbed.com (Grant Zhang)
Date: Mon, 12 Dec 2011 15:40:59 -0800
Subject: [flashrom] Update BIOS fail
In-Reply-To: <CAFwFM-G-pXX4b_1TmRNcFSaVnpZw5nb2EU9L4LC6F7ThXjbhAA@mail.gmail.com>
References: <CAFwFM-FxXSmyE5twDOQX5CjhzgEiTpbj7C3SBHsKh_Sgs-tfyQ@mail.gmail.com>	<4EE55ED8.5000808@gmx.net>
	<CAFwFM-G-pXX4b_1TmRNcFSaVnpZw5nb2EU9L4LC6F7ThXjbhAA@mail.gmail.com>
Message-ID: <4EE6910B.8090100@riverbed.com>

What does "/home/barry/flashrom-0.9.4/flashrom -R" show?

? 2011?12?11? 20:32, Barry Krauter ??:
> Hi Carl-Daniel
>
> I got the 9.1 version from Ubuntu Synaptic.
>
>
>
> I went to your website and downloaded flashrom-0.9.4.tar.bz2. I copied 
> file to /home/barry
>
> in Terminal I did |$ tar jxf /home/barry/flashrom-0.9.4.tar.bz2|
>
> This created /home/barry/flashrom-0.9.4 directory
>
> I then did
>
> cd /home/barry/flashrom-0.9.4
>
> then
>
> |# ./configure
> # make
> # make install|
>
> These commands executed with no messages.
>
> When i do command flashrom -R I still see version 9.1.
>
> Any suggestions?
>
> Thanks
>
> Barry
>
> On Sun, Dec 11, 2011 at 8:54 PM, Carl-Daniel Hailfinger 
> <c-d.hailfinger.devel.2006 at gmx.net 
> <mailto:c-d.hailfinger.devel.2006 at gmx.net>> wrote:
>
>     Hi Barry,
>
>     it seems you're using a very old flashrom version. Could you please
>     retry with latest flashrom or at least version 0.9.4? That might
>     fix the
>     issue you're seeing.
>
>     Am 12.12.2011 01:19 schrieb Barry Krauter:
>     > Attempting to replace currbios with 661VS155.BIN upgraded Bios
>     for Shuttle
>     > 661V31 motherboard using 3com NIC card.
>     >
>     > Can you tell me why this fails?
>     >
>     > barry at baerry-desktop:~$ sudo flashrom -p nic3com -w
>     /home/barry/661VS155.BIN
>     > flashrom v0.9.1-r946
>     > Found "3COM 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"
>     (10b7:9055, BDF 06:02.0).
>     > Calibrating delay loop... OK.
>     > Found chip "SST SST39SF020A" (256 KB, Parallel) at physical
>     address 0xfffc0000.
>
>     That flash chip is marked as supported in latest flashrom.
>
>     Regards,
>     Carl-Daniel
>
>     --
>     http://www.hailfinger.org/
>
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom




From sfalco at coincident.com  Tue Dec 13 02:51:56 2011
From: sfalco at coincident.com (Steven A. Falco)
Date: Mon, 12 Dec 2011 20:51:56 -0500
Subject: [flashrom] [PATCH] Speed up dediprog writes
Message-ID: <4EE6AFBC.4090401@coincident.com>

I have just tested the following patch:

http://patchwork.coreboot.org/patch/3469/

which I applied to flashrom r1472.

It is fantastic!

I can now program and verify a M25P16 in just 15 seconds.  Every
bit as fast as the Windows app.

One comment about the patch.  The first change (to lines 30,6)
should be removed, because it adds a duplicate copy of the
statement "static int dediprog_firmwareversion;"  Other than
that, the patch looks fine to me.

Here is the bit that should be removed from the patch:

@@ -30,6 +30,7 @@
 static usb_dev_handle *dediprog_handle;
 static int dediprog_firmwareversion;
 static int dediprog_endpoint;
+static int dediprog_firmwareversion;
 
 #if 0
 /* Might be useful for other pieces of code as well. */

Therefore:

Acked-by: Steven A. Falco <sfalco at coincident.com>


From flashrom at mkarcher.dialup.fu-berlin.de  Wed Dec 14 19:07:28 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Wed, 14 Dec 2011 19:07:28 +0100
Subject: [flashrom] [RFC] Add struct flashchip * everywhere
In-Reply-To: <4EE16214.1030407@gmx.net>
References: <4EB0BEB2.1040701@gmx.net>
	<201111021241.pA2CfGHH021689@mail2.student.tuwien.ac.at>
	<4EB31089.7000902@gmx.net> <4EB9C67A.50502@gmx.net>
	<4EE16214.1030407@gmx.net>
Message-ID: <1323886048.4676.6.camel@localhost>

Am Freitag, den 09.12.2011, 02:19 +0100 schrieb Carl-Daniel Hailfinger:
> New version, updated to apply against svn HEAD.
> Please note that this one still duplicates the struct flashchip members
> manually in struct flashctx. An alternative version will be posted as
> followup.
Thanks for your tedious work on that!

> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

> +	/* Check that virtual_memory in struct flashctx is placed directly
> +	 * after the members copied from struct flashchip.
> +	 */
> +	if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) {
> +		msg_gerr("struct flashctx broken!\n");
> +		ret = 1;
> +	}

There is no "offsetof" in C90, its a common C99 extension. Do we care?

Regards,
  Michael Karcher



From marcosfrm at gmail.com  Wed Dec 14 19:30:51 2011
From: marcosfrm at gmail.com (Marcos Felipe Rasia de Mello)
Date: Wed, 14 Dec 2011 16:30:51 -0200
Subject: [flashrom] ECS K7SEM (V1.0) - OK
Message-ID: <CAJZVDJDnYvv2fGYd_0xC8PQhCFUHdkc=8osw-SJXk8RvvbouLA@mail.gmail.com>

ECS K7SEM (V1.0) success report.

Board link: http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?CategoryID=1&DetailID=229&DetailName=Feature&MenuID=24&LanID=0

BIOS: http://download.ecsusa.com/dlfileecs/bios/mb/k7/k7sem/k7sem_12b.exe
(K7SEM Ver:1.2b 01/27/2003)

Marcos
-------------- next part --------------
flashrom v0.9.4-r1471 on Linux 3.1.4-zero (i686), built with libpci 3.1.7, GCC 4.4.5, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 2 usecs, 301M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1001 us, 10000 myus = 10026 us, 8 myus = 8 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: " "
DMI string system-product-name: " "
DMI string system-version: " "
DMI string baseboard-manufacturer: " "
DMI string baseboard-product-name: "SiS-730"
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8705 on port 0x2e
Found chipset "SiS 730" with PCI ID 1039:0730. 
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... Found southbridge 1039:0018 at 00:01:0
OK.
Enabling IT8705F flash ROM interface write.
Maximum IT8705F parallel flash decode size is 524288.
This programmer supports the following protocols: Parallel.
Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29F016D, 2048 kB: Chip size 2048 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29F080B, 1024 kB: Chip size 1024 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29LV008BB, 1024 kB: Chip size 1024 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV008BT, 1024 kB: Chip size 1024 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMD Am29LV081B, 1024 kB: Chip size 1024 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Found AMIC flash chip "A29002T" (256 kB, Parallel) at physical address 0xfffc0000.
Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x37, id2 0x8c
Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x37, id2 0x8c
Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: Chip size 1024 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SST SST39VF080, 1024 kB: Chip size 1024 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.
Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x37, id2 0x8c
Found AMIC flash chip "A29002T" (256 kB, Parallel).
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x00ffff:W, 0x010000-0x01ffff:W, 0x020000-0x02ffff:W, 0x030000-0x037fff:W, 0x038000-0x039fff:W, 0x03a000-0x03bfff:S, 0x03c000-0x03ffff:W
Erase/write done.
Verifying flash... VERIFIED.          
Restoring PCI config space for 00:01:0 reg 0x45
Restoring PCI config space for 00:01:0 reg 0x40

From svn at flashrom.org  Wed Dec 14 23:25:16 2011
From: svn at flashrom.org (repository service)
Date: Wed, 14 Dec 2011 23:25:16 +0100
Subject: [flashrom] [commit] r1473 - trunk
Message-ID: <E1RaxGG-0004wv-8m@ra.coresystems.de>

Author: hailfinger
Date: Wed Dec 14 23:25:15 2011
New Revision: 1473
URL: http://flashrom.org/trac/flashrom/changeset/1473

Log:
Use struct flashctx instead of struct flashchip for flash chip access

struct flashchip is used only for the flashchips array and for
operations which do not access hardware, e.g. printing a list of
supported flash chips.

struct flashctx (flash context) contains all data available in
struct flashchip, but it also contains runtime information like
mapping addresses. struct flashctx is expected to grow additional
members over time, a prime candidate being programmer info.
struct flashctx contains all of struct flashchip with identical
member layout, but struct flashctx has additional members at the end.

The separation between struct flashchip/flashctx shrinks the memory
requirement of the big flashchips array and allows future extension
of flashctx without having to worry about bloat.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

Modified:
   trunk/82802ab.c
   trunk/a25.c
   trunk/at25.c
   trunk/chipdrivers.h
   trunk/cli_classic.c
   trunk/dediprog.c
   trunk/dummyflasher.c
   trunk/flash.h
   trunk/flashrom.c
   trunk/ichspi.c
   trunk/it87spi.c
   trunk/jedec.c
   trunk/layout.c
   trunk/linux_spi.c
   trunk/m29f400bt.c
   trunk/opaque.c
   trunk/pm49fl00x.c
   trunk/programmer.h
   trunk/serprog.c
   trunk/sharplhf00l04.c
   trunk/spi.c
   trunk/spi25.c
   trunk/sst28sf040.c
   trunk/sst49lfxxxc.c
   trunk/sst_fwhub.c
   trunk/stm50flw0x0x.c
   trunk/w29ee011.c
   trunk/w39.c
   trunk/wbsio_spi.c

Modified: trunk/82802ab.c
==============================================================================
--- trunk/82802ab.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/82802ab.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -40,7 +40,7 @@
 	msg_cdbg("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
 }
 
-int probe_82802ab(struct flashchip *flash)
+int probe_82802ab(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2, flashcontent1, flashcontent2;
@@ -89,7 +89,7 @@
 	return 1;
 }
 
-uint8_t wait_82802ab(struct flashchip *flash)
+uint8_t wait_82802ab(struct flashctx *flash)
 {
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;
@@ -107,7 +107,7 @@
 	return status;
 }
 
-int unlock_82802ab(struct flashchip *flash)
+int unlock_82802ab(struct flashctx *flash)
 {
 	int i;
 	//chipaddr wrprotect = flash->virtual_registers + page + 2;
@@ -118,7 +118,7 @@
 	return 0;
 }
 
-int erase_block_82802ab(struct flashchip *flash, unsigned int page,
+int erase_block_82802ab(struct flashctx *flash, unsigned int page,
 			unsigned int pagesize)
 {
 	chipaddr bios = flash->virtual_memory;
@@ -141,7 +141,7 @@
 }
 
 /* chunksize is 1 */
-int write_82802ab(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i;
 	chipaddr dst = flash->virtual_memory + start;
@@ -157,7 +157,7 @@
 	return 0;
 }
 
-int unlock_28f004s5(struct flashchip *flash)
+int unlock_28f004s5(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t mcfg, bcfg, need_unlock = 0, can_unlock = 0;
@@ -209,7 +209,7 @@
 	return 0;
 }
 
-int unlock_lh28f008bjt(struct flashchip *flash)
+int unlock_lh28f008bjt(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t mcfg, bcfg;

Modified: trunk/a25.c
==============================================================================
--- trunk/a25.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/a25.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -29,7 +29,7 @@
 		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
 }
 
-int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -45,7 +45,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -60,7 +60,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -78,7 +78,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash)
+int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash)
 {
 	uint8_t status;
 

Modified: trunk/at25.c
==============================================================================
--- trunk/at25.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/at25.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -57,7 +57,7 @@
 	}
 }
 
-int spi_prettyprint_status_register_at25df(struct flashchip *flash)
+int spi_prettyprint_status_register_at25df(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -72,7 +72,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash)
+int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash)
 {
 	/* FIXME: We should check the security lockdown. */
 	msg_cdbg("Ignoring security lockdown (if present)\n");
@@ -80,7 +80,7 @@
 	return spi_prettyprint_status_register_at25df(flash);
 }
 
-int spi_prettyprint_status_register_at25f(struct flashchip *flash)
+int spi_prettyprint_status_register_at25f(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -99,7 +99,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_at25fs010(struct flashchip *flash)
+int spi_prettyprint_status_register_at25fs010(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -123,7 +123,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_at25fs040(struct flashchip *flash)
+int spi_prettyprint_status_register_at25fs040(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -147,7 +147,7 @@
 	return 0;
 }
 
-int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash)
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -163,7 +163,7 @@
 	return 0;
 }
 
-int spi_disable_blockprotect_at25df(struct flashchip *flash)
+int spi_disable_blockprotect_at25df(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;
@@ -203,14 +203,14 @@
 	return 0;
 }
 
-int spi_disable_blockprotect_at25df_sec(struct flashchip *flash)
+int spi_disable_blockprotect_at25df_sec(struct flashctx *flash)
 {
 	/* FIXME: We should check the security lockdown. */
 	msg_cinfo("Ignoring security lockdown (if present)\n");
 	return spi_disable_blockprotect_at25df(flash);
 }
 
-int spi_disable_blockprotect_at25f(struct flashchip *flash)
+int spi_disable_blockprotect_at25f(struct flashctx *flash)
 {
 	/* spi_disable_blockprotect_at25df is not really the right way to do
 	 * this, but the side effects of said function work here as well.
@@ -218,7 +218,7 @@
 	return spi_disable_blockprotect_at25df(flash);
 }
 
-int spi_disable_blockprotect_at25fs010(struct flashchip *flash)
+int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;
@@ -252,7 +252,7 @@
 	return 0;
 }
 
-int spi_disable_blockprotect_at25fs040(struct flashchip *flash)
+int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;

Modified: trunk/chipdrivers.h
==============================================================================
--- trunk/chipdrivers.h	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/chipdrivers.h	Wed Dec 14 23:25:15 2011	(r1473)
@@ -19,79 +19,79 @@
  *
  * Header file for flash chip drivers. Included from flash.h.
  * As a general rule, every function listed here should take a pointer to
- * struct flashchip as first parameter.
+ * struct flashctx as first parameter.
  */
 
 #ifndef __CHIPDRIVERS_H__
 #define __CHIPDRIVERS_H__ 1
 
-#include "flash.h"	/* for chipaddr and flashchip */
+#include "flash.h"	/* for chipaddr and flashctx */
 
 /* spi.c, should probably be in spi_chip.c */
-int probe_spi_rdid(struct flashchip *flash);
-int probe_spi_rdid4(struct flashchip *flash);
-int probe_spi_rems(struct flashchip *flash);
-int probe_spi_res1(struct flashchip *flash);
-int probe_spi_res2(struct flashchip *flash);
+int probe_spi_rdid(struct flashctx *flash);
+int probe_spi_rdid4(struct flashctx *flash);
+int probe_spi_rems(struct flashctx *flash);
+int probe_spi_res1(struct flashctx *flash);
+int probe_spi_res2(struct flashctx *flash);
 int spi_write_enable(void);
 int spi_write_disable(void);
-int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int spi_chip_read(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len);
+int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
 uint8_t spi_read_status_register(void);
-int spi_write_status_register(struct flashchip *flash, int status);
+int spi_write_status_register(struct flashctx *flash, int status);
 void spi_prettyprint_status_register_bit(uint8_t status, int bit);
 void spi_prettyprint_status_register_bp3210(uint8_t status, int bp);
 void spi_prettyprint_status_register_welwip(uint8_t status);
-int spi_prettyprint_status_register(struct flashchip *flash);
-int spi_disable_blockprotect(struct flashchip *flash);
+int spi_prettyprint_status_register(struct flashctx *flash);
+int spi_disable_blockprotect(struct flashctx *flash);
 int spi_byte_program(unsigned int addr, uint8_t databyte);
 int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len);
 int spi_nbyte_read(unsigned int addr, uint8_t *bytes, unsigned int len);
-int spi_read_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
-int spi_write_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
-int spi_aai_write(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
+int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
+int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 
 /* opaque.c */
-int probe_opaque(struct flashchip *flash);
-int read_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int write_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int erase_opaque(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
+int probe_opaque(struct flashctx *flash);
+int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
 
 /* a25.c */
-int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash);
-int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash);
-int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash);
-int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash);
+int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash);
+int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash);
+int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash);
 
 /* at25.c */
-int spi_prettyprint_status_register_at25df(struct flashchip *flash);
-int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash);
-int spi_prettyprint_status_register_at25f(struct flashchip *flash);
-int spi_prettyprint_status_register_at25fs010(struct flashchip *flash);
-int spi_prettyprint_status_register_at25fs040(struct flashchip *flash);
-int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash);
-int spi_disable_blockprotect_at25df(struct flashchip *flash);
-int spi_disable_blockprotect_at25df_sec(struct flashchip *flash);
-int spi_disable_blockprotect_at25f(struct flashchip *flash);
-int spi_disable_blockprotect_at25fs010(struct flashchip *flash);
-int spi_disable_blockprotect_at25fs040(struct flashchip *flash);
+int spi_prettyprint_status_register_at25df(struct flashctx *flash);
+int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash);
+int spi_prettyprint_status_register_at25f(struct flashctx *flash);
+int spi_prettyprint_status_register_at25fs010(struct flashctx *flash);
+int spi_prettyprint_status_register_at25fs040(struct flashctx *flash);
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash);
+int spi_disable_blockprotect_at25df(struct flashctx *flash);
+int spi_disable_blockprotect_at25df_sec(struct flashctx *flash);
+int spi_disable_blockprotect_at25f(struct flashctx *flash);
+int spi_disable_blockprotect_at25fs010(struct flashctx *flash);
+int spi_disable_blockprotect_at25fs040(struct flashctx *flash);
 
 /* 82802ab.c */
-uint8_t wait_82802ab(struct flashchip *flash);
-int probe_82802ab(struct flashchip *flash);
-int erase_block_82802ab(struct flashchip *flash, unsigned int page, unsigned int pagesize);
-int write_82802ab(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+uint8_t wait_82802ab(struct flashctx *flash);
+int probe_82802ab(struct flashctx *flash);
+int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize);
+int write_82802ab(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void print_status_82802ab(uint8_t status);
-int unlock_82802ab(struct flashchip *flash);
-int unlock_28f004s5(struct flashchip *flash);
-int unlock_lh28f008bjt(struct flashchip *flash);
+int unlock_82802ab(struct flashctx *flash);
+int unlock_28f004s5(struct flashctx *flash);
+int unlock_lh28f008bjt(struct flashctx *flash);
 
 /* jedec.c */
 uint8_t oddparity(uint8_t val);
@@ -99,58 +99,58 @@
 void data_polling_jedec(chipaddr dst, uint8_t data);
 int write_byte_program_jedec(chipaddr bios, uint8_t *src,
 			     chipaddr dst);
-int probe_jedec(struct flashchip *flash);
-int write_jedec(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int write_jedec_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize);
-int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize);
-int erase_chip_block_jedec(struct flashchip *flash, unsigned int page, unsigned int blocksize);
+int probe_jedec(struct flashctx *flash);
+int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int write_jedec_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int pagesize);
+int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize);
+int erase_chip_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize);
 
 /* m29f400bt.c */
-int probe_m29f400bt(struct flashchip *flash);
-int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len);
-int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len);
-int write_m29f400bt(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int probe_m29f400bt(struct flashctx *flash);
+int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
+int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
+int write_m29f400bt(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void protect_m29f400bt(chipaddr bios);
 
 /* pm49fl00x.c */
-int unlock_49fl00x(struct flashchip *flash);
-int lock_49fl00x(struct flashchip *flash);
+int unlock_49fl00x(struct flashctx *flash);
+int lock_49fl00x(struct flashctx *flash);
 
 /* sst28sf040.c */
-int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen);
-int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size);
-int write_28sf040(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int unprotect_28sf040(struct flashchip *flash);
-int protect_28sf040(struct flashchip *flash);
+int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size);
+int write_28sf040(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int unprotect_28sf040(struct flashctx *flash);
+int protect_28sf040(struct flashctx *flash);
 
 /* sst49lfxxxc.c */
-int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size);
-int unlock_49lfxxxc(struct flashchip *flash);
+int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size);
+int unlock_49lfxxxc(struct flashctx *flash);
 
 /* sst_fwhub.c */
-int printlock_sst_fwhub(struct flashchip *flash);
-int unlock_sst_fwhub(struct flashchip *flash);
+int printlock_sst_fwhub(struct flashctx *flash);
+int unlock_sst_fwhub(struct flashctx *flash);
 
 /* w39.c */
-int printlock_w39l040(struct flashchip * flash);
-int printlock_w39v040a(struct flashchip *flash);
-int printlock_w39v040b(struct flashchip *flash);
-int printlock_w39v040c(struct flashchip *flash);
-int printlock_w39v040fa(struct flashchip *flash);
-int printlock_w39v040fb(struct flashchip *flash);
-int printlock_w39v040fc(struct flashchip *flash);
-int printlock_w39v080a(struct flashchip *flash);
-int printlock_w39v080fa(struct flashchip *flash);
-int printlock_w39v080fa_dual(struct flashchip *flash);
-int unlock_w39v040fb(struct flashchip *flash);
-int unlock_w39v080fa(struct flashchip *flash);
+int printlock_w39l040(struct flashctx * flash);
+int printlock_w39v040a(struct flashctx *flash);
+int printlock_w39v040b(struct flashctx *flash);
+int printlock_w39v040c(struct flashctx *flash);
+int printlock_w39v040fa(struct flashctx *flash);
+int printlock_w39v040fb(struct flashctx *flash);
+int printlock_w39v040fc(struct flashctx *flash);
+int printlock_w39v080a(struct flashctx *flash);
+int printlock_w39v080fa(struct flashctx *flash);
+int printlock_w39v080fa_dual(struct flashctx *flash);
+int unlock_w39v040fb(struct flashctx *flash);
+int unlock_w39v080fa(struct flashctx *flash);
 
 /* w29ee011.c */
-int probe_w29ee011(struct flashchip *flash);
+int probe_w29ee011(struct flashctx *flash);
 
 /* stm50flw0x0x.c */
-int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int block, unsigned int blocksize);
-int unlock_stm50flw0x0x(struct flashchip *flash);
+int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int block, unsigned int blocksize);
+int unlock_stm50flw0x0x(struct flashctx *flash);
 
 #endif /* !__CHIPDRIVERS_H__ */

Modified: trunk/cli_classic.c
==============================================================================
--- trunk/cli_classic.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/cli_classic.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -169,8 +169,8 @@
 	unsigned long size;
 	/* Probe for up to three flash chips. */
 	const struct flashchip *flash;
-	struct flashchip flashes[3];
-	struct flashchip *fill_flash;
+	struct flashctx flashes[3];
+	struct flashctx *fill_flash;
 	const char *name;
 	int namelen, opt, i;
 	int startchip = 0, chipcount = 0, option_index = 0, force = 0;
@@ -409,6 +409,7 @@
 	}
 #endif
 
+	/* Does a chip with the requested name exist in the flashchips array? */
 	if (chip_to_probe) {
 		for (flash = flashchips; flash && flash->name; flash++)
 			if (!strcmp(flash->name, chip_to_probe))

Modified: trunk/dediprog.c
==============================================================================
--- trunk/dediprog.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/dediprog.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -205,7 +205,7 @@
  * @len		length
  * @return	0 on success, 1 on failure
  */
-static int dediprog_spi_bulk_read(struct flashchip *flash, uint8_t *buf,
+static int dediprog_spi_bulk_read(struct flashctx *flash, uint8_t *buf,
 				  unsigned int start, unsigned int len)
 {
 	int ret;
@@ -253,7 +253,7 @@
 	return 0;
 }
 
-static int dediprog_spi_read(struct flashchip *flash, uint8_t *buf,
+static int dediprog_spi_read(struct flashctx *flash, uint8_t *buf,
 			     unsigned int start, unsigned int len)
 {
 	int ret;
@@ -299,7 +299,7 @@
 	return 0;
 }
 
-static int dediprog_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int dediprog_spi_write_256(struct flashctx *flash, uint8_t *buf,
 				  unsigned int start, unsigned int len)
 {
 	int ret;

Modified: trunk/dummyflasher.c
==============================================================================
--- trunk/dummyflasher.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/dummyflasher.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -62,7 +62,7 @@
 
 static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr);
-static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_dummyflasher = {
@@ -548,7 +548,7 @@
 	return 0;
 }
 
-static int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len)
 {
 	return spi_write_chunked(flash, buf, start, len,

Modified: trunk/flash.h
==============================================================================
--- trunk/flash.h	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/flash.h	Wed Dec 14 23:25:15 2011	(r1473)
@@ -93,6 +93,8 @@
 #define FEATURE_WRSR_WREN	(1 << 7)
 #define FEATURE_WRSR_EITHER	(FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
 
+struct flashctx;
+
 struct flashchip {
 	const char *vendor;
 	const char *name;
@@ -119,7 +121,7 @@
 	 */
 	uint32_t tested;
 
-	int (*probe) (struct flashchip *flash);
+	int (*probe) (struct flashctx *flash);
 
 	/* Delay after "enter/exit ID mode" commands in microseconds.
 	 * NB: negative values have special meanings, see TIMING_* below.
@@ -140,20 +142,42 @@
 		} eraseblocks[NUM_ERASEREGIONS];
 		/* a block_erase function should try to erase one block of size
 		 * 'blocklen' at address 'blockaddr' and return 0 on success. */
-		int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
+		int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
 	} block_erasers[NUM_ERASEFUNCTIONS];
 
-	int (*printlock) (struct flashchip *flash);
-	int (*unlock) (struct flashchip *flash);
-	int (*write) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*read) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	struct {
+	int (*printlock) (struct flashctx *flash);
+	int (*unlock) (struct flashctx *flash);
+	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	struct voltage {
 		uint16_t min;
 		uint16_t max;
 	} voltage;
+};
 
-	/* Some flash devices have an additional register space. */
+/* struct flashctx must always contain struct flashchip at the beginning. */
+struct flashctx {
+	const char *vendor;
+	const char *name;
+	enum chipbustype bustype;
+	uint32_t manufacture_id;
+	uint32_t model_id;
+	int total_size;
+	int page_size;
+	int feature_bits;
+	uint32_t tested;
+	int (*probe) (struct flashctx *flash);
+	int probe_timing;
+	struct block_eraser block_erasers[NUM_ERASEFUNCTIONS];
+	int (*printlock) (struct flashctx *flash);
+	int (*unlock) (struct flashctx *flash);
+	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	struct voltage voltage;
+	/* struct flashchip ends here. */
+	
 	chipaddr virtual_memory;
+	/* Some flash devices have an additional register space. */
 	chipaddr virtual_registers;
 };
 
@@ -203,23 +227,23 @@
 extern int verbose;
 extern const char flashrom_version[];
 extern char *chip_to_probe;
-void map_flash_registers(struct flashchip *flash);
-int read_memmapped(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int erase_flash(struct flashchip *flash);
-int probe_flash(int startchip, struct flashchip *fill_flash, int force);
-int read_flash_to_file(struct flashchip *flash, const char *filename);
+void map_flash_registers(struct flashctx *flash);
+int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int erase_flash(struct flashctx *flash);
+int probe_flash(int startchip, struct flashctx *fill_flash, int force);
+int read_flash_to_file(struct flashctx *flash, const char *filename);
 int min(int a, int b);
 int max(int a, int b);
 void tolower_string(char *str);
 char *extract_param(char **haystack, const char *needle, const char *delim);
-int verify_range(struct flashchip *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message);
+int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message);
 int need_erase(uint8_t *have, uint8_t *want, unsigned int len, enum write_granularity gran);
 char *strcat_realloc(char *dest, const char *src);
 void print_version(void);
 void print_banner(void);
 void list_programmers_linebreak(int startcol, int cols, int paren);
 int selfcheck(void);
-int doit(struct flashchip *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it);
+int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it);
 int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
 int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
 
@@ -259,7 +283,7 @@
 /* layout.c */
 int read_romlayout(char *name);
 int find_romentry(char *name);
-int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents);
+int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */
 struct spi_command {

Modified: trunk/flashrom.c
==============================================================================
--- trunk/flashrom.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/flashrom.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -268,7 +268,7 @@
  */
 static int may_register_shutdown = 0;
 
-static int check_block_eraser(const struct flashchip *flash, int k, int log);
+static int check_block_eraser(const struct flashctx *flash, int k, int log);
 
 /* Register a function to be executed on programmer shutdown.
  * The advantage over atexit() is that you can supply a void pointer which will
@@ -404,7 +404,7 @@
 	programmer_table[programmer].delay(usecs);
 }
 
-void map_flash_registers(struct flashchip *flash)
+void map_flash_registers(struct flashctx *flash)
 {
 	size_t size = flash->total_size * 1024;
 	/* Flash registers live 4 MByte below the flash. */
@@ -412,7 +412,7 @@
 	flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size);
 }
 
-int read_memmapped(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
 {
 	chip_readn(buf, flash->virtual_memory + start, len);
 
@@ -523,7 +523,7 @@
 }
 
 /* Returns the number of well-defined erasers for a chip. */
-static unsigned int count_usable_erasers(const struct flashchip *flash)
+static unsigned int count_usable_erasers(const struct flashctx *flash)
 {
 	unsigned int usable_erasefunctions = 0;
 	int k;
@@ -535,7 +535,7 @@
 }
 
 /* start is an offset to the base address of the flash chip */
-int check_erased_range(struct flashchip *flash, unsigned int start, unsigned int len)
+int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
 {
 	int ret;
 	uint8_t *cmpbuf = malloc(len);
@@ -558,7 +558,7 @@
  * @message	string to print in the "FAILED" message
  * @return	0 for success, -1 for failure
  */
-int verify_range(struct flashchip *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len,
+int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len,
 		 const char *message)
 {
 	unsigned int i;
@@ -938,7 +938,7 @@
 	return 1;
 }
 
-int probe_flash(int startchip, struct flashchip *fill_flash, int force)
+int probe_flash(int startchip, struct flashctx *fill_flash, int force)
 {
 	const struct flashchip *flash;
 	unsigned long base = 0;
@@ -976,7 +976,7 @@
 		check_max_decode(buses_common, size);
 
 		/* Start filling in the dynamic data. */
-		*fill_flash = *flash;
+		memcpy(fill_flash, flash, sizeof(struct flashchip));
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
 		fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);
@@ -1029,7 +1029,7 @@
 	return flash - flashchips;
 }
 
-int verify_flash(struct flashchip *flash, uint8_t *buf)
+int verify_flash(struct flashctx *flash, uint8_t *buf)
 {
 	int ret;
 	unsigned int total_size = flash->total_size * 1024;
@@ -1103,7 +1103,7 @@
 	return 0;
 }
 
-int read_flash_to_file(struct flashchip *flash, const char *filename)
+int read_flash_to_file(struct flashctx *flash, const char *filename)
 {
 	unsigned long size = flash->total_size * 1024;
 	unsigned char *buf = calloc(size, sizeof(char));
@@ -1202,11 +1202,11 @@
 	return ret;
 }
 
-static int erase_and_write_block_helper(struct flashchip *flash,
+static int erase_and_write_block_helper(struct flashctx *flash,
 					unsigned int start, unsigned int len,
 					uint8_t *curcontents,
 					uint8_t *newcontents,
-					int (*erasefn) (struct flashchip *flash,
+					int (*erasefn) (struct flashctx *flash,
 							unsigned int addr,
 							unsigned int len))
 {
@@ -1253,14 +1253,14 @@
 	return ret;
 }
 
-static int walk_eraseregions(struct flashchip *flash, int erasefunction,
-			     int (*do_something) (struct flashchip *flash,
+static int walk_eraseregions(struct flashctx *flash, int erasefunction,
+			     int (*do_something) (struct flashctx *flash,
 						  unsigned int addr,
 						  unsigned int len,
 						  uint8_t *param1,
 						  uint8_t *param2,
 						  int (*erasefn) (
-							struct flashchip *flash,
+							struct flashctx *flash,
 							unsigned int addr,
 							unsigned int len)),
 			     void *param1, void *param2)
@@ -1292,7 +1292,7 @@
 	return 0;
 }
 
-static int check_block_eraser(const struct flashchip *flash, int k, int log)
+static int check_block_eraser(const struct flashctx *flash, int k, int log)
 {
 	struct block_eraser eraser = flash->block_erasers[k];
 
@@ -1316,7 +1316,7 @@
 	return 0;
 }
 
-int erase_and_write_flash(struct flashchip *flash, uint8_t *oldcontents,
+int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
 			  uint8_t *newcontents)
 {
 	int k, ret = 1;
@@ -1534,6 +1534,13 @@
 		msg_gerr("Flashchips table miscompilation!\n");
 		ret = 1;
 	}
+	/* Check that virtual_memory in struct flashctx is placed directly
+	 * after the members copied from struct flashchip.
+	 */
+	if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) {
+		msg_gerr("struct flashctx broken!\n");
+		ret = 1;
+	}
 	for (flash = flashchips; flash && flash->name; flash++)
 		if (selfcheck_eraseblocks(flash))
 			ret = 1;
@@ -1559,7 +1566,7 @@
 	return ret;
 }
 
-void check_chip_supported(const struct flashchip *flash)
+void check_chip_supported(const struct flashctx *flash)
 {
 	if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) {
 		msg_cinfo("===\n");
@@ -1611,7 +1618,7 @@
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(struct flashchip *flash, int force, int read_it, int write_it, int erase_it, int verify_it)
+int chip_safety_check(struct flashctx *flash, int force, int read_it, int write_it, int erase_it, int verify_it)
 {
 	if (!programmer_may_write && (write_it || erase_it)) {
 		msg_perr("Write/erase is not working yet on your programmer in "
@@ -1672,7 +1679,7 @@
  * but right now it allows us to split off the CLI code.
  * Besides that, the function itself is a textbook example of abysmal code flow.
  */
-int doit(struct flashchip *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it)
+int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it)
 {
 	uint8_t *oldcontents;
 	uint8_t *newcontents;

Modified: trunk/ichspi.c
==============================================================================
--- trunk/ichspi.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/ichspi.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -1175,7 +1175,7 @@
 	return 0;
 }
 
-int ich_hwseq_probe(struct flashchip *flash)
+int ich_hwseq_probe(struct flashctx *flash)
 {
 	uint32_t total_size, boundary;
 	uint32_t erase_size_low, size_low, erase_size_high, size_high;
@@ -1228,7 +1228,7 @@
 	return 1;
 }
 
-int ich_hwseq_block_erase(struct flashchip *flash,
+int ich_hwseq_block_erase(struct flashctx *flash,
 			  unsigned int addr,
 			  unsigned int len)
 {
@@ -1278,7 +1278,7 @@
 	return 0;
 }
 
-int ich_hwseq_read(struct flashchip *flash, uint8_t *buf, unsigned int addr,
+int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, unsigned int addr,
 		   unsigned int len)
 {
 	uint16_t hsfc;
@@ -1316,7 +1316,7 @@
 	return 0;
 }
 
-int ich_hwseq_write(struct flashchip *flash, uint8_t *buf, unsigned int addr,
+int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, unsigned int addr,
 		    unsigned int len)
 {
 	uint16_t hsfc;

Modified: trunk/it87spi.c
==============================================================================
--- trunk/it87spi.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/it87spi.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -105,9 +105,9 @@
 
 static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			const unsigned char *writearr, unsigned char *readarr);
-static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 				 unsigned int start, unsigned int len);
-static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
 				      unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_it87xx = {
@@ -312,7 +312,7 @@
 }
 
 /* Page size is usually 256 bytes */
-static int it8716f_spi_page_program(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_page_program(struct flashctx *flash, uint8_t *buf,
 				    unsigned int start)
 {
 	unsigned int i;
@@ -340,7 +340,7 @@
  * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
  * Need to read this big flash using firmware cycles 3 byte at a time.
  */
-static int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 				 unsigned int start, unsigned int len)
 {
 	fast_spi = 0;
@@ -358,7 +358,7 @@
 	return 0;
 }
 
-static int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf,
+static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
 				      unsigned int start, unsigned int len)
 {
 	/*

Modified: trunk/jedec.c
==============================================================================
--- trunk/jedec.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/jedec.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -91,7 +91,7 @@
 		msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
 }
 
-static unsigned int getaddrmask(struct flashchip *flash)
+static unsigned int getaddrmask(struct flashctx *flash)
 {
 	switch (flash->feature_bits & FEATURE_ADDR_MASK) {
 	case FEATURE_ADDR_FULL:
@@ -110,7 +110,7 @@
 	}
 }
 
-static void start_program_jedec_common(struct flashchip *flash, unsigned int mask)
+static void start_program_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	chip_writeb(0xAA, bios + (0x5555 & mask));
@@ -118,7 +118,7 @@
 	chip_writeb(0xA0, bios + (0x5555 & mask));
 }
 
-static int probe_jedec_common(struct flashchip *flash, unsigned int mask)
+static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
@@ -237,7 +237,7 @@
 	return 1;
 }
 
-static int erase_sector_jedec_common(struct flashchip *flash, unsigned int page,
+static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page,
 			      unsigned int pagesize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
@@ -267,7 +267,7 @@
 	return 0;
 }
 
-static int erase_block_jedec_common(struct flashchip *flash, unsigned int block,
+static int erase_block_jedec_common(struct flashctx *flash, unsigned int block,
 			     unsigned int blocksize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
@@ -297,7 +297,7 @@
 	return 0;
 }
 
-static int erase_chip_jedec_common(struct flashchip *flash, unsigned int mask)
+static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
@@ -325,7 +325,7 @@
 	return 0;
 }
 
-static int write_byte_program_jedec_common(struct flashchip *flash, uint8_t *src,
+static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src,
 			     chipaddr dst, unsigned int mask)
 {
 	int tried = 0, failed = 0;
@@ -355,7 +355,7 @@
 }
 
 /* chunksize is 1 */
-int write_jedec_1(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i, failed = 0;
 	chipaddr dst = flash->virtual_memory + start;
@@ -376,7 +376,7 @@
 	return failed;
 }
 
-int write_page_write_jedec_common(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int page_size)
+int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int page_size)
 {
 	int i, tried = 0, failed;
 	uint8_t *s = src;
@@ -424,11 +424,11 @@
  * This function is a slightly modified copy of spi_write_chunked.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int write_jedec(struct flashchip *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
 {
 	unsigned int i, starthere, lenhere;
 	/* FIXME: page_size is the wrong variable. We need max_writechunk_size
-	 * in struct flashchip to do this properly. All chips using
+	 * in struct flashctx to do this properly. All chips using
 	 * write_jedec have page_size set to max_writechunk_size, so
 	 * we're OK for now.
 	 */
@@ -458,7 +458,7 @@
 }
 
 /* erase chip with block_erase() prototype */
-int erase_chip_block_jedec(struct flashchip *flash, unsigned int addr,
+int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr,
 			   unsigned int blocksize)
 {
 	unsigned int mask;
@@ -472,7 +472,7 @@
 	return erase_chip_jedec_common(flash, mask);
 }
 
-int probe_jedec(struct flashchip *flash)
+int probe_jedec(struct flashctx *flash)
 {
 	unsigned int mask;
 
@@ -480,7 +480,7 @@
 	return probe_jedec_common(flash, mask);
 }
 
-int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int size)
+int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
 {
 	unsigned int mask;
 
@@ -488,7 +488,7 @@
 	return erase_sector_jedec_common(flash, page, size, mask);
 }
 
-int erase_block_jedec(struct flashchip *flash, unsigned int page, unsigned int size)
+int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
 {
 	unsigned int mask;
 
@@ -496,7 +496,7 @@
 	return erase_block_jedec_common(flash, page, size, mask);
 }
 
-int erase_chip_jedec(struct flashchip *flash)
+int erase_chip_jedec(struct flashctx *flash)
 {
 	unsigned int mask;
 

Modified: trunk/layout.c
==============================================================================
--- trunk/layout.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/layout.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -240,7 +240,7 @@
 	return best_entry;
 }
 
-int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents)
+int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
 	int entry;

Modified: trunk/linux_spi.c
==============================================================================
--- trunk/linux_spi.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/linux_spi.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -36,9 +36,9 @@
 static int linux_spi_shutdown(void *data);
 static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			const unsigned char *txbuf, unsigned char *rxbuf);
-static int linux_spi_read(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len);
-static int linux_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_linux = {
@@ -131,13 +131,13 @@
 	return 0;
 }
 
-static int linux_spi_read(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len)
 {
 	return spi_read_chunked(flash, buf, start, len, (unsigned)getpagesize());
 }
 
-static int linux_spi_write_256(struct flashchip *flash, uint8_t *buf,
+static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len)
 {
 	return spi_write_chunked(flash, buf, start, len, ((unsigned)getpagesize()) - 4);

Modified: trunk/m29f400bt.c
==============================================================================
--- trunk/m29f400bt.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/m29f400bt.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -28,7 +28,7 @@
    functions. */
 
 /* chunksize is 1 */
-int write_m29f400bt(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
@@ -55,7 +55,7 @@
 	return 0;
 }
 
-int probe_m29f400bt(struct flashchip *flash)
+int probe_m29f400bt(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
@@ -86,7 +86,7 @@
 	return 0;
 }
 
-int erase_m29f400bt(struct flashchip *flash)
+int erase_m29f400bt(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -105,7 +105,7 @@
 	return 0;
 }
 
-int block_erase_m29f400bt(struct flashchip *flash, unsigned int start, unsigned int len)
+int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len)
 {
 	chipaddr bios = flash->virtual_memory;
 	chipaddr dst = bios + start;
@@ -125,7 +125,7 @@
 	return 0;
 }
 
-int block_erase_chip_m29f400bt(struct flashchip *flash, unsigned int address, unsigned int blocklen)
+int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, unsigned int blocklen)
 {
 	if ((address != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",

Modified: trunk/opaque.c
==============================================================================
--- trunk/opaque.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/opaque.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -41,7 +41,7 @@
 
 const struct opaque_programmer *opaque_programmer = &opaque_programmer_none;
 
-int probe_opaque(struct flashchip *flash)
+int probe_opaque(struct flashctx *flash)
 {
 	if (!opaque_programmer->probe) {
 		msg_perr("%s called before register_opaque_programmer. "
@@ -53,7 +53,7 @@
 	return opaque_programmer->probe(flash);
 }
 
-int read_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	if (!opaque_programmer->read) {
 		msg_perr("%s called before register_opaque_programmer. "
@@ -64,7 +64,7 @@
 	return opaque_programmer->read(flash, buf, start, len);
 }
 
-int write_opaque(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	if (!opaque_programmer->write) {
 		msg_perr("%s called before register_opaque_programmer. "
@@ -75,7 +75,7 @@
 	return opaque_programmer->write(flash, buf, start, len);
 }
 
-int erase_opaque(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen)
+int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
 	if (!opaque_programmer->erase) {
 		msg_perr("%s called before register_opaque_programmer. "

Modified: trunk/pm49fl00x.c
==============================================================================
--- trunk/pm49fl00x.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/pm49fl00x.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -36,13 +36,13 @@
 	}
 }
 
-int unlock_49fl00x(struct flashchip *flash)
+int unlock_49fl00x(struct flashctx *flash)
 {
 	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 0, flash->page_size);
 	return 0;
 }
 
-int lock_49fl00x(struct flashchip *flash)
+int lock_49fl00x(struct flashctx *flash)
 {
 	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size);
 	return 0;

Modified: trunk/programmer.h
==============================================================================
--- trunk/programmer.h	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/programmer.h	Wed Dec 14 23:25:15 2011	(r1473)
@@ -24,7 +24,7 @@
 #ifndef __PROGRAMMER_H__
 #define __PROGRAMMER_H__ 1
 
-#include "flash.h"	/* for chipaddr and flashchip */
+#include "flash.h"	/* for chipaddr and flashctx */
 
 enum programmer {
 #if CONFIG_INTERNAL == 1
@@ -513,7 +513,7 @@
 extern struct decode_sizes max_rom_decode;
 extern int programmer_may_write;
 extern unsigned long flashbase;
-void check_chip_supported(const struct flashchip *flash);
+void check_chip_supported(const struct flashctx *flash);
 int check_max_decode(enum chipbustype buses, uint32_t size);
 char *extract_programmer_param(const char *param_name);
 
@@ -570,16 +570,16 @@
 	int (*multicommand)(struct spi_command *cmds);
 
 	/* Optimized functions for this programmer */
-	int (*read)(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*write_256)(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 };
 
 extern const struct spi_programmer *spi_programmer;
 int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 			     const unsigned char *writearr, unsigned char *readarr);
 int default_spi_send_multicommand(struct spi_command *cmds);
-int default_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-int default_spi_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void register_spi_programmer(const struct spi_programmer *programmer);
 
 /* ichspi.c */
@@ -624,10 +624,10 @@
 	int max_data_read;
 	int max_data_write;
 	/* Specific functions for this programmer */
-	int (*probe) (struct flashchip *flash);
-	int (*read) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*write) (struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
+	int (*probe) (struct flashctx *flash);
+	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
 };
 extern const struct opaque_programmer *opaque_programmer;
 void register_opaque_programmer(const struct opaque_programmer *pgm);

Modified: trunk/serprog.c
==============================================================================
--- trunk/serprog.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/serprog.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -302,7 +302,7 @@
 static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 				    const unsigned char *writearr,
 				    unsigned char *readarr);
-static int serprog_spi_read(struct flashchip *flash, uint8_t *buf,
+static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
 			    unsigned int start, unsigned int len);
 static struct spi_programmer spi_programmer_serprog = {
 	.type		= SPI_CONTROLLER_SERPROG,
@@ -822,7 +822,7 @@
  * the advantage that it is much faster for most chips, but breaks those with
  * non-contiguous address space (like AT45DB161D). When spi_read_chunked is
  * fixed this method can be removed. */
-static int serprog_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int i, cur_len;
 	const unsigned int max_read = spi_programmer_serprog.max_data_read;

Modified: trunk/sharplhf00l04.c
==============================================================================
--- trunk/sharplhf00l04.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/sharplhf00l04.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -26,7 +26,7 @@
  * FIXME: This file is unused.
  */
 
-int erase_lhf00l04_block(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen)
+int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
 	chipaddr bios = flash->virtual_memory + blockaddr;
 	chipaddr wrprotect = flash->virtual_registers + blockaddr + 2;

Modified: trunk/spi.c
==============================================================================
--- trunk/spi.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/spi.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -97,7 +97,7 @@
 	return result;
 }
 
-int default_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -109,7 +109,7 @@
 	return spi_read_chunked(flash, buf, start, len, max_data);
 }
 
-int default_spi_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -121,7 +121,7 @@
 	return spi_write_chunked(flash, buf, start, len, max_data);
 }
 
-int spi_chip_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int addrbase = 0;
 	if (!spi_programmer->read) {
@@ -160,7 +160,7 @@
  * .write_256 = spi_chip_write_1
  */
 /* real chunksize is up to 256, logical chunksize is 256 */
-int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	if (!spi_programmer->write_256) {
 		msg_perr("%s called, but SPI page write is unsupported on this "

Modified: trunk/spi25.c
==============================================================================
--- trunk/spi25.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/spi25.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -113,7 +113,7 @@
 	return spi_send_command(sizeof(cmd), 0, cmd, NULL);
 }
 
-static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
+static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
 {
 	unsigned char readarr[4];
 	uint32_t id1;
@@ -167,12 +167,12 @@
 	return 0;
 }
 
-int probe_spi_rdid(struct flashchip *flash)
+int probe_spi_rdid(struct flashctx *flash)
 {
 	return probe_spi_rdid_generic(flash, 3);
 }
 
-int probe_spi_rdid4(struct flashchip *flash)
+int probe_spi_rdid4(struct flashctx *flash)
 {
 	/* Some SPI controllers do not support commands with writecnt=1 and
 	 * readcnt=4.
@@ -194,7 +194,7 @@
 	return 0;
 }
 
-int probe_spi_rems(struct flashchip *flash)
+int probe_spi_rems(struct flashctx *flash)
 {
 	unsigned char readarr[JEDEC_REMS_INSIZE];
 	uint32_t id1, id2;
@@ -230,7 +230,7 @@
 	return 0;
 }
 
-int probe_spi_res1(struct flashchip *flash)
+int probe_spi_res1(struct flashctx *flash)
 {
 	static const unsigned char allff[] = {0xff, 0xff, 0xff};
 	static const unsigned char all00[] = {0x00, 0x00, 0x00};
@@ -274,7 +274,7 @@
 	return 1;
 }
 
-int probe_spi_res2(struct flashchip *flash)
+int probe_spi_res2(struct flashctx *flash)
 {
 	unsigned char readarr[2];
 	uint32_t id1, id2;
@@ -410,7 +410,7 @@
 		bpt[(status & 0x1c) >> 2]);
 }
 
-int spi_prettyprint_status_register(struct flashchip *flash)
+int spi_prettyprint_status_register(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -444,7 +444,7 @@
 	return 0;
 }
 
-int spi_chip_erase_60(struct flashchip *flash)
+int spi_chip_erase_60(struct flashctx *flash)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -481,7 +481,7 @@
 	return 0;
 }
 
-int spi_chip_erase_c7(struct flashchip *flash)
+int spi_chip_erase_c7(struct flashctx *flash)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -517,7 +517,7 @@
 	return 0;
 }
 
-int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -563,7 +563,7 @@
  * 32k for SST
  * 4-32k non-uniform for EON
  */
-int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -607,7 +607,7 @@
 /* Block size is usually
  * 4k for PMC
  */
-int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -649,7 +649,7 @@
 }
 
 /* Sector size is usually 4k, though Macronix eliteflash has 64k */
-int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -690,7 +690,7 @@
 	return 0;
 }
 
-int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -700,7 +700,7 @@
 	return spi_chip_erase_60(flash);
 }
 
-int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -728,7 +728,7 @@
  * This is according the SST25VF016 datasheet, who knows it is more
  * generic that this...
  */
-static int spi_write_status_register_ewsr(struct flashchip *flash, int status)
+static int spi_write_status_register_ewsr(struct flashctx *flash, int status)
 {
 	int result;
 	int i = 0;
@@ -776,7 +776,7 @@
 	return 0;
 }
 
-static int spi_write_status_register_wren(struct flashchip *flash, int status)
+static int spi_write_status_register_wren(struct flashctx *flash, int status)
 {
 	int result;
 	int i = 0;
@@ -824,7 +824,7 @@
 	return 0;
 }
 
-int spi_write_status_register(struct flashchip *flash, int status)
+int spi_write_status_register(struct flashctx *flash, int status)
 {
 	int ret = 1;
 
@@ -926,7 +926,7 @@
  * Write 0x00 to the status register. Check if any locks are still set (that
  * part is chip specific). Repeat once.
  */
-int spi_disable_blockprotect(struct flashchip *flash)
+int spi_disable_blockprotect(struct flashctx *flash)
 {
 	uint8_t status;
 	int result;
@@ -968,7 +968,7 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is read separately in chunks with a maximum size of chunksize.
  */
-int spi_read_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, toread;
@@ -1007,12 +1007,12 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int spi_write_chunked(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, towrite;
 	/* FIXME: page_size is the wrong variable. We need max_writechunk_size
-	 * in struct flashchip to do this properly. All chips using
+	 * in struct flashctx to do this properly. All chips using
 	 * spi_chip_write_256 have page_size set to max_writechunk_size, so
 	 * we're OK for now.
 	 */
@@ -1055,7 +1055,7 @@
  * (e.g. due to size constraints in IT87* for over 512 kB)
  */
 /* real chunksize is 1, logical chunksize is 1 */
-int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int i;
 	int result = 0;
@@ -1071,7 +1071,7 @@
 	return 0;
 }
 
-int spi_aai_write(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	uint32_t pos = start;
 	int result;

Modified: trunk/sst28sf040.c
==============================================================================
--- trunk/sst28sf040.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/sst28sf040.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -30,7 +30,7 @@
 #define RESET			0xFF
 #define READ_ID			0x90
 
-int protect_28sf040(struct flashchip *flash)
+int protect_28sf040(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -45,7 +45,7 @@
 	return 0;
 }
 
-int unprotect_28sf040(struct flashchip *flash)
+int unprotect_28sf040(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -60,7 +60,7 @@
 	return 0;
 }
 
-int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -76,7 +76,7 @@
 }
 
 /* chunksize is 1 */
-int write_28sf040(struct flashchip *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
@@ -100,7 +100,7 @@
 	return 0;
 }
 
-static int erase_28sf040(struct flashchip *flash)
+static int erase_28sf040(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 
@@ -114,7 +114,7 @@
 	return 0;
 }
 
-int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
+int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",

Modified: trunk/sst49lfxxxc.c
==============================================================================
--- trunk/sst49lfxxxc.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/sst49lfxxxc.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -23,7 +23,7 @@
 #include "flash.h"
 #include "chipdrivers.h"
 
-static int write_lockbits_block_49lfxxxc(struct flashchip *flash, unsigned long address, unsigned char bits)
+static int write_lockbits_block_49lfxxxc(struct flashctx *flash, unsigned long address, unsigned char bits)
 {
 	unsigned long lock = flash->virtual_registers + address + 2;
 	msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock));
@@ -32,7 +32,7 @@
 	return 0;
 }
 
-static int write_lockbits_49lfxxxc(struct flashchip *flash, unsigned char bits)
+static int write_lockbits_49lfxxxc(struct flashctx *flash, unsigned char bits)
 {
 	chipaddr registers = flash->virtual_registers;
 	unsigned int i, left = flash->total_size * 1024;
@@ -54,12 +54,12 @@
 	return 0;
 }
 
-int unlock_49lfxxxc(struct flashchip *flash)
+int unlock_49lfxxxc(struct flashctx *flash)
 {
 	return write_lockbits_49lfxxxc(flash, 0);
 }
 
-int erase_sector_49lfxxxc(struct flashchip *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size)
 {
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;

Modified: trunk/sst_fwhub.c
==============================================================================
--- trunk/sst_fwhub.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/sst_fwhub.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -24,7 +24,7 @@
 
 #include "flash.h"
 
-static int check_sst_fwhub_block_lock(struct flashchip *flash, int offset)
+static int check_sst_fwhub_block_lock(struct flashctx *flash, int offset)
 {
 	chipaddr registers = flash->virtual_registers;
 	uint8_t blockstatus;
@@ -50,7 +50,7 @@
 	return blockstatus & 0x1;
 }
 
-static int clear_sst_fwhub_block_lock(struct flashchip *flash, int offset)
+static int clear_sst_fwhub_block_lock(struct flashctx *flash, int offset)
 {
 	chipaddr registers = flash->virtual_registers;
 	uint8_t blockstatus;
@@ -68,7 +68,7 @@
 	return blockstatus;
 }
 
-int printlock_sst_fwhub(struct flashchip *flash)
+int printlock_sst_fwhub(struct flashctx *flash)
 {
 	int i;
 
@@ -78,7 +78,7 @@
 	return 0;
 }
 
-int unlock_sst_fwhub(struct flashchip *flash)
+int unlock_sst_fwhub(struct flashctx *flash)
 {
 	int i, ret=0;
 

Modified: trunk/stm50flw0x0x.c
==============================================================================
--- trunk/stm50flw0x0x.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/stm50flw0x0x.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -36,7 +36,7 @@
  * The ST M50FLW080B and STM50FLW080B chips have to be unlocked,
  * before you can erase them or write to them.
  */
-static int unlock_block_stm50flw0x0x(struct flashchip *flash, int offset)
+static int unlock_block_stm50flw0x0x(struct flashctx *flash, int offset)
 {
 	chipaddr wrprotect = flash->virtual_registers + 2;
 	static const uint8_t unlock_sector = 0x00;
@@ -79,7 +79,7 @@
 	return 0;
 }
 
-int unlock_stm50flw0x0x(struct flashchip *flash)
+int unlock_stm50flw0x0x(struct flashctx *flash)
 {
 	int i;
 
@@ -94,7 +94,7 @@
 }
 
 /* This function is unused. */
-int erase_sector_stm50flw0x0x(struct flashchip *flash, unsigned int sector, unsigned int sectorsize)
+int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, unsigned int sectorsize)
 {
 	chipaddr bios = flash->virtual_memory + sector;
 

Modified: trunk/w29ee011.c
==============================================================================
--- trunk/w29ee011.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/w29ee011.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -24,7 +24,7 @@
 /* According to the Winbond W29EE011, W29EE012, W29C010M, W29C011A
  * datasheets this is the only valid probe function for those chips.
  */
-int probe_w29ee011(struct flashchip *flash)
+int probe_w29ee011(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;

Modified: trunk/w39.c
==============================================================================
--- trunk/w39.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/w39.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -21,7 +21,7 @@
 
 #include "flash.h"
 
-static int printlock_w39_fwh_block(struct flashchip *flash, unsigned int offset)
+static int printlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
 {
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
@@ -59,7 +59,7 @@
 	return (locking & ((1 << 2) | (1 << 0))) ? -1 : 0;
 }
 
-static int unlock_w39_fwh_block(struct flashchip *flash, unsigned int offset)
+static int unlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
 {
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
@@ -80,7 +80,7 @@
 	return 0;
 }
 
-static uint8_t w39_idmode_readb(struct flashchip *flash, unsigned int offset)
+static uint8_t w39_idmode_readb(struct flashctx *flash, unsigned int offset)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t val;
@@ -127,7 +127,7 @@
 	return 0;
 }
 
-static int printlock_w39_common(struct flashchip *flash, unsigned int offset)
+static int printlock_w39_common(struct flashctx *flash, unsigned int offset)
 {
 	uint8_t lock;
 
@@ -136,7 +136,7 @@
 	return printlock_w39_tblwp(lock);
 }
 
-static int printlock_w39_fwh(struct flashchip *flash)
+static int printlock_w39_fwh(struct flashctx *flash)
 {
 	unsigned int i, total_size = flash->total_size * 1024;
 	int ret = 0;
@@ -148,7 +148,7 @@
 	return ret;
 }
 
-static int unlock_w39_fwh(struct flashchip *flash)
+static int unlock_w39_fwh(struct flashctx *flash)
 {
 	unsigned int i, total_size = flash->total_size * 1024;
 	
@@ -160,7 +160,7 @@
 	return 0;
 }
 
-int printlock_w39l040(struct flashchip * flash)
+int printlock_w39l040(struct flashctx * flash)
 {
 	uint8_t lock;
 	int ret;
@@ -176,7 +176,7 @@
 	return ret;
 }
 
-int printlock_w39v040a(struct flashchip *flash)
+int printlock_w39v040a(struct flashctx *flash)
 {
 	uint8_t lock;
 	int ret = 0;
@@ -194,18 +194,18 @@
 	return ret;
 }
 
-int printlock_w39v040b(struct flashchip *flash)
+int printlock_w39v040b(struct flashctx *flash)
 {
 	return printlock_w39_common(flash, 0x7fff2);
 }
 
-int printlock_w39v040c(struct flashchip *flash)
+int printlock_w39v040c(struct flashctx *flash)
 {
 	/* Typo in the datasheet? The other chips use 0x7fff2. */
 	return printlock_w39_common(flash, 0xfff2);
 }
 
-int printlock_w39v040fa(struct flashchip *flash)
+int printlock_w39v040fa(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -215,7 +215,7 @@
 	return ret;
 }
 
-int printlock_w39v040fb(struct flashchip *flash)
+int printlock_w39v040fb(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -225,7 +225,7 @@
 	return ret;
 }
 
-int printlock_w39v040fc(struct flashchip *flash)
+int printlock_w39v040fc(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -236,12 +236,12 @@
 	return ret;
 }
 
-int printlock_w39v080a(struct flashchip *flash)
+int printlock_w39v080a(struct flashctx *flash)
 {
 	return printlock_w39_common(flash, 0xffff2);
 }
 
-int printlock_w39v080fa(struct flashchip *flash)
+int printlock_w39v080fa(struct flashctx *flash)
 {
 	int ret = 0;
 
@@ -251,7 +251,7 @@
 	return ret;
 }
 
-int printlock_w39v080fa_dual(struct flashchip *flash)
+int printlock_w39v080fa_dual(struct flashctx *flash)
 {
 	msg_cinfo("Block locking for W39V080FA in dual mode is "
 		  "undocumented.\n");
@@ -259,7 +259,7 @@
 	return -1;
 }
 
-int unlock_w39v040fb(struct flashchip *flash)
+int unlock_w39v040fb(struct flashctx *flash)
 {
 	if (unlock_w39_fwh(flash))
 		return -1;
@@ -269,7 +269,7 @@
 	return 0;
 }
 
-int unlock_w39v080fa(struct flashchip *flash)
+int unlock_w39v080fa(struct flashctx *flash)
 {
 	if (unlock_w39_fwh(flash))
 		return -1;

Modified: trunk/wbsio_spi.c
==============================================================================
--- trunk/wbsio_spi.c	Thu Dec  8 08:49:11 2011	(r1472)
+++ trunk/wbsio_spi.c	Wed Dec 14 23:25:15 2011	(r1473)
@@ -62,7 +62,7 @@
 
 static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
 		      const unsigned char *writearr, unsigned char *readarr);
-static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len);
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_wbsio = {
 	.type = SPI_CONTROLLER_WBSIO,
@@ -194,7 +194,7 @@
 	return 0;
 }
 
-static int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	return read_memmapped(flash, buf, start, len);
 }


From c-d.hailfinger.devel.2006 at gmx.net  Wed Dec 14 23:27:02 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 14 Dec 2011 23:27:02 +0100
Subject: [flashrom] [RFC] Add struct flashchip * everywhere
In-Reply-To: <1323886048.4676.6.camel@localhost>
References: <4EB0BEB2.1040701@gmx.net>
	<201111021241.pA2CfGHH021689@mail2.student.tuwien.ac.at>
	<4EB31089.7000902@gmx.net> <4EB9C67A.50502@gmx.net>
	<4EE16214.1030407@gmx.net> <1323886048.4676.6.camel@localhost>
Message-ID: <4EE922B6.4010302@gmx.net>

Am 14.12.2011 19:07 schrieb Michael Karcher:
> Am Freitag, den 09.12.2011, 02:19 +0100 schrieb Carl-Daniel Hailfinger:
>> New version, updated to apply against svn HEAD.
>> Please note that this one still duplicates the struct flashchip members
>> manually in struct flashctx. An alternative version will be posted as
>> followup.
> Thanks for your tedious work on that!

Thanks for the review!
 

>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

Thanks, committed in r1473.

 
>> +	/* Check that virtual_memory in struct flashctx is placed directly
>> +	 * after the members copied from struct flashchip.
>> +	 */
>> +	if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) {
>> +		msg_gerr("struct flashctx broken!\n");
>> +		ret = 1;
>> +	}
> There is no "offsetof" in C90, its a common C99 extension. Do we care?

Given that clang, gcc and MSVC in all variants support it (and some C90
draft mentions it), I don't really worry about that.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From alexalx at bigmir.net  Thu Dec 15 12:12:13 2011
From: alexalx at bigmir.net (AlexALX)
Date: Thu, 15 Dec 2011 13:12:13 +0200
Subject: [flashrom] Asus M2N
Message-ID: <CAA=zvWX6CheDogN6uzh3Vjg9CuAhMNCywGWr4wQKoN89vDTaeA@mail.gmail.com>

"Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for your
chipset. Thanks."

Sending - Motherboard M2N and log file in attachment.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: log
Type: application/octet-stream
Size: 4984 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20111215/242ebb35/attachment.obj>

From c-d.hailfinger.devel.2006 at gmx.net  Fri Dec 16 14:41:01 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 16 Dec 2011 14:41:01 +0100
Subject: [flashrom] [PATCH] Add struct flashctx * everywhere
In-Reply-To: <4EE922B6.4010302@gmx.net>
References: <4EB0BEB2.1040701@gmx.net>
	<201111021241.pA2CfGHH021689@mail2.student.tuwien.ac.at>
	<4EB31089.7000902@gmx.net> <4EB9C67A.50502@gmx.net>
	<4EE16214.1030407@gmx.net> <1323886048.4676.6.camel@localhost>
	<4EE922B6.4010302@gmx.net>
Message-ID: <4EEB4A6D.6050008@gmx.net>

This is the final patch needed to have struct flashctx available in any
function which accesses a flash chip.

All programmer access function prototypes except init have been made
static and moved to the respective file.

A few internal functions in flash chip drivers had chipaddr parameters
which are no longer needed.

The lines touched by flashctx changes have been adjusted to 80 columns
except in header files.

No functional changes. Please test anyway on real hardware.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-struct_flashctx_everywhere_new/flash.h
===================================================================
--- flashrom-struct_flashctx_everywhere_new/flash.h	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/flash.h	(Arbeitskopie)
@@ -44,14 +44,6 @@
 void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
 				  size_t len);
 void programmer_unmap_flash_region(void *virt_addr, size_t len);
-void chip_writeb(uint8_t val, chipaddr addr);
-void chip_writew(uint16_t val, chipaddr addr);
-void chip_writel(uint32_t val, chipaddr addr);
-void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint8_t chip_readb(const chipaddr addr);
-uint16_t chip_readw(const chipaddr addr);
-uint32_t chip_readl(const chipaddr addr);
-void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 void programmer_delay(int usecs);
 
 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
@@ -212,6 +204,15 @@
 
 extern const struct flashchip flashchips[];
 
+void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
+void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
+void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
+void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
+uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr);
+uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr);
+uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr);
+void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+
 /* print.c */
 char *flashbuses_to_text(enum chipbustype bustype);
 void print_supported(void);
@@ -292,9 +293,8 @@
 	const unsigned char *writearr;
 	unsigned char *readarr;
 };
-int spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
-int spi_send_multicommand(struct spi_command *cmds);
-uint32_t spi_get_valid_read_addr(void);
+int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
+uint32_t spi_get_valid_read_addr(struct flashctx *flash);
 
 #endif				/* !__FLASH_H__ */
Index: flashrom-struct_flashctx_everywhere_new/drkaiser.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/drkaiser.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/drkaiser.c	(Arbeitskopie)
@@ -39,6 +39,10 @@
 
 static uint8_t *drkaiser_bar;
 
+static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr);
+static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr);
 static const struct par_programmer par_programmer_drkaiser = {
 		.chip_readb		= drkaiser_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -84,12 +88,14 @@
 	return 0;
 }
 
-void drkaiser_chip_writeb(uint8_t val, chipaddr addr)
+static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr)
 {
 	pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
 }
 
-uint8_t drkaiser_chip_readb(const chipaddr addr)
+static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr)
 {
 	return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
 }
Index: flashrom-struct_flashctx_everywhere_new/it87spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/it87spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/it87spi.c	(Arbeitskopie)
@@ -103,8 +103,10 @@
 	return;
 }
 
-static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr);
+static int it8716f_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr);
 static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 				 unsigned int start, unsigned int len);
 static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
@@ -247,8 +249,10 @@
  * commands with the address in inverse wire order. That's why the register
  * ordering in case 4 and 5 may seem strange.
  */
-static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr)
+static int it8716f_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr)
 {
 	uint8_t busy, writeenc;
 	int i;
@@ -319,19 +323,19 @@
 	int result;
 	chipaddr bios = flash->virtual_memory;
 
-	result = spi_write_enable();
+	result = spi_write_enable(flash);
 	if (result)
 		return result;
 	/* FIXME: The command below seems to be redundant or wrong. */
 	OUTB(0x06, it8716f_flashport + 1);
 	OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
 	for (i = 0; i < flash->page_size; i++)
-		chip_writeb(buf[i], bios + start + i);
+		chip_writeb(flash, buf[i], bios + start + i);
 	OUTB(0, it8716f_flashport);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 1-10 ms, so wait in 1 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(1000);
 	return 0;
 }
Index: flashrom-struct_flashctx_everywhere_new/jedec.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/jedec.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/jedec.c	(Arbeitskopie)
@@ -37,17 +37,18 @@
 	return (val ^ (val >> 1)) & 0x1;
 }
 
-static void toggle_ready_jedec_common(chipaddr dst, int delay)
+static void toggle_ready_jedec_common(const struct flashctx *flash,
+				      chipaddr dst, int delay)
 {
 	unsigned int i = 0;
 	uint8_t tmp1, tmp2;
 
-	tmp1 = chip_readb(dst) & 0x40;
+	tmp1 = chip_readb(flash, dst) & 0x40;
 
 	while (i++ < 0xFFFFFFF) {
 		if (delay)
 			programmer_delay(delay);
-		tmp2 = chip_readb(dst) & 0x40;
+		tmp2 = chip_readb(flash, dst) & 0x40;
 		if (tmp1 == tmp2) {
 			break;
 		}
@@ -57,9 +58,9 @@
 		msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
 }
 
-void toggle_ready_jedec(chipaddr dst)
+void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst)
 {
-	toggle_ready_jedec_common(dst, 0);
+	toggle_ready_jedec_common(flash, dst, 0);
 }
 
 /* Some chips require a minimum delay between toggle bit reads.
@@ -69,12 +70,13 @@
  * Given that erase is slow on all chips, it is recommended to use 
  * toggle_ready_jedec_slow in erase functions.
  */
-static void toggle_ready_jedec_slow(chipaddr dst)
+static void toggle_ready_jedec_slow(const struct flashctx *flash, chipaddr dst)
 {
-	toggle_ready_jedec_common(dst, 8 * 1000);
+	toggle_ready_jedec_common(flash, dst, 8 * 1000);
 }
 
-void data_polling_jedec(chipaddr dst, uint8_t data)
+void data_polling_jedec(const struct flashctx *flash, chipaddr dst,
+			uint8_t data)
 {
 	unsigned int i = 0;
 	uint8_t tmp;
@@ -82,7 +84,7 @@
 	data &= 0x80;
 
 	while (i++ < 0xFFFFFFF) {
-		tmp = chip_readb(dst) & 0x80;
+		tmp = chip_readb(flash, dst) & 0x80;
 		if (tmp == data) {
 			break;
 		}
@@ -110,12 +112,13 @@
 	}
 }
 
-static void start_program_jedec_common(struct flashctx *flash, unsigned int mask)
+static void start_program_jedec_common(struct flashctx *flash,
+				       unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
-	chip_writeb(0xAA, bios + (0x5555 & mask));
-	chip_writeb(0x55, bios + (0x2AAA & mask));
-	chip_writeb(0xA0, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0xA0, bios + (0x5555 & mask));
 }
 
 static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
@@ -150,57 +153,57 @@
 	/* Reset chip to a clean slate */
 	if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
 	{
-		chip_writeb(0xAA, bios + (0x5555 & mask));
+		chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
-		chip_writeb(0x55, bios + (0x2AAA & mask));
+		chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
 	}
-	chip_writeb(0xF0, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
 	if (probe_timing_exit)
 		programmer_delay(probe_timing_exit);
 
 	/* Issue JEDEC Product ID Entry command */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	if (probe_timing_enter)
 		programmer_delay(10);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	if (probe_timing_enter)
 		programmer_delay(10);
-	chip_writeb(0x90, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x90, bios + (0x5555 & mask));
 	if (probe_timing_enter)
 		programmer_delay(probe_timing_enter);
 
 	/* Read product ID */
-	id1 = chip_readb(bios);
-	id2 = chip_readb(bios + 0x01);
+	id1 = chip_readb(flash, bios);
+	id2 = chip_readb(flash, bios + 0x01);
 	largeid1 = id1;
 	largeid2 = id2;
 
 	/* Check if it is a continuation ID, this should be a while loop. */
 	if (id1 == 0x7F) {
 		largeid1 <<= 8;
-		id1 = chip_readb(bios + 0x100);
+		id1 = chip_readb(flash, bios + 0x100);
 		largeid1 |= id1;
 	}
 	if (id2 == 0x7F) {
 		largeid2 <<= 8;
-		id2 = chip_readb(bios + 0x101);
+		id2 = chip_readb(flash, bios + 0x101);
 		largeid2 |= id2;
 	}
 
 	/* Issue JEDEC Product ID Exit command */
 	if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
 	{
-		chip_writeb(0xAA, bios + (0x5555 & mask));
+		chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
-		chip_writeb(0x55, bios + (0x2AAA & mask));
+		chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
 	}
-	chip_writeb(0xF0, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
 	if (probe_timing_exit)
 		programmer_delay(probe_timing_exit);
 
@@ -209,17 +212,17 @@
 		msg_cdbg(", id1 parity violation");
 
 	/* Read the product ID location again. We should now see normal flash contents. */
-	flashcontent1 = chip_readb(bios);
-	flashcontent2 = chip_readb(bios + 0x01);
+	flashcontent1 = chip_readb(flash, bios);
+	flashcontent2 = chip_readb(flash, bios + 0x01);
 
 	/* Check if it is a continuation ID, this should be a while loop. */
 	if (flashcontent1 == 0x7F) {
 		flashcontent1 <<= 8;
-		flashcontent1 |= chip_readb(bios + 0x100);
+		flashcontent1 |= chip_readb(flash, bios + 0x100);
 	}
 	if (flashcontent2 == 0x7F) {
 		flashcontent2 <<= 8;
-		flashcontent2 |= chip_readb(bios + 0x101);
+		flashcontent2 |= chip_readb(flash, bios + 0x101);
 	}
 
 	if (largeid1 == flashcontent1)
@@ -238,7 +241,7 @@
 }
 
 static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page,
-			      unsigned int pagesize, unsigned int mask)
+				     unsigned int pagesize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
@@ -246,29 +249,29 @@
 	        delay_us = 10;
 
 	/*  Issue the Sector Erase command   */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x80, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x80, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x30, bios + page);
+	chip_writeb(flash, 0x30, bios + page);
 	programmer_delay(delay_us);
 
 	/* wait for Toggle bit ready         */
-	toggle_ready_jedec_slow(bios);
+	toggle_ready_jedec_slow(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 static int erase_block_jedec_common(struct flashctx *flash, unsigned int block,
-			     unsigned int blocksize, unsigned int mask)
+				    unsigned int blocksize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
@@ -276,22 +279,22 @@
 	        delay_us = 10;
 
 	/*  Issue the Sector Erase command   */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x80, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x80, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x50, bios + block);
+	chip_writeb(flash, 0x50, bios + block);
 	programmer_delay(delay_us);
 
 	/* wait for Toggle bit ready         */
-	toggle_ready_jedec_slow(bios);
+	toggle_ready_jedec_slow(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -305,28 +308,28 @@
 	        delay_us = 10;
 
 	/*  Issue the JEDEC Chip Erase command   */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x80, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x80, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x10, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x10, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	toggle_ready_jedec_slow(bios);
+	toggle_ready_jedec_slow(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src,
-			     chipaddr dst, unsigned int mask)
+					   chipaddr dst, unsigned int mask)
 {
 	int tried = 0, failed = 0;
 	chipaddr bios = flash->virtual_memory;
@@ -341,10 +344,10 @@
 	start_program_jedec_common(flash, mask);
 
 	/* transfer data from source to destination */
-	chip_writeb(*src, dst);
-	toggle_ready_jedec(bios);
+	chip_writeb(flash, *src, dst);
+	toggle_ready_jedec(flash, bios);
 
-	if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
+	if (chip_readb(flash, dst) != *src && tried++ < MAX_REFLASH_TRIES) {
 		goto retry;
 	}
 
@@ -355,7 +358,8 @@
 }
 
 /* chunksize is 1 */
-int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start,
+		  unsigned int len)
 {
 	int i, failed = 0;
 	chipaddr dst = flash->virtual_memory + start;
@@ -376,7 +380,8 @@
 	return failed;
 }
 
-int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int page_size)
+int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src,
+				  unsigned int start, unsigned int page_size)
 {
 	int i, tried = 0, failed;
 	uint8_t *s = src;
@@ -395,12 +400,12 @@
 	for (i = 0; i < page_size; i++) {
 		/* If the data is 0xFF, don't program it */
 		if (*src != 0xFF)
-			chip_writeb(*src, dst);
+			chip_writeb(flash, *src, dst);
 		dst++;
 		src++;
 	}
 
-	toggle_ready_jedec(dst - 1);
+	toggle_ready_jedec(flash, dst - 1);
 
 	dst = d;
 	src = s;
@@ -424,7 +429,8 @@
  * This function is a slightly modified copy of spi_write_chunked.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		int unsigned len)
 {
 	unsigned int i, starthere, lenhere;
 	/* FIXME: page_size is the wrong variable. We need max_writechunk_size
@@ -480,7 +486,8 @@
 	return probe_jedec_common(flash, mask);
 }
 
-int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
+int erase_sector_jedec(struct flashctx *flash, unsigned int page,
+		       unsigned int size)
 {
 	unsigned int mask;
 
@@ -488,7 +495,8 @@
 	return erase_sector_jedec_common(flash, page, size, mask);
 }
 
-int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
+int erase_block_jedec(struct flashctx *flash, unsigned int page,
+		      unsigned int size)
 {
 	unsigned int mask;
 
Index: flashrom-struct_flashctx_everywhere_new/gfxnvidia.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/gfxnvidia.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/gfxnvidia.c	(Arbeitskopie)
@@ -61,6 +61,10 @@
 	{},
 };
 
+static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
+				  chipaddr addr);
+static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash,
+				    const chipaddr addr);
 static const struct par_programmer par_programmer_gfxnvidia = {
 		.chip_readb		= gfxnvidia_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -112,12 +116,14 @@
 	return 0;
 }
 
-void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr)
+static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
+				  chipaddr addr)
 {
 	pci_mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
 }
 
-uint8_t gfxnvidia_chip_readb(const chipaddr addr)
+static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash,
+				    const chipaddr addr)
 {
 	return pci_mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
 }
Index: flashrom-struct_flashctx_everywhere_new/serprog.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/serprog.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/serprog.c	(Arbeitskopie)
@@ -299,7 +299,8 @@
 	return 0;
 }
 
-static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+static int serprog_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
 				    const unsigned char *writearr,
 				    unsigned char *readarr);
 static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
@@ -314,6 +315,12 @@
 	.write_256	= default_spi_write_256,
 };
 
+static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr);
+static uint8_t serprog_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr);
+static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			       const chipaddr addr, size_t len);
 static const struct par_programmer par_programmer_serprog = {
 		.chip_readb		= serprog_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -680,7 +687,8 @@
 	}
 }
 
-void serprog_chip_writeb(uint8_t val, chipaddr addr)
+static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr)
 {
 	msg_pspew("%s\n", __func__);
 	if (sp_max_write_n) {
@@ -711,7 +719,8 @@
 	}
 }
 
-uint8_t serprog_chip_readb(const chipaddr addr)
+static uint8_t serprog_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr)
 {
 	unsigned char c;
 	unsigned char buf[3];
@@ -757,7 +766,8 @@
 }
 
 /* The externally called version that makes sure that max_read_n is obeyed. */
-void serprog_chip_readn(uint8_t * buf, const chipaddr addr, size_t len)
+static void serprog_chip_readn(const struct flashctx *flash, uint8_t * buf,
+			       const chipaddr addr, size_t len)
 {
 	size_t lenm = len;
 	chipaddr addrm = addr;
@@ -792,9 +802,10 @@
 	sp_prev_was_write = 0;
 }
 
-static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			     const unsigned char *writearr,
-			     unsigned char *readarr)
+static int serprog_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr)
 {
 	unsigned char *parmbuf;
 	int ret;
@@ -822,14 +833,15 @@
  * the advantage that it is much faster for most chips, but breaks those with
  * non-contiguous address space (like AT45DB161D). When spi_read_chunked is
  * fixed this method can be removed. */
-static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
+			    unsigned int start, unsigned int len)
 {
 	unsigned int i, cur_len;
 	const unsigned int max_read = spi_programmer_serprog.max_data_read;
 	for (i = 0; i < len; i += cur_len) {
 		int ret;
 		cur_len = min(max_read, (len - i));
-		ret = spi_nbyte_read(start + i, buf + i, cur_len);
+		ret = spi_nbyte_read(flash, start + i, buf + i, cur_len);
 		if (ret)
 			return ret;
 	}
Index: flashrom-struct_flashctx_everywhere_new/bitbang_spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/bitbang_spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/bitbang_spi.c	(Arbeitskopie)
@@ -63,8 +63,10 @@
 		bitbang_spi_master->release_bus();
 }
 
-static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
+static int bitbang_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_bitbang = {
 	.type		= SPI_CONTROLLER_BITBANG,
@@ -141,8 +143,10 @@
 	return ret;
 }
 
-static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+static int bitbang_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr)
 {
 	int i;
 
Index: flashrom-struct_flashctx_everywhere_new/nicrealtek.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/nicrealtek.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/nicrealtek.c	(Arbeitskopie)
@@ -36,6 +36,10 @@
 	{},
 };
 
+static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr);
+static uint8_t nicrealtek_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr);
 static const struct par_programmer par_programmer_nicrealtek = {
 		.chip_readb		= nicrealtek_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -69,7 +73,8 @@
 	return 0;
 }
 
-void nicrealtek_chip_writeb(uint8_t val, chipaddr addr)
+static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr)
 {
 	/* Output addr and data, set WE to 0, set OE to 1, set CS to 0,
 	 * enable software access.
@@ -83,7 +88,8 @@
 	     io_base_addr + BIOS_ROM_ADDR);
 }
 
-uint8_t nicrealtek_chip_readb(const chipaddr addr)
+static uint8_t nicrealtek_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr)
 {
 	uint8_t val;
 
Index: flashrom-struct_flashctx_everywhere_new/w39.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/w39.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/w39.c	(Arbeitskopie)
@@ -26,7 +26,7 @@
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
 
-	locking = chip_readb(wrprotect);
+	locking = chip_readb(flash, wrprotect);
 	msg_cdbg("Lock status of block at 0x%08x is ", offset);
 	switch (locking & 0x7) {
 	case 0:
@@ -64,7 +64,7 @@
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
 
-	locking = chip_readb(wrprotect);
+	locking = chip_readb(flash, wrprotect);
 	/* Read or write lock present? */
 	if (locking & ((1 << 2) | (1 << 0))) {
 		/* Lockdown active? */
@@ -73,7 +73,7 @@
 			return -1;
 		} else {
 			msg_cdbg("Unlocking block at 0x%08x\n", offset);
-			chip_writeb(0, wrprotect);
+			chip_writeb(flash, 0, wrprotect);
 		}
 	}
 
@@ -86,18 +86,18 @@
 	uint8_t val;
 
 	/* Product Identification Entry */
-	chip_writeb(0xAA, bios + 0x5555);
-	chip_writeb(0x55, bios + 0x2AAA);
-	chip_writeb(0x90, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x90, bios + 0x5555);
 	programmer_delay(10);
 
 	/* Read something, maybe hardware lock bits */
-	val = chip_readb(bios + offset);
+	val = chip_readb(flash, bios + offset);
 
 	/* Product Identification Exit */
-	chip_writeb(0xAA, bios + 0x5555);
-	chip_writeb(0x55, bios + 0x2AAA);
-	chip_writeb(0xF0, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0xF0, bios + 0x5555);
 	programmer_delay(10);
 
 	return val;
@@ -160,7 +160,7 @@
 	return 0;
 }
 
-int printlock_w39l040(struct flashctx * flash)
+int printlock_w39l040(struct flashctx *flash)
 {
 	uint8_t lock;
 	int ret;
Index: flashrom-struct_flashctx_everywhere_new/sst49lfxxxc.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/sst49lfxxxc.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/sst49lfxxxc.c	(Arbeitskopie)
@@ -23,11 +23,14 @@
 #include "flash.h"
 #include "chipdrivers.h"
 
-static int write_lockbits_block_49lfxxxc(struct flashctx *flash, unsigned long address, unsigned char bits)
+static int write_lockbits_block_49lfxxxc(struct flashctx *flash,
+					 unsigned long address,
+					 unsigned char bits)
 {
 	unsigned long lock = flash->virtual_registers + address + 2;
-	msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock));
-	chip_writeb(bits, lock);
+	msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock,
+		 chip_readb(flash, lock));
+	chip_writeb(flash, bits, lock);
 
 	return 0;
 }
@@ -59,13 +62,14 @@
 	return write_lockbits_49lfxxxc(flash, 0);
 }
 
-int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address,
+			  unsigned int sector_size)
 {
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(0x30, bios);
-	chip_writeb(0xD0, bios + address);
+	chip_writeb(flash, 0x30, bios);
+	chip_writeb(flash, 0xD0, bios + address);
 
 	status = wait_82802ab(flash);
 	print_status_82802ab(status);
Index: flashrom-struct_flashctx_everywhere_new/sharplhf00l04.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/sharplhf00l04.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/sharplhf00l04.c	(Arbeitskopie)
@@ -26,25 +26,26 @@
  * FIXME: This file is unused.
  */
 
-int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
+int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr,
+			 unsigned int blocklen)
 {
 	chipaddr bios = flash->virtual_memory + blockaddr;
 	chipaddr wrprotect = flash->virtual_registers + blockaddr + 2;
 	uint8_t status;
 
 	// clear status register
-	chip_writeb(0x50, bios);
+	chip_writeb(flash, 0x50, bios);
 	status = wait_82802ab(flash);
 	print_status_82802ab(status);
 	// clear write protect
 	msg_cspew("write protect is at 0x%lx\n", (wrprotect));
-	msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect));
-	chip_writeb(0, wrprotect);
-	msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect));
+	msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect));
+	chip_writeb(flash, 0, wrprotect);
+	msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect));
 
 	// now start it
-	chip_writeb(0x20, bios);
-	chip_writeb(0xd0, bios);
+	chip_writeb(flash, 0x20, bios);
+	chip_writeb(flash, 0xd0, bios);
 	programmer_delay(10);
 	// now let's see what the register is
 	status = wait_82802ab(flash);
Index: flashrom-struct_flashctx_everywhere_new/a25.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/a25.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/a25.c	(Arbeitskopie)
@@ -33,7 +33,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);
@@ -49,7 +49,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);
@@ -64,7 +64,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);
@@ -82,7 +82,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);
Index: flashrom-struct_flashctx_everywhere_new/satamv.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/satamv.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/satamv.c	(Arbeitskopie)
@@ -41,6 +41,10 @@
 #define PCI_BAR2_CONTROL		0x00c08
 #define GPIO_PORT_CONTROL		0x104f0
 
+static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr);
+static uint8_t satamv_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr);
 static const struct par_programmer par_programmer_satamv = {
 		.chip_readb		= satamv_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -183,13 +187,15 @@
 }
 
 /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */
-void satamv_chip_writeb(uint8_t val, chipaddr addr)
+static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr)
 {
 	satamv_indirect_chip_writeb(val, addr);
 }
 
 /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */
-uint8_t satamv_chip_readb(const chipaddr addr)
+static uint8_t satamv_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	return satamv_indirect_chip_readb(addr);
 }
Index: flashrom-struct_flashctx_everywhere_new/dummyflasher.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/dummyflasher.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/dummyflasher.c	(Arbeitskopie)
@@ -60,10 +60,28 @@
 
 static unsigned int spi_write_256_chunksize = 256;
 
-static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr);
+static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr);
 static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len);
+static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
+			      chipaddr addr);
+static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
+			      chipaddr addr);
+static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
+			      chipaddr addr);
+static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
+			      chipaddr addr, size_t len);
+static uint8_t dummy_chip_readb(const struct flashctx *flash,
+				const chipaddr addr);
+static uint16_t dummy_chip_readw(const struct flashctx *flash,
+				 const chipaddr addr);
+static uint32_t dummy_chip_readl(const struct flashctx *flash,
+				 const chipaddr addr);
+static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			     const chipaddr addr, size_t len);
 
 static const struct spi_programmer spi_programmer_dummyflasher = {
 	.type		= SPI_CONTROLLER_DUMMY,
@@ -263,22 +281,26 @@
 		  __func__, (unsigned long)len, virt_addr);
 }
 
-void dummy_chip_writeb(uint8_t val, chipaddr addr)
+static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
+			      chipaddr addr)
 {
 	msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val);
 }
 
-void dummy_chip_writew(uint16_t val, chipaddr addr)
+static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
+			      chipaddr addr)
 {
 	msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val);
 }
 
-void dummy_chip_writel(uint32_t val, chipaddr addr)
+static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
+			      chipaddr addr)
 {
 	msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val);
 }
 
-void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len)
+static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
+			      chipaddr addr, size_t len)
 {
 	size_t i;
 	msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):",
@@ -290,25 +312,29 @@
 	}
 }
 
-uint8_t dummy_chip_readb(const chipaddr addr)
+static uint8_t dummy_chip_readb(const struct flashctx *flash,
+				const chipaddr addr)
 {
 	msg_pspew("%s:  addr=0x%lx, returning 0xff\n", __func__, addr);
 	return 0xff;
 }
 
-uint16_t dummy_chip_readw(const chipaddr addr)
+static uint16_t dummy_chip_readw(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	msg_pspew("%s:  addr=0x%lx, returning 0xffff\n", __func__, addr);
 	return 0xffff;
 }
 
-uint32_t dummy_chip_readl(const chipaddr addr)
+static uint32_t dummy_chip_readl(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	msg_pspew("%s:  addr=0x%lx, returning 0xffffffff\n", __func__, addr);
 	return 0xffffffff;
 }
 
-void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len)
+static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			     const chipaddr addr, size_t len)
 {
 	msg_pspew("%s:  addr=0x%lx, len=0x%lx, returning array of 0xff\n",
 		  __func__, addr, (unsigned long)len);
@@ -317,8 +343,10 @@
 }
 
 #if EMULATE_SPI_CHIP
-static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int emulate_spi_chip_response(unsigned int writecnt,
+				     unsigned int readcnt,
+				     const unsigned char *writearr,
+				     unsigned char *readarr)
 {
 	unsigned int offs;
 	static int unsigned aai_offs;
@@ -513,8 +541,10 @@
 }
 #endif
 
-static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr)
 {
 	int i;
 
Index: flashrom-struct_flashctx_everywhere_new/sst_fwhub.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/sst_fwhub.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/sst_fwhub.c	(Arbeitskopie)
@@ -29,7 +29,7 @@
 	chipaddr registers = flash->virtual_registers;
 	uint8_t blockstatus;
 
-	blockstatus = chip_readb(registers + offset + 2);
+	blockstatus = chip_readb(flash, registers + offset + 2);
 	msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ",
 		     offset, flash->page_size, blockstatus);
 	switch (blockstatus & 0x3) {
@@ -59,7 +59,7 @@
 
 	if (blockstatus) {
 		msg_cdbg("Trying to clear lock for 0x%06x... ", offset);
-		chip_writeb(0, registers + offset + 2);
+		chip_writeb(flash, 0, registers + offset + 2);
 
 		blockstatus = check_sst_fwhub_block_lock(flash, offset);
 		msg_cdbg("%s\n", (blockstatus) ? "failed" : "OK");
Index: flashrom-struct_flashctx_everywhere_new/at25.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/at25.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/at25.c	(Arbeitskopie)
@@ -61,7 +61,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_atmel_at25_srpl(status);
@@ -84,7 +84,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_atmel_at25_srpl(status);
@@ -103,7 +103,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
@@ -127,7 +127,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
@@ -151,7 +151,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_atmel_at25_srpl(status);
@@ -168,7 +168,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & (3 << 2)) == 0)
 		return 0;
@@ -195,7 +195,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & (3 << 2)) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
@@ -223,7 +223,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & 0x6c) == 0)
 		return 0;
@@ -244,7 +244,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & 0x6c) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
@@ -257,7 +257,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & 0x7c) == 0)
 		return 0;
@@ -278,7 +278,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & 0x7c) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
Index: flashrom-struct_flashctx_everywhere_new/internal.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/internal.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/internal.c	(Arbeitskopie)
@@ -127,6 +127,20 @@
 int is_laptop = 0;
 int laptop_ok = 0;
 
+static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr);
+static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
+				 chipaddr addr);
+static void internal_chip_writel(const struct flashctx *flash, uint32_t val,
+				 chipaddr addr);
+static uint8_t internal_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr);
+static uint16_t internal_chip_readw(const struct flashctx *flash,
+				    const chipaddr addr);
+static uint32_t internal_chip_readl(const struct flashctx *flash,
+				    const chipaddr addr);
+static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
+				const chipaddr addr, size_t len);
 static const struct par_programmer par_programmer_internal = {
 		.chip_readb		= internal_chip_readb,
 		.chip_readw		= internal_chip_readw,
@@ -324,37 +338,44 @@
 }
 #endif
 
-void internal_chip_writeb(uint8_t val, chipaddr addr)
+static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr)
 {
 	mmio_writeb(val, (void *) addr);
 }
 
-void internal_chip_writew(uint16_t val, chipaddr addr)
+static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
+				 chipaddr addr)
 {
 	mmio_writew(val, (void *) addr);
 }
 
-void internal_chip_writel(uint32_t val, chipaddr addr)
+static void internal_chip_writel(const struct flashctx *flash, uint32_t val,
+				 chipaddr addr)
 {
 	mmio_writel(val, (void *) addr);
 }
 
-uint8_t internal_chip_readb(const chipaddr addr)
+static uint8_t internal_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr)
 {
 	return mmio_readb((void *) addr);
 }
 
-uint16_t internal_chip_readw(const chipaddr addr)
+static uint16_t internal_chip_readw(const struct flashctx *flash,
+				    const chipaddr addr)
 {
 	return mmio_readw((void *) addr);
 }
 
-uint32_t internal_chip_readl(const chipaddr addr)
+static uint32_t internal_chip_readl(const struct flashctx *flash,
+				    const chipaddr addr)
 {
 	return mmio_readl((void *) addr);
 }
 
-void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len)
+static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
+				const chipaddr addr, size_t len)
 {
 	memcpy(buf, (void *)addr, len);
 	return;
Index: flashrom-struct_flashctx_everywhere_new/ichspi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/ichspi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/ichspi.c	(Arbeitskopie)
@@ -228,7 +228,7 @@
 static int find_preop(OPCODES *op, uint8_t preop);
 static int generate_opcodes(OPCODES * op);
 static int program_opcodes(OPCODES *op, int enable_undo);
-static int run_opcode(OPCODE op, uint32_t offset,
+static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset,
 		      uint8_t datalength, uint8_t * data);
 
 /* for pairing opcodes with their required preop */
@@ -638,7 +638,7 @@
  * Note that using len > spi_programmer->max_data_read will return garbage or
  * may even crash.
  */
- static void ich_read_data(uint8_t *data, int len, int reg0_off)
+static void ich_read_data(uint8_t *data, int len, int reg0_off)
  {
 	int i;
 	uint32_t temp32 = 0;
@@ -956,7 +956,7 @@
 	return 0;
 }
 
-static int run_opcode(OPCODE op, uint32_t offset,
+static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset,
 		      uint8_t datalength, uint8_t * data)
 {
 	/* max_data_read == max_data_write for all Intel/VIA SPI masters */
@@ -983,8 +983,10 @@
 	}
 }
 
-static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		    const unsigned char *writearr, unsigned char *readarr)
+static int ich_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				unsigned int readcnt,
+				const unsigned char *writearr,
+				unsigned char *readarr)
 {
 	int result;
 	int opcode_index = -1;
@@ -1076,7 +1078,7 @@
 		count = readcnt;
 	}
 
-	result = run_opcode(*opcode, addr, count, data);
+	result = run_opcode(flash, *opcode, addr, count, data);
 	if (result) {
 		msg_pdbg("Running OPCODE 0x%02x failed ", opcode->opcode);
 		if ((opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) ||
@@ -1175,7 +1177,7 @@
 	return 0;
 }
 
-int ich_hwseq_probe(struct flashctx *flash)
+static int ich_hwseq_probe(struct flashctx *flash)
 {
 	uint32_t total_size, boundary;
 	uint32_t erase_size_low, size_low, erase_size_high, size_high;
@@ -1228,9 +1230,8 @@
 	return 1;
 }
 
-int ich_hwseq_block_erase(struct flashctx *flash,
-			  unsigned int addr,
-			  unsigned int len)
+static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr,
+				 unsigned int len)
 {
 	uint32_t erase_block;
 	uint16_t hsfc;
@@ -1278,8 +1279,8 @@
 	return 0;
 }
 
-int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, unsigned int addr,
-		   unsigned int len)
+static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
+			  unsigned int addr, unsigned int len)
 {
 	uint16_t hsfc;
 	uint16_t timeout = 100 * 60;
@@ -1316,8 +1317,8 @@
 	return 0;
 }
 
-int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, unsigned int addr,
-		    unsigned int len)
+static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf,
+			   unsigned int addr, unsigned int len)
 {
 	uint16_t hsfc;
 	uint16_t timeout = 100 * 60;
@@ -1355,7 +1356,8 @@
 	return 0;
 }
 
-static int ich_spi_send_multicommand(struct spi_command *cmds)
+static int ich_spi_send_multicommand(struct flashctx *flash,
+				     struct spi_command *cmds)
 {
 	int ret = 0;
 	int i;
@@ -1405,7 +1407,7 @@
 			 * preoppos matched, this is a normal opcode.
 			 */
 		}
-		ret = ich_spi_send_command(cmds->writecnt, cmds->readcnt,
+		ret = ich_spi_send_command(flash, cmds->writecnt, cmds->readcnt,
 					   cmds->writearr, cmds->readarr);
 		/* Reset the type of all opcodes to non-atomic. */
 		for (i = 0; i < 8; i++)
Index: flashrom-struct_flashctx_everywhere_new/82802ab.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/82802ab.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/82802ab.c	(Arbeitskopie)
@@ -47,18 +47,18 @@
 	int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0;
 
 	/* Reset to get a clean state */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 	programmer_delay(10);
 
 	/* Enter ID mode */
-	chip_writeb(0x90, bios);
+	chip_writeb(flash, 0x90, bios);
 	programmer_delay(10);
 
-	id1 = chip_readb(bios + (0x00 << shifted));
-	id2 = chip_readb(bios + (0x01 << shifted));
+	id1 = chip_readb(flash, bios + (0x00 << shifted));
+	id2 = chip_readb(flash, bios + (0x01 << shifted));
 
 	/* Leave ID mode */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	programmer_delay(10);
 
@@ -71,8 +71,8 @@
 	 * Read the product ID location again. We should now see normal
 	 * flash contents.
 	 */
-	flashcontent1 = chip_readb(bios + (0x00 << shifted));
-	flashcontent2 = chip_readb(bios + (0x01 << shifted));
+	flashcontent1 = chip_readb(flash, bios + (0x00 << shifted));
+	flashcontent2 = chip_readb(flash, bios + (0x01 << shifted));
 
 	if (id1 == flashcontent1)
 		msg_cdbg(", id1 is normal flash content");
@@ -94,15 +94,15 @@
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(0x70, bios);
-	if ((chip_readb(bios) & 0x80) == 0) {	// it's busy
-		while ((chip_readb(bios) & 0x80) == 0) ;
+	chip_writeb(flash, 0x70, bios);
+	if ((chip_readb(flash, bios) & 0x80) == 0) {	// it's busy
+		while ((chip_readb(flash, bios) & 0x80) == 0) ;
 	}
 
-	status = chip_readb(bios);
+	status = chip_readb(flash, bios);
 
 	/* Reset to get a clean state */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	return status;
 }
@@ -113,7 +113,7 @@
 	//chipaddr wrprotect = flash->virtual_registers + page + 2;
 
 	for (i = 0; i < flash->total_size * 1024; i+= flash->page_size)
-		chip_writeb(0, flash->virtual_registers + i + 2);
+		chip_writeb(flash, 0, flash->virtual_registers + i + 2);
 
 	return 0;
 }
@@ -125,11 +125,11 @@
 	uint8_t status;
 
 	// clear status register
-	chip_writeb(0x50, bios + page);
+	chip_writeb(flash, 0x50, bios + page);
 
 	// now start it
-	chip_writeb(0x20, bios + page);
-	chip_writeb(0xd0, bios + page);
+	chip_writeb(flash, 0x20, bios + page);
+	chip_writeb(flash, 0xd0, bios + page);
 	programmer_delay(10);
 
 	// now let's see what the register is
@@ -141,15 +141,16 @@
 }
 
 /* chunksize is 1 */
-int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start,
+		  unsigned int len)
 {
 	int i;
 	chipaddr dst = flash->virtual_memory + start;
 
 	for (i = 0; i < len; i++) {
 		/* transfer data from source to destination */
-		chip_writeb(0x40, dst);
-		chip_writeb(*src++, dst++);
+		chip_writeb(flash, 0x40, dst);
+		chip_writeb(flash, *src++, dst++);
 		wait_82802ab(flash);
 	}
 
@@ -164,13 +165,13 @@
 	int i;
 
 	/* Clear status register */
-	chip_writeb(0x50, bios);
+	chip_writeb(flash, 0x50, bios);
 
 	/* Read identifier codes */
-	chip_writeb(0x90, bios);
+	chip_writeb(flash, 0x90, bios);
 
 	/* Read master lock-bit */
-	mcfg = chip_readb(bios + 0x3);
+	mcfg = chip_readb(flash, bios + 0x3);
 	msg_cdbg("master lock is ");
 	if (mcfg) {
 		msg_cdbg("locked!\n");
@@ -181,7 +182,7 @@
 
 	/* Read block lock-bits */
 	for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) {
-		bcfg = chip_readb(bios + i + 2); // read block lock config
+		bcfg = chip_readb(flash, bios + i + 2); // read block lock config
 		msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un");
 		if (bcfg) {
 			need_unlock = 1;
@@ -189,14 +190,14 @@
 	}
 
 	/* Reset chip */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	/* Unlock: clear block lock-bits, if needed */
 	if (can_unlock && need_unlock) {
 		msg_cdbg("Unlock: ");
-		chip_writeb(0x60, bios);
-		chip_writeb(0xD0, bios);
-		chip_writeb(0xFF, bios);
+		chip_writeb(flash, 0x60, bios);
+		chip_writeb(flash, 0xD0, bios);
+		chip_writeb(flash, 0xFF, bios);
 		msg_cdbg("Done!\n");
 	}
 
@@ -220,10 +221,10 @@
 	wait_82802ab(flash);
 
 	/* Read identifier codes */
-	chip_writeb(0x90, bios);
+	chip_writeb(flash, 0x90, bios);
 
 	/* Read master lock-bit */
-	mcfg = chip_readb(bios + 0x3);
+	mcfg = chip_readb(flash, bios + 0x3);
 	msg_cdbg("master lock is ");
 	if (mcfg) {
 		msg_cdbg("locked!\n");
@@ -235,7 +236,7 @@
 	/* Read block lock-bits, 8 * 8 KB + 15 * 64 KB */
 	for (i = 0; i < flash->total_size * 1024;
 	     i += (i >= (64 * 1024) ? 64 * 1024 : 8 * 1024)) {
-		bcfg = chip_readb(bios + i + 2); /* read block lock config */
+		bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */
 		msg_cdbg("block lock at %06x is %slocked!\n", i,
 			 bcfg ? "" : "un");
 		if (bcfg)
@@ -243,14 +244,14 @@
 	}
 
 	/* Reset chip */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	/* Unlock: clear block lock-bits, if needed */
 	if (can_unlock && need_unlock) {
 		msg_cdbg("Unlock: ");
-		chip_writeb(0x60, bios);
-		chip_writeb(0xD0, bios);
-		chip_writeb(0xFF, bios);
+		chip_writeb(flash, 0x60, bios);
+		chip_writeb(flash, 0xD0, bios);
+		chip_writeb(flash, 0xFF, bios);
 		wait_82802ab(flash);
 		msg_cdbg("Done!\n");
 	}
Index: flashrom-struct_flashctx_everywhere_new/nicnatsemi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/nicnatsemi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/nicnatsemi.c	(Arbeitskopie)
@@ -35,6 +35,10 @@
 	{},
 };
 
+static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr);
+static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr);
 static const struct par_programmer par_programmer_nicnatsemi = {
 		.chip_readb		= nicnatsemi_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -74,7 +78,8 @@
 	return 0;
 }
 
-void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr)
+static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr)
 {
 	OUTL((uint32_t)addr & 0x0001FFFF, io_base_addr + BOOT_ROM_ADDR);
 	/*
@@ -88,7 +93,8 @@
 	OUTB(val, io_base_addr + BOOT_ROM_DATA);
 }
 
-uint8_t nicnatsemi_chip_readb(const chipaddr addr)
+static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr)
 {
 	OUTL(((uint32_t)addr & 0x0001FFFF), io_base_addr + BOOT_ROM_ADDR);
 	/*
Index: flashrom-struct_flashctx_everywhere_new/dediprog.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/dediprog.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/dediprog.c	(Arbeitskopie)
@@ -317,8 +317,11 @@
 	return ret;
 }
 
-static int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr)
+static int dediprog_spi_send_command(struct flashctx *flash,
+				     unsigned int writecnt,
+				     unsigned int readcnt,
+				     const unsigned char *writearr,
+				     unsigned char *readarr)
 {
 	int ret;
 
Index: flashrom-struct_flashctx_everywhere_new/spi25.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/spi25.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/spi25.c	(Arbeitskopie)
@@ -29,13 +29,13 @@
 #include "programmer.h"
 #include "spi.h"
 
-static int spi_rdid(unsigned char *readarr, int bytes)
+static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes)
 {
 	static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
 	int ret;
 	int i;
 
-	ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
 	if (ret)
 		return ret;
 	msg_cspew("RDID returned");
@@ -45,20 +45,22 @@
 	return 0;
 }
 
-static int spi_rems(unsigned char *readarr)
+static int spi_rems(struct flashctx *flash, unsigned char *readarr)
 {
 	unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 };
 	uint32_t readaddr;
 	int ret;
 
-	ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, cmd,
+			       readarr);
 	if (ret == SPI_INVALID_ADDRESS) {
 		/* Find the lowest even address allowed for reads. */
-		readaddr = (spi_get_valid_read_addr() + 1) & ~1;
+		readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1;
 		cmd[1] = (readaddr >> 16) & 0xff,
 		cmd[2] = (readaddr >> 8) & 0xff,
 		cmd[3] = (readaddr >> 0) & 0xff,
-		ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
+		ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE,
+				       cmd, readarr);
 	}
 	if (ret)
 		return ret;
@@ -66,21 +68,21 @@
 	return 0;
 }
 
-static int spi_res(unsigned char *readarr, int bytes)
+static int spi_res(struct flashctx *flash, unsigned char *readarr, int bytes)
 {
 	unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 };
 	uint32_t readaddr;
 	int ret;
 	int i;
 
-	ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
 	if (ret == SPI_INVALID_ADDRESS) {
 		/* Find the lowest even address allowed for reads. */
-		readaddr = (spi_get_valid_read_addr() + 1) & ~1;
+		readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1;
 		cmd[1] = (readaddr >> 16) & 0xff,
 		cmd[2] = (readaddr >> 8) & 0xff,
 		cmd[3] = (readaddr >> 0) & 0xff,
-		ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
+		ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
 	}
 	if (ret)
 		return ret;
@@ -91,13 +93,13 @@
 	return 0;
 }
 
-int spi_write_enable(void)
+int spi_write_enable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN };
 	int result;
 
 	/* Send WREN (Write Enable) */
-	result = spi_send_command(sizeof(cmd), 0, cmd, NULL);
+	result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
 
 	if (result)
 		msg_cerr("%s failed\n", __func__);
@@ -105,12 +107,12 @@
 	return result;
 }
 
-int spi_write_disable(void)
+int spi_write_disable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI };
 
 	/* Send WRDI (Write Disable) */
-	return spi_send_command(sizeof(cmd), 0, cmd, NULL);
+	return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
 }
 
 static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
@@ -119,7 +121,7 @@
 	uint32_t id1;
 	uint32_t id2;
 
-	if (spi_rdid(readarr, bytes)) {
+	if (spi_rdid(flash, readarr, bytes)) {
 		return 0;
 	}
 
@@ -199,7 +201,7 @@
 	unsigned char readarr[JEDEC_REMS_INSIZE];
 	uint32_t id1, id2;
 
-	if (spi_rems(readarr)) {
+	if (spi_rems(flash, readarr)) {
 		return 0;
 	}
 
@@ -242,7 +244,7 @@
 	/* Check if RDID is usable and does not return 0xff 0xff 0xff or
 	 * 0x00 0x00 0x00. In that case, RES is pointless.
 	 */
-	if (!spi_rdid(readarr, 3) && memcmp(readarr, allff, 3) &&
+	if (!spi_rdid(flash, readarr, 3) && memcmp(readarr, allff, 3) &&
 	    memcmp(readarr, all00, 3)) {
 		msg_cdbg("Ignoring RES in favour of RDID.\n");
 		return 0;
@@ -250,13 +252,14 @@
 	/* Check if REMS is usable and does not return 0xff 0xff or
 	 * 0x00 0x00. In that case, RES is pointless.
 	 */
-	if (!spi_rems(readarr) && memcmp(readarr, allff, JEDEC_REMS_INSIZE) &&
+	if (!spi_rems(flash, readarr) &&
+	    memcmp(readarr, allff, JEDEC_REMS_INSIZE) &&
 	    memcmp(readarr, all00, JEDEC_REMS_INSIZE)) {
 		msg_cdbg("Ignoring RES in favour of REMS.\n");
 		return 0;
 	}
 
-	if (spi_res(readarr, 1)) {
+	if (spi_res(flash, readarr, 1)) {
 		return 0;
 	}
 
@@ -279,7 +282,7 @@
 	unsigned char readarr[2];
 	uint32_t id1, id2;
 
-	if (spi_res(readarr, 2)) {
+	if (spi_res(flash, readarr, 2)) {
 		return 0;
 	}
 
@@ -298,7 +301,7 @@
 	return 1;
 }
 
-uint8_t spi_read_status_register(void)
+uint8_t spi_read_status_register(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
 	/* FIXME: No workarounds for driver/hardware bugs in generic code. */
@@ -306,7 +309,8 @@
 	int ret;
 
 	/* Read Status Register */
-	ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd,
+			       readarr);
 	if (ret)
 		msg_cerr("RDSR failed!\n");
 
@@ -414,7 +418,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 	switch (flash->manufacture_id) {
 	case ST_ID:
@@ -465,7 +469,7 @@
 		.readarr	= NULL,
 	}};
 	
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n",
 			__func__);
@@ -475,7 +479,7 @@
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
 	/* FIXME: We assume spi_read_status_register will never fail. */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(1000 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -502,7 +506,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n", __func__);
 		return result;
@@ -511,13 +515,14 @@
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
 	/* FIXME: We assume spi_read_status_register will never fail. */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(1000 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -543,7 +548,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -552,7 +557,7 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -563,7 +568,8 @@
  * 32k for SST
  * 4-32k non-uniform for EON
  */
-int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d8(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -589,7 +595,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -598,7 +604,7 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -607,7 +613,8 @@
 /* Block size is usually
  * 4k for PMC
  */
-int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d7(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -633,7 +640,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -642,14 +649,15 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 /* Sector size is usually 4k, though Macronix eliteflash has 64k */
-int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_20(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -675,7 +683,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -684,13 +692,14 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 15-800 ms, so wait in 10 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(10 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -700,7 +709,8 @@
 	return spi_chip_erase_60(flash);
 }
 
-int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -710,13 +720,13 @@
 	return spi_chip_erase_c7(flash);
 }
 
-int spi_write_status_enable(void)
+int spi_write_status_enable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
 	int result;
 
 	/* Send EWSR (Enable Write Status Register). */
-	result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
+	result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
 
 	if (result)
 		msg_cerr("%s failed\n", __func__);
@@ -751,7 +761,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n",
 			__func__);
@@ -766,7 +776,7 @@
 	 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
 	 */
 	programmer_delay(100 * 1000);
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) {
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) {
 		if (++i > 490) {
 			msg_cerr("Error: WIP bit after WRSR never cleared\n");
 			return TIMEOUT_ERROR;
@@ -799,7 +809,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n",
 			__func__);
@@ -814,7 +824,7 @@
 	 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
 	 */
 	programmer_delay(100 * 1000);
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) {
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) {
 		if (++i > 490) {
 			msg_cerr("Error: WIP bit after WRSR never cleared\n");
 			return TIMEOUT_ERROR;
@@ -840,7 +850,8 @@
 	return ret;
 }
 
-int spi_byte_program(unsigned int addr, uint8_t databyte)
+int spi_byte_program(struct flashctx *flash, unsigned int addr,
+		     uint8_t databyte)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -867,7 +878,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -875,7 +886,8 @@
 	return result;
 }
 
-int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len)
+int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes,
+		      unsigned int len)
 {
 	int result;
 	/* FIXME: Switch to malloc based on len unless that kills speed. */
@@ -914,7 +926,7 @@
 
 	memcpy(&cmd[4], bytes, len);
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -931,7 +943,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & 0x3c) == 0)
 		return 0;
@@ -942,7 +954,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & 0x3c) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
@@ -950,7 +962,8 @@
 	return 0;
 }
 
-int spi_nbyte_read(unsigned int address, uint8_t *bytes, unsigned int len)
+int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes,
+		   unsigned int len)
 {
 	const unsigned char cmd[JEDEC_READ_OUTSIZE] = {
 		JEDEC_READ,
@@ -960,7 +973,7 @@
 	};
 
 	/* Send Read */
-	return spi_send_command(sizeof(cmd), len, cmd, bytes);
+	return spi_send_command(flash, sizeof(cmd), len, cmd, bytes);
 }
 
 /*
@@ -968,7 +981,8 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is read separately in chunks with a maximum size of chunksize.
  */
-int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		     unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, toread;
@@ -991,7 +1005,7 @@
 		lenhere = min(start + len, (i + 1) * page_size) - starthere;
 		for (j = 0; j < lenhere; j += chunksize) {
 			toread = min(chunksize, lenhere - j);
-			rc = spi_nbyte_read(starthere + j, buf + starthere - start + j, toread);
+			rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread);
 			if (rc)
 				break;
 		}
@@ -1007,7 +1021,8 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		      unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, towrite;
@@ -1035,10 +1050,10 @@
 		lenhere = min(start + len, (i + 1) * page_size) - starthere;
 		for (j = 0; j < lenhere; j += chunksize) {
 			towrite = min(chunksize, lenhere - j);
-			rc = spi_nbyte_program(starthere + j, buf + starthere - start + j, towrite);
+			rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite);
 			if (rc)
 				break;
-			while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+			while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 				programmer_delay(10);
 		}
 		if (rc)
@@ -1055,23 +1070,25 @@
  * (e.g. due to size constraints in IT87* for over 512 kB)
  */
 /* real chunksize is 1, logical chunksize is 1 */
-int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		     unsigned int len)
 {
 	unsigned int i;
 	int result = 0;
 
 	for (i = start; i < start + len; i++) {
-		result = spi_byte_program(i, buf[i - start]);
+		result = spi_byte_program(flash, i, buf[i - start]);
 		if (result)
 			return 1;
-		while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 			programmer_delay(10);
 	}
 
 	return 0;
 }
 
-int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		  unsigned int len)
 {
 	uint32_t pos = start;
 	int result;
@@ -1149,7 +1166,7 @@
 	}
 
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during start command execution\n",
 			 __func__);
@@ -1158,7 +1175,7 @@
 		 */
 		return result;
 	}
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(10);
 
 	/* We already wrote 2 bytes in the multicommand step. */
@@ -1168,15 +1185,16 @@
 	while (pos < start + len - 1) {
 		cmd[1] = buf[pos++ - start];
 		cmd[2] = buf[pos++ - start];
-		spi_send_command(JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL);
-		while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0,
+				 cmd, NULL);
+		while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 			programmer_delay(10);
 	}
 
 	/* Use WRDI to exit AAI mode. This needs to be done before issuing any
 	 * other non-AAI command.
 	 */
-	spi_write_disable();
+	spi_write_disable(flash);
 
 	/* Write remaining byte (if any). */
 	if (pos < start + len) {
Index: flashrom-struct_flashctx_everywhere_new/pm49fl00x.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/pm49fl00x.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/pm49fl00x.c	(Arbeitskopie)
@@ -22,28 +22,32 @@
 
 #include "flash.h"
 
-static void write_lockbits_49fl00x(chipaddr bios, unsigned int size,
-			    unsigned char bits, unsigned int block_size)
+static void write_lockbits_49fl00x(const struct flashctx *flash,
+				   unsigned int size, unsigned char bits,
+				   unsigned int block_size)
 {
 	unsigned int i, left = size;
+	chipaddr bios = flash->virtual_registers;
 
 	for (i = 0; left >= block_size; i++, left -= block_size) {
 		/* pm49fl002 */
 		if (block_size == 16384 && i % 2)
 			continue;
 
-		chip_writeb(bits, bios + (i * block_size) + 2);
+		chip_writeb(flash, bits, bios + (i * block_size) + 2);
 	}
 }
 
 int unlock_49fl00x(struct flashctx *flash)
 {
-	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 0, flash->page_size);
+	write_lockbits_49fl00x(flash, flash->total_size * 1024, 0,
+			       flash->page_size);
 	return 0;
 }
 
 int lock_49fl00x(struct flashctx *flash)
 {
-	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size);
+	write_lockbits_49fl00x(flash, flash->total_size * 1024, 1,
+			       flash->page_size);
 	return 0;
 }
Index: flashrom-struct_flashctx_everywhere_new/it85spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/it85spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/it85spi.c	(Arbeitskopie)
@@ -270,8 +270,10 @@
 	return 0;
 }
 
-static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr);
+static int it85xx_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_it85xx = {
 	.type		= SPI_CONTROLLER_IT85XX,
@@ -320,8 +322,10 @@
  *   3. read date from LPC/FWH address 0xffff_fdxxh (drive CE# low and get
  *      data from MISO)
  */
-static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr)
+static int it85xx_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr)
 {
 	int i;
 
Index: flashrom-struct_flashctx_everywhere_new/buspirate_spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/buspirate_spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/buspirate_spi.c	(Arbeitskopie)
@@ -86,8 +86,11 @@
 	return 0;
 }
 
-static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
+static int buspirate_spi_send_command(struct flashctx *flash,
+				      unsigned int writecnt,
+				      unsigned int readcnt,
+				      const unsigned char *writearr,
+				      unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_buspirate = {
 	.type		= SPI_CONTROLLER_BUSPIRATE,
@@ -291,8 +294,11 @@
 	return 0;
 }
 
-static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+static int buspirate_spi_send_command(struct flashctx *flash,
+				      unsigned int writecnt,
+				      unsigned int readcnt,
+				      const unsigned char *writearr,
+				      unsigned char *readarr)
 {
 	static unsigned char *buf = NULL;
 	unsigned int i = 0;
Index: flashrom-struct_flashctx_everywhere_new/linux_spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/linux_spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/linux_spi.c	(Arbeitskopie)
@@ -34,8 +34,10 @@
 static int fd = -1;
 
 static int linux_spi_shutdown(void *data);
-static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *txbuf, unsigned char *rxbuf);
+static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *txbuf,
+				  unsigned char *rxbuf);
 static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len);
 static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
@@ -107,8 +109,10 @@
 	return 0;
 }
 
-static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *txbuf, unsigned char *rxbuf)
+static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *txbuf,
+				  unsigned char *rxbuf)
 {
 	struct spi_ioc_transfer msg[2] = {
 		{
@@ -134,11 +138,13 @@
 static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len)
 {
-	return spi_read_chunked(flash, buf, start, len, (unsigned)getpagesize());
+	return spi_read_chunked(flash, buf, start, len,
+				(unsigned int)getpagesize());
 }
 
 static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len)
 {
-	return spi_write_chunked(flash, buf, start, len, ((unsigned)getpagesize()) - 4);
+	return spi_write_chunked(flash, buf, start, len,
+				((unsigned int)getpagesize()) - 4);
 }
Index: flashrom-struct_flashctx_everywhere_new/w29ee011.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/w29ee011.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/w29ee011.c	(Arbeitskopie)
@@ -38,29 +38,29 @@
 	}
 
 	/* Issue JEDEC Product ID Entry command */
-	chip_writeb(0xAA, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
 	programmer_delay(10);
-	chip_writeb(0x80, bios + 0x5555);
+	chip_writeb(flash, 0x80, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0xAA, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
 	programmer_delay(10);
-	chip_writeb(0x60, bios + 0x5555);
+	chip_writeb(flash, 0x60, bios + 0x5555);
 	programmer_delay(10);
 
 	/* Read product ID */
-	id1 = chip_readb(bios);
-	id2 = chip_readb(bios + 0x01);
+	id1 = chip_readb(flash, bios);
+	id2 = chip_readb(flash, bios + 0x01);
 
 	/* Issue JEDEC Product ID Exit command */
-	chip_writeb(0xAA, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
 	programmer_delay(10);
-	chip_writeb(0xF0, bios + 0x5555);
+	chip_writeb(flash, 0xF0, bios + 0x5555);
 	programmer_delay(10);
 
 	msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Index: flashrom-struct_flashctx_everywhere_new/atahpt.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/atahpt.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/atahpt.c	(Arbeitskopie)
@@ -40,6 +40,10 @@
 	{},
 };
 
+static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr);
+static uint8_t atahpt_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr);
 static const struct par_programmer par_programmer_atahpt = {
 		.chip_readb		= atahpt_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -80,13 +84,15 @@
 	return 0;
 }
 
-void atahpt_chip_writeb(uint8_t val, chipaddr addr)
+static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	OUTB(val, io_base_addr + BIOS_ROM_DATA);
 }
 
-uint8_t atahpt_chip_readb(const chipaddr addr)
+static uint8_t atahpt_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	return INB(io_base_addr + BIOS_ROM_DATA);
Index: flashrom-struct_flashctx_everywhere_new/spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/spi.c	(Arbeitskopie)
@@ -42,8 +42,9 @@
 
 const struct spi_programmer *spi_programmer = &spi_programmer_none;
 
-int spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+int spi_send_command(struct flashctx *flash, unsigned int writecnt,
+		     unsigned int readcnt, const unsigned char *writearr,
+		     unsigned char *readarr)
 {
 	if (!spi_programmer->command) {
 		msg_perr("%s called, but SPI is unsupported on this "
@@ -52,11 +53,11 @@
 		return 1;
 	}
 
-	return spi_programmer->command(writecnt, readcnt,
-						      writearr, readarr);
+	return spi_programmer->command(flash, writecnt, readcnt, writearr,
+				       readarr);
 }
 
-int spi_send_multicommand(struct spi_command *cmds)
+int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds)
 {
 	if (!spi_programmer->multicommand) {
 		msg_perr("%s called, but SPI is unsupported on this "
@@ -65,11 +66,13 @@
 		return 1;
 	}
 
-	return spi_programmer->multicommand(cmds);
+	return spi_programmer->multicommand(flash, cmds);
 }
 
-int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			     const unsigned char *writearr, unsigned char *readarr)
+int default_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+			     unsigned int readcnt,
+			     const unsigned char *writearr,
+			     unsigned char *readarr)
 {
 	struct spi_command cmd[] = {
 	{
@@ -84,20 +87,22 @@
 		.readarr = NULL,
 	}};
 
-	return spi_send_multicommand(cmd);
+	return spi_send_multicommand(flash, cmd);
 }
 
-int default_spi_send_multicommand(struct spi_command *cmds)
+int default_spi_send_multicommand(struct flashctx *flash,
+				  struct spi_command *cmds)
 {
 	int result = 0;
 	for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) {
-		result = spi_send_command(cmds->writecnt, cmds->readcnt,
+		result = spi_send_command(flash, cmds->writecnt, cmds->readcnt,
 					  cmds->writearr, cmds->readarr);
 	}
 	return result;
 }
 
-int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		     unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -109,7 +114,8 @@
 	return spi_read_chunked(flash, buf, start, len, max_data);
 }
 
-int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_write_256(struct flashctx *flash, uint8_t *buf,
+			  unsigned int start, unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -121,7 +127,8 @@
 	return spi_write_chunked(flash, buf, start, len, max_data);
 }
 
-int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		  unsigned int len)
 {
 	unsigned int addrbase = 0;
 	if (!spi_programmer->read) {
@@ -135,7 +142,7 @@
 	 * address. Highest possible address with the current SPI implementation
 	 * means 0xffffff, the highest unsigned 24bit number.
 	 */
-	addrbase = spi_get_valid_read_addr();
+	addrbase = spi_get_valid_read_addr(flash);
 	if (addrbase + flash->total_size * 1024 > (1 << 24)) {
 		msg_perr("Flash chip size exceeds the allowed access window. ");
 		msg_perr("Read will probably fail.\n");
@@ -160,7 +167,8 @@
  * .write_256 = spi_chip_write_1
  */
 /* real chunksize is up to 256, logical chunksize is 256 */
-int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		       unsigned int len)
 {
 	if (!spi_programmer->write_256) {
 		msg_perr("%s called, but SPI page write is unsupported on this "
@@ -177,7 +185,7 @@
  * be the lowest allowed address for all commands which take an address.
  * This is a programmer limitation.
  */
-uint32_t spi_get_valid_read_addr(void)
+uint32_t spi_get_valid_read_addr(struct flashctx *flash)
 {
 	switch (spi_programmer->type) {
 #if CONFIG_INTERNAL == 1
Index: flashrom-struct_flashctx_everywhere_new/nic3com.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/nic3com.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/nic3com.c	(Arbeitskopie)
@@ -55,6 +55,10 @@
 	{},
 };
 
+static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr);
+static uint8_t nic3com_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr);
 static const struct par_programmer par_programmer_nic3com = {
 		.chip_readb		= nic3com_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -116,13 +120,15 @@
 	return 0;
 }
 
-void nic3com_chip_writeb(uint8_t val, chipaddr addr)
+static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	OUTB(val, io_base_addr + BIOS_ROM_DATA);
 }
 
-uint8_t nic3com_chip_readb(const chipaddr addr)
+static uint8_t nic3com_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	return INB(io_base_addr + BIOS_ROM_DATA);
Index: flashrom-struct_flashctx_everywhere_new/satasii.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/satasii.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/satasii.c	(Arbeitskopie)
@@ -42,6 +42,10 @@
 	{},
 };
 
+static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr);
+static uint8_t satasii_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr);
 static const struct par_programmer par_programmer_satasii = {
 		.chip_readb		= satasii_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -95,7 +99,8 @@
 	return 0;
 }
 
-void satasii_chip_writeb(uint8_t val, chipaddr addr)
+static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr)
 {
 	uint32_t ctrl_reg, data_reg;
 
@@ -112,7 +117,8 @@
 	while (pci_mmio_readl(sii_bar) & (1 << 25)) ;
 }
 
-uint8_t satasii_chip_readb(const chipaddr addr)
+static uint8_t satasii_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr)
 {
 	uint32_t ctrl_reg;
 
Index: flashrom-struct_flashctx_everywhere_new/ft2232_spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/ft2232_spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/ft2232_spi.c	(Arbeitskopie)
@@ -144,8 +144,10 @@
 	return 0;
 }
 
-static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
+static int ft2232_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_ft2232 = {
 	.type		= SPI_CONTROLLER_FT2232,
@@ -342,8 +344,10 @@
 }
 
 /* Returns 0 upon success, a negative number upon errors. */
-static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+static int ft2232_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr)
 {
 	struct ftdi_context *ftdic = &ftdic_context;
 	static unsigned char *buf = NULL;
Index: flashrom-struct_flashctx_everywhere_new/wbsio_spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/wbsio_spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/wbsio_spi.c	(Arbeitskopie)
@@ -60,9 +60,12 @@
 	return flashport;
 }
 
-static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr);
-static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr);
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
+			  unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_wbsio = {
 	.type = SPI_CONTROLLER_WBSIO,
@@ -110,8 +113,10 @@
  * Would one more byte of RAM in the chip (to get all 24 bits) really make
  * such a big difference?
  */
-static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr)
 {
 	int i;
 	uint8_t mode = 0;
@@ -194,7 +199,8 @@
 	return 0;
 }
 
-static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
+			  unsigned int start, unsigned int len)
 {
 	return read_memmapped(flash, buf, start, len);
 }
Index: flashrom-struct_flashctx_everywhere_new/sst28sf040.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/sst28sf040.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/sst28sf040.c	(Arbeitskopie)
@@ -34,13 +34,13 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_readb(bios + 0x1823);
-	chip_readb(bios + 0x1820);
-	chip_readb(bios + 0x1822);
-	chip_readb(bios + 0x0418);
-	chip_readb(bios + 0x041B);
-	chip_readb(bios + 0x0419);
-	chip_readb(bios + 0x040A);
+	chip_readb(flash, bios + 0x1823);
+	chip_readb(flash, bios + 0x1820);
+	chip_readb(flash, bios + 0x1822);
+	chip_readb(flash, bios + 0x0418);
+	chip_readb(flash, bios + 0x041B);
+	chip_readb(flash, bios + 0x0419);
+	chip_readb(flash, bios + 0x040A);
 
 	return 0;
 }
@@ -49,34 +49,36 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_readb(bios + 0x1823);
-	chip_readb(bios + 0x1820);
-	chip_readb(bios + 0x1822);
-	chip_readb(bios + 0x0418);
-	chip_readb(bios + 0x041B);
-	chip_readb(bios + 0x0419);
-	chip_readb(bios + 0x041A);
+	chip_readb(flash, bios + 0x1823);
+	chip_readb(flash, bios + 0x1820);
+	chip_readb(flash, bios + 0x1822);
+	chip_readb(flash, bios + 0x0418);
+	chip_readb(flash, bios + 0x041B);
+	chip_readb(flash, bios + 0x0419);
+	chip_readb(flash, bios + 0x041A);
 
 	return 0;
 }
 
-int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_28sf040(struct flashctx *flash, unsigned int address,
+			 unsigned int sector_size)
 {
 	chipaddr bios = flash->virtual_memory;
 
 	/* This command sequence is very similar to erase_block_82802ab. */
-	chip_writeb(AUTO_PG_ERASE1, bios);
-	chip_writeb(AUTO_PG_ERASE2, bios + address);
+	chip_writeb(flash, AUTO_PG_ERASE1, bios);
+	chip_writeb(flash, AUTO_PG_ERASE2, bios + address);
 
 	/* wait for Toggle bit ready */
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 /* chunksize is 1 */
-int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start,
+		  unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
@@ -90,11 +92,11 @@
 			continue;
 		}
 		/*issue AUTO PROGRAM command */
-		chip_writeb(AUTO_PGRM, dst);
-		chip_writeb(*src++, dst++);
+		chip_writeb(flash, AUTO_PGRM, dst);
+		chip_writeb(flash, *src++, dst++);
 
 		/* wait for Toggle bit ready */
-		toggle_ready_jedec(bios);
+		toggle_ready_jedec(flash, bios);
 	}
 
 	return 0;
@@ -104,17 +106,18 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(CHIP_ERASE, bios);
-	chip_writeb(CHIP_ERASE, bios);
+	chip_writeb(flash, CHIP_ERASE, bios);
+	chip_writeb(flash, CHIP_ERASE, bios);
 
 	programmer_delay(10);
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int erase_chip_28sf040(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
Index: flashrom-struct_flashctx_everywhere_new/stm50flw0x0x.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/stm50flw0x0x.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/stm50flw0x0x.c	(Arbeitskopie)
@@ -60,8 +60,10 @@
 		// unlock each 4k-sector
 		for (j = 0; j < 0x10000; j += 0x1000) {
 			msg_cdbg("unlocking at 0x%x\n", offset + j);
-			chip_writeb(unlock_sector, wrprotect + offset + j);
-			if (chip_readb(wrprotect + offset + j) != unlock_sector) {
+			chip_writeb(flash, unlock_sector,
+				    wrprotect + offset + j);
+			if (chip_readb(flash, wrprotect + offset + j) !=
+			    unlock_sector) {
 				msg_cerr("Cannot unlock sector @ 0x%x\n",
 				       offset + j);
 				return -1;
@@ -69,8 +71,8 @@
 		}
 	} else {
 		msg_cdbg("unlocking at 0x%x\n", offset);
-		chip_writeb(unlock_sector, wrprotect + offset);
-		if (chip_readb(wrprotect + offset) != unlock_sector) {
+		chip_writeb(flash, unlock_sector, wrprotect + offset);
+		if (chip_readb(flash, wrprotect + offset) != unlock_sector) {
 			msg_cerr("Cannot unlock sector @ 0x%x\n", offset);
 			return -1;
 		}
@@ -94,15 +96,16 @@
 }
 
 /* This function is unused. */
-int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, unsigned int sectorsize)
+int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector,
+			      unsigned int sectorsize)
 {
 	chipaddr bios = flash->virtual_memory + sector;
 
 	// clear status register
-	chip_writeb(0x50, bios);
+	chip_writeb(flash, 0x50, bios);
 	// now start it
-	chip_writeb(0x32, bios);
-	chip_writeb(0xd0, bios);
+	chip_writeb(flash, 0x32, bios);
+	chip_writeb(flash, 0xd0, bios);
 	programmer_delay(10);
 
 	wait_82802ab(flash);
Index: flashrom-struct_flashctx_everywhere_new/nicintel.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/nicintel.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/nicintel.c	(Arbeitskopie)
@@ -43,6 +43,10 @@
 
 #define CSR_FCR 0x0c
 
+static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr);
+static uint8_t nicintel_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr);
 static const struct par_programmer par_programmer_nicintel = {
 		.chip_readb		= nicintel_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -117,12 +121,14 @@
 	return 1;
 }
 
-void nicintel_chip_writeb(uint8_t val, chipaddr addr)
+static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr)
 {
 	pci_mmio_writeb(val, nicintel_bar + (addr & NICINTEL_MEMMAP_MASK));
 }
 
-uint8_t nicintel_chip_readb(const chipaddr addr)
+static uint8_t nicintel_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr)
 {
 	return pci_mmio_readb(nicintel_bar + (addr & NICINTEL_MEMMAP_MASK));
 }
Index: flashrom-struct_flashctx_everywhere_new/sb600spi.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/sb600spi.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/sb600spi.c	(Arbeitskopie)
@@ -88,8 +88,10 @@
 		;
 }
 
-static int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr)
 {
 	int count;
 	/* First byte is cmd which can not being sent through FIFO. */
Index: flashrom-struct_flashctx_everywhere_new/programmer.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/programmer.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/programmer.c	(Arbeitskopie)
@@ -1,7 +1,7 @@
 /*
  * This file is part of the flashrom project.
  *
- * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
+ * Copyright (C) 2009,2010,2011 Carl-Daniel Hailfinger
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -53,61 +53,65 @@
 }
 
 /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
-uint8_t noop_chip_readb(const chipaddr addr)
+uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
 	return 0xff;
 }
 
 /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
-void noop_chip_writeb(uint8_t val, chipaddr addr)
+void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
 }
 
 /* Little-endian fallback for drivers not supporting 16 bit accesses */
-void fallback_chip_writew(uint16_t val, chipaddr addr)
+void fallback_chip_writew(const struct flashctx *flash, uint16_t val,
+			  chipaddr addr)
 {
-	chip_writeb(val & 0xff, addr);
-	chip_writeb((val >> 8) & 0xff, addr + 1);
+	chip_writeb(flash, val & 0xff, addr);
+	chip_writeb(flash, (val >> 8) & 0xff, addr + 1);
 }
 
 /* Little-endian fallback for drivers not supporting 16 bit accesses */
-uint16_t fallback_chip_readw(const chipaddr addr)
+uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
 	uint16_t val;
-	val = chip_readb(addr);
-	val |= chip_readb(addr + 1) << 8;
+	val = chip_readb(flash, addr);
+	val |= chip_readb(flash, addr + 1) << 8;
 	return val;
 }
 
 /* Little-endian fallback for drivers not supporting 32 bit accesses */
-void fallback_chip_writel(uint32_t val, chipaddr addr)
+void fallback_chip_writel(const struct flashctx *flash, uint32_t val,
+			  chipaddr addr)
 {
-	chip_writew(val & 0xffff, addr);
-	chip_writew((val >> 16) & 0xffff, addr + 2);
+	chip_writew(flash, val & 0xffff, addr);
+	chip_writew(flash, (val >> 16) & 0xffff, addr + 2);
 }
 
 /* Little-endian fallback for drivers not supporting 32 bit accesses */
-uint32_t fallback_chip_readl(const chipaddr addr)
+uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
 	uint32_t val;
-	val = chip_readw(addr);
-	val |= chip_readw(addr + 2) << 16;
+	val = chip_readw(flash, addr);
+	val |= chip_readw(flash, addr + 2) << 16;
 	return val;
 }
 
-void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len)
+void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf,
+			  chipaddr addr, size_t len)
 {
 	size_t i;
 	for (i = 0; i < len; i++)
-		chip_writeb(buf[i], addr + i);
+		chip_writeb(flash, buf[i], addr + i);
 	return;
 }
 
-void fallback_chip_readn(uint8_t *buf, chipaddr addr, size_t len)
+void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			 chipaddr addr, size_t len)
 {
 	size_t i;
 	for (i = 0; i < len; i++)
-		buf[i] = chip_readb(addr + i);
+		buf[i] = chip_readb(flash, addr + i);
 	return;
 }
 
Index: flashrom-struct_flashctx_everywhere_new/flashrom.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/flashrom.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/flashrom.c	(Arbeitskopie)
@@ -359,44 +359,46 @@
 	programmer_table[programmer].unmap_flash_region(virt_addr, len);
 }
 
-void chip_writeb(uint8_t val, chipaddr addr)
+void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	par_programmer->chip_writeb(val, addr);
+	par_programmer->chip_writeb(flash, val, addr);
 }
 
-void chip_writew(uint16_t val, chipaddr addr)
+void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
 {
-	par_programmer->chip_writew(val, addr);
+	par_programmer->chip_writew(flash, val, addr);
 }
 
-void chip_writel(uint32_t val, chipaddr addr)
+void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
-	par_programmer->chip_writel(val, addr);
+	par_programmer->chip_writel(flash, val, addr);
 }
 
-void chip_writen(uint8_t *buf, chipaddr addr, size_t len)
+void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
+		 size_t len)
 {
-	par_programmer->chip_writen(buf, addr, len);
+	par_programmer->chip_writen(flash, buf, addr, len);
 }
 
-uint8_t chip_readb(const chipaddr addr)
+uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readb(addr);
+	return par_programmer->chip_readb(flash, addr);
 }
 
-uint16_t chip_readw(const chipaddr addr)
+uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readw(addr);
+	return par_programmer->chip_readw(flash, addr);
 }
 
-uint32_t chip_readl(const chipaddr addr)
+uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readl(addr);
+	return par_programmer->chip_readl(flash, addr);
 }
 
-void chip_readn(uint8_t *buf, chipaddr addr, size_t len)
+void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
+		size_t len)
 {
-	par_programmer->chip_readn(buf, addr, len);
+	par_programmer->chip_readn(flash, buf, addr, len);
 }
 
 void programmer_delay(int usecs)
@@ -412,9 +414,10 @@
 	flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size);
 }
 
-int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		   int unsigned len)
 {
-	chip_readn(buf, flash->virtual_memory + start, len);
+	chip_readn(flash, buf, flash->virtual_memory + start, len);
 
 	return 0;
 }
@@ -535,7 +538,8 @@
 }
 
 /* start is an offset to the base address of the flash chip */
-int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
+int check_erased_range(struct flashctx *flash, unsigned int start,
+		       unsigned int len)
 {
 	int ret;
 	uint8_t *cmpbuf = malloc(len);
@@ -558,8 +562,8 @@
  * @message	string to print in the "FAILED" message
  * @return	0 for success, -1 for failure
  */
-int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len,
-		 const char *message)
+int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start,
+		 unsigned int len, const char *message)
 {
 	unsigned int i;
 	uint8_t *readbuf = malloc(len);
@@ -1537,7 +1541,8 @@
 	/* Check that virtual_memory in struct flashctx is placed directly
 	 * after the members copied from struct flashchip.
 	 */
-	if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) {
+	if (sizeof(struct flashchip) !=
+	    offsetof(struct flashctx, virtual_memory)) {
 		msg_gerr("struct flashctx broken!\n");
 		ret = 1;
 	}
@@ -1618,7 +1623,8 @@
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(struct flashctx *flash, int force, int read_it, int write_it, int erase_it, int verify_it)
+int chip_safety_check(struct flashctx *flash, int force, int read_it,
+		      int write_it, int erase_it, int verify_it)
 {
 	if (!programmer_may_write && (write_it || erase_it)) {
 		msg_perr("Write/erase is not working yet on your programmer in "
@@ -1679,7 +1685,8 @@
  * but right now it allows us to split off the CLI code.
  * Besides that, the function itself is a textbook example of abysmal code flow.
  */
-int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it)
+int doit(struct flashctx *flash, int force, const char *filename, int read_it,
+	 int write_it, int erase_it, int verify_it)
 {
 	uint8_t *oldcontents;
 	uint8_t *newcontents;
Index: flashrom-struct_flashctx_everywhere_new/programmer.h
===================================================================
--- flashrom-struct_flashctx_everywhere_new/programmer.h	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/programmer.h	(Arbeitskopie)
@@ -93,8 +93,8 @@
 
 	int (*init) (void);
 
-	void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
-				    size_t len);
+	void *(*map_flash_region) (const char *descr, unsigned long phys_addr,
+				   size_t len);
 	void (*unmap_flash_region) (void *virt_addr, size_t len);
 
 	void (*delay) (int usecs);
@@ -300,13 +300,6 @@
 int register_superio(struct superio s);
 extern enum chipbustype internal_buses_supported;
 int internal_init(void);
-void internal_chip_writeb(uint8_t val, chipaddr addr);
-void internal_chip_writew(uint16_t val, chipaddr addr);
-void internal_chip_writel(uint32_t val, chipaddr addr);
-uint8_t internal_chip_readb(const chipaddr addr);
-uint16_t internal_chip_readw(const chipaddr addr);
-uint32_t internal_chip_readl(const chipaddr addr);
-void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 #endif
 
 /* hwaccess.c */
@@ -341,91 +334,46 @@
 void rmmio_valw(void *addr);
 void rmmio_vall(void *addr);
 
-/* programmer.c */
-int noop_shutdown(void);
-void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
-void fallback_unmap(void *virt_addr, size_t len);
-uint8_t noop_chip_readb(const chipaddr addr);
-void noop_chip_writeb(uint8_t val, chipaddr addr);
-void fallback_chip_writew(uint16_t val, chipaddr addr);
-void fallback_chip_writel(uint32_t val, chipaddr addr);
-void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint16_t fallback_chip_readw(const chipaddr addr);
-uint32_t fallback_chip_readl(const chipaddr addr);
-void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
-struct par_programmer {
-	void (*chip_writeb) (uint8_t val, chipaddr addr);
-	void (*chip_writew) (uint16_t val, chipaddr addr);
-	void (*chip_writel) (uint32_t val, chipaddr addr);
-	void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
-	uint8_t (*chip_readb) (const chipaddr addr);
-	uint16_t (*chip_readw) (const chipaddr addr);
-	uint32_t (*chip_readl) (const chipaddr addr);
-	void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
-};
-extern const struct par_programmer *par_programmer;
-void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
-
 /* dummyflasher.c */
 #if CONFIG_DUMMY == 1
 int dummy_init(void);
 void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
 void dummy_unmap(void *virt_addr, size_t len);
-void dummy_chip_writeb(uint8_t val, chipaddr addr);
-void dummy_chip_writew(uint16_t val, chipaddr addr);
-void dummy_chip_writel(uint32_t val, chipaddr addr);
-void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint8_t dummy_chip_readb(const chipaddr addr);
-uint16_t dummy_chip_readw(const chipaddr addr);
-uint32_t dummy_chip_readl(const chipaddr addr);
-void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 #endif
 
 /* nic3com.c */
 #if CONFIG_NIC3COM == 1
 int nic3com_init(void);
-void nic3com_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nic3com_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_3com[];
 #endif
 
 /* gfxnvidia.c */
 #if CONFIG_GFXNVIDIA == 1
 int gfxnvidia_init(void);
-void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t gfxnvidia_chip_readb(const chipaddr addr);
 extern const struct pcidev_status gfx_nvidia[];
 #endif
 
 /* drkaiser.c */
 #if CONFIG_DRKAISER == 1
 int drkaiser_init(void);
-void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t drkaiser_chip_readb(const chipaddr addr);
 extern const struct pcidev_status drkaiser_pcidev[];
 #endif
 
 /* nicrealtek.c */
 #if CONFIG_NICREALTEK == 1
 int nicrealtek_init(void);
-void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicrealtek_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_realtek[];
 #endif
 
 /* nicnatsemi.c */
 #if CONFIG_NICNATSEMI == 1
 int nicnatsemi_init(void);
-void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicnatsemi_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_natsemi[];
 #endif
 
 /* nicintel.c */
 #if CONFIG_NICINTEL == 1
 int nicintel_init(void);
-void nicintel_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicintel_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_intel[];
 #endif
 
@@ -444,24 +392,18 @@
 /* satamv.c */
 #if CONFIG_SATAMV == 1
 int satamv_init(void);
-void satamv_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t satamv_chip_readb(const chipaddr addr);
 extern const struct pcidev_status satas_mv[];
 #endif
 
 /* satasii.c */
 #if CONFIG_SATASII == 1
 int satasii_init(void);
-void satasii_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t satasii_chip_readb(const chipaddr addr);
 extern const struct pcidev_status satas_sii[];
 #endif
 
 /* atahpt.c */
 #if CONFIG_ATAHPT == 1
 int atahpt_init(void);
-void atahpt_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t atahpt_chip_readb(const chipaddr addr);
 extern const struct pcidev_status ata_hpt[];
 #endif
 
@@ -565,9 +507,9 @@
 	enum spi_controller type;
 	unsigned int max_data_read;
 	unsigned int max_data_write;
-	int (*command)(unsigned int writecnt, unsigned int readcnt,
+	int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 		   const unsigned char *writearr, unsigned char *readarr);
-	int (*multicommand)(struct spi_command *cmds);
+	int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
 
 	/* Optimized functions for this programmer */
 	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
@@ -575,9 +517,9 @@
 };
 
 extern const struct spi_programmer *spi_programmer;
-int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 			     const unsigned char *writearr, unsigned char *readarr);
-int default_spi_send_multicommand(struct spi_command *cmds);
+int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void register_spi_programmer(const struct spi_programmer *programmer);
@@ -632,12 +574,34 @@
 extern const struct opaque_programmer *opaque_programmer;
 void register_opaque_programmer(const struct opaque_programmer *pgm);
 
+/* programmer.c */
+int noop_shutdown(void);
+void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
+void fallback_unmap(void *virt_addr, size_t len);
+uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr);
+void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
+void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
+void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
+void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
+uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
+uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
+void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+struct par_programmer {
+	void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
+	void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
+	void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
+	void (*chip_writen) (const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
+	uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
+	uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
+	uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
+	void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+};
+extern const struct par_programmer *par_programmer;
+void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
+
 /* serprog.c */
 #if CONFIG_SERPROG == 1
 int serprog_init(void);
-void serprog_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t serprog_chip_readb(const chipaddr addr);
-void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 void serprog_delay(int usecs);
 #endif
 
Index: flashrom-struct_flashctx_everywhere_new/chipdrivers.h
===================================================================
--- flashrom-struct_flashctx_everywhere_new/chipdrivers.h	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/chipdrivers.h	(Arbeitskopie)
@@ -33,8 +33,8 @@
 int probe_spi_rems(struct flashctx *flash);
 int probe_spi_res1(struct flashctx *flash);
 int probe_spi_res2(struct flashctx *flash);
-int spi_write_enable(void);
-int spi_write_disable(void);
+int spi_write_enable(struct flashctx *flash);
+int spi_write_disable(struct flashctx *flash);
 int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
@@ -44,16 +44,16 @@
 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
-uint8_t spi_read_status_register(void);
+uint8_t spi_read_status_register(struct flashctx *flash);
 int spi_write_status_register(struct flashctx *flash, int status);
 void spi_prettyprint_status_register_bit(uint8_t status, int bit);
 void spi_prettyprint_status_register_bp3210(uint8_t status, int bp);
 void spi_prettyprint_status_register_welwip(uint8_t status);
 int spi_prettyprint_status_register(struct flashctx *flash);
 int spi_disable_blockprotect(struct flashctx *flash);
-int spi_byte_program(unsigned int addr, uint8_t databyte);
-int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len);
-int spi_nbyte_read(unsigned int addr, uint8_t *bytes, unsigned int len);
+int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte);
+int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
+int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
 int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
 int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
 int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
@@ -95,9 +95,9 @@
 
 /* jedec.c */
 uint8_t oddparity(uint8_t val);
-void toggle_ready_jedec(chipaddr dst);
-void data_polling_jedec(chipaddr dst, uint8_t data);
-int write_byte_program_jedec(chipaddr bios, uint8_t *src,
+void toggle_ready_jedec(struct flashctx *flash, chipaddr dst);
+void data_polling_jedec(struct flashctx *flash, chipaddr dst, uint8_t data);
+int write_byte_program_jedec(struct flashctx *flash, chipaddr bios, uint8_t *src,
 			     chipaddr dst);
 int probe_jedec(struct flashctx *flash);
 int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
@@ -111,7 +111,7 @@
 int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
 int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
 int write_m29f400bt(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
-void protect_m29f400bt(chipaddr bios);
+void protect_m29f400bt(struct flashctx *flash, chipaddr bios);
 
 /* pm49fl00x.c */
 int unlock_49fl00x(struct flashctx *flash);
Index: flashrom-struct_flashctx_everywhere_new/m29f400bt.c
===================================================================
--- flashrom-struct_flashctx_everywhere_new/m29f400bt.c	(Revision 1473)
+++ flashrom-struct_flashctx_everywhere_new/m29f400bt.c	(Arbeitskopie)
@@ -28,24 +28,25 @@
    functions. */
 
 /* chunksize is 1 */
-int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start,
+		    unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
 	chipaddr dst = flash->virtual_memory + start;
 
 	for (i = 0; i < len; i++) {
-		chip_writeb(0xAA, bios + 0xAAA);
-		chip_writeb(0x55, bios + 0x555);
-		chip_writeb(0xA0, bios + 0xAAA);
+		chip_writeb(flash, 0xAA, bios + 0xAAA);
+		chip_writeb(flash, 0x55, bios + 0x555);
+		chip_writeb(flash, 0xA0, bios + 0xAAA);
 
 		/* transfer data from source to destination */
-		chip_writeb(*src, dst);
-		toggle_ready_jedec(dst);
+		chip_writeb(flash, *src, dst);
+		toggle_ready_jedec(flash, dst);
 #if 0
 		/* We only want to print something in the error case. */
 		msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n",
-		     (dst - bios), chip_readb(dst), *src);
+		     (dst - bios), chip_readb(flash, dst), *src);
 #endif
 		dst++;
 		src++;
@@ -60,21 +61,21 @@
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x90, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x90, bios + 0xAAA);
 
 	programmer_delay(10);
 
-	id1 = chip_readb(bios);
+	id1 = chip_readb(flash, bios);
 	/* The data sheet says id2 is at (bios + 0x01) and id2 listed in
 	 * flash.h does not match. It should be possible to use JEDEC probe.
 	 */
-	id2 = chip_readb(bios + 0x02);
+	id2 = chip_readb(flash, bios + 0x02);
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0xF0, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0xF0, bios + 0xAAA);
 
 	programmer_delay(10);
 
@@ -90,42 +91,44 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x80, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x80, bios + 0xAAA);
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x10, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x10, bios + 0xAAA);
 
 	programmer_delay(10);
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len)
+int block_erase_m29f400bt(struct flashctx *flash, unsigned int start,
+			  unsigned int len)
 {
 	chipaddr bios = flash->virtual_memory;
 	chipaddr dst = bios + start;
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x80, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x80, bios + 0xAAA);
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x30, dst);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x30, dst);
 
 	programmer_delay(10);
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, unsigned int blocklen)
+int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address,
+			       unsigned int blocklen)
 {
 	if ((address != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",


-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Fri Dec 16 20:06:07 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 16 Dec 2011 20:06:07 +0100
Subject: [flashrom] [PATCH] Cross-compilation fixes
In-Reply-To: <CAKOoyUfUgS-+RkkLxm_NyBqdU_g1zuVeLuQyDhBt0XfZj+0CKA@mail.gmail.com>
References: <4EDC25BD.1090704@gmx.net> <4EE1123A.8040707@assembler.cz>
	<4EE11B7F.8080200@gmx.net>
	<CAKOoyUfUgS-+RkkLxm_NyBqdU_g1zuVeLuQyDhBt0XfZj+0CKA@mail.gmail.com>
Message-ID: <4EEB969F.8090209@gmx.net>

Am 09.12.2011 05:02 schrieb David Hendricks:
> On Thu, Dec 8, 2011 at 12:18 PM, Carl-Daniel Hailfinger <
> c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>>> Most likely no arm support?
>> Indeed, ARM support is missing. I think it is mainy held back by libpci
>> breakage for which we only have a really hackish workaround.
>
> For what it's worth, when I tested the patch earlier it worked on ARM with
> that libpci hack.

The patch has been tested natively on FreeBSD, MinGW, Linux,
DragonFlyBSD, with gcc and clang, cross-compiled with clang on Linux for
Windows, cross-compiled with DJGPP on Linux for DOS, cross-compiled on
Linux for MinGW, natively on Linux PowerPC, ....

Ack anyone?

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Sat Dec 17 15:23:58 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 17 Dec 2011 15:23:58 +0100
Subject: [flashrom] [PATCH] Generic programmer registration: final part
Message-ID: <4EECA5FE.6060609@gmx.net>

This depends on [PATCH] Add struct flashctx * everywhere

All programmer types (Parallel, SPI, Opaque) now register themselves
into a generic programmer list and probing is now programmer-centric
instead of chip-centric.
Registering multiple SPI/... masters at the same time is now possible
without any problems. Handling multiple flash chips is still unchanged,
but now we have the infrastructure to deal with "dual BIOS" and "one
flash behind southbridge and one flash behind EC" sanely.

A nice side effect is that this patch kills quite a few global variables
and improves the situation for libflashrom.

Hint for developers:
struct {spi,par,opaque}_programmer now have a void *data pointer to
store any additional programmer-specific data, e.g. hardware
configuratoin info.

I'd appreciate tests for the following programmer classes:
- mainboard native SPI (ICH SPI, SB600 SPI, VIA SPI)
- mainboard native LPC/FWH/Parallel
- mainboard native bitbanged SPI (MCP SPI)
- mainboard translated Parallel (SuperI/O acts as LPC->Parallel translator)
- mainboard translated SPI (SuperI/O acts as LPC->SPI translator)
- serprog
- external SPI (Bus Pirate/Dediprog/FT2232)
- external bitbanged SPI (nicintel_spi, ogp_spi)
- external LPC/Parallel (satasii, atahpt, nic3com, nicintel, ...)

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

--- flashrom-register_all_programmers_register_generic/flash.h	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/flash.h	(Arbeitskopie)
@@ -171,6 +171,7 @@
 	chipaddr virtual_memory;
 	/* Some flash devices have an additional register space. */
 	chipaddr virtual_registers;
+	struct registered_programmer *pgm;
 };
 
 #define TEST_UNTESTED	0
@@ -224,14 +225,13 @@
 	write_gran_1byte,
 	write_gran_256bytes,
 };
-extern enum chipbustype buses_supported;
 extern int verbose;
 extern const char flashrom_version[];
 extern char *chip_to_probe;
 void map_flash_registers(struct flashctx *flash);
 int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int erase_flash(struct flashctx *flash);
-int probe_flash(int startchip, struct flashctx *fill_flash, int force);
+int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force);
 int read_flash_to_file(struct flashctx *flash, const char *filename);
 int min(int a, int b);
 int max(int a, int b);
@@ -300,2 +300,3 @@
 
+enum chipbustype get_buses_supported(void);
 #endif				/* !__FLASH_H__ */
--- flashrom-register_all_programmers_register_generic/bitbang_spi.c	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/bitbang_spi.c	(Arbeitskopie)
@@ -25,46 +25,43 @@
 #include "programmer.h"
 #include "spi.h"
 
-/* Length of half a clock period in usecs. */
-static int bitbang_spi_half_period;
-
-static const struct bitbang_spi_master *bitbang_spi_master = NULL;
-
 /* Note that CS# is active low, so val=0 means the chip is active. */
-static void bitbang_spi_set_cs(int val)
+static void bitbang_spi_set_cs(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_cs(val);
+	master->set_cs(val);
 }
 
-static void bitbang_spi_set_sck(int val)
+static void bitbang_spi_set_sck(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_sck(val);
+	master->set_sck(val);
 }
 
-static void bitbang_spi_set_mosi(int val)
+static void bitbang_spi_set_mosi(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_mosi(val);
+	master->set_mosi(val);
 }
 
-static int bitbang_spi_get_miso(void)
+static int bitbang_spi_get_miso(const const struct bitbang_spi_master *master)
 {
-	return bitbang_spi_master->get_miso();
+	return master->get_miso();
 }
 
-static void bitbang_spi_request_bus(void)
+static void bitbang_spi_request_bus(const const struct bitbang_spi_master *master)
 {
-	if (bitbang_spi_master->request_bus)
-		bitbang_spi_master->request_bus();
+	if (master->request_bus)
+		master->request_bus();
 }
 
-static void bitbang_spi_release_bus(void)
+static void bitbang_spi_release_bus(const const struct bitbang_spi_master *master)
 {
-	if (bitbang_spi_master->release_bus)
-		bitbang_spi_master->release_bus();
+	if (master->release_bus)
+		master->release_bus();
 }
 
-static int bitbang_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
+static int bitbang_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_bitbang = {
 	.type		= SPI_CONTROLLER_BITBANG,
@@ -76,8 +73,9 @@
 	.write_256	= default_spi_write_256,
 };
 
-int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod)
+int bitbang_spi_init(const struct bitbang_spi_master *master)
 {
+	struct spi_programmer pgm = spi_programmer_bitbang;
 	/* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
 	 * we catch it here. Same goes for missing initialization of bitbanging
 	 * functions.
@@ -88,80 +86,76 @@
 			 "Please report a bug at flashrom at flashrom.org\n");
 		return 1;
 	}
-	if (bitbang_spi_master) {
-		msg_perr("SPI bitbang master already initialized!\n"
-			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
-	}
 
-	bitbang_spi_master = master;
-	bitbang_spi_half_period = halfperiod;
+	pgm.data = master;
+	register_spi_programmer(&pgm);
 
-	register_spi_programmer(&spi_programmer_bitbang);
-
-	/* FIXME: Run bitbang_spi_request_bus here or in programmer init? */
-	bitbang_spi_set_cs(1);
-	bitbang_spi_set_sck(0);
-	bitbang_spi_set_mosi(0);
+	/* Only mess with the bus if we're sure nobody else uses it. */
+	bitbang_spi_request_bus(master);
+	bitbang_spi_set_cs(master, 1);
+	bitbang_spi_set_sck(master, 0);
+	bitbang_spi_set_mosi(master, 0);
+	/* FIXME: Release SPI bus here and request it again for each command or
+	 * don't release it now and only release it on programmer shutdown?
+	 */
+	bitbang_spi_release_bus(master);
 	return 0;
 }
 
 int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
 {
-	if (!bitbang_spi_master) {
+	if (!master) {
 		msg_perr("Shutting down an uninitialized SPI bitbang master!\n"
 			 "Please report a bug at flashrom at flashrom.org\n");
 		return 1;
 	}
-	if (master != bitbang_spi_master) {
-		msg_perr("Shutting down a mismatched SPI bitbang master!\n"
-			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
-	}
 
 	/* FIXME: Run bitbang_spi_release_bus here or per command? */
-	bitbang_spi_master = NULL;
 	return 0;
 }
 
-static uint8_t bitbang_spi_readwrite_byte(uint8_t val)
+static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master,
+				   uint8_t val)
 {
 	uint8_t ret = 0;
 	int i;
 
 	for (i = 7; i >= 0; i--) {
-		bitbang_spi_set_mosi((val >> i) & 1);
-		programmer_delay(bitbang_spi_half_period);
-		bitbang_spi_set_sck(1);
+		bitbang_spi_set_mosi(master, (val >> i) & 1);
+		programmer_delay(master->half_period);
+		bitbang_spi_set_sck(master, 1);
 		ret <<= 1;
-		ret |= bitbang_spi_get_miso();
-		programmer_delay(bitbang_spi_half_period);
-		bitbang_spi_set_sck(0);
+		ret |= bitbang_spi_get_miso(master);
+		programmer_delay(master->half_period);
+		bitbang_spi_set_sck(master, 0);
 	}
 	return ret;
 }
 
-static int bitbang_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+static int bitbang_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr)
 {
 	int i;
+	const struct bitbang_spi_master *master = flash->pgm->spi.data;
 
 	/* FIXME: Run bitbang_spi_request_bus here or in programmer init?
 	 * Requesting and releasing the SPI bus is handled in here to allow the
 	 * programmer to use its own SPI engine for native accesses.
 	 */
-	bitbang_spi_request_bus();
-	bitbang_spi_set_cs(0);
+	bitbang_spi_request_bus(master);
+	bitbang_spi_set_cs(master, 0);
 	for (i = 0; i < writecnt; i++)
-		bitbang_spi_readwrite_byte(writearr[i]);
+		bitbang_spi_rw_byte(master, writearr[i]);
 	for (i = 0; i < readcnt; i++)
-		readarr[i] = bitbang_spi_readwrite_byte(0);
+		readarr[i] = bitbang_spi_rw_byte(master, 0);
 
-	programmer_delay(bitbang_spi_half_period);
-	bitbang_spi_set_cs(1);
-	programmer_delay(bitbang_spi_half_period);
+	programmer_delay(master->half_period);
+	bitbang_spi_set_cs(master, 1);
+	programmer_delay(master->half_period);
 	/* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
-	bitbang_spi_release_bus();
+	bitbang_spi_release_bus(master);
 
 	return 0;
 }
--- flashrom-register_all_programmers_register_generic/ichspi.c	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/ichspi.c	(Arbeitskopie)
@@ -635,7 +635,7 @@
 
 /* Read len bytes from the fdata/spid register into the data array.
  *
- * Note that using len > spi_programmer->max_data_read will return garbage or
+ * Note that using len > flash->pgm->spi.max_data_read will return garbage or
  * may even crash.
  */
  static void ich_read_data(uint8_t *data, int len, int reg0_off)
@@ -653,7 +653,7 @@
 
 /* Fill len bytes from the data array into the fdata/spid registers.
  *
- * Note that using len > spi_programmer->max_data_write will trash the registers
+ * Note that using len > flash->pgm->spi.max_data_write will trash the registers
  * following the data registers.
  */
 static void ich_fill_data(const uint8_t *data, int len, int reg0_off)
@@ -960,9 +960,9 @@
 		      uint8_t datalength, uint8_t * data)
 {
 	/* max_data_read == max_data_write for all Intel/VIA SPI masters */
-	uint8_t maxlength = spi_programmer->max_data_read;
+	uint8_t maxlength = flash->pgm->spi.max_data_read;
 
-	if (spi_programmer->type == SPI_CONTROLLER_NONE) {
+	if (ich_generation == CHIPSET_ICH_UNKNOWN) {
 		msg_perr("%s: unsupported chipset\n", __func__);
 		return -1;
 	}
@@ -1296,7 +1296,7 @@
 	REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
 
 	while (len > 0) {
-		block_len = min(len, opaque_programmer->max_data_read);
+		block_len = min(len, flash->pgm->opaque.max_data_read);
 		ich_hwseq_set_addr(addr);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* set read operation */
@@ -1335,7 +1335,7 @@
 
 	while (len > 0) {
 		ich_hwseq_set_addr(addr);
-		block_len = min(len, opaque_programmer->max_data_write);
+		block_len = min(len, flash->pgm->opaque.max_data_write);
 		ich_fill_data(buf, block_len, ICH9_REG_FDATA0);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* clear operation */
--- flashrom-register_all_programmers_register_generic/spi25.c	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/spi25.c	(Arbeitskopie)
@@ -177,7 +177,7 @@
 	/* Some SPI controllers do not support commands with writecnt=1 and
 	 * readcnt=4.
 	 */
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:
@@ -1103,7 +1103,7 @@
 		.readarr	= NULL,
 	}};
 
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:
--- flashrom-register_all_programmers_register_generic/spi.c	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/spi.c	(Arbeitskopie)
@@ -30,41 +30,30 @@
 #include "programmer.h"
 #include "spi.h"
 
-const struct spi_programmer spi_programmer_none = {
-	.type = SPI_CONTROLLER_NONE,
-	.max_data_read = MAX_DATA_UNSPECIFIED,
-	.max_data_write = MAX_DATA_UNSPECIFIED,
-	.command = NULL,
-	.multicommand = NULL,
-	.read = NULL,
-	.write_256 = NULL,
-};
-
-const struct spi_programmer *spi_programmer = &spi_programmer_none;
-
 int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 		const unsigned char *writearr, unsigned char *readarr)
 {
-	if (!spi_programmer->command) {
+	if (!flash->pgm->spi.command) {
 		msg_perr("%s called, but SPI is unsupported on this "
 			 "hardware. Please report a bug at "
 			 "flashrom at flashrom.org\n", __func__);
 		return 1;
 	}
 
-	return spi_programmer->command(flash, writecnt, readcnt, writearr, readarr);
+	return flash->pgm->spi.command(flash, writecnt, readcnt,
+						      writearr, readarr);
 }
 
 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds)
 {
-	if (!spi_programmer->multicommand) {
+	if (!flash->pgm->spi.multicommand) {
 		msg_perr("%s called, but SPI is unsupported on this "
 			 "hardware. Please report a bug at "
 			 "flashrom at flashrom.org\n", __func__);
 		return 1;
 	}
 
-	return spi_programmer->multicommand(flash, cmds);
+	return flash->pgm->spi.multicommand(flash, cmds);
 }
 
 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
@@ -98,7 +87,7 @@
 
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	unsigned int max_data = spi_programmer->max_data_read;
+	unsigned int max_data = flash->pgm->spi.max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI read chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -110,7 +99,7 @@
 
 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	unsigned int max_data = spi_programmer->max_data_write;
+	unsigned int max_data = flash->pgm->spi.max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI write chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -123,7 +112,7 @@
 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
 	unsigned int addrbase = 0;
-	if (!spi_programmer->read) {
+	if (!flash->pgm->spi.read) {
 		msg_perr("%s called, but SPI read is unsupported on this "
 			 "hardware. Please report a bug at "
 			 "flashrom at flashrom.org\n", __func__);
@@ -149,7 +138,7 @@
 			 "access window.\n");
 		msg_perr("Read will probably return garbage.\n");
 	}
-	return spi_programmer->read(flash, buf, addrbase + start, len);
+	return flash->pgm->spi.read(flash, buf, addrbase + start, len);
 }
 
 /*
@@ -161,14 +150,14 @@
 /* real chunksize is up to 256, logical chunksize is 256 */
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	if (!spi_programmer->write_256) {
+	if (!flash->pgm->spi.write_256) {
 		msg_perr("%s called, but SPI page write is unsupported on this "
 			 "hardware. Please report a bug at "
 			 "flashrom at flashrom.org\n", __func__);
 		return 1;
 	}
 
-	return spi_programmer->write_256(flash, buf, start, len);
+	return flash->pgm->spi.write_256(flash, buf, start, len);
 }
 
 /*
@@ -178,7 +167,7 @@
  */
 uint32_t spi_get_valid_read_addr(struct flashctx *flash)
 {
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_ICH7:
@@ -195,4 +184,7 @@
 {
-	spi_programmer = pgm;
-	buses_supported |= BUS_SPI;
+	struct registered_programmer rpgm;
+
+	rpgm.buses_supported = BUS_SPI;
+	rpgm.spi = *pgm;
+	register_programmer(&rpgm);
 }
--- flashrom-register_all_programmers_register_generic/programmer.c	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/programmer.c	(Arbeitskopie)
@@ -21,19 +21,6 @@
 #include "flash.h"
 #include "programmer.h"
 
-static const struct par_programmer par_programmer_none = {
-		.chip_readb		= noop_chip_readb,
-		.chip_readw		= fallback_chip_readw,
-		.chip_readl		= fallback_chip_readl,
-		.chip_readn		= fallback_chip_readn,
-		.chip_writeb		= noop_chip_writeb,
-		.chip_writew		= fallback_chip_writew,
-		.chip_writel		= fallback_chip_writel,
-		.chip_writen		= fallback_chip_writen,
-};
-
-const struct par_programmer *par_programmer = &par_programmer_none;
-
 /* No-op shutdown() for programmers which don't need special handling */
 int noop_shutdown(void)
 {
@@ -115,4 +102,37 @@
 {
-	par_programmer = pgm;
-	buses_supported |= buses;
+	struct registered_programmer rpgm;
+
+	rpgm.buses_supported = buses;
+	rpgm.par = *pgm;
+	register_programmer(&rpgm);
+}
+
+/* The limit of 4 is totally arbitrary. */
+#define PROGRAMMERS_MAX 4
+struct registered_programmer registered_programmers[PROGRAMMERS_MAX];
+int registered_programmer_count = 0;
+
+/* This function copies the struct registered_programmer parameter. */
+int register_programmer(struct registered_programmer *pgm)
+{
+	if (registered_programmer_count >= PROGRAMMERS_MAX) {
+		msg_perr("Tried to register more than %i programmer "
+			 "interfaces.\n", PROGRAMMERS_MAX);
+		return 1;
+	}
+	registered_programmers[registered_programmer_count] = *pgm;
+	registered_programmer_count++;
+
+	return 0;
+}
+
+enum chipbustype get_buses_supported(void)
+{
+	int i;
+	enum chipbustype ret = BUS_NONE;
+
+	for (i = 0; i < registered_programmer_count; i++)
+		ret |= registered_programmers[i].buses_supported;
+
+	return ret;
 }
--- flashrom-register_all_programmers_register_generic/flashrom.c	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/flashrom.c	(Arbeitskopie)
@@ -46,9 +46,6 @@
 
 static char *programmer_param = NULL;
 
-/* Supported buses for the current programmer. */
-enum chipbustype buses_supported;
-
 /*
  * Programmers supporting multiple buses can have differing size limits on
  * each bus. Store the limits for each bus in a common struct.
@@ -314,7 +311,6 @@
 		.fwh		= 0xffffffff,
 		.spi		= 0xffffffff,
 	};
-	buses_supported = BUS_NONE;
 	/* Default to top aligned flash at 4 GB. */
 	flashbase = 0;
 	/* Registering shutdown functions is now allowed. */
@@ -361,42 +357,42 @@
 
 void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	par_programmer->chip_writeb(flash, val, addr);
+	flash->pgm->par.chip_writeb(flash, val, addr);
 }
 
 void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
 {
-	par_programmer->chip_writew(flash, val, addr);
+	flash->pgm->par.chip_writew(flash, val, addr);
 }
 
 void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
-	par_programmer->chip_writel(flash, val, addr);
+	flash->pgm->par.chip_writel(flash, val, addr);
 }
 
 void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len)
 {
-	par_programmer->chip_writen(flash, buf, addr, len);
+	flash->pgm->par.chip_writen(flash, buf, addr, len);
 }
 
 uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readb(flash, addr);
+	return flash->pgm->par.chip_readb(flash, addr);
 }
 
 uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readw(flash, addr);
+	return flash->pgm->par.chip_readw(flash, addr);
 }
 
 uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readl(flash, addr);
+	return flash->pgm->par.chip_readl(flash, addr);
 }
 
 void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len)
 {
-	par_programmer->chip_readn(flash, buf, addr, len);
+	flash->pgm->par.chip_readn(flash, buf, addr, len);
 }
 
 void programmer_delay(int usecs)
@@ -938,7 +934,8 @@
 	return 1;
 }
 
-int probe_flash(int startchip, struct flashctx *fill_flash, int force)
+int probe_flash(struct registered_programmer *pgm, int startchip,
+		struct flashctx *fill_flash, int force)
 {
 	const struct flashchip *flash;
 	unsigned long base = 0;
@@ -950,11 +947,12 @@
 	for (flash = flashchips + startchip; flash && flash->name; flash++) {
 		if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0)
 			continue;
-		buses_common = buses_supported & flash->bustype;
+		buses_common = pgm->buses_supported & flash->bustype;
 		if (!buses_common) {
+#if 0 // Does not really make sense anymore if we use a programmer-centric walk.
 			msg_gspew("Probing for %s %s, %d kB: skipped. ",
 			         flash->vendor, flash->name, flash->total_size);
-			tmp = flashbuses_to_text(buses_supported);
+			tmp = flashbuses_to_text(get_buses_supported());
 			msg_gspew("Host bus type %s ", tmp);
 			free(tmp);
 			tmp = flashbuses_to_text(flash->bustype);
@@ -962,6 +960,7 @@
 				  tmp);
 			free(tmp);
 			msg_gspew("\n");
+#endif
 			continue;
 		}
 		msg_gdbg("Probing for %s %s, %d kB: ",
@@ -977,6 +976,7 @@
 
 		/* Start filling in the dynamic data. */
 		memcpy(fill_flash, flash, sizeof(struct flashchip));
+		fill_flash->pgm = pgm;
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
 		fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);
--- flashrom-register_all_programmers_register_generic/programmer.h	(Arbeitskopie)
+++ flashrom-register_all_programmers_register_generic/programmer.h	(Arbeitskopie)
@@ -133,6 +133,8 @@
 	int (*get_miso) (void);
 	void (*request_bus) (void);
 	void (*release_bus) (void);
+	/* Length of half a clock period in usecs. */
+	unsigned int half_period;
 };
 
 #if CONFIG_INTERNAL == 1
@@ -208,6 +210,7 @@
 
 #if NEED_PCI == 1
 /* pcidev.c */
+// FIXME: These need to be local, not global
 extern uint32_t io_base_addr;
 extern struct pci_access *pacc;
 extern struct pci_dev *pcidev_dev;
@@ -427,7 +430,7 @@
 #endif
 
 /* bitbang_spi.c */
-int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod);
+int bitbang_spi_init(const struct bitbang_spi_master *master);
 int bitbang_spi_shutdown(const struct bitbang_spi_master *master);
 
 /* buspirate_spi.c */
@@ -452,6 +455,7 @@
 	uint32_t fwh;
 	uint32_t spi;
 };
+// FIXME: These need to be local, not global
 extern struct decode_sizes max_rom_decode;
 extern int programmer_may_write;
 extern unsigned long flashbase;
@@ -498,7 +502,6 @@
 	SPI_CONTROLLER_SERPROG,
 #endif
 };
-extern const int spi_programmer_count;
 
 #define MAX_DATA_UNSPECIFIED 0
 #define MAX_DATA_READ_UNLIMITED 64 * 1024
@@ -514,9 +517,9 @@
 	/* Optimized functions for this programmer */
 	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	void *data;
 };
 
-extern const struct spi_programmer *spi_programmer;
 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 			     const unsigned char *writearr, unsigned char *readarr);
 int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
@@ -570,8 +573,8 @@
 	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
+	void *data;
 };
-extern const struct opaque_programmer *opaque_programmer;
 void register_opaque_programmer(const struct opaque_programmer *pgm);
 
 /* programmer.c */
@@ -595,9 +598,20 @@
 	uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
 	uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
 	void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+	void *data;
 };
-extern const struct par_programmer *par_programmer;
 void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
+struct registered_programmer {
+	enum chipbustype buses_supported;
+	union {
+		struct par_programmer par;
+		struct spi_programmer spi;
+		struct opaque_programmer opaque;
+	};
+};
+extern struct registered_programmer registered_programmers[];
+extern int registered_programmer_count;
+int register_programmer(struct registered_programmer *pgm);
 
 /* serprog.c */
 #if CONFIG_SERPROG == 1
--- flashrom-register_all_programmers_register_generic/ogp_spi.c	(Revision 1473)
+++ flashrom-register_all_programmers_register_generic/ogp_spi.c	(Arbeitskopie)
@@ -91,6 +91,8 @@
 	.get_miso = ogp_bitbang_get_miso,
 	.request_bus = ogp_request_spibus,
 	.release_bus = ogp_release_spibus,
+	/* no delay for now. */
+	.half_period = 0,
 };
 
 static int ogp_spi_shutdown(void *data)
@@ -136,8 +138,7 @@
 	if (register_shutdown(ogp_spi_shutdown, NULL))
 		return 1;
 
-	/* no delay for now. */
-	if (bitbang_spi_init(&bitbang_spi_master_ogp, 0))
+	if (bitbang_spi_init(&bitbang_spi_master_ogp))
 		return 1;
 
 	return 0;
--- flashrom-register_all_programmers_register_generic/cli_classic.c	(Revision 1473)
+++ flashrom-register_all_programmers_register_generic/cli_classic.c	(Arbeitskopie)
@@ -172,7 +172,7 @@
 	struct flashctx flashes[3];
 	struct flashctx *fill_flash;
 	const char *name;
-	int namelen, opt, i;
+	int namelen, opt, i, j;
 	int startchip = 0, chipcount = 0, option_index = 0, force = 0;
 #if CONFIG_PRINT_WIKI == 1
 	int list_supported_wiki = 0;
@@ -444,17 +444,21 @@
 		ret = 1;
 		goto out_shutdown;
 	}
-	tempstr = flashbuses_to_text(buses_supported);
+	tempstr = flashbuses_to_text(get_buses_supported());
 	msg_pdbg("This programmer supports the following protocols: %s.\n",
 		 tempstr);
 	free(tempstr);
 
-	for (i = 0; i < ARRAY_SIZE(flashes); i++) {
-		startchip = probe_flash(startchip, &flashes[i], 0);
-		if (startchip == -1)
-			break;
-		chipcount++;
-		startchip++;
+	for (j = 0; j < registered_programmer_count; j++) {
+		startchip = 0;
+		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
+			startchip = probe_flash(&registered_programmers[j],
+						startchip, &flashes[i], 0);
+			if (startchip == -1)
+				break;
+			chipcount++;
+			startchip++;
+		}
 	}
 
 	if (chipcount > 1) {
@@ -472,6 +476,7 @@
 			printf("Note: flashrom can never write if the flash "
 			       "chip isn't found automatically.\n");
 		}
+#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered?
 		if (force && read_it && chip_to_probe) {
 			printf("Force read (-f -r -c) requested, pretending "
 			       "the chip is there:\n");
@@ -486,6 +491,7 @@
 			       "contain garbage.\n");
 			return read_flash_to_file(&flashes[0], filename);
 		}
+#endif
 		ret = 1;
 		goto out_shutdown;
 	} else if (!chip_to_probe) {
@@ -502,7 +508,7 @@
 	check_chip_supported(fill_flash);
 
 	size = fill_flash->total_size * 1024;
-	if (check_max_decode((buses_supported & fill_flash->bustype), size) &&
+	if (check_max_decode((get_buses_supported() & fill_flash->bustype), size) &&
 	    (!force)) {
 		fprintf(stderr, "Chip is too big for this programmer "
 			"(-V gives details). Use --force to override.\n");
--- flashrom-register_all_programmers_register_generic/nicintel_spi.c	(Revision 1473)
+++ flashrom-register_all_programmers_register_generic/nicintel_spi.c	(Arbeitskopie)
@@ -137,6 +137,8 @@
 	.get_miso = nicintel_bitbang_get_miso,
 	.request_bus = nicintel_request_spibus,
 	.release_bus = nicintel_release_spibus,
+	/* 1 usec halfperiod delay for now. */
+	.half_period = 1,
 };
 
 static int nicintel_spi_shutdown(void *data)
@@ -181,8 +183,7 @@
 	if (register_shutdown(nicintel_spi_shutdown, NULL))
 		return 1;
 
-	/* 1 usec halfperiod delay for now. */
-	if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1))
+	if (bitbang_spi_init(&bitbang_spi_master_nicintel))
 		return 1;
 
 	return 0;
--- flashrom-register_all_programmers_register_generic/opaque.c	(Revision 1473)
+++ flashrom-register_all_programmers_register_generic/opaque.c	(Arbeitskopie)
@@ -30,70 +30,62 @@
 #include "chipdrivers.h"
 #include "programmer.h"
 
-const struct opaque_programmer opaque_programmer_none = {
-	.max_data_read = MAX_DATA_UNSPECIFIED,
-	.max_data_write = MAX_DATA_UNSPECIFIED,
-	.probe = NULL,
-	.read = NULL,
-	.write = NULL,
-	.erase = NULL,
-};
-
-const struct opaque_programmer *opaque_programmer = &opaque_programmer_none;
-
 int probe_opaque(struct flashctx *flash)
 {
-	if (!opaque_programmer->probe) {
+	if (!flash->pgm->opaque.probe) {
 		msg_perr("%s called before register_opaque_programmer. "
 			 "Please report a bug at flashrom at flashrom.org\n",
 			 __func__);
 		return 0;
 	}
 
-	return opaque_programmer->probe(flash);
+	return flash->pgm->opaque.probe(flash);
 }
 
 int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	if (!opaque_programmer->read) {
+	if (!flash->pgm->opaque.read) {
 		msg_perr("%s called before register_opaque_programmer. "
 			 "Please report a bug at flashrom at flashrom.org\n",
 			 __func__);
 		return 1;
 	}
-	return opaque_programmer->read(flash, buf, start, len);
+	return flash->pgm->opaque.read(flash, buf, start, len);
 }
 
 int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	if (!opaque_programmer->write) {
+	if (!flash->pgm->opaque.write) {
 		msg_perr("%s called before register_opaque_programmer. "
 			 "Please report a bug at flashrom at flashrom.org\n",
 			 __func__);
 		return 1;
 	}
-	return opaque_programmer->write(flash, buf, start, len);
+	return flash->pgm->opaque.write(flash, buf, start, len);
 }
 
 int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
-	if (!opaque_programmer->erase) {
+	if (!flash->pgm->opaque.erase) {
 		msg_perr("%s called before register_opaque_programmer. "
 			 "Please report a bug at flashrom at flashrom.org\n",
 			 __func__);
 		return 1;
 	}
-	return opaque_programmer->erase(flash, blockaddr, blocklen);
+	return flash->pgm->opaque.erase(flash, blockaddr, blocklen);
 }
 
 void register_opaque_programmer(const struct opaque_programmer *pgm)
 {
+	struct registered_programmer rpgm;
+
 	if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
 		msg_perr("%s called with one of probe/read/write/erase being "
 			 "NULL. Please report a bug at flashrom at flashrom.org\n",
 			 __func__);
 		return;
 	}
-	opaque_programmer = pgm;
-	buses_supported |= BUS_PROG;
+	rpgm.buses_supported = BUS_PROG;
+	rpgm.opaque = *pgm;
+	register_programmer(&rpgm);
 }
--- flashrom-register_all_programmers_register_generic/rayer_spi.c	(Revision 1473)
+++ flashrom-register_all_programmers_register_generic/rayer_spi.c	(Arbeitskopie)
@@ -92,6 +92,8 @@
 	.set_sck = rayer_bitbang_set_sck,
 	.set_mosi = rayer_bitbang_set_mosi,
 	.get_miso = rayer_bitbang_get_miso,
+	/* Zero halfperiod delay. */
+	.half_period = 0,
 };
 
 int rayer_spi_init(void)
@@ -171,8 +173,7 @@
 	/* Get the initial value before writing to any line. */
 	lpt_outbyte = INB(lpt_iobase);
 
-	/* Zero halfperiod delay. */
-	if (bitbang_spi_init(&bitbang_spi_master_rayer, 0))
+	if (bitbang_spi_init(&bitbang_spi_master_rayer))
 		return 1;
 
 	return 0;
--- flashrom-register_all_programmers_register_generic/mcp6x_spi.c	(Revision 1473)
+++ flashrom-register_all_programmers_register_generic/mcp6x_spi.c	(Arbeitskopie)
@@ -98,6 +98,8 @@
 	.get_miso = mcp6x_bitbang_get_miso,
 	.request_bus = mcp6x_request_spibus,
 	.release_bus = mcp6x_release_spibus,
+	/* Zero halfperiod delay. */
+	.half_period = 0,
 };
 
 int mcp6x_spi_init(int want_spi)
@@ -159,8 +161,7 @@
 		 (status >> MCP6X_SPI_GRANT) & 0x1);
 	mcp_gpiostate = status & 0xff;
 
-	/* Zero halfperiod delay. */
-	if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 0)) {
+	if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) {
 		/* This should never happen. */
 		msg_perr("MCP6X bitbang SPI master init failed!\n");
 		return 1;


-- 
http://www.hailfinger.org/



From flashrom at mkarcher.dialup.fu-berlin.de  Sun Dec 18 13:57:15 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Sun, 18 Dec 2011 13:57:15 +0100
Subject: [flashrom] [PATCH] Add struct flashctx * everywhere
In-Reply-To: <4EEB4A6D.6050008@gmx.net>
References: <4EB0BEB2.1040701@gmx.net>
	<201111021241.pA2CfGHH021689@mail2.student.tuwien.ac.at>
	<4EB31089.7000902@gmx.net> <4EB9C67A.50502@gmx.net>
	<4EE16214.1030407@gmx.net> <1323886048.4676.6.camel@localhost>
	<4EE922B6.4010302@gmx.net> <4EEB4A6D.6050008@gmx.net>
Message-ID: <1324213035.4037.10.camel@localhost>

Am Freitag, den 16.12.2011, 14:41 +0100 schrieb Carl-Daniel Hailfinger:
> No functional changes. Please test anyway on real hardware.
flashrom -r works on my laptop (ICH7, SPI)

> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

One remark: You might consider to split chip_{read,write}{b,l,w} into
chip_data_{read,write}{b,l,w} and chip_reg_{read,write}{b,l,w} and
implicitly add "virtual_memory" or "virtual_registers" to the address
space offset passed to the new functions (for the case of registers and
data mapped into the same address space, so one chip_read/write family
is usefull at all).

The upside of the proposal is that we get rid of all the
"flash->virtual_memory + " additions scattered over all chip driver, the
downside is yet another layer of indirection.

Please do not merge such a change into this patch, but do that as
follow-up patch.

Thank you for all this tedious mechanical work on the patch,
  Michael Karcher




From flashrom at mkarcher.dialup.fu-berlin.de  Sun Dec 18 14:22:34 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Sun, 18 Dec 2011 14:22:34 +0100
Subject: [flashrom] [PATCH] Generic programmer registration: final part
In-Reply-To: <4EECA5FE.6060609@gmx.net>
References: <4EECA5FE.6060609@gmx.net>
Message-ID: <1324214554.4037.29.camel@localhost>

Am Samstag, den 17.12.2011, 15:23 +0100 schrieb Carl-Daniel Hailfinger:
> This depends on [PATCH] Add struct flashctx * everywhere
But not on the revision you posted on December 16, 14:41 CET.

A patch that is rebased to that revision and fixes a compiler warning
(which gets fatal due to -Werror) is attached.

> - mainboard native SPI (ICH SPI, SB600 SPI, VIA SPI)
ICH7 SPI works for reading. Currently I don't have no hardware at hand
to test other stuff.

>  int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
>  		const unsigned char *writearr, unsigned char *readarr)
>  {
> -	if (!spi_programmer->command) {
> +	if (!flash->pgm->spi.command) {
>  		msg_perr("%s called, but SPI is unsupported on this "
>  			 "hardware. Please report a bug at "
>  			 "flashrom at flashrom.org\n", __func__);
>  		return 1;
>  	}
I suggest to drop the NULL pointer check here, and just do it once in
register_spi_programmer (refusing to call register_programmer if any
function pointer is NULL)
Same for the other functions in here.


> -static const struct par_programmer par_programmer_none = {
> -		.chip_readb		= noop_chip_readb,
> -		.chip_readw		= fallback_chip_readw,
> -		.chip_readl		= fallback_chip_readl,
> -		.chip_readn		= fallback_chip_readn,
> -		.chip_writeb		= noop_chip_writeb,
> -		.chip_writew		= fallback_chip_writew,
> -		.chip_writel		= fallback_chip_writel,
> -		.chip_writen		= fallback_chip_writen,
> -};
I suggest to drop noop_chip_readb/noop_chip_writeb at the same time as
we drop par_programmer_none, as these functions are no longer used.


> +enum chipbustype get_buses_supported(void)
> +{
> +	int i;
> +	enum chipbustype ret = BUS_NONE;
> +
> +	for (i = 0; i < registered_programmer_count; i++)
> +		ret |= registered_programmers[i].buses_supported;
> +
> +	return ret;
>  }
Looking at this function, just keep in mind it returns a list of busses
supported by all the programmers found.

> +#if 0 // Does not really make sense anymore if we use a programmer-centric walk.
>  			msg_gspew("Probing for %s %s, %d kB: skipped. ",
>  			         flash->vendor, flash->name, flash->total_size);
> -			tmp = flashbuses_to_text(buses_supported);
> +			tmp = flashbuses_to_text(get_buses_supported());
>  			msg_gspew("Host bus type %s ", tmp);
If we reinstate this code (i.e. decide to not #if 0 it), don't use
get_buses_supported(), but pgm->buses_supported. Also don't call it
"Host bus type", but "programmer bus type"

> --- flashrom-register_all_programmers_register_generic/ogp_spi.c	(Revision 1473)
> +++ flashrom-register_all_programmers_register_generic/ogp_spi.c	(Arbeitskopie)
> @@ -91,6 +91,8 @@
>  	.get_miso = ogp_bitbang_get_miso,
>  	.request_bus = ogp_request_spibus,
>  	.release_bus = ogp_release_spibus,
> +	/* no delay for now. */
> +	.half_period = 0,
Is this comment really useful? Opposed to where it was used before, in
this place, the name of the setting "half_period" is explicitly
mentioned.

> +	tempstr = flashbuses_to_text(get_buses_supported());
>  	msg_pdbg("This programmer supports the following protocols: %s.\n",
>  		 tempstr);
It's definitely not "this programmer", as should be obvious if you "kept
in mind" as I told you that get_buses_supportet returns the union of all
programmers. So either move this into the loop over all the programmers
and print programmer specific bus types, or call it something like "The
programmers in this systems provide the following protocols: %s.\n"

> +	/* 1 usec halfperiod delay for now. */
> +	.half_period = 1,
Same comment as above. If you want to have the unit visible, rename the
variable to half_period_usecs, instead of adding comments of
questionable information content.

No ack yet because of the non-appliacation of your patch and the use of
get_buses_supported where a specific programmer bus list would make more
sense.
The "superflous comment" issue, the "NULL pointer on each spi call"
issue, and the "orphaned noop" issue are not something that blocks
acking the patch.

Regards,
  Michael Karcher
-------------- next part --------------
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From svn at flashrom.org  Sun Dec 18 16:01:24 2011
From: svn at flashrom.org (repository service)
Date: Sun, 18 Dec 2011 16:01:24 +0100
Subject: [flashrom] [commit] r1474 - trunk
Message-ID: <E1RcIEu-0008Hh-VM@ra.coresystems.de>

Author: hailfinger
Date: Sun Dec 18 16:01:24 2011
New Revision: 1474
URL: http://flashrom.org/trac/flashrom/changeset/1474

Log:
Add struct flashctx * parameter to all functions accessing flash chips.

All programmer access function prototypes except init have been made
static and moved to the respective file.

A few internal functions in flash chip drivers had chipaddr parameters
which are no longer needed.

The lines touched by flashctx changes have been adjusted to 80 columns
except in header files.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

Modified:
   trunk/82802ab.c
   trunk/a25.c
   trunk/at25.c
   trunk/atahpt.c
   trunk/bitbang_spi.c
   trunk/buspirate_spi.c
   trunk/chipdrivers.h
   trunk/dediprog.c
   trunk/drkaiser.c
   trunk/dummyflasher.c
   trunk/flash.h
   trunk/flashrom.c
   trunk/ft2232_spi.c
   trunk/gfxnvidia.c
   trunk/ichspi.c
   trunk/internal.c
   trunk/it85spi.c
   trunk/it87spi.c
   trunk/jedec.c
   trunk/linux_spi.c
   trunk/m29f400bt.c
   trunk/nic3com.c
   trunk/nicintel.c
   trunk/nicnatsemi.c
   trunk/nicrealtek.c
   trunk/pm49fl00x.c
   trunk/programmer.c
   trunk/programmer.h
   trunk/satamv.c
   trunk/satasii.c
   trunk/sb600spi.c
   trunk/serprog.c
   trunk/sharplhf00l04.c
   trunk/spi.c
   trunk/spi25.c
   trunk/sst28sf040.c
   trunk/sst49lfxxxc.c
   trunk/sst_fwhub.c
   trunk/stm50flw0x0x.c
   trunk/w29ee011.c
   trunk/w39.c
   trunk/wbsio_spi.c

Modified: trunk/82802ab.c
==============================================================================
--- trunk/82802ab.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/82802ab.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -47,18 +47,18 @@
 	int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0;
 
 	/* Reset to get a clean state */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 	programmer_delay(10);
 
 	/* Enter ID mode */
-	chip_writeb(0x90, bios);
+	chip_writeb(flash, 0x90, bios);
 	programmer_delay(10);
 
-	id1 = chip_readb(bios + (0x00 << shifted));
-	id2 = chip_readb(bios + (0x01 << shifted));
+	id1 = chip_readb(flash, bios + (0x00 << shifted));
+	id2 = chip_readb(flash, bios + (0x01 << shifted));
 
 	/* Leave ID mode */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	programmer_delay(10);
 
@@ -71,8 +71,8 @@
 	 * Read the product ID location again. We should now see normal
 	 * flash contents.
 	 */
-	flashcontent1 = chip_readb(bios + (0x00 << shifted));
-	flashcontent2 = chip_readb(bios + (0x01 << shifted));
+	flashcontent1 = chip_readb(flash, bios + (0x00 << shifted));
+	flashcontent2 = chip_readb(flash, bios + (0x01 << shifted));
 
 	if (id1 == flashcontent1)
 		msg_cdbg(", id1 is normal flash content");
@@ -94,15 +94,15 @@
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(0x70, bios);
-	if ((chip_readb(bios) & 0x80) == 0) {	// it's busy
-		while ((chip_readb(bios) & 0x80) == 0) ;
+	chip_writeb(flash, 0x70, bios);
+	if ((chip_readb(flash, bios) & 0x80) == 0) {	// it's busy
+		while ((chip_readb(flash, bios) & 0x80) == 0) ;
 	}
 
-	status = chip_readb(bios);
+	status = chip_readb(flash, bios);
 
 	/* Reset to get a clean state */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	return status;
 }
@@ -113,7 +113,7 @@
 	//chipaddr wrprotect = flash->virtual_registers + page + 2;
 
 	for (i = 0; i < flash->total_size * 1024; i+= flash->page_size)
-		chip_writeb(0, flash->virtual_registers + i + 2);
+		chip_writeb(flash, 0, flash->virtual_registers + i + 2);
 
 	return 0;
 }
@@ -125,11 +125,11 @@
 	uint8_t status;
 
 	// clear status register
-	chip_writeb(0x50, bios + page);
+	chip_writeb(flash, 0x50, bios + page);
 
 	// now start it
-	chip_writeb(0x20, bios + page);
-	chip_writeb(0xd0, bios + page);
+	chip_writeb(flash, 0x20, bios + page);
+	chip_writeb(flash, 0xd0, bios + page);
 	programmer_delay(10);
 
 	// now let's see what the register is
@@ -141,15 +141,16 @@
 }
 
 /* chunksize is 1 */
-int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start,
+		  unsigned int len)
 {
 	int i;
 	chipaddr dst = flash->virtual_memory + start;
 
 	for (i = 0; i < len; i++) {
 		/* transfer data from source to destination */
-		chip_writeb(0x40, dst);
-		chip_writeb(*src++, dst++);
+		chip_writeb(flash, 0x40, dst);
+		chip_writeb(flash, *src++, dst++);
 		wait_82802ab(flash);
 	}
 
@@ -164,13 +165,13 @@
 	int i;
 
 	/* Clear status register */
-	chip_writeb(0x50, bios);
+	chip_writeb(flash, 0x50, bios);
 
 	/* Read identifier codes */
-	chip_writeb(0x90, bios);
+	chip_writeb(flash, 0x90, bios);
 
 	/* Read master lock-bit */
-	mcfg = chip_readb(bios + 0x3);
+	mcfg = chip_readb(flash, bios + 0x3);
 	msg_cdbg("master lock is ");
 	if (mcfg) {
 		msg_cdbg("locked!\n");
@@ -181,7 +182,7 @@
 
 	/* Read block lock-bits */
 	for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) {
-		bcfg = chip_readb(bios + i + 2); // read block lock config
+		bcfg = chip_readb(flash, bios + i + 2); // read block lock config
 		msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un");
 		if (bcfg) {
 			need_unlock = 1;
@@ -189,14 +190,14 @@
 	}
 
 	/* Reset chip */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	/* Unlock: clear block lock-bits, if needed */
 	if (can_unlock && need_unlock) {
 		msg_cdbg("Unlock: ");
-		chip_writeb(0x60, bios);
-		chip_writeb(0xD0, bios);
-		chip_writeb(0xFF, bios);
+		chip_writeb(flash, 0x60, bios);
+		chip_writeb(flash, 0xD0, bios);
+		chip_writeb(flash, 0xFF, bios);
 		msg_cdbg("Done!\n");
 	}
 
@@ -220,10 +221,10 @@
 	wait_82802ab(flash);
 
 	/* Read identifier codes */
-	chip_writeb(0x90, bios);
+	chip_writeb(flash, 0x90, bios);
 
 	/* Read master lock-bit */
-	mcfg = chip_readb(bios + 0x3);
+	mcfg = chip_readb(flash, bios + 0x3);
 	msg_cdbg("master lock is ");
 	if (mcfg) {
 		msg_cdbg("locked!\n");
@@ -235,7 +236,7 @@
 	/* Read block lock-bits, 8 * 8 KB + 15 * 64 KB */
 	for (i = 0; i < flash->total_size * 1024;
 	     i += (i >= (64 * 1024) ? 64 * 1024 : 8 * 1024)) {
-		bcfg = chip_readb(bios + i + 2); /* read block lock config */
+		bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */
 		msg_cdbg("block lock at %06x is %slocked!\n", i,
 			 bcfg ? "" : "un");
 		if (bcfg)
@@ -243,14 +244,14 @@
 	}
 
 	/* Reset chip */
-	chip_writeb(0xFF, bios);
+	chip_writeb(flash, 0xFF, bios);
 
 	/* Unlock: clear block lock-bits, if needed */
 	if (can_unlock && need_unlock) {
 		msg_cdbg("Unlock: ");
-		chip_writeb(0x60, bios);
-		chip_writeb(0xD0, bios);
-		chip_writeb(0xFF, bios);
+		chip_writeb(flash, 0x60, bios);
+		chip_writeb(flash, 0xD0, bios);
+		chip_writeb(flash, 0xFF, bios);
 		wait_82802ab(flash);
 		msg_cdbg("Done!\n");
 	}

Modified: trunk/a25.c
==============================================================================
--- trunk/a25.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/a25.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -33,7 +33,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);
@@ -49,7 +49,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);
@@ -64,7 +64,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);
@@ -82,7 +82,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_amic_a25_srwd(status);

Modified: trunk/at25.c
==============================================================================
--- trunk/at25.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/at25.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -61,7 +61,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_atmel_at25_srpl(status);
@@ -84,7 +84,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_atmel_at25_srpl(status);
@@ -103,7 +103,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
@@ -127,7 +127,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
@@ -151,7 +151,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
 	spi_prettyprint_status_register_atmel_at25_srpl(status);
@@ -168,7 +168,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & (3 << 2)) == 0)
 		return 0;
@@ -195,7 +195,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & (3 << 2)) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
@@ -223,7 +223,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & 0x6c) == 0)
 		return 0;
@@ -244,7 +244,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & 0x6c) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
@@ -257,7 +257,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & 0x7c) == 0)
 		return 0;
@@ -278,7 +278,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & 0x7c) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;

Modified: trunk/atahpt.c
==============================================================================
--- trunk/atahpt.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/atahpt.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -40,6 +40,10 @@
 	{},
 };
 
+static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr);
+static uint8_t atahpt_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr);
 static const struct par_programmer par_programmer_atahpt = {
 		.chip_readb		= atahpt_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -80,13 +84,15 @@
 	return 0;
 }
 
-void atahpt_chip_writeb(uint8_t val, chipaddr addr)
+static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	OUTB(val, io_base_addr + BIOS_ROM_DATA);
 }
 
-uint8_t atahpt_chip_readb(const chipaddr addr)
+static uint8_t atahpt_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	return INB(io_base_addr + BIOS_ROM_DATA);

Modified: trunk/bitbang_spi.c
==============================================================================
--- trunk/bitbang_spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/bitbang_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -63,8 +63,10 @@
 		bitbang_spi_master->release_bus();
 }
 
-static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
+static int bitbang_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_bitbang = {
 	.type		= SPI_CONTROLLER_BITBANG,
@@ -141,8 +143,10 @@
 	return ret;
 }
 
-static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+static int bitbang_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr)
 {
 	int i;
 

Modified: trunk/buspirate_spi.c
==============================================================================
--- trunk/buspirate_spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/buspirate_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -86,8 +86,11 @@
 	return 0;
 }
 
-static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
+static int buspirate_spi_send_command(struct flashctx *flash,
+				      unsigned int writecnt,
+				      unsigned int readcnt,
+				      const unsigned char *writearr,
+				      unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_buspirate = {
 	.type		= SPI_CONTROLLER_BUSPIRATE,
@@ -291,8 +294,11 @@
 	return 0;
 }
 
-static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+static int buspirate_spi_send_command(struct flashctx *flash,
+				      unsigned int writecnt,
+				      unsigned int readcnt,
+				      const unsigned char *writearr,
+				      unsigned char *readarr)
 {
 	static unsigned char *buf = NULL;
 	unsigned int i = 0;

Modified: trunk/chipdrivers.h
==============================================================================
--- trunk/chipdrivers.h	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/chipdrivers.h	Sun Dec 18 16:01:24 2011	(r1474)
@@ -33,8 +33,8 @@
 int probe_spi_rems(struct flashctx *flash);
 int probe_spi_res1(struct flashctx *flash);
 int probe_spi_res2(struct flashctx *flash);
-int spi_write_enable(void);
-int spi_write_disable(void);
+int spi_write_enable(struct flashctx *flash);
+int spi_write_disable(struct flashctx *flash);
 int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
@@ -44,16 +44,16 @@
 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
-uint8_t spi_read_status_register(void);
+uint8_t spi_read_status_register(struct flashctx *flash);
 int spi_write_status_register(struct flashctx *flash, int status);
 void spi_prettyprint_status_register_bit(uint8_t status, int bit);
 void spi_prettyprint_status_register_bp3210(uint8_t status, int bp);
 void spi_prettyprint_status_register_welwip(uint8_t status);
 int spi_prettyprint_status_register(struct flashctx *flash);
 int spi_disable_blockprotect(struct flashctx *flash);
-int spi_byte_program(unsigned int addr, uint8_t databyte);
-int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len);
-int spi_nbyte_read(unsigned int addr, uint8_t *bytes, unsigned int len);
+int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte);
+int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
+int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len);
 int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
 int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
 int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
@@ -95,9 +95,9 @@
 
 /* jedec.c */
 uint8_t oddparity(uint8_t val);
-void toggle_ready_jedec(chipaddr dst);
-void data_polling_jedec(chipaddr dst, uint8_t data);
-int write_byte_program_jedec(chipaddr bios, uint8_t *src,
+void toggle_ready_jedec(struct flashctx *flash, chipaddr dst);
+void data_polling_jedec(struct flashctx *flash, chipaddr dst, uint8_t data);
+int write_byte_program_jedec(struct flashctx *flash, chipaddr bios, uint8_t *src,
 			     chipaddr dst);
 int probe_jedec(struct flashctx *flash);
 int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
@@ -111,7 +111,7 @@
 int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
 int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len);
 int write_m29f400bt(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
-void protect_m29f400bt(chipaddr bios);
+void protect_m29f400bt(struct flashctx *flash, chipaddr bios);
 
 /* pm49fl00x.c */
 int unlock_49fl00x(struct flashctx *flash);

Modified: trunk/dediprog.c
==============================================================================
--- trunk/dediprog.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/dediprog.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -317,8 +317,11 @@
 	return ret;
 }
 
-static int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr)
+static int dediprog_spi_send_command(struct flashctx *flash,
+				     unsigned int writecnt,
+				     unsigned int readcnt,
+				     const unsigned char *writearr,
+				     unsigned char *readarr)
 {
 	int ret;
 

Modified: trunk/drkaiser.c
==============================================================================
--- trunk/drkaiser.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/drkaiser.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -39,6 +39,10 @@
 
 static uint8_t *drkaiser_bar;
 
+static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr);
+static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr);
 static const struct par_programmer par_programmer_drkaiser = {
 		.chip_readb		= drkaiser_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -84,12 +88,14 @@
 	return 0;
 }
 
-void drkaiser_chip_writeb(uint8_t val, chipaddr addr)
+static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr)
 {
 	pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
 }
 
-uint8_t drkaiser_chip_readb(const chipaddr addr)
+static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr)
 {
 	return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK));
 }

Modified: trunk/dummyflasher.c
==============================================================================
--- trunk/dummyflasher.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/dummyflasher.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -60,10 +60,28 @@
 
 static unsigned int spi_write_256_chunksize = 256;
 
-static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr);
+static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr);
 static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len);
+static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
+			      chipaddr addr);
+static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
+			      chipaddr addr);
+static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
+			      chipaddr addr);
+static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
+			      chipaddr addr, size_t len);
+static uint8_t dummy_chip_readb(const struct flashctx *flash,
+				const chipaddr addr);
+static uint16_t dummy_chip_readw(const struct flashctx *flash,
+				 const chipaddr addr);
+static uint32_t dummy_chip_readl(const struct flashctx *flash,
+				 const chipaddr addr);
+static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			     const chipaddr addr, size_t len);
 
 static const struct spi_programmer spi_programmer_dummyflasher = {
 	.type		= SPI_CONTROLLER_DUMMY,
@@ -263,22 +281,26 @@
 		  __func__, (unsigned long)len, virt_addr);
 }
 
-void dummy_chip_writeb(uint8_t val, chipaddr addr)
+static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
+			      chipaddr addr)
 {
 	msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val);
 }
 
-void dummy_chip_writew(uint16_t val, chipaddr addr)
+static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
+			      chipaddr addr)
 {
 	msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val);
 }
 
-void dummy_chip_writel(uint32_t val, chipaddr addr)
+static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
+			      chipaddr addr)
 {
 	msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val);
 }
 
-void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len)
+static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
+			      chipaddr addr, size_t len)
 {
 	size_t i;
 	msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):",
@@ -290,25 +312,29 @@
 	}
 }
 
-uint8_t dummy_chip_readb(const chipaddr addr)
+static uint8_t dummy_chip_readb(const struct flashctx *flash,
+				const chipaddr addr)
 {
 	msg_pspew("%s:  addr=0x%lx, returning 0xff\n", __func__, addr);
 	return 0xff;
 }
 
-uint16_t dummy_chip_readw(const chipaddr addr)
+static uint16_t dummy_chip_readw(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	msg_pspew("%s:  addr=0x%lx, returning 0xffff\n", __func__, addr);
 	return 0xffff;
 }
 
-uint32_t dummy_chip_readl(const chipaddr addr)
+static uint32_t dummy_chip_readl(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	msg_pspew("%s:  addr=0x%lx, returning 0xffffffff\n", __func__, addr);
 	return 0xffffffff;
 }
 
-void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len)
+static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			     const chipaddr addr, size_t len)
 {
 	msg_pspew("%s:  addr=0x%lx, len=0x%lx, returning array of 0xff\n",
 		  __func__, addr, (unsigned long)len);
@@ -317,8 +343,10 @@
 }
 
 #if EMULATE_SPI_CHIP
-static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int emulate_spi_chip_response(unsigned int writecnt,
+				     unsigned int readcnt,
+				     const unsigned char *writearr,
+				     unsigned char *readarr)
 {
 	unsigned int offs;
 	static int unsigned aai_offs;
@@ -513,8 +541,10 @@
 }
 #endif
 
-static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr)
 {
 	int i;
 

Modified: trunk/flash.h
==============================================================================
--- trunk/flash.h	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/flash.h	Sun Dec 18 16:01:24 2011	(r1474)
@@ -44,14 +44,6 @@
 void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
 				  size_t len);
 void programmer_unmap_flash_region(void *virt_addr, size_t len);
-void chip_writeb(uint8_t val, chipaddr addr);
-void chip_writew(uint16_t val, chipaddr addr);
-void chip_writel(uint32_t val, chipaddr addr);
-void chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint8_t chip_readb(const chipaddr addr);
-uint16_t chip_readw(const chipaddr addr);
-uint32_t chip_readl(const chipaddr addr);
-void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 void programmer_delay(int usecs);
 
 #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
@@ -212,6 +204,15 @@
 
 extern const struct flashchip flashchips[];
 
+void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
+void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
+void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
+void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
+uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr);
+uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr);
+uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr);
+void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+
 /* print.c */
 char *flashbuses_to_text(enum chipbustype bustype);
 void print_supported(void);
@@ -292,9 +293,8 @@
 	const unsigned char *writearr;
 	unsigned char *readarr;
 };
-int spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
-int spi_send_multicommand(struct spi_command *cmds);
-uint32_t spi_get_valid_read_addr(void);
+int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
+uint32_t spi_get_valid_read_addr(struct flashctx *flash);
 
 #endif				/* !__FLASH_H__ */

Modified: trunk/flashrom.c
==============================================================================
--- trunk/flashrom.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/flashrom.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -359,44 +359,46 @@
 	programmer_table[programmer].unmap_flash_region(virt_addr, len);
 }
 
-void chip_writeb(uint8_t val, chipaddr addr)
+void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	par_programmer->chip_writeb(val, addr);
+	par_programmer->chip_writeb(flash, val, addr);
 }
 
-void chip_writew(uint16_t val, chipaddr addr)
+void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
 {
-	par_programmer->chip_writew(val, addr);
+	par_programmer->chip_writew(flash, val, addr);
 }
 
-void chip_writel(uint32_t val, chipaddr addr)
+void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
-	par_programmer->chip_writel(val, addr);
+	par_programmer->chip_writel(flash, val, addr);
 }
 
-void chip_writen(uint8_t *buf, chipaddr addr, size_t len)
+void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
+		 size_t len)
 {
-	par_programmer->chip_writen(buf, addr, len);
+	par_programmer->chip_writen(flash, buf, addr, len);
 }
 
-uint8_t chip_readb(const chipaddr addr)
+uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readb(addr);
+	return par_programmer->chip_readb(flash, addr);
 }
 
-uint16_t chip_readw(const chipaddr addr)
+uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readw(addr);
+	return par_programmer->chip_readw(flash, addr);
 }
 
-uint32_t chip_readl(const chipaddr addr)
+uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readl(addr);
+	return par_programmer->chip_readl(flash, addr);
 }
 
-void chip_readn(uint8_t *buf, chipaddr addr, size_t len)
+void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
+		size_t len)
 {
-	par_programmer->chip_readn(buf, addr, len);
+	par_programmer->chip_readn(flash, buf, addr, len);
 }
 
 void programmer_delay(int usecs)
@@ -412,9 +414,10 @@
 	flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size);
 }
 
-int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		   int unsigned len)
 {
-	chip_readn(buf, flash->virtual_memory + start, len);
+	chip_readn(flash, buf, flash->virtual_memory + start, len);
 
 	return 0;
 }
@@ -535,7 +538,8 @@
 }
 
 /* start is an offset to the base address of the flash chip */
-int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
+int check_erased_range(struct flashctx *flash, unsigned int start,
+		       unsigned int len)
 {
 	int ret;
 	uint8_t *cmpbuf = malloc(len);
@@ -558,8 +562,8 @@
  * @message	string to print in the "FAILED" message
  * @return	0 for success, -1 for failure
  */
-int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len,
-		 const char *message)
+int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start,
+		 unsigned int len, const char *message)
 {
 	unsigned int i;
 	uint8_t *readbuf = malloc(len);
@@ -1537,7 +1541,8 @@
 	/* Check that virtual_memory in struct flashctx is placed directly
 	 * after the members copied from struct flashchip.
 	 */
-	if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) {
+	if (sizeof(struct flashchip) !=
+	    offsetof(struct flashctx, virtual_memory)) {
 		msg_gerr("struct flashctx broken!\n");
 		ret = 1;
 	}
@@ -1618,7 +1623,8 @@
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(struct flashctx *flash, int force, int read_it, int write_it, int erase_it, int verify_it)
+int chip_safety_check(struct flashctx *flash, int force, int read_it,
+		      int write_it, int erase_it, int verify_it)
 {
 	if (!programmer_may_write && (write_it || erase_it)) {
 		msg_perr("Write/erase is not working yet on your programmer in "
@@ -1679,7 +1685,8 @@
  * but right now it allows us to split off the CLI code.
  * Besides that, the function itself is a textbook example of abysmal code flow.
  */
-int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it)
+int doit(struct flashctx *flash, int force, const char *filename, int read_it,
+	 int write_it, int erase_it, int verify_it)
 {
 	uint8_t *oldcontents;
 	uint8_t *newcontents;

Modified: trunk/ft2232_spi.c
==============================================================================
--- trunk/ft2232_spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/ft2232_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -144,8 +144,10 @@
 	return 0;
 }
 
-static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr);
+static int ft2232_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_ft2232 = {
 	.type		= SPI_CONTROLLER_FT2232,
@@ -342,8 +344,10 @@
 }
 
 /* Returns 0 upon success, a negative number upon errors. */
-static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+static int ft2232_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr)
 {
 	struct ftdi_context *ftdic = &ftdic_context;
 	static unsigned char *buf = NULL;

Modified: trunk/gfxnvidia.c
==============================================================================
--- trunk/gfxnvidia.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/gfxnvidia.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -61,6 +61,10 @@
 	{},
 };
 
+static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
+				  chipaddr addr);
+static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash,
+				    const chipaddr addr);
 static const struct par_programmer par_programmer_gfxnvidia = {
 		.chip_readb		= gfxnvidia_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -112,12 +116,14 @@
 	return 0;
 }
 
-void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr)
+static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
+				  chipaddr addr)
 {
 	pci_mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
 }
 
-uint8_t gfxnvidia_chip_readb(const chipaddr addr)
+static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash,
+				    const chipaddr addr)
 {
 	return pci_mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
 }

Modified: trunk/ichspi.c
==============================================================================
--- trunk/ichspi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/ichspi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -228,7 +228,7 @@
 static int find_preop(OPCODES *op, uint8_t preop);
 static int generate_opcodes(OPCODES * op);
 static int program_opcodes(OPCODES *op, int enable_undo);
-static int run_opcode(OPCODE op, uint32_t offset,
+static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset,
 		      uint8_t datalength, uint8_t * data);
 
 /* for pairing opcodes with their required preop */
@@ -638,7 +638,7 @@
  * Note that using len > spi_programmer->max_data_read will return garbage or
  * may even crash.
  */
- static void ich_read_data(uint8_t *data, int len, int reg0_off)
+static void ich_read_data(uint8_t *data, int len, int reg0_off)
  {
 	int i;
 	uint32_t temp32 = 0;
@@ -956,7 +956,7 @@
 	return 0;
 }
 
-static int run_opcode(OPCODE op, uint32_t offset,
+static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset,
 		      uint8_t datalength, uint8_t * data)
 {
 	/* max_data_read == max_data_write for all Intel/VIA SPI masters */
@@ -983,8 +983,10 @@
 	}
 }
 
-static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		    const unsigned char *writearr, unsigned char *readarr)
+static int ich_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				unsigned int readcnt,
+				const unsigned char *writearr,
+				unsigned char *readarr)
 {
 	int result;
 	int opcode_index = -1;
@@ -1076,7 +1078,7 @@
 		count = readcnt;
 	}
 
-	result = run_opcode(*opcode, addr, count, data);
+	result = run_opcode(flash, *opcode, addr, count, data);
 	if (result) {
 		msg_pdbg("Running OPCODE 0x%02x failed ", opcode->opcode);
 		if ((opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) ||
@@ -1175,7 +1177,7 @@
 	return 0;
 }
 
-int ich_hwseq_probe(struct flashctx *flash)
+static int ich_hwseq_probe(struct flashctx *flash)
 {
 	uint32_t total_size, boundary;
 	uint32_t erase_size_low, size_low, erase_size_high, size_high;
@@ -1228,9 +1230,8 @@
 	return 1;
 }
 
-int ich_hwseq_block_erase(struct flashctx *flash,
-			  unsigned int addr,
-			  unsigned int len)
+static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr,
+				 unsigned int len)
 {
 	uint32_t erase_block;
 	uint16_t hsfc;
@@ -1278,8 +1279,8 @@
 	return 0;
 }
 
-int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, unsigned int addr,
-		   unsigned int len)
+static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
+			  unsigned int addr, unsigned int len)
 {
 	uint16_t hsfc;
 	uint16_t timeout = 100 * 60;
@@ -1316,8 +1317,8 @@
 	return 0;
 }
 
-int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, unsigned int addr,
-		    unsigned int len)
+static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf,
+			   unsigned int addr, unsigned int len)
 {
 	uint16_t hsfc;
 	uint16_t timeout = 100 * 60;
@@ -1355,7 +1356,8 @@
 	return 0;
 }
 
-static int ich_spi_send_multicommand(struct spi_command *cmds)
+static int ich_spi_send_multicommand(struct flashctx *flash,
+				     struct spi_command *cmds)
 {
 	int ret = 0;
 	int i;
@@ -1405,7 +1407,7 @@
 			 * preoppos matched, this is a normal opcode.
 			 */
 		}
-		ret = ich_spi_send_command(cmds->writecnt, cmds->readcnt,
+		ret = ich_spi_send_command(flash, cmds->writecnt, cmds->readcnt,
 					   cmds->writearr, cmds->readarr);
 		/* Reset the type of all opcodes to non-atomic. */
 		for (i = 0; i < 8; i++)

Modified: trunk/internal.c
==============================================================================
--- trunk/internal.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/internal.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -127,6 +127,20 @@
 int is_laptop = 0;
 int laptop_ok = 0;
 
+static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr);
+static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
+				 chipaddr addr);
+static void internal_chip_writel(const struct flashctx *flash, uint32_t val,
+				 chipaddr addr);
+static uint8_t internal_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr);
+static uint16_t internal_chip_readw(const struct flashctx *flash,
+				    const chipaddr addr);
+static uint32_t internal_chip_readl(const struct flashctx *flash,
+				    const chipaddr addr);
+static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
+				const chipaddr addr, size_t len);
 static const struct par_programmer par_programmer_internal = {
 		.chip_readb		= internal_chip_readb,
 		.chip_readw		= internal_chip_readw,
@@ -324,37 +338,44 @@
 }
 #endif
 
-void internal_chip_writeb(uint8_t val, chipaddr addr)
+static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr)
 {
 	mmio_writeb(val, (void *) addr);
 }
 
-void internal_chip_writew(uint16_t val, chipaddr addr)
+static void internal_chip_writew(const struct flashctx *flash, uint16_t val,
+				 chipaddr addr)
 {
 	mmio_writew(val, (void *) addr);
 }
 
-void internal_chip_writel(uint32_t val, chipaddr addr)
+static void internal_chip_writel(const struct flashctx *flash, uint32_t val,
+				 chipaddr addr)
 {
 	mmio_writel(val, (void *) addr);
 }
 
-uint8_t internal_chip_readb(const chipaddr addr)
+static uint8_t internal_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr)
 {
 	return mmio_readb((void *) addr);
 }
 
-uint16_t internal_chip_readw(const chipaddr addr)
+static uint16_t internal_chip_readw(const struct flashctx *flash,
+				    const chipaddr addr)
 {
 	return mmio_readw((void *) addr);
 }
 
-uint32_t internal_chip_readl(const chipaddr addr)
+static uint32_t internal_chip_readl(const struct flashctx *flash,
+				    const chipaddr addr)
 {
 	return mmio_readl((void *) addr);
 }
 
-void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len)
+static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
+				const chipaddr addr, size_t len)
 {
 	memcpy(buf, (void *)addr, len);
 	return;

Modified: trunk/it85spi.c
==============================================================================
--- trunk/it85spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/it85spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -270,8 +270,10 @@
 	return 0;
 }
 
-static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr);
+static int it85xx_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr);
 
 static const struct spi_programmer spi_programmer_it85xx = {
 	.type		= SPI_CONTROLLER_IT85XX,
@@ -320,8 +322,10 @@
  *   3. read date from LPC/FWH address 0xffff_fdxxh (drive CE# low and get
  *      data from MISO)
  */
-static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr)
+static int it85xx_spi_send_command(struct flashctx *flash,
+				   unsigned int writecnt, unsigned int readcnt,
+				   const unsigned char *writearr,
+				   unsigned char *readarr)
 {
 	int i;
 

Modified: trunk/it87spi.c
==============================================================================
--- trunk/it87spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/it87spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -103,8 +103,10 @@
 	return;
 }
 
-static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr);
+static int it8716f_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr);
 static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 				 unsigned int start, unsigned int len);
 static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
@@ -247,8 +249,10 @@
  * commands with the address in inverse wire order. That's why the register
  * ordering in case 4 and 5 may seem strange.
  */
-static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *writearr, unsigned char *readarr)
+static int it8716f_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr)
 {
 	uint8_t busy, writeenc;
 	int i;
@@ -319,19 +323,19 @@
 	int result;
 	chipaddr bios = flash->virtual_memory;
 
-	result = spi_write_enable();
+	result = spi_write_enable(flash);
 	if (result)
 		return result;
 	/* FIXME: The command below seems to be redundant or wrong. */
 	OUTB(0x06, it8716f_flashport + 1);
 	OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
 	for (i = 0; i < flash->page_size; i++)
-		chip_writeb(buf[i], bios + start + i);
+		chip_writeb(flash, buf[i], bios + start + i);
 	OUTB(0, it8716f_flashport);
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 1-10 ms, so wait in 1 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(1000);
 	return 0;
 }

Modified: trunk/jedec.c
==============================================================================
--- trunk/jedec.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/jedec.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -37,17 +37,18 @@
 	return (val ^ (val >> 1)) & 0x1;
 }
 
-static void toggle_ready_jedec_common(chipaddr dst, int delay)
+static void toggle_ready_jedec_common(const struct flashctx *flash,
+				      chipaddr dst, int delay)
 {
 	unsigned int i = 0;
 	uint8_t tmp1, tmp2;
 
-	tmp1 = chip_readb(dst) & 0x40;
+	tmp1 = chip_readb(flash, dst) & 0x40;
 
 	while (i++ < 0xFFFFFFF) {
 		if (delay)
 			programmer_delay(delay);
-		tmp2 = chip_readb(dst) & 0x40;
+		tmp2 = chip_readb(flash, dst) & 0x40;
 		if (tmp1 == tmp2) {
 			break;
 		}
@@ -57,9 +58,9 @@
 		msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
 }
 
-void toggle_ready_jedec(chipaddr dst)
+void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst)
 {
-	toggle_ready_jedec_common(dst, 0);
+	toggle_ready_jedec_common(flash, dst, 0);
 }
 
 /* Some chips require a minimum delay between toggle bit reads.
@@ -69,12 +70,13 @@
  * Given that erase is slow on all chips, it is recommended to use 
  * toggle_ready_jedec_slow in erase functions.
  */
-static void toggle_ready_jedec_slow(chipaddr dst)
+static void toggle_ready_jedec_slow(const struct flashctx *flash, chipaddr dst)
 {
-	toggle_ready_jedec_common(dst, 8 * 1000);
+	toggle_ready_jedec_common(flash, dst, 8 * 1000);
 }
 
-void data_polling_jedec(chipaddr dst, uint8_t data)
+void data_polling_jedec(const struct flashctx *flash, chipaddr dst,
+			uint8_t data)
 {
 	unsigned int i = 0;
 	uint8_t tmp;
@@ -82,7 +84,7 @@
 	data &= 0x80;
 
 	while (i++ < 0xFFFFFFF) {
-		tmp = chip_readb(dst) & 0x80;
+		tmp = chip_readb(flash, dst) & 0x80;
 		if (tmp == data) {
 			break;
 		}
@@ -110,12 +112,13 @@
 	}
 }
 
-static void start_program_jedec_common(struct flashctx *flash, unsigned int mask)
+static void start_program_jedec_common(struct flashctx *flash,
+				       unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
-	chip_writeb(0xAA, bios + (0x5555 & mask));
-	chip_writeb(0x55, bios + (0x2AAA & mask));
-	chip_writeb(0xA0, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0xA0, bios + (0x5555 & mask));
 }
 
 static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
@@ -150,57 +153,57 @@
 	/* Reset chip to a clean slate */
 	if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
 	{
-		chip_writeb(0xAA, bios + (0x5555 & mask));
+		chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
-		chip_writeb(0x55, bios + (0x2AAA & mask));
+		chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
 	}
-	chip_writeb(0xF0, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
 	if (probe_timing_exit)
 		programmer_delay(probe_timing_exit);
 
 	/* Issue JEDEC Product ID Entry command */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	if (probe_timing_enter)
 		programmer_delay(10);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	if (probe_timing_enter)
 		programmer_delay(10);
-	chip_writeb(0x90, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x90, bios + (0x5555 & mask));
 	if (probe_timing_enter)
 		programmer_delay(probe_timing_enter);
 
 	/* Read product ID */
-	id1 = chip_readb(bios);
-	id2 = chip_readb(bios + 0x01);
+	id1 = chip_readb(flash, bios);
+	id2 = chip_readb(flash, bios + 0x01);
 	largeid1 = id1;
 	largeid2 = id2;
 
 	/* Check if it is a continuation ID, this should be a while loop. */
 	if (id1 == 0x7F) {
 		largeid1 <<= 8;
-		id1 = chip_readb(bios + 0x100);
+		id1 = chip_readb(flash, bios + 0x100);
 		largeid1 |= id1;
 	}
 	if (id2 == 0x7F) {
 		largeid2 <<= 8;
-		id2 = chip_readb(bios + 0x101);
+		id2 = chip_readb(flash, bios + 0x101);
 		largeid2 |= id2;
 	}
 
 	/* Issue JEDEC Product ID Exit command */
 	if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
 	{
-		chip_writeb(0xAA, bios + (0x5555 & mask));
+		chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
-		chip_writeb(0x55, bios + (0x2AAA & mask));
+		chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 		if (probe_timing_exit)
 			programmer_delay(10);
 	}
-	chip_writeb(0xF0, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xF0, bios + (0x5555 & mask));
 	if (probe_timing_exit)
 		programmer_delay(probe_timing_exit);
 
@@ -209,17 +212,17 @@
 		msg_cdbg(", id1 parity violation");
 
 	/* Read the product ID location again. We should now see normal flash contents. */
-	flashcontent1 = chip_readb(bios);
-	flashcontent2 = chip_readb(bios + 0x01);
+	flashcontent1 = chip_readb(flash, bios);
+	flashcontent2 = chip_readb(flash, bios + 0x01);
 
 	/* Check if it is a continuation ID, this should be a while loop. */
 	if (flashcontent1 == 0x7F) {
 		flashcontent1 <<= 8;
-		flashcontent1 |= chip_readb(bios + 0x100);
+		flashcontent1 |= chip_readb(flash, bios + 0x100);
 	}
 	if (flashcontent2 == 0x7F) {
 		flashcontent2 <<= 8;
-		flashcontent2 |= chip_readb(bios + 0x101);
+		flashcontent2 |= chip_readb(flash, bios + 0x101);
 	}
 
 	if (largeid1 == flashcontent1)
@@ -238,7 +241,7 @@
 }
 
 static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page,
-			      unsigned int pagesize, unsigned int mask)
+				     unsigned int pagesize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
@@ -246,29 +249,29 @@
 	        delay_us = 10;
 
 	/*  Issue the Sector Erase command   */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x80, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x80, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x30, bios + page);
+	chip_writeb(flash, 0x30, bios + page);
 	programmer_delay(delay_us);
 
 	/* wait for Toggle bit ready         */
-	toggle_ready_jedec_slow(bios);
+	toggle_ready_jedec_slow(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 static int erase_block_jedec_common(struct flashctx *flash, unsigned int block,
-			     unsigned int blocksize, unsigned int mask)
+				    unsigned int blocksize, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
@@ -276,22 +279,22 @@
 	        delay_us = 10;
 
 	/*  Issue the Sector Erase command   */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x80, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x80, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x50, bios + block);
+	chip_writeb(flash, 0x50, bios + block);
 	programmer_delay(delay_us);
 
 	/* wait for Toggle bit ready         */
-	toggle_ready_jedec_slow(bios);
+	toggle_ready_jedec_slow(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -305,28 +308,28 @@
 	        delay_us = 10;
 
 	/*  Issue the JEDEC Chip Erase command   */
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x80, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x80, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	chip_writeb(0xAA, bios + (0x5555 & mask));
+	chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x55, bios + (0x2AAA & mask));
+	chip_writeb(flash, 0x55, bios + (0x2AAA & mask));
 	programmer_delay(delay_us);
-	chip_writeb(0x10, bios + (0x5555 & mask));
+	chip_writeb(flash, 0x10, bios + (0x5555 & mask));
 	programmer_delay(delay_us);
 
-	toggle_ready_jedec_slow(bios);
+	toggle_ready_jedec_slow(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src,
-			     chipaddr dst, unsigned int mask)
+					   chipaddr dst, unsigned int mask)
 {
 	int tried = 0, failed = 0;
 	chipaddr bios = flash->virtual_memory;
@@ -341,10 +344,10 @@
 	start_program_jedec_common(flash, mask);
 
 	/* transfer data from source to destination */
-	chip_writeb(*src, dst);
-	toggle_ready_jedec(bios);
+	chip_writeb(flash, *src, dst);
+	toggle_ready_jedec(flash, bios);
 
-	if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
+	if (chip_readb(flash, dst) != *src && tried++ < MAX_REFLASH_TRIES) {
 		goto retry;
 	}
 
@@ -355,7 +358,8 @@
 }
 
 /* chunksize is 1 */
-int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start,
+		  unsigned int len)
 {
 	int i, failed = 0;
 	chipaddr dst = flash->virtual_memory + start;
@@ -376,7 +380,8 @@
 	return failed;
 }
 
-int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int page_size)
+int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src,
+				  unsigned int start, unsigned int page_size)
 {
 	int i, tried = 0, failed;
 	uint8_t *s = src;
@@ -395,12 +400,12 @@
 	for (i = 0; i < page_size; i++) {
 		/* If the data is 0xFF, don't program it */
 		if (*src != 0xFF)
-			chip_writeb(*src, dst);
+			chip_writeb(flash, *src, dst);
 		dst++;
 		src++;
 	}
 
-	toggle_ready_jedec(dst - 1);
+	toggle_ready_jedec(flash, dst - 1);
 
 	dst = d;
 	src = s;
@@ -424,7 +429,8 @@
  * This function is a slightly modified copy of spi_write_chunked.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len)
+int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		int unsigned len)
 {
 	unsigned int i, starthere, lenhere;
 	/* FIXME: page_size is the wrong variable. We need max_writechunk_size
@@ -480,7 +486,8 @@
 	return probe_jedec_common(flash, mask);
 }
 
-int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
+int erase_sector_jedec(struct flashctx *flash, unsigned int page,
+		       unsigned int size)
 {
 	unsigned int mask;
 
@@ -488,7 +495,8 @@
 	return erase_sector_jedec_common(flash, page, size, mask);
 }
 
-int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size)
+int erase_block_jedec(struct flashctx *flash, unsigned int page,
+		      unsigned int size)
 {
 	unsigned int mask;
 

Modified: trunk/linux_spi.c
==============================================================================
--- trunk/linux_spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/linux_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -34,8 +34,10 @@
 static int fd = -1;
 
 static int linux_spi_shutdown(void *data);
-static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *txbuf, unsigned char *rxbuf);
+static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *txbuf,
+				  unsigned char *rxbuf);
 static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len);
 static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
@@ -107,8 +109,10 @@
 	return 0;
 }
 
-static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			const unsigned char *txbuf, unsigned char *rxbuf)
+static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *txbuf,
+				  unsigned char *rxbuf)
 {
 	struct spi_ioc_transfer msg[2] = {
 		{
@@ -134,11 +138,13 @@
 static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len)
 {
-	return spi_read_chunked(flash, buf, start, len, (unsigned)getpagesize());
+	return spi_read_chunked(flash, buf, start, len,
+				(unsigned int)getpagesize());
 }
 
 static int linux_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			       unsigned int start, unsigned int len)
 {
-	return spi_write_chunked(flash, buf, start, len, ((unsigned)getpagesize()) - 4);
+	return spi_write_chunked(flash, buf, start, len,
+				((unsigned int)getpagesize()) - 4);
 }

Modified: trunk/m29f400bt.c
==============================================================================
--- trunk/m29f400bt.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/m29f400bt.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -28,24 +28,25 @@
    functions. */
 
 /* chunksize is 1 */
-int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start,
+		    unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
 	chipaddr dst = flash->virtual_memory + start;
 
 	for (i = 0; i < len; i++) {
-		chip_writeb(0xAA, bios + 0xAAA);
-		chip_writeb(0x55, bios + 0x555);
-		chip_writeb(0xA0, bios + 0xAAA);
+		chip_writeb(flash, 0xAA, bios + 0xAAA);
+		chip_writeb(flash, 0x55, bios + 0x555);
+		chip_writeb(flash, 0xA0, bios + 0xAAA);
 
 		/* transfer data from source to destination */
-		chip_writeb(*src, dst);
-		toggle_ready_jedec(dst);
+		chip_writeb(flash, *src, dst);
+		toggle_ready_jedec(flash, dst);
 #if 0
 		/* We only want to print something in the error case. */
 		msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n",
-		     (dst - bios), chip_readb(dst), *src);
+		     (dst - bios), chip_readb(flash, dst), *src);
 #endif
 		dst++;
 		src++;
@@ -60,21 +61,21 @@
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x90, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x90, bios + 0xAAA);
 
 	programmer_delay(10);
 
-	id1 = chip_readb(bios);
+	id1 = chip_readb(flash, bios);
 	/* The data sheet says id2 is at (bios + 0x01) and id2 listed in
 	 * flash.h does not match. It should be possible to use JEDEC probe.
 	 */
-	id2 = chip_readb(bios + 0x02);
+	id2 = chip_readb(flash, bios + 0x02);
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0xF0, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0xF0, bios + 0xAAA);
 
 	programmer_delay(10);
 
@@ -90,42 +91,44 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x80, bios + 0xAAA);
-
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x10, bios + 0xAAA);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x80, bios + 0xAAA);
+
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x10, bios + 0xAAA);
 
 	programmer_delay(10);
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len)
+int block_erase_m29f400bt(struct flashctx *flash, unsigned int start,
+			  unsigned int len)
 {
 	chipaddr bios = flash->virtual_memory;
 	chipaddr dst = bios + start;
 
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x80, bios + 0xAAA);
-
-	chip_writeb(0xAA, bios + 0xAAA);
-	chip_writeb(0x55, bios + 0x555);
-	chip_writeb(0x30, dst);
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x80, bios + 0xAAA);
+
+	chip_writeb(flash, 0xAA, bios + 0xAAA);
+	chip_writeb(flash, 0x55, bios + 0x555);
+	chip_writeb(flash, 0x30, dst);
 
 	programmer_delay(10);
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, unsigned int blocklen)
+int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address,
+			       unsigned int blocklen)
 {
 	if ((address != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",

Modified: trunk/nic3com.c
==============================================================================
--- trunk/nic3com.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/nic3com.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -55,6 +55,10 @@
 	{},
 };
 
+static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr);
+static uint8_t nic3com_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr);
 static const struct par_programmer par_programmer_nic3com = {
 		.chip_readb		= nic3com_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -116,13 +120,15 @@
 	return 0;
 }
 
-void nic3com_chip_writeb(uint8_t val, chipaddr addr)
+static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	OUTB(val, io_base_addr + BIOS_ROM_DATA);
 }
 
-uint8_t nic3com_chip_readb(const chipaddr addr)
+static uint8_t nic3com_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr)
 {
 	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	return INB(io_base_addr + BIOS_ROM_DATA);

Modified: trunk/nicintel.c
==============================================================================
--- trunk/nicintel.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/nicintel.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -43,6 +43,10 @@
 
 #define CSR_FCR 0x0c
 
+static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr);
+static uint8_t nicintel_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr);
 static const struct par_programmer par_programmer_nicintel = {
 		.chip_readb		= nicintel_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -117,12 +121,14 @@
 	return 1;
 }
 
-void nicintel_chip_writeb(uint8_t val, chipaddr addr)
+static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
+				 chipaddr addr)
 {
 	pci_mmio_writeb(val, nicintel_bar + (addr & NICINTEL_MEMMAP_MASK));
 }
 
-uint8_t nicintel_chip_readb(const chipaddr addr)
+static uint8_t nicintel_chip_readb(const struct flashctx *flash,
+				   const chipaddr addr)
 {
 	return pci_mmio_readb(nicintel_bar + (addr & NICINTEL_MEMMAP_MASK));
 }

Modified: trunk/nicnatsemi.c
==============================================================================
--- trunk/nicnatsemi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/nicnatsemi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -35,6 +35,10 @@
 	{},
 };
 
+static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr);
+static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr);
 static const struct par_programmer par_programmer_nicnatsemi = {
 		.chip_readb		= nicnatsemi_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -74,7 +78,8 @@
 	return 0;
 }
 
-void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr)
+static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr)
 {
 	OUTL((uint32_t)addr & 0x0001FFFF, io_base_addr + BOOT_ROM_ADDR);
 	/*
@@ -88,7 +93,8 @@
 	OUTB(val, io_base_addr + BOOT_ROM_DATA);
 }
 
-uint8_t nicnatsemi_chip_readb(const chipaddr addr)
+static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr)
 {
 	OUTL(((uint32_t)addr & 0x0001FFFF), io_base_addr + BOOT_ROM_ADDR);
 	/*

Modified: trunk/nicrealtek.c
==============================================================================
--- trunk/nicrealtek.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/nicrealtek.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -36,6 +36,10 @@
 	{},
 };
 
+static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr);
+static uint8_t nicrealtek_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr);
 static const struct par_programmer par_programmer_nicrealtek = {
 		.chip_readb		= nicrealtek_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -69,7 +73,8 @@
 	return 0;
 }
 
-void nicrealtek_chip_writeb(uint8_t val, chipaddr addr)
+static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val,
+				   chipaddr addr)
 {
 	/* Output addr and data, set WE to 0, set OE to 1, set CS to 0,
 	 * enable software access.
@@ -83,7 +88,8 @@
 	     io_base_addr + BIOS_ROM_ADDR);
 }
 
-uint8_t nicrealtek_chip_readb(const chipaddr addr)
+static uint8_t nicrealtek_chip_readb(const struct flashctx *flash,
+				     const chipaddr addr)
 {
 	uint8_t val;
 

Modified: trunk/pm49fl00x.c
==============================================================================
--- trunk/pm49fl00x.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/pm49fl00x.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -22,28 +22,32 @@
 
 #include "flash.h"
 
-static void write_lockbits_49fl00x(chipaddr bios, unsigned int size,
-			    unsigned char bits, unsigned int block_size)
+static void write_lockbits_49fl00x(const struct flashctx *flash,
+				   unsigned int size, unsigned char bits,
+				   unsigned int block_size)
 {
 	unsigned int i, left = size;
+	chipaddr bios = flash->virtual_registers;
 
 	for (i = 0; left >= block_size; i++, left -= block_size) {
 		/* pm49fl002 */
 		if (block_size == 16384 && i % 2)
 			continue;
 
-		chip_writeb(bits, bios + (i * block_size) + 2);
+		chip_writeb(flash, bits, bios + (i * block_size) + 2);
 	}
 }
 
 int unlock_49fl00x(struct flashctx *flash)
 {
-	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 0, flash->page_size);
+	write_lockbits_49fl00x(flash, flash->total_size * 1024, 0,
+			       flash->page_size);
 	return 0;
 }
 
 int lock_49fl00x(struct flashctx *flash)
 {
-	write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size);
+	write_lockbits_49fl00x(flash, flash->total_size * 1024, 1,
+			       flash->page_size);
 	return 0;
 }

Modified: trunk/programmer.c
==============================================================================
--- trunk/programmer.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/programmer.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -1,7 +1,7 @@
 /*
  * This file is part of the flashrom project.
  *
- * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
+ * Copyright (C) 2009,2010,2011 Carl-Daniel Hailfinger
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -53,61 +53,65 @@
 }
 
 /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
-uint8_t noop_chip_readb(const chipaddr addr)
+uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
 	return 0xff;
 }
 
 /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
-void noop_chip_writeb(uint8_t val, chipaddr addr)
+void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
 }
 
 /* Little-endian fallback for drivers not supporting 16 bit accesses */
-void fallback_chip_writew(uint16_t val, chipaddr addr)
+void fallback_chip_writew(const struct flashctx *flash, uint16_t val,
+			  chipaddr addr)
 {
-	chip_writeb(val & 0xff, addr);
-	chip_writeb((val >> 8) & 0xff, addr + 1);
+	chip_writeb(flash, val & 0xff, addr);
+	chip_writeb(flash, (val >> 8) & 0xff, addr + 1);
 }
 
 /* Little-endian fallback for drivers not supporting 16 bit accesses */
-uint16_t fallback_chip_readw(const chipaddr addr)
+uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
 	uint16_t val;
-	val = chip_readb(addr);
-	val |= chip_readb(addr + 1) << 8;
+	val = chip_readb(flash, addr);
+	val |= chip_readb(flash, addr + 1) << 8;
 	return val;
 }
 
 /* Little-endian fallback for drivers not supporting 32 bit accesses */
-void fallback_chip_writel(uint32_t val, chipaddr addr)
+void fallback_chip_writel(const struct flashctx *flash, uint32_t val,
+			  chipaddr addr)
 {
-	chip_writew(val & 0xffff, addr);
-	chip_writew((val >> 16) & 0xffff, addr + 2);
+	chip_writew(flash, val & 0xffff, addr);
+	chip_writew(flash, (val >> 16) & 0xffff, addr + 2);
 }
 
 /* Little-endian fallback for drivers not supporting 32 bit accesses */
-uint32_t fallback_chip_readl(const chipaddr addr)
+uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
 	uint32_t val;
-	val = chip_readw(addr);
-	val |= chip_readw(addr + 2) << 16;
+	val = chip_readw(flash, addr);
+	val |= chip_readw(flash, addr + 2) << 16;
 	return val;
 }
 
-void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len)
+void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf,
+			  chipaddr addr, size_t len)
 {
 	size_t i;
 	for (i = 0; i < len; i++)
-		chip_writeb(buf[i], addr + i);
+		chip_writeb(flash, buf[i], addr + i);
 	return;
 }
 
-void fallback_chip_readn(uint8_t *buf, chipaddr addr, size_t len)
+void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			 chipaddr addr, size_t len)
 {
 	size_t i;
 	for (i = 0; i < len; i++)
-		buf[i] = chip_readb(addr + i);
+		buf[i] = chip_readb(flash, addr + i);
 	return;
 }
 

Modified: trunk/programmer.h
==============================================================================
--- trunk/programmer.h	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/programmer.h	Sun Dec 18 16:01:24 2011	(r1474)
@@ -93,8 +93,8 @@
 
 	int (*init) (void);
 
-	void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
-				    size_t len);
+	void *(*map_flash_region) (const char *descr, unsigned long phys_addr,
+				   size_t len);
 	void (*unmap_flash_region) (void *virt_addr, size_t len);
 
 	void (*delay) (int usecs);
@@ -300,13 +300,6 @@
 int register_superio(struct superio s);
 extern enum chipbustype internal_buses_supported;
 int internal_init(void);
-void internal_chip_writeb(uint8_t val, chipaddr addr);
-void internal_chip_writew(uint16_t val, chipaddr addr);
-void internal_chip_writel(uint32_t val, chipaddr addr);
-uint8_t internal_chip_readb(const chipaddr addr);
-uint16_t internal_chip_readw(const chipaddr addr);
-uint32_t internal_chip_readl(const chipaddr addr);
-void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 #endif
 
 /* hwaccess.c */
@@ -341,91 +334,46 @@
 void rmmio_valw(void *addr);
 void rmmio_vall(void *addr);
 
-/* programmer.c */
-int noop_shutdown(void);
-void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
-void fallback_unmap(void *virt_addr, size_t len);
-uint8_t noop_chip_readb(const chipaddr addr);
-void noop_chip_writeb(uint8_t val, chipaddr addr);
-void fallback_chip_writew(uint16_t val, chipaddr addr);
-void fallback_chip_writel(uint32_t val, chipaddr addr);
-void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint16_t fallback_chip_readw(const chipaddr addr);
-uint32_t fallback_chip_readl(const chipaddr addr);
-void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
-struct par_programmer {
-	void (*chip_writeb) (uint8_t val, chipaddr addr);
-	void (*chip_writew) (uint16_t val, chipaddr addr);
-	void (*chip_writel) (uint32_t val, chipaddr addr);
-	void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
-	uint8_t (*chip_readb) (const chipaddr addr);
-	uint16_t (*chip_readw) (const chipaddr addr);
-	uint32_t (*chip_readl) (const chipaddr addr);
-	void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
-};
-extern const struct par_programmer *par_programmer;
-void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
-
 /* dummyflasher.c */
 #if CONFIG_DUMMY == 1
 int dummy_init(void);
 void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
 void dummy_unmap(void *virt_addr, size_t len);
-void dummy_chip_writeb(uint8_t val, chipaddr addr);
-void dummy_chip_writew(uint16_t val, chipaddr addr);
-void dummy_chip_writel(uint32_t val, chipaddr addr);
-void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint8_t dummy_chip_readb(const chipaddr addr);
-uint16_t dummy_chip_readw(const chipaddr addr);
-uint32_t dummy_chip_readl(const chipaddr addr);
-void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 #endif
 
 /* nic3com.c */
 #if CONFIG_NIC3COM == 1
 int nic3com_init(void);
-void nic3com_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nic3com_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_3com[];
 #endif
 
 /* gfxnvidia.c */
 #if CONFIG_GFXNVIDIA == 1
 int gfxnvidia_init(void);
-void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t gfxnvidia_chip_readb(const chipaddr addr);
 extern const struct pcidev_status gfx_nvidia[];
 #endif
 
 /* drkaiser.c */
 #if CONFIG_DRKAISER == 1
 int drkaiser_init(void);
-void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t drkaiser_chip_readb(const chipaddr addr);
 extern const struct pcidev_status drkaiser_pcidev[];
 #endif
 
 /* nicrealtek.c */
 #if CONFIG_NICREALTEK == 1
 int nicrealtek_init(void);
-void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicrealtek_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_realtek[];
 #endif
 
 /* nicnatsemi.c */
 #if CONFIG_NICNATSEMI == 1
 int nicnatsemi_init(void);
-void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicnatsemi_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_natsemi[];
 #endif
 
 /* nicintel.c */
 #if CONFIG_NICINTEL == 1
 int nicintel_init(void);
-void nicintel_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicintel_chip_readb(const chipaddr addr);
 extern const struct pcidev_status nics_intel[];
 #endif
 
@@ -444,24 +392,18 @@
 /* satamv.c */
 #if CONFIG_SATAMV == 1
 int satamv_init(void);
-void satamv_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t satamv_chip_readb(const chipaddr addr);
 extern const struct pcidev_status satas_mv[];
 #endif
 
 /* satasii.c */
 #if CONFIG_SATASII == 1
 int satasii_init(void);
-void satasii_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t satasii_chip_readb(const chipaddr addr);
 extern const struct pcidev_status satas_sii[];
 #endif
 
 /* atahpt.c */
 #if CONFIG_ATAHPT == 1
 int atahpt_init(void);
-void atahpt_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t atahpt_chip_readb(const chipaddr addr);
 extern const struct pcidev_status ata_hpt[];
 #endif
 
@@ -565,9 +507,9 @@
 	enum spi_controller type;
 	unsigned int max_data_read;
 	unsigned int max_data_write;
-	int (*command)(unsigned int writecnt, unsigned int readcnt,
+	int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 		   const unsigned char *writearr, unsigned char *readarr);
-	int (*multicommand)(struct spi_command *cmds);
+	int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
 
 	/* Optimized functions for this programmer */
 	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
@@ -575,9 +517,9 @@
 };
 
 extern const struct spi_programmer *spi_programmer;
-int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 			     const unsigned char *writearr, unsigned char *readarr);
-int default_spi_send_multicommand(struct spi_command *cmds);
+int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 void register_spi_programmer(const struct spi_programmer *programmer);
@@ -632,12 +574,34 @@
 extern const struct opaque_programmer *opaque_programmer;
 void register_opaque_programmer(const struct opaque_programmer *pgm);
 
+/* programmer.c */
+int noop_shutdown(void);
+void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
+void fallback_unmap(void *virt_addr, size_t len);
+uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr);
+void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
+void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
+void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
+void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
+uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
+uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
+void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+struct par_programmer {
+	void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
+	void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
+	void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
+	void (*chip_writen) (const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
+	uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr);
+	uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
+	uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
+	void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+};
+extern const struct par_programmer *par_programmer;
+void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
+
 /* serprog.c */
 #if CONFIG_SERPROG == 1
 int serprog_init(void);
-void serprog_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t serprog_chip_readb(const chipaddr addr);
-void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
 void serprog_delay(int usecs);
 #endif
 

Modified: trunk/satamv.c
==============================================================================
--- trunk/satamv.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/satamv.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -41,6 +41,10 @@
 #define PCI_BAR2_CONTROL		0x00c08
 #define GPIO_PORT_CONTROL		0x104f0
 
+static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr);
+static uint8_t satamv_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr);
 static const struct par_programmer par_programmer_satamv = {
 		.chip_readb		= satamv_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -183,13 +187,15 @@
 }
 
 /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */
-void satamv_chip_writeb(uint8_t val, chipaddr addr)
+static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val,
+			       chipaddr addr)
 {
 	satamv_indirect_chip_writeb(val, addr);
 }
 
 /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */
-uint8_t satamv_chip_readb(const chipaddr addr)
+static uint8_t satamv_chip_readb(const struct flashctx *flash,
+				 const chipaddr addr)
 {
 	return satamv_indirect_chip_readb(addr);
 }

Modified: trunk/satasii.c
==============================================================================
--- trunk/satasii.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/satasii.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -42,6 +42,10 @@
 	{},
 };
 
+static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr);
+static uint8_t satasii_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr);
 static const struct par_programmer par_programmer_satasii = {
 		.chip_readb		= satasii_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -95,7 +99,8 @@
 	return 0;
 }
 
-void satasii_chip_writeb(uint8_t val, chipaddr addr)
+static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr)
 {
 	uint32_t ctrl_reg, data_reg;
 
@@ -112,7 +117,8 @@
 	while (pci_mmio_readl(sii_bar) & (1 << 25)) ;
 }
 
-uint8_t satasii_chip_readb(const chipaddr addr)
+static uint8_t satasii_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr)
 {
 	uint32_t ctrl_reg;
 

Modified: trunk/sb600spi.c
==============================================================================
--- trunk/sb600spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/sb600spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -88,8 +88,10 @@
 		;
 }
 
-static int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr)
 {
 	int count;
 	/* First byte is cmd which can not being sent through FIFO. */

Modified: trunk/serprog.c
==============================================================================
--- trunk/serprog.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/serprog.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -299,7 +299,8 @@
 	return 0;
 }
 
-static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+static int serprog_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
 				    const unsigned char *writearr,
 				    unsigned char *readarr);
 static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
@@ -314,6 +315,12 @@
 	.write_256	= default_spi_write_256,
 };
 
+static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr);
+static uint8_t serprog_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr);
+static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf,
+			       const chipaddr addr, size_t len);
 static const struct par_programmer par_programmer_serprog = {
 		.chip_readb		= serprog_chip_readb,
 		.chip_readw		= fallback_chip_readw,
@@ -680,7 +687,8 @@
 	}
 }
 
-void serprog_chip_writeb(uint8_t val, chipaddr addr)
+static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val,
+				chipaddr addr)
 {
 	msg_pspew("%s\n", __func__);
 	if (sp_max_write_n) {
@@ -711,7 +719,8 @@
 	}
 }
 
-uint8_t serprog_chip_readb(const chipaddr addr)
+static uint8_t serprog_chip_readb(const struct flashctx *flash,
+				  const chipaddr addr)
 {
 	unsigned char c;
 	unsigned char buf[3];
@@ -757,7 +766,8 @@
 }
 
 /* The externally called version that makes sure that max_read_n is obeyed. */
-void serprog_chip_readn(uint8_t * buf, const chipaddr addr, size_t len)
+static void serprog_chip_readn(const struct flashctx *flash, uint8_t * buf,
+			       const chipaddr addr, size_t len)
 {
 	size_t lenm = len;
 	chipaddr addrm = addr;
@@ -792,9 +802,10 @@
 	sp_prev_was_write = 0;
 }
 
-static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			     const unsigned char *writearr,
-			     unsigned char *readarr)
+static int serprog_spi_send_command(struct flashctx *flash,
+				    unsigned int writecnt, unsigned int readcnt,
+				    const unsigned char *writearr,
+				    unsigned char *readarr)
 {
 	unsigned char *parmbuf;
 	int ret;
@@ -822,14 +833,15 @@
  * the advantage that it is much faster for most chips, but breaks those with
  * non-contiguous address space (like AT45DB161D). When spi_read_chunked is
  * fixed this method can be removed. */
-static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
+			    unsigned int start, unsigned int len)
 {
 	unsigned int i, cur_len;
 	const unsigned int max_read = spi_programmer_serprog.max_data_read;
 	for (i = 0; i < len; i += cur_len) {
 		int ret;
 		cur_len = min(max_read, (len - i));
-		ret = spi_nbyte_read(start + i, buf + i, cur_len);
+		ret = spi_nbyte_read(flash, start + i, buf + i, cur_len);
 		if (ret)
 			return ret;
 	}

Modified: trunk/sharplhf00l04.c
==============================================================================
--- trunk/sharplhf00l04.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/sharplhf00l04.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -26,25 +26,26 @@
  * FIXME: This file is unused.
  */
 
-int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
+int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr,
+			 unsigned int blocklen)
 {
 	chipaddr bios = flash->virtual_memory + blockaddr;
 	chipaddr wrprotect = flash->virtual_registers + blockaddr + 2;
 	uint8_t status;
 
 	// clear status register
-	chip_writeb(0x50, bios);
+	chip_writeb(flash, 0x50, bios);
 	status = wait_82802ab(flash);
 	print_status_82802ab(status);
 	// clear write protect
 	msg_cspew("write protect is at 0x%lx\n", (wrprotect));
-	msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect));
-	chip_writeb(0, wrprotect);
-	msg_cspew("write protect is 0x%x\n", chip_readb(wrprotect));
+	msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect));
+	chip_writeb(flash, 0, wrprotect);
+	msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect));
 
 	// now start it
-	chip_writeb(0x20, bios);
-	chip_writeb(0xd0, bios);
+	chip_writeb(flash, 0x20, bios);
+	chip_writeb(flash, 0xd0, bios);
 	programmer_delay(10);
 	// now let's see what the register is
 	status = wait_82802ab(flash);

Modified: trunk/spi.c
==============================================================================
--- trunk/spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -42,8 +42,9 @@
 
 const struct spi_programmer *spi_programmer = &spi_programmer_none;
 
-int spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		const unsigned char *writearr, unsigned char *readarr)
+int spi_send_command(struct flashctx *flash, unsigned int writecnt,
+		     unsigned int readcnt, const unsigned char *writearr,
+		     unsigned char *readarr)
 {
 	if (!spi_programmer->command) {
 		msg_perr("%s called, but SPI is unsupported on this "
@@ -52,11 +53,11 @@
 		return 1;
 	}
 
-	return spi_programmer->command(writecnt, readcnt,
-						      writearr, readarr);
+	return spi_programmer->command(flash, writecnt, readcnt, writearr,
+				       readarr);
 }
 
-int spi_send_multicommand(struct spi_command *cmds)
+int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds)
 {
 	if (!spi_programmer->multicommand) {
 		msg_perr("%s called, but SPI is unsupported on this "
@@ -65,11 +66,13 @@
 		return 1;
 	}
 
-	return spi_programmer->multicommand(cmds);
+	return spi_programmer->multicommand(flash, cmds);
 }
 
-int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-			     const unsigned char *writearr, unsigned char *readarr)
+int default_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+			     unsigned int readcnt,
+			     const unsigned char *writearr,
+			     unsigned char *readarr)
 {
 	struct spi_command cmd[] = {
 	{
@@ -84,20 +87,22 @@
 		.readarr = NULL,
 	}};
 
-	return spi_send_multicommand(cmd);
+	return spi_send_multicommand(flash, cmd);
 }
 
-int default_spi_send_multicommand(struct spi_command *cmds)
+int default_spi_send_multicommand(struct flashctx *flash,
+				  struct spi_command *cmds)
 {
 	int result = 0;
 	for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) {
-		result = spi_send_command(cmds->writecnt, cmds->readcnt,
+		result = spi_send_command(flash, cmds->writecnt, cmds->readcnt,
 					  cmds->writearr, cmds->readarr);
 	}
 	return result;
 }
 
-int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		     unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -109,7 +114,8 @@
 	return spi_read_chunked(flash, buf, start, len, max_data);
 }
 
-int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int default_spi_write_256(struct flashctx *flash, uint8_t *buf,
+			  unsigned int start, unsigned int len)
 {
 	unsigned int max_data = spi_programmer->max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
@@ -121,7 +127,8 @@
 	return spi_write_chunked(flash, buf, start, len, max_data);
 }
 
-int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		  unsigned int len)
 {
 	unsigned int addrbase = 0;
 	if (!spi_programmer->read) {
@@ -135,7 +142,7 @@
 	 * address. Highest possible address with the current SPI implementation
 	 * means 0xffffff, the highest unsigned 24bit number.
 	 */
-	addrbase = spi_get_valid_read_addr();
+	addrbase = spi_get_valid_read_addr(flash);
 	if (addrbase + flash->total_size * 1024 > (1 << 24)) {
 		msg_perr("Flash chip size exceeds the allowed access window. ");
 		msg_perr("Read will probably fail.\n");
@@ -160,7 +167,8 @@
  * .write_256 = spi_chip_write_1
  */
 /* real chunksize is up to 256, logical chunksize is 256 */
-int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		       unsigned int len)
 {
 	if (!spi_programmer->write_256) {
 		msg_perr("%s called, but SPI page write is unsupported on this "
@@ -177,7 +185,7 @@
  * be the lowest allowed address for all commands which take an address.
  * This is a programmer limitation.
  */
-uint32_t spi_get_valid_read_addr(void)
+uint32_t spi_get_valid_read_addr(struct flashctx *flash)
 {
 	switch (spi_programmer->type) {
 #if CONFIG_INTERNAL == 1

Modified: trunk/spi25.c
==============================================================================
--- trunk/spi25.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/spi25.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -29,13 +29,13 @@
 #include "programmer.h"
 #include "spi.h"
 
-static int spi_rdid(unsigned char *readarr, int bytes)
+static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes)
 {
 	static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
 	int ret;
 	int i;
 
-	ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
 	if (ret)
 		return ret;
 	msg_cspew("RDID returned");
@@ -45,20 +45,22 @@
 	return 0;
 }
 
-static int spi_rems(unsigned char *readarr)
+static int spi_rems(struct flashctx *flash, unsigned char *readarr)
 {
 	unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 };
 	uint32_t readaddr;
 	int ret;
 
-	ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, cmd,
+			       readarr);
 	if (ret == SPI_INVALID_ADDRESS) {
 		/* Find the lowest even address allowed for reads. */
-		readaddr = (spi_get_valid_read_addr() + 1) & ~1;
+		readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1;
 		cmd[1] = (readaddr >> 16) & 0xff,
 		cmd[2] = (readaddr >> 8) & 0xff,
 		cmd[3] = (readaddr >> 0) & 0xff,
-		ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr);
+		ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE,
+				       cmd, readarr);
 	}
 	if (ret)
 		return ret;
@@ -66,21 +68,21 @@
 	return 0;
 }
 
-static int spi_res(unsigned char *readarr, int bytes)
+static int spi_res(struct flashctx *flash, unsigned char *readarr, int bytes)
 {
 	unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 };
 	uint32_t readaddr;
 	int ret;
 	int i;
 
-	ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
 	if (ret == SPI_INVALID_ADDRESS) {
 		/* Find the lowest even address allowed for reads. */
-		readaddr = (spi_get_valid_read_addr() + 1) & ~1;
+		readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1;
 		cmd[1] = (readaddr >> 16) & 0xff,
 		cmd[2] = (readaddr >> 8) & 0xff,
 		cmd[3] = (readaddr >> 0) & 0xff,
-		ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr);
+		ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr);
 	}
 	if (ret)
 		return ret;
@@ -91,13 +93,13 @@
 	return 0;
 }
 
-int spi_write_enable(void)
+int spi_write_enable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN };
 	int result;
 
 	/* Send WREN (Write Enable) */
-	result = spi_send_command(sizeof(cmd), 0, cmd, NULL);
+	result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
 
 	if (result)
 		msg_cerr("%s failed\n", __func__);
@@ -105,12 +107,12 @@
 	return result;
 }
 
-int spi_write_disable(void)
+int spi_write_disable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI };
 
 	/* Send WRDI (Write Disable) */
-	return spi_send_command(sizeof(cmd), 0, cmd, NULL);
+	return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
 }
 
 static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
@@ -119,7 +121,7 @@
 	uint32_t id1;
 	uint32_t id2;
 
-	if (spi_rdid(readarr, bytes)) {
+	if (spi_rdid(flash, readarr, bytes)) {
 		return 0;
 	}
 
@@ -199,7 +201,7 @@
 	unsigned char readarr[JEDEC_REMS_INSIZE];
 	uint32_t id1, id2;
 
-	if (spi_rems(readarr)) {
+	if (spi_rems(flash, readarr)) {
 		return 0;
 	}
 
@@ -242,7 +244,7 @@
 	/* Check if RDID is usable and does not return 0xff 0xff 0xff or
 	 * 0x00 0x00 0x00. In that case, RES is pointless.
 	 */
-	if (!spi_rdid(readarr, 3) && memcmp(readarr, allff, 3) &&
+	if (!spi_rdid(flash, readarr, 3) && memcmp(readarr, allff, 3) &&
 	    memcmp(readarr, all00, 3)) {
 		msg_cdbg("Ignoring RES in favour of RDID.\n");
 		return 0;
@@ -250,13 +252,14 @@
 	/* Check if REMS is usable and does not return 0xff 0xff or
 	 * 0x00 0x00. In that case, RES is pointless.
 	 */
-	if (!spi_rems(readarr) && memcmp(readarr, allff, JEDEC_REMS_INSIZE) &&
+	if (!spi_rems(flash, readarr) &&
+	    memcmp(readarr, allff, JEDEC_REMS_INSIZE) &&
 	    memcmp(readarr, all00, JEDEC_REMS_INSIZE)) {
 		msg_cdbg("Ignoring RES in favour of REMS.\n");
 		return 0;
 	}
 
-	if (spi_res(readarr, 1)) {
+	if (spi_res(flash, readarr, 1)) {
 		return 0;
 	}
 
@@ -279,7 +282,7 @@
 	unsigned char readarr[2];
 	uint32_t id1, id2;
 
-	if (spi_res(readarr, 2)) {
+	if (spi_res(flash, readarr, 2)) {
 		return 0;
 	}
 
@@ -298,7 +301,7 @@
 	return 1;
 }
 
-uint8_t spi_read_status_register(void)
+uint8_t spi_read_status_register(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
 	/* FIXME: No workarounds for driver/hardware bugs in generic code. */
@@ -306,7 +309,8 @@
 	int ret;
 
 	/* Read Status Register */
-	ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr);
+	ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd,
+			       readarr);
 	if (ret)
 		msg_cerr("RDSR failed!\n");
 
@@ -414,7 +418,7 @@
 {
 	uint8_t status;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 	switch (flash->manufacture_id) {
 	case ST_ID:
@@ -465,7 +469,7 @@
 		.readarr	= NULL,
 	}};
 	
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n",
 			__func__);
@@ -475,7 +479,7 @@
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
 	/* FIXME: We assume spi_read_status_register will never fail. */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(1000 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -502,7 +506,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n", __func__);
 		return result;
@@ -511,13 +515,14 @@
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
 	/* FIXME: We assume spi_read_status_register will never fail. */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(1000 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -543,7 +548,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -552,7 +557,7 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -563,7 +568,8 @@
  * 32k for SST
  * 4-32k non-uniform for EON
  */
-int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d8(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -589,7 +595,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -598,7 +604,7 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -607,7 +613,8 @@
 /* Block size is usually
  * 4k for PMC
  */
-int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_d7(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -633,7 +640,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -642,14 +649,15 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 /* Sector size is usually 4k, though Macronix eliteflash has 64k */
-int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_20(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -675,7 +683,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -684,13 +692,14 @@
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 15-800 ms, so wait in 10 ms steps.
 	 */
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(10 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -700,7 +709,8 @@
 	return spi_chip_erase_60(flash);
 }
 
-int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
@@ -710,13 +720,13 @@
 	return spi_chip_erase_c7(flash);
 }
 
-int spi_write_status_enable(void)
+int spi_write_status_enable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
 	int result;
 
 	/* Send EWSR (Enable Write Status Register). */
-	result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
+	result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
 
 	if (result)
 		msg_cerr("%s failed\n", __func__);
@@ -751,7 +761,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n",
 			__func__);
@@ -766,7 +776,7 @@
 	 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
 	 */
 	programmer_delay(100 * 1000);
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) {
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) {
 		if (++i > 490) {
 			msg_cerr("Error: WIP bit after WRSR never cleared\n");
 			return TIMEOUT_ERROR;
@@ -799,7 +809,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution\n",
 			__func__);
@@ -814,7 +824,7 @@
 	 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
 	 */
 	programmer_delay(100 * 1000);
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) {
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) {
 		if (++i > 490) {
 			msg_cerr("Error: WIP bit after WRSR never cleared\n");
 			return TIMEOUT_ERROR;
@@ -840,7 +850,8 @@
 	return ret;
 }
 
-int spi_byte_program(unsigned int addr, uint8_t databyte)
+int spi_byte_program(struct flashctx *flash, unsigned int addr,
+		     uint8_t databyte)
 {
 	int result;
 	struct spi_command cmds[] = {
@@ -867,7 +878,7 @@
 		.readarr	= NULL,
 	}};
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -875,7 +886,8 @@
 	return result;
 }
 
-int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len)
+int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes,
+		      unsigned int len)
 {
 	int result;
 	/* FIXME: Switch to malloc based on len unless that kills speed. */
@@ -914,7 +926,7 @@
 
 	memcpy(&cmd[4], bytes, len);
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during command execution at address 0x%x\n",
 			__func__, addr);
@@ -931,7 +943,7 @@
 	uint8_t status;
 	int result;
 
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	/* If block protection is disabled, stop here. */
 	if ((status & 0x3c) == 0)
 		return 0;
@@ -942,7 +954,7 @@
 		msg_cerr("spi_write_status_register failed\n");
 		return result;
 	}
-	status = spi_read_status_register();
+	status = spi_read_status_register(flash);
 	if ((status & 0x3c) != 0) {
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
@@ -950,7 +962,8 @@
 	return 0;
 }
 
-int spi_nbyte_read(unsigned int address, uint8_t *bytes, unsigned int len)
+int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes,
+		   unsigned int len)
 {
 	const unsigned char cmd[JEDEC_READ_OUTSIZE] = {
 		JEDEC_READ,
@@ -960,7 +973,7 @@
 	};
 
 	/* Send Read */
-	return spi_send_command(sizeof(cmd), len, cmd, bytes);
+	return spi_send_command(flash, sizeof(cmd), len, cmd, bytes);
 }
 
 /*
@@ -968,7 +981,8 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is read separately in chunks with a maximum size of chunksize.
  */
-int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		     unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, toread;
@@ -991,7 +1005,7 @@
 		lenhere = min(start + len, (i + 1) * page_size) - starthere;
 		for (j = 0; j < lenhere; j += chunksize) {
 			toread = min(chunksize, lenhere - j);
-			rc = spi_nbyte_read(starthere + j, buf + starthere - start + j, toread);
+			rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread);
 			if (rc)
 				break;
 		}
@@ -1007,7 +1021,8 @@
  * FIXME: Use the chunk code from Michael Karcher instead.
  * Each page is written separately in chunks with a maximum size of chunksize.
  */
-int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize)
+int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		      unsigned int len, unsigned int chunksize)
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, towrite;
@@ -1035,10 +1050,10 @@
 		lenhere = min(start + len, (i + 1) * page_size) - starthere;
 		for (j = 0; j < lenhere; j += chunksize) {
 			towrite = min(chunksize, lenhere - j);
-			rc = spi_nbyte_program(starthere + j, buf + starthere - start + j, towrite);
+			rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite);
 			if (rc)
 				break;
-			while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+			while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 				programmer_delay(10);
 		}
 		if (rc)
@@ -1055,23 +1070,25 @@
  * (e.g. due to size constraints in IT87* for over 512 kB)
  */
 /* real chunksize is 1, logical chunksize is 1 */
-int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		     unsigned int len)
 {
 	unsigned int i;
 	int result = 0;
 
 	for (i = start; i < start + len; i++) {
-		result = spi_byte_program(i, buf[i - start]);
+		result = spi_byte_program(flash, i, buf[i - start]);
 		if (result)
 			return 1;
-		while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 			programmer_delay(10);
 	}
 
 	return 0;
 }
 
-int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start,
+		  unsigned int len)
 {
 	uint32_t pos = start;
 	int result;
@@ -1149,7 +1166,7 @@
 	}
 
 
-	result = spi_send_multicommand(cmds);
+	result = spi_send_multicommand(flash, cmds);
 	if (result) {
 		msg_cerr("%s failed during start command execution\n",
 			 __func__);
@@ -1158,7 +1175,7 @@
 		 */
 		return result;
 	}
-	while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 		programmer_delay(10);
 
 	/* We already wrote 2 bytes in the multicommand step. */
@@ -1168,15 +1185,16 @@
 	while (pos < start + len - 1) {
 		cmd[1] = buf[pos++ - start];
 		cmd[2] = buf[pos++ - start];
-		spi_send_command(JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL);
-		while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0,
+				 cmd, NULL);
+		while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
 			programmer_delay(10);
 	}
 
 	/* Use WRDI to exit AAI mode. This needs to be done before issuing any
 	 * other non-AAI command.
 	 */
-	spi_write_disable();
+	spi_write_disable(flash);
 
 	/* Write remaining byte (if any). */
 	if (pos < start + len) {

Modified: trunk/sst28sf040.c
==============================================================================
--- trunk/sst28sf040.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/sst28sf040.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -34,13 +34,13 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_readb(bios + 0x1823);
-	chip_readb(bios + 0x1820);
-	chip_readb(bios + 0x1822);
-	chip_readb(bios + 0x0418);
-	chip_readb(bios + 0x041B);
-	chip_readb(bios + 0x0419);
-	chip_readb(bios + 0x040A);
+	chip_readb(flash, bios + 0x1823);
+	chip_readb(flash, bios + 0x1820);
+	chip_readb(flash, bios + 0x1822);
+	chip_readb(flash, bios + 0x0418);
+	chip_readb(flash, bios + 0x041B);
+	chip_readb(flash, bios + 0x0419);
+	chip_readb(flash, bios + 0x040A);
 
 	return 0;
 }
@@ -49,34 +49,36 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_readb(bios + 0x1823);
-	chip_readb(bios + 0x1820);
-	chip_readb(bios + 0x1822);
-	chip_readb(bios + 0x0418);
-	chip_readb(bios + 0x041B);
-	chip_readb(bios + 0x0419);
-	chip_readb(bios + 0x041A);
+	chip_readb(flash, bios + 0x1823);
+	chip_readb(flash, bios + 0x1820);
+	chip_readb(flash, bios + 0x1822);
+	chip_readb(flash, bios + 0x0418);
+	chip_readb(flash, bios + 0x041B);
+	chip_readb(flash, bios + 0x0419);
+	chip_readb(flash, bios + 0x041A);
 
 	return 0;
 }
 
-int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_28sf040(struct flashctx *flash, unsigned int address,
+			 unsigned int sector_size)
 {
 	chipaddr bios = flash->virtual_memory;
 
 	/* This command sequence is very similar to erase_block_82802ab. */
-	chip_writeb(AUTO_PG_ERASE1, bios);
-	chip_writeb(AUTO_PG_ERASE2, bios + address);
+	chip_writeb(flash, AUTO_PG_ERASE1, bios);
+	chip_writeb(flash, AUTO_PG_ERASE2, bios + address);
 
 	/* wait for Toggle bit ready */
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
 /* chunksize is 1 */
-int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
+int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start,
+		  unsigned int len)
 {
 	int i;
 	chipaddr bios = flash->virtual_memory;
@@ -90,11 +92,11 @@
 			continue;
 		}
 		/*issue AUTO PROGRAM command */
-		chip_writeb(AUTO_PGRM, dst);
-		chip_writeb(*src++, dst++);
+		chip_writeb(flash, AUTO_PGRM, dst);
+		chip_writeb(flash, *src++, dst++);
 
 		/* wait for Toggle bit ready */
-		toggle_ready_jedec(bios);
+		toggle_ready_jedec(flash, bios);
 	}
 
 	return 0;
@@ -104,17 +106,18 @@
 {
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(CHIP_ERASE, bios);
-	chip_writeb(CHIP_ERASE, bios);
+	chip_writeb(flash, CHIP_ERASE, bios);
+	chip_writeb(flash, CHIP_ERASE, bios);
 
 	programmer_delay(10);
-	toggle_ready_jedec(bios);
+	toggle_ready_jedec(flash, bios);
 
 	/* FIXME: Check the status register for errors. */
 	return 0;
 }
 
-int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+int erase_chip_28sf040(struct flashctx *flash, unsigned int addr,
+		       unsigned int blocklen)
 {
 	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",

Modified: trunk/sst49lfxxxc.c
==============================================================================
--- trunk/sst49lfxxxc.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/sst49lfxxxc.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -23,11 +23,14 @@
 #include "flash.h"
 #include "chipdrivers.h"
 
-static int write_lockbits_block_49lfxxxc(struct flashctx *flash, unsigned long address, unsigned char bits)
+static int write_lockbits_block_49lfxxxc(struct flashctx *flash,
+					 unsigned long address,
+					 unsigned char bits)
 {
 	unsigned long lock = flash->virtual_registers + address + 2;
-	msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock));
-	chip_writeb(bits, lock);
+	msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock,
+		 chip_readb(flash, lock));
+	chip_writeb(flash, bits, lock);
 
 	return 0;
 }
@@ -59,13 +62,14 @@
 	return write_lockbits_49lfxxxc(flash, 0);
 }
 
-int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size)
+int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address,
+			  unsigned int sector_size)
 {
 	uint8_t status;
 	chipaddr bios = flash->virtual_memory;
 
-	chip_writeb(0x30, bios);
-	chip_writeb(0xD0, bios + address);
+	chip_writeb(flash, 0x30, bios);
+	chip_writeb(flash, 0xD0, bios + address);
 
 	status = wait_82802ab(flash);
 	print_status_82802ab(status);

Modified: trunk/sst_fwhub.c
==============================================================================
--- trunk/sst_fwhub.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/sst_fwhub.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -29,7 +29,7 @@
 	chipaddr registers = flash->virtual_registers;
 	uint8_t blockstatus;
 
-	blockstatus = chip_readb(registers + offset + 2);
+	blockstatus = chip_readb(flash, registers + offset + 2);
 	msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ",
 		     offset, flash->page_size, blockstatus);
 	switch (blockstatus & 0x3) {
@@ -59,7 +59,7 @@
 
 	if (blockstatus) {
 		msg_cdbg("Trying to clear lock for 0x%06x... ", offset);
-		chip_writeb(0, registers + offset + 2);
+		chip_writeb(flash, 0, registers + offset + 2);
 
 		blockstatus = check_sst_fwhub_block_lock(flash, offset);
 		msg_cdbg("%s\n", (blockstatus) ? "failed" : "OK");

Modified: trunk/stm50flw0x0x.c
==============================================================================
--- trunk/stm50flw0x0x.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/stm50flw0x0x.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -60,8 +60,10 @@
 		// unlock each 4k-sector
 		for (j = 0; j < 0x10000; j += 0x1000) {
 			msg_cdbg("unlocking at 0x%x\n", offset + j);
-			chip_writeb(unlock_sector, wrprotect + offset + j);
-			if (chip_readb(wrprotect + offset + j) != unlock_sector) {
+			chip_writeb(flash, unlock_sector,
+				    wrprotect + offset + j);
+			if (chip_readb(flash, wrprotect + offset + j) !=
+			    unlock_sector) {
 				msg_cerr("Cannot unlock sector @ 0x%x\n",
 				       offset + j);
 				return -1;
@@ -69,8 +71,8 @@
 		}
 	} else {
 		msg_cdbg("unlocking at 0x%x\n", offset);
-		chip_writeb(unlock_sector, wrprotect + offset);
-		if (chip_readb(wrprotect + offset) != unlock_sector) {
+		chip_writeb(flash, unlock_sector, wrprotect + offset);
+		if (chip_readb(flash, wrprotect + offset) != unlock_sector) {
 			msg_cerr("Cannot unlock sector @ 0x%x\n", offset);
 			return -1;
 		}
@@ -94,15 +96,16 @@
 }
 
 /* This function is unused. */
-int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, unsigned int sectorsize)
+int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector,
+			      unsigned int sectorsize)
 {
 	chipaddr bios = flash->virtual_memory + sector;
 
 	// clear status register
-	chip_writeb(0x50, bios);
+	chip_writeb(flash, 0x50, bios);
 	// now start it
-	chip_writeb(0x32, bios);
-	chip_writeb(0xd0, bios);
+	chip_writeb(flash, 0x32, bios);
+	chip_writeb(flash, 0xd0, bios);
 	programmer_delay(10);
 
 	wait_82802ab(flash);

Modified: trunk/w29ee011.c
==============================================================================
--- trunk/w29ee011.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/w29ee011.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -38,29 +38,29 @@
 	}
 
 	/* Issue JEDEC Product ID Entry command */
-	chip_writeb(0xAA, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
 	programmer_delay(10);
-	chip_writeb(0x80, bios + 0x5555);
+	chip_writeb(flash, 0x80, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0xAA, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
 	programmer_delay(10);
-	chip_writeb(0x60, bios + 0x5555);
+	chip_writeb(flash, 0x60, bios + 0x5555);
 	programmer_delay(10);
 
 	/* Read product ID */
-	id1 = chip_readb(bios);
-	id2 = chip_readb(bios + 0x01);
+	id1 = chip_readb(flash, bios);
+	id2 = chip_readb(flash, bios + 0x01);
 
 	/* Issue JEDEC Product ID Exit command */
-	chip_writeb(0xAA, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
 	programmer_delay(10);
-	chip_writeb(0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
 	programmer_delay(10);
-	chip_writeb(0xF0, bios + 0x5555);
+	chip_writeb(flash, 0xF0, bios + 0x5555);
 	programmer_delay(10);
 
 	msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);

Modified: trunk/w39.c
==============================================================================
--- trunk/w39.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/w39.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -26,7 +26,7 @@
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
 
-	locking = chip_readb(wrprotect);
+	locking = chip_readb(flash, wrprotect);
 	msg_cdbg("Lock status of block at 0x%08x is ", offset);
 	switch (locking & 0x7) {
 	case 0:
@@ -64,7 +64,7 @@
 	chipaddr wrprotect = flash->virtual_registers + offset + 2;
 	uint8_t locking;
 
-	locking = chip_readb(wrprotect);
+	locking = chip_readb(flash, wrprotect);
 	/* Read or write lock present? */
 	if (locking & ((1 << 2) | (1 << 0))) {
 		/* Lockdown active? */
@@ -73,7 +73,7 @@
 			return -1;
 		} else {
 			msg_cdbg("Unlocking block at 0x%08x\n", offset);
-			chip_writeb(0, wrprotect);
+			chip_writeb(flash, 0, wrprotect);
 		}
 	}
 
@@ -86,18 +86,18 @@
 	uint8_t val;
 
 	/* Product Identification Entry */
-	chip_writeb(0xAA, bios + 0x5555);
-	chip_writeb(0x55, bios + 0x2AAA);
-	chip_writeb(0x90, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0x90, bios + 0x5555);
 	programmer_delay(10);
 
 	/* Read something, maybe hardware lock bits */
-	val = chip_readb(bios + offset);
+	val = chip_readb(flash, bios + offset);
 
 	/* Product Identification Exit */
-	chip_writeb(0xAA, bios + 0x5555);
-	chip_writeb(0x55, bios + 0x2AAA);
-	chip_writeb(0xF0, bios + 0x5555);
+	chip_writeb(flash, 0xAA, bios + 0x5555);
+	chip_writeb(flash, 0x55, bios + 0x2AAA);
+	chip_writeb(flash, 0xF0, bios + 0x5555);
 	programmer_delay(10);
 
 	return val;
@@ -160,7 +160,7 @@
 	return 0;
 }
 
-int printlock_w39l040(struct flashctx * flash)
+int printlock_w39l040(struct flashctx *flash)
 {
 	uint8_t lock;
 	int ret;

Modified: trunk/wbsio_spi.c
==============================================================================
--- trunk/wbsio_spi.c	Wed Dec 14 23:25:15 2011	(r1473)
+++ trunk/wbsio_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
@@ -60,9 +60,12 @@
 	return flashport;
 }
 
-static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr);
-static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr);
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
+			  unsigned int start, unsigned int len);
 
 static const struct spi_programmer spi_programmer_wbsio = {
 	.type = SPI_CONTROLLER_WBSIO,
@@ -110,8 +113,10 @@
  * Would one more byte of RAM in the chip (to get all 24 bits) really make
  * such a big difference?
  */
-static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
-		      const unsigned char *writearr, unsigned char *readarr)
+static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
+				  unsigned int readcnt,
+				  const unsigned char *writearr,
+				  unsigned char *readarr)
 {
 	int i;
 	uint8_t mode = 0;
@@ -194,7 +199,8 @@
 	return 0;
 }
 
-static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
+static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
+			  unsigned int start, unsigned int len)
 {
 	return read_memmapped(flash, buf, start, len);
 }


From c-d.hailfinger.devel.2006 at gmx.net  Sun Dec 18 16:06:48 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 18 Dec 2011 16:06:48 +0100
Subject: [flashrom] [PATCH] Add struct flashctx * everywhere
In-Reply-To: <1324213035.4037.10.camel@localhost>
References: <4EB0BEB2.1040701@gmx.net>
	<201111021241.pA2CfGHH021689@mail2.student.tuwien.ac.at>
	<4EB31089.7000902@gmx.net> <4EB9C67A.50502@gmx.net>
	<4EE16214.1030407@gmx.net> <1323886048.4676.6.camel@localhost>
	<4EE922B6.4010302@gmx.net> <4EEB4A6D.6050008@gmx.net>
	<1324213035.4037.10.camel@localhost>
Message-ID: <4EEE0188.2090903@gmx.net>

Am 18.12.2011 13:57 schrieb Michael Karcher:
> Am Freitag, den 16.12.2011, 14:41 +0100 schrieb Carl-Daniel Hailfinger:
>> No functional changes. Please test anyway on real hardware.
> flashrom -r works on my laptop (ICH7, SPI)
>
>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

Thanks for the review and test!
Committed in r1474.


> One remark: You might consider to split chip_{read,write}{b,l,w} into
> chip_data_{read,write}{b,l,w} and chip_reg_{read,write}{b,l,w} and
> implicitly add "virtual_memory" or "virtual_registers" to the address
> space offset passed to the new functions (for the case of registers and
> data mapped into the same address space, so one chip_read/write family
> is usefull at all).
>
> The upside of the proposal is that we get rid of all the
> "flash->virtual_memory + " additions scattered over all chip driver, the
> downside is yet another layer of indirection.

I really like this proposal.


> Thank you for all this tedious mechanical work on the patch,

Thank you for reviewing such a megapatch. My apologies for the broken
interdiff.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Mon Dec 19 02:38:47 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 19 Dec 2011 02:38:47 +0100
Subject: [flashrom] [PATCH] Generic programmer registration: final part
In-Reply-To: <1324214554.4037.29.camel@localhost>
References: <4EECA5FE.6060609@gmx.net> <1324214554.4037.29.camel@localhost>
Message-ID: <4EEE95A7.1020208@gmx.net>

Hi Michael,

thanks a lot for your in-depth review!

Am 18.12.2011 14:22 schrieb Michael Karcher:
> Am Samstag, den 17.12.2011, 15:23 +0100 schrieb Carl-Daniel Hailfinger:
>> This depends on [PATCH] Add struct flashctx * everywhere
> But not on the revision you posted on December 16, 14:41 CET.

Indeed, I posted the flashctx version which didn't obey the 80 column
limit, but my local tree (against which the registration diff was run)
already had that fixed. Thanks for noticing and for wrangling the patch
into a state where it applied.


> A patch that is rebased to that revision and fixes a compiler warning
> (which gets fatal due to -Werror) is attached.

Used those changes as basis for my reworked patch. Did you introduce any
functional changes except the compiler warning fix?


>> - mainboard native SPI (ICH SPI, SB600 SPI, VIA SPI)
> ICH7 SPI works for reading. Currently I don't have no hardware at hand
> to test other stuff.

Well, so at least that works. That's encouraging.


>>  int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
>>  		const unsigned char *writearr, unsigned char *readarr)
>>  {
>> -	if (!spi_programmer->command) {
>> +	if (!flash->pgm->spi.command) {
>>  		msg_perr("%s called, but SPI is unsupported on this "
>>  			 "hardware. Please report a bug at "
>>  			 "flashrom at flashrom.org\n", __func__);
>>  		return 1;
>>  	}
> I suggest to drop the NULL pointer check here, and just do it once in
> register_spi_programmer (refusing to call register_programmer if any
> function pointer is NULL)
> Same for the other functions in here.

Good point, done.

I don't see a good way to move the max_data_read check in
default_spi_read to an init function, though, because you can never be
sure at init time if default_spi_read will be called.


>> -static const struct par_programmer par_programmer_none = {
>> -		.chip_readb		= noop_chip_readb,
>> -		.chip_readw		= fallback_chip_readw,
>> -		.chip_readl		= fallback_chip_readl,
>> -		.chip_readn		= fallback_chip_readn,
>> -		.chip_writeb		= noop_chip_writeb,
>> -		.chip_writew		= fallback_chip_writew,
>> -		.chip_writel		= fallback_chip_writel,
>> -		.chip_writen		= fallback_chip_writen,
>> -};
> I suggest to drop noop_chip_readb/noop_chip_writeb at the same time as
> we drop par_programmer_none, as these functions are no longer used.

noop_chip_readb dropped.
noop_chip_writeb may be useful if we merge a programmer driver which
does not support write.
What do you think?


>> +enum chipbustype get_buses_supported(void)
>> +{
>> +	int i;
>> +	enum chipbustype ret = BUS_NONE;
>> +
>> +	for (i = 0; i < registered_programmer_count; i++)
>> +		ret |= registered_programmers[i].buses_supported;
>> +
>> +	return ret;
>>  }
> Looking at this function, just keep in mind it returns a list of busses
> supported by all the programmers found.
Indeed.


>> +#if 0 // Does not really make sense anymore if we use a programmer-centric walk.
>>  			msg_gspew("Probing for %s %s, %d kB: skipped. ",
>>  			         flash->vendor, flash->name, flash->total_size);
>> -			tmp = flashbuses_to_text(buses_supported);
>> +			tmp = flashbuses_to_text(get_buses_supported());
>>  			msg_gspew("Host bus type %s ", tmp);
> If we reinstate this code (i.e. decide to not #if 0 it), don't use
> get_buses_supported(), but pgm->buses_supported. Also don't call it
> "Host bus type", but "programmer bus type"

Killed.


>> --- flashrom-register_all_programmers_register_generic/ogp_spi.c	(Revision 1473)
>> +++ flashrom-register_all_programmers_register_generic/ogp_spi.c	(Arbeitskopie)
>> @@ -91,6 +91,8 @@
>>  	.get_miso = ogp_bitbang_get_miso,
>>  	.request_bus = ogp_request_spibus,
>>  	.release_bus = ogp_release_spibus,
>> +	/* no delay for now. */
>> +	.half_period = 0,
> Is this comment really useful? Opposed to where it was used before, in
> this place, the name of the setting "half_period" is explicitly
> mentioned.

Killed everywhere.


>> +	tempstr = flashbuses_to_text(get_buses_supported());
>>  	msg_pdbg("This programmer supports the following protocols: %s.\n",
>>  		 tempstr);
> It's definitely not "this programmer", as should be obvious if you "kept
> in mind" as I told you that get_buses_supportet returns the union of all
> programmers.

I beg to differ. This is a message to the end user, and the end user
does not think of a mainboard as multiple programmers.
The usage of the word "programmer" in our code is inconsistent:
Sometimes it refers to a whole device with multiple masters/controllers,
sometimes it only refers to a single master (usually in the
register_something context). We could rename all register_foo_programmer
to register_foo_master to get more clarity in the code. What do you think?


> So either move this into the loop over all the programmers
> and print programmer specific bus types, or call it something like "The
> programmers in this systems provide the following protocols: %s.\n"

See above.


>> +	/* 1 usec halfperiod delay for now. */
>> +	.half_period = 1,
> Same comment as above. If you want to have the unit visible, rename the
> variable to half_period_usecs, instead of adding comments of
> questionable information content.

Indeed. probe_timing in struct flashchip doesn't have _usecs in the name
either, so I just decided to drop it.

New patch against svn HEAD.

Notes:
ichspi.c:
Use ich_generation instead of spi_programmer->type (or
flash->pgm->spi.type) in run_opcode to determine if the programmer was
initialized correctly.
This change is debatable because it uses a local static variable instead
of the info available in flash->pgm, but OTOH now the internal usage is
consistent. Another question is whether we should really check for
correct initialization at this point. There are two init functions (for
ICH and VIA), both are bug-free in that regard and it's not clear
whether guarding against future bugs in those (or and additional) init
functions is worth the additional code.
generic observations:
The programmer registration functions now return error/success instead
of void, but their callers don't care. Fix now or later?

TODO?
- max_decode is a programmer property, add it to the
register_*_programmer parameters
- programmer_may_write is a programmer property, add it to the
register_*_programmer parameters

All programmer types (Parallel, SPI, Opaque) now register themselves
into a generic programmer list and probing is now programmer-centric
instead of chip-centric.
Registering multiple SPI/... masters at the same time is now possible
without any problems. Handling multiple flash chips is still unchanged,
but now we have the infrastructure to deal with "dual BIOS" and "one
flash behind southbridge and one flash behind EC" sanely.

A nice side effect is that this patch kills quite a few global variables
and improves the situation for libflashrom.

Hint for developers:
struct {spi,par,opaque}_programmer now have a void *data pointer to
store any additional programmer-specific data, e.g. hardware
configuration info.

I'd appreciate tests for the following programmer classes:
- mainboard native SPI (ICH SPI, SB600 SPI, VIA SPI)
- mainboard native LPC/FWH/Parallel
- mainboard native bitbanged SPI (MCP SPI)
- mainboard translated Parallel (SuperI/O acts as LPC->Parallel translator)
- mainboard translated SPI (SuperI/O acts as LPC->SPI translator)
- serprog
- external SPI (Bus Pirate/Dediprog/FT2232)
- external bitbanged SPI (nicintel_spi, ogp_spi)
- external LPC/Parallel (satasii, atahpt, nic3com, nicintel, ...)

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-register_all_programmers_register_generic/ogp_spi.c
===================================================================
--- flashrom-register_all_programmers_register_generic/ogp_spi.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/ogp_spi.c	(Arbeitskopie)
@@ -91,6 +91,7 @@
 	.get_miso = ogp_bitbang_get_miso,
 	.request_bus = ogp_request_spibus,
 	.release_bus = ogp_release_spibus,
+	.half_period = 0,
 };
 
 static int ogp_spi_shutdown(void *data)
@@ -136,8 +137,7 @@
 	if (register_shutdown(ogp_spi_shutdown, NULL))
 		return 1;
 
-	/* no delay for now. */
-	if (bitbang_spi_init(&bitbang_spi_master_ogp, 0))
+	if (bitbang_spi_init(&bitbang_spi_master_ogp))
 		return 1;
 
 	return 0;
Index: flashrom-register_all_programmers_register_generic/flash.h
===================================================================
--- flashrom-register_all_programmers_register_generic/flash.h	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/flash.h	(Arbeitskopie)
@@ -171,6 +171,7 @@
 	chipaddr virtual_memory;
 	/* Some flash devices have an additional register space. */
 	chipaddr virtual_registers;
+	struct registered_programmer *pgm;
 };
 
 #define TEST_UNTESTED	0
@@ -224,14 +225,13 @@
 	write_gran_1byte,
 	write_gran_256bytes,
 };
-extern enum chipbustype buses_supported;
 extern int verbose;
 extern const char flashrom_version[];
 extern char *chip_to_probe;
 void map_flash_registers(struct flashctx *flash);
 int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int erase_flash(struct flashctx *flash);
-int probe_flash(int startchip, struct flashctx *fill_flash, int force);
+int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force);
 int read_flash_to_file(struct flashctx *flash, const char *filename);
 int min(int a, int b);
 int max(int a, int b);
@@ -256,6 +256,13 @@
 
 /* Something happened that shouldn't happen, we'll abort. */
 #define ERROR_FATAL -0xee
+#define ERROR_FLASHROM_BUG -200
+/* We reached one of the hardcoded limits of flashrom. This can be fixed by
+ * increasing the limit of a compile-time allocation or by switching to dynamic
+ * allocation.
+ * Note: If this warning is triggered, check first for runaway registrations.
+ */
+#define ERROR_FLASHROM_LIMIT -201
 
 /* cli_output.c */
 /* Let gcc and clang check for correct printf-style format strings. */
@@ -297,4 +304,5 @@
 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
 uint32_t spi_get_valid_read_addr(struct flashctx *flash);
 
+enum chipbustype get_buses_supported(void);
 #endif				/* !__FLASH_H__ */
Index: flashrom-register_all_programmers_register_generic/bitbang_spi.c
===================================================================
--- flashrom-register_all_programmers_register_generic/bitbang_spi.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/bitbang_spi.c	(Arbeitskopie)
@@ -25,42 +25,37 @@
 #include "programmer.h"
 #include "spi.h"
 
-/* Length of half a clock period in usecs. */
-static int bitbang_spi_half_period;
-
-static const struct bitbang_spi_master *bitbang_spi_master = NULL;
-
 /* Note that CS# is active low, so val=0 means the chip is active. */
-static void bitbang_spi_set_cs(int val)
+static void bitbang_spi_set_cs(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_cs(val);
+	master->set_cs(val);
 }
 
-static void bitbang_spi_set_sck(int val)
+static void bitbang_spi_set_sck(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_sck(val);
+	master->set_sck(val);
 }
 
-static void bitbang_spi_set_mosi(int val)
+static void bitbang_spi_set_mosi(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_mosi(val);
+	master->set_mosi(val);
 }
 
-static int bitbang_spi_get_miso(void)
+static int bitbang_spi_get_miso(const const struct bitbang_spi_master *master)
 {
-	return bitbang_spi_master->get_miso();
+	return master->get_miso();
 }
 
-static void bitbang_spi_request_bus(void)
+static void bitbang_spi_request_bus(const const struct bitbang_spi_master *master)
 {
-	if (bitbang_spi_master->request_bus)
-		bitbang_spi_master->request_bus();
+	if (master->request_bus)
+		master->request_bus();
 }
 
-static void bitbang_spi_release_bus(void)
+static void bitbang_spi_release_bus(const const struct bitbang_spi_master *master)
 {
-	if (bitbang_spi_master->release_bus)
-		bitbang_spi_master->release_bus();
+	if (master->release_bus)
+		master->release_bus();
 }
 
 static int bitbang_spi_send_command(struct flashctx *flash,
@@ -78,67 +73,63 @@
 	.write_256	= default_spi_write_256,
 };
 
-int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod)
+int bitbang_spi_init(const struct bitbang_spi_master *master)
 {
+	struct spi_programmer pgm = spi_programmer_bitbang;
 	/* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
 	 * we catch it here. Same goes for missing initialization of bitbanging
 	 * functions.
 	 */
 	if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
-	    !master->set_sck || !master->set_mosi || !master->get_miso) {
+	    !master->set_sck || !master->set_mosi || !master->get_miso ||
+	    (master->request_bus && !master->release_bus) ||
+	    (!master->request_bus && master->release_bus)) {
 		msg_perr("Incomplete SPI bitbang master setting!\n"
 			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
+		return ERROR_FLASHROM_BUG;
 	}
-	if (bitbang_spi_master) {
-		msg_perr("SPI bitbang master already initialized!\n"
-			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
-	}
 
-	bitbang_spi_master = master;
-	bitbang_spi_half_period = halfperiod;
+	pgm.data = master;
+	register_spi_programmer(&pgm);
 
-	register_spi_programmer(&spi_programmer_bitbang);
-
-	/* FIXME: Run bitbang_spi_request_bus here or in programmer init? */
-	bitbang_spi_set_cs(1);
-	bitbang_spi_set_sck(0);
-	bitbang_spi_set_mosi(0);
+	/* Only mess with the bus if we're sure nobody else uses it. */
+	bitbang_spi_request_bus(master);
+	bitbang_spi_set_cs(master, 1);
+	bitbang_spi_set_sck(master, 0);
+	bitbang_spi_set_mosi(master, 0);
+	/* FIXME: Release SPI bus here and request it again for each command or
+	 * don't release it now and only release it on programmer shutdown?
+	 */
+	bitbang_spi_release_bus(master);
 	return 0;
 }
 
 int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
 {
-	if (!bitbang_spi_master) {
+	if (!master) {
 		msg_perr("Shutting down an uninitialized SPI bitbang master!\n"
 			 "Please report a bug at flashrom at flashrom.org\n");
 		return 1;
 	}
-	if (master != bitbang_spi_master) {
-		msg_perr("Shutting down a mismatched SPI bitbang master!\n"
-			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
-	}
 
 	/* FIXME: Run bitbang_spi_release_bus here or per command? */
-	bitbang_spi_master = NULL;
 	return 0;
 }
 
-static uint8_t bitbang_spi_readwrite_byte(uint8_t val)
+static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master,
+				   uint8_t val)
 {
 	uint8_t ret = 0;
 	int i;
 
 	for (i = 7; i >= 0; i--) {
-		bitbang_spi_set_mosi((val >> i) & 1);
-		programmer_delay(bitbang_spi_half_period);
-		bitbang_spi_set_sck(1);
+		bitbang_spi_set_mosi(master, (val >> i) & 1);
+		programmer_delay(master->half_period);
+		bitbang_spi_set_sck(master, 1);
 		ret <<= 1;
-		ret |= bitbang_spi_get_miso();
-		programmer_delay(bitbang_spi_half_period);
-		bitbang_spi_set_sck(0);
+		ret |= bitbang_spi_get_miso(master);
+		programmer_delay(master->half_period);
+		bitbang_spi_set_sck(master, 0);
 	}
 	return ret;
 }
@@ -149,23 +140,24 @@
 				    unsigned char *readarr)
 {
 	int i;
+	const struct bitbang_spi_master *master = flash->pgm->spi.data;
 
 	/* FIXME: Run bitbang_spi_request_bus here or in programmer init?
 	 * Requesting and releasing the SPI bus is handled in here to allow the
 	 * programmer to use its own SPI engine for native accesses.
 	 */
-	bitbang_spi_request_bus();
-	bitbang_spi_set_cs(0);
+	bitbang_spi_request_bus(master);
+	bitbang_spi_set_cs(master, 0);
 	for (i = 0; i < writecnt; i++)
-		bitbang_spi_readwrite_byte(writearr[i]);
+		bitbang_spi_rw_byte(master, writearr[i]);
 	for (i = 0; i < readcnt; i++)
-		readarr[i] = bitbang_spi_readwrite_byte(0);
+		readarr[i] = bitbang_spi_rw_byte(master, 0);
 
-	programmer_delay(bitbang_spi_half_period);
-	bitbang_spi_set_cs(1);
-	programmer_delay(bitbang_spi_half_period);
+	programmer_delay(master->half_period);
+	bitbang_spi_set_cs(master, 1);
+	programmer_delay(master->half_period);
 	/* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
-	bitbang_spi_release_bus();
+	bitbang_spi_release_bus(master);
 
 	return 0;
 }
Index: flashrom-register_all_programmers_register_generic/cli_classic.c
===================================================================
--- flashrom-register_all_programmers_register_generic/cli_classic.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/cli_classic.c	(Arbeitskopie)
@@ -172,7 +172,7 @@
 	struct flashctx flashes[3];
 	struct flashctx *fill_flash;
 	const char *name;
-	int namelen, opt, i;
+	int namelen, opt, i, j;
 	int startchip = 0, chipcount = 0, option_index = 0, force = 0;
 #if CONFIG_PRINT_WIKI == 1
 	int list_supported_wiki = 0;
@@ -444,17 +444,21 @@
 		ret = 1;
 		goto out_shutdown;
 	}
-	tempstr = flashbuses_to_text(buses_supported);
+	tempstr = flashbuses_to_text(get_buses_supported());
 	msg_pdbg("This programmer supports the following protocols: %s.\n",
 		 tempstr);
 	free(tempstr);
 
-	for (i = 0; i < ARRAY_SIZE(flashes); i++) {
-		startchip = probe_flash(startchip, &flashes[i], 0);
-		if (startchip == -1)
-			break;
-		chipcount++;
-		startchip++;
+	for (j = 0; j < registered_programmer_count; j++) {
+		startchip = 0;
+		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
+			startchip = probe_flash(&registered_programmers[j],
+						startchip, &flashes[i], 0);
+			if (startchip == -1)
+				break;
+			chipcount++;
+			startchip++;
+		}
 	}
 
 	if (chipcount > 1) {
@@ -472,6 +476,7 @@
 			printf("Note: flashrom can never write if the flash "
 			       "chip isn't found automatically.\n");
 		}
+#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered?
 		if (force && read_it && chip_to_probe) {
 			printf("Force read (-f -r -c) requested, pretending "
 			       "the chip is there:\n");
@@ -486,6 +491,7 @@
 			       "contain garbage.\n");
 			return read_flash_to_file(&flashes[0], filename);
 		}
+#endif
 		ret = 1;
 		goto out_shutdown;
 	} else if (!chip_to_probe) {
@@ -502,7 +508,7 @@
 	check_chip_supported(fill_flash);
 
 	size = fill_flash->total_size * 1024;
-	if (check_max_decode((buses_supported & fill_flash->bustype), size) &&
+	if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->bustype, size) &&
 	    (!force)) {
 		fprintf(stderr, "Chip is too big for this programmer "
 			"(-V gives details). Use --force to override.\n");
Index: flashrom-register_all_programmers_register_generic/ichspi.c
===================================================================
--- flashrom-register_all_programmers_register_generic/ichspi.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/ichspi.c	(Arbeitskopie)
@@ -635,7 +635,7 @@
 
 /* Read len bytes from the fdata/spid register into the data array.
  *
- * Note that using len > spi_programmer->max_data_read will return garbage or
+ * Note that using len > flash->pgm->spi.max_data_read will return garbage or
  * may even crash.
  */
 static void ich_read_data(uint8_t *data, int len, int reg0_off)
@@ -653,7 +653,7 @@
 
 /* Fill len bytes from the data array into the fdata/spid registers.
  *
- * Note that using len > spi_programmer->max_data_write will trash the registers
+ * Note that using len > flash->pgm->spi.max_data_write will trash the registers
  * following the data registers.
  */
 static void ich_fill_data(const uint8_t *data, int len, int reg0_off)
@@ -960,9 +960,9 @@
 		      uint8_t datalength, uint8_t * data)
 {
 	/* max_data_read == max_data_write for all Intel/VIA SPI masters */
-	uint8_t maxlength = spi_programmer->max_data_read;
+	uint8_t maxlength = flash->pgm->spi.max_data_read;
 
-	if (spi_programmer->type == SPI_CONTROLLER_NONE) {
+	if (ich_generation == CHIPSET_ICH_UNKNOWN) {
 		msg_perr("%s: unsupported chipset\n", __func__);
 		return -1;
 	}
@@ -1297,7 +1297,7 @@
 	REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
 
 	while (len > 0) {
-		block_len = min(len, opaque_programmer->max_data_read);
+		block_len = min(len, flash->pgm->opaque.max_data_read);
 		ich_hwseq_set_addr(addr);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* set read operation */
@@ -1336,7 +1336,7 @@
 
 	while (len > 0) {
 		ich_hwseq_set_addr(addr);
-		block_len = min(len, opaque_programmer->max_data_write);
+		block_len = min(len, flash->pgm->opaque.max_data_write);
 		ich_fill_data(buf, block_len, ICH9_REG_FDATA0);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* clear operation */
Index: flashrom-register_all_programmers_register_generic/nicintel_spi.c
===================================================================
--- flashrom-register_all_programmers_register_generic/nicintel_spi.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/nicintel_spi.c	(Arbeitskopie)
@@ -137,6 +137,7 @@
 	.get_miso = nicintel_bitbang_get_miso,
 	.request_bus = nicintel_request_spibus,
 	.release_bus = nicintel_release_spibus,
+	.half_period = 1,
 };
 
 static int nicintel_spi_shutdown(void *data)
@@ -181,8 +182,7 @@
 	if (register_shutdown(nicintel_spi_shutdown, NULL))
 		return 1;
 
-	/* 1 usec halfperiod delay for now. */
-	if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1))
+	if (bitbang_spi_init(&bitbang_spi_master_nicintel))
 		return 1;
 
 	return 0;
Index: flashrom-register_all_programmers_register_generic/opaque.c
===================================================================
--- flashrom-register_all_programmers_register_generic/opaque.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/opaque.c	(Arbeitskopie)
@@ -30,70 +30,37 @@
 #include "chipdrivers.h"
 #include "programmer.h"
 
-const struct opaque_programmer opaque_programmer_none = {
-	.max_data_read = MAX_DATA_UNSPECIFIED,
-	.max_data_write = MAX_DATA_UNSPECIFIED,
-	.probe = NULL,
-	.read = NULL,
-	.write = NULL,
-	.erase = NULL,
-};
-
-const struct opaque_programmer *opaque_programmer = &opaque_programmer_none;
-
 int probe_opaque(struct flashctx *flash)
 {
-	if (!opaque_programmer->probe) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 0;
-	}
-
-	return opaque_programmer->probe(flash);
+	return flash->pgm->opaque.probe(flash);
 }
 
 int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	if (!opaque_programmer->read) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 1;
-	}
-	return opaque_programmer->read(flash, buf, start, len);
+	return flash->pgm->opaque.read(flash, buf, start, len);
 }
 
 int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	if (!opaque_programmer->write) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 1;
-	}
-	return opaque_programmer->write(flash, buf, start, len);
+	return flash->pgm->opaque.write(flash, buf, start, len);
 }
 
 int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
-	if (!opaque_programmer->erase) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 1;
-	}
-	return opaque_programmer->erase(flash, blockaddr, blocklen);
+	return flash->pgm->opaque.erase(flash, blockaddr, blocklen);
 }
 
-void register_opaque_programmer(const struct opaque_programmer *pgm)
+int register_opaque_programmer(const struct opaque_programmer *pgm)
 {
+	struct registered_programmer rpgm;
+
 	if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
 		msg_perr("%s called with one of probe/read/write/erase being "
 			 "NULL. Please report a bug at flashrom at flashrom.org\n",
 			 __func__);
-		return;
+		return ERROR_FLASHROM_BUG;
 	}
-	opaque_programmer = pgm;
-	buses_supported |= BUS_PROG;
+	rpgm.buses_supported = BUS_PROG;
+	rpgm.opaque = *pgm;
+	return register_programmer(&rpgm);
 }
Index: flashrom-register_all_programmers_register_generic/rayer_spi.c
===================================================================
--- flashrom-register_all_programmers_register_generic/rayer_spi.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/rayer_spi.c	(Arbeitskopie)
@@ -92,6 +92,7 @@
 	.set_sck = rayer_bitbang_set_sck,
 	.set_mosi = rayer_bitbang_set_mosi,
 	.get_miso = rayer_bitbang_get_miso,
+	.half_period = 0,
 };
 
 int rayer_spi_init(void)
@@ -171,8 +172,7 @@
 	/* Get the initial value before writing to any line. */
 	lpt_outbyte = INB(lpt_iobase);
 
-	/* Zero halfperiod delay. */
-	if (bitbang_spi_init(&bitbang_spi_master_rayer, 0))
+	if (bitbang_spi_init(&bitbang_spi_master_rayer))
 		return 1;
 
 	return 0;
Index: flashrom-register_all_programmers_register_generic/spi25.c
===================================================================
--- flashrom-register_all_programmers_register_generic/spi25.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/spi25.c	(Arbeitskopie)
@@ -179,7 +179,7 @@
 	/* Some SPI controllers do not support commands with writecnt=1 and
 	 * readcnt=4.
 	 */
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:
@@ -1120,7 +1120,7 @@
 		.readarr	= NULL,
 	}};
 
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:
Index: flashrom-register_all_programmers_register_generic/spi.c
===================================================================
--- flashrom-register_all_programmers_register_generic/spi.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/spi.c	(Arbeitskopie)
@@ -1,7 +1,7 @@
 /*
  * This file is part of the flashrom project.
  *
- * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger
+ * Copyright (C) 2007, 2008, 2009, 2010, 2011 Carl-Daniel Hailfinger
  * Copyright (C) 2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
@@ -30,43 +30,17 @@
 #include "programmer.h"
 #include "spi.h"
 
-const struct spi_programmer spi_programmer_none = {
-	.type = SPI_CONTROLLER_NONE,
-	.max_data_read = MAX_DATA_UNSPECIFIED,
-	.max_data_write = MAX_DATA_UNSPECIFIED,
-	.command = NULL,
-	.multicommand = NULL,
-	.read = NULL,
-	.write_256 = NULL,
-};
-
-const struct spi_programmer *spi_programmer = &spi_programmer_none;
-
 int spi_send_command(struct flashctx *flash, unsigned int writecnt,
 		     unsigned int readcnt, const unsigned char *writearr,
 		     unsigned char *readarr)
 {
-	if (!spi_programmer->command) {
-		msg_perr("%s called, but SPI is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
-
-	return spi_programmer->command(flash, writecnt, readcnt, writearr,
+	return flash->pgm->spi.command(flash, writecnt, readcnt, writearr,
 				       readarr);
 }
 
 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds)
 {
-	if (!spi_programmer->multicommand) {
-		msg_perr("%s called, but SPI is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
-
-	return spi_programmer->multicommand(flash, cmds);
+	return flash->pgm->spi.multicommand(flash, cmds);
 }
 
 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt,
@@ -104,7 +78,7 @@
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		     unsigned int len)
 {
-	unsigned int max_data = spi_programmer->max_data_read;
+	unsigned int max_data = flash->pgm->spi.max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI read chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -117,7 +91,7 @@
 int default_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len)
 {
-	unsigned int max_data = spi_programmer->max_data_write;
+	unsigned int max_data = flash->pgm->spi.max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI write chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -131,12 +105,6 @@
 		  unsigned int len)
 {
 	unsigned int addrbase = 0;
-	if (!spi_programmer->read) {
-		msg_perr("%s called, but SPI read is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
 
 	/* Check if the chip fits between lowest valid and highest possible
 	 * address. Highest possible address with the current SPI implementation
@@ -157,7 +125,7 @@
 			 "access window.\n");
 		msg_perr("Read will probably return garbage.\n");
 	}
-	return spi_programmer->read(flash, buf, addrbase + start, len);
+	return flash->pgm->spi.read(flash, buf, addrbase + start, len);
 }
 
 /*
@@ -170,14 +138,7 @@
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		       unsigned int len)
 {
-	if (!spi_programmer->write_256) {
-		msg_perr("%s called, but SPI page write is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
-
-	return spi_programmer->write_256(flash, buf, start, len);
+	return flash->pgm->spi.write_256(flash, buf, start, len);
 }
 
 /*
@@ -187,7 +148,7 @@
  */
 uint32_t spi_get_valid_read_addr(struct flashctx *flash)
 {
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_ICH7:
@@ -200,8 +161,22 @@
 	}
 }
 
-void register_spi_programmer(const struct spi_programmer *pgm)
+int register_spi_programmer(const struct spi_programmer *pgm)
 {
-	spi_programmer = pgm;
-	buses_supported |= BUS_SPI;
+	struct registered_programmer rpgm;
+
+	if (!pgm->write_256 || !pgm->read || !pgm->command ||
+	    !pgm->multicommand ||
+	    ((pgm->command == default_spi_send_command) &&
+	     (pgm->multicommand == default_spi_send_multicommand))) {
+		msg_perr("%s called with inconsistent settings. "
+			 "Please report a bug at flashrom at flashrom.org\n",
+			 __func__);
+		return ERROR_FLASHROM_BUG;
+	}
+
+
+	rpgm.buses_supported = BUS_SPI;
+	rpgm.spi = *pgm;
+	return register_programmer(&rpgm);
 }
Index: flashrom-register_all_programmers_register_generic/mcp6x_spi.c
===================================================================
--- flashrom-register_all_programmers_register_generic/mcp6x_spi.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/mcp6x_spi.c	(Arbeitskopie)
@@ -98,6 +98,7 @@
 	.get_miso = mcp6x_bitbang_get_miso,
 	.request_bus = mcp6x_request_spibus,
 	.release_bus = mcp6x_release_spibus,
+	.half_period = 0,
 };
 
 int mcp6x_spi_init(int want_spi)
@@ -159,8 +160,7 @@
 		 (status >> MCP6X_SPI_GRANT) & 0x1);
 	mcp_gpiostate = status & 0xff;
 
-	/* Zero halfperiod delay. */
-	if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 0)) {
+	if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) {
 		/* This should never happen. */
 		msg_perr("MCP6X bitbang SPI master init failed!\n");
 		return 1;
Index: flashrom-register_all_programmers_register_generic/programmer.c
===================================================================
--- flashrom-register_all_programmers_register_generic/programmer.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/programmer.c	(Arbeitskopie)
@@ -21,19 +21,6 @@
 #include "flash.h"
 #include "programmer.h"
 
-static const struct par_programmer par_programmer_none = {
-		.chip_readb		= noop_chip_readb,
-		.chip_readw		= fallback_chip_readw,
-		.chip_readl		= fallback_chip_readl,
-		.chip_readn		= fallback_chip_readn,
-		.chip_writeb		= noop_chip_writeb,
-		.chip_writew		= fallback_chip_writew,
-		.chip_writel		= fallback_chip_writel,
-		.chip_writen		= fallback_chip_writen,
-};
-
-const struct par_programmer *par_programmer = &par_programmer_none;
-
 /* No-op shutdown() for programmers which don't need special handling */
 int noop_shutdown(void)
 {
@@ -52,13 +39,7 @@
 {
 }
 
-/* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
-uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr)
-{
-	return 0xff;
-}
-
-/* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
+/* No-op chip_writeb() for parallel style drivers not supporting writes */
 void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
 }
@@ -115,8 +96,49 @@
 	return;
 }
 
-void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses)
+int register_par_programmer(const struct par_programmer *pgm,
+			    const enum chipbustype buses)
 {
-	par_programmer = pgm;
-	buses_supported |= buses;
+	struct registered_programmer rpgm;
+	if (!chip_writeb || !chip_writew || !chip_writel || !chip_writen ||
+	    !chip_readb || !chip_readw || !chip_readl || !chip_readn) {
+		msg_perr("%s called with one of probe/read/write/erase being "
+			 "NULL. Please report a bug at flashrom at flashrom.org\n",
+			 __func__);
+		return ERROR_FLASHROM_BUG;
+	}
+
+	rpgm.buses_supported = buses;
+	rpgm.par = *pgm;
+	return register_programmer(&rpgm);
 }
+
+/* The limit of 4 is totally arbitrary. */
+#define PROGRAMMERS_MAX 4
+struct registered_programmer registered_programmers[PROGRAMMERS_MAX];
+int registered_programmer_count = 0;
+
+/* This function copies the struct registered_programmer parameter. */
+int register_programmer(struct registered_programmer *pgm)
+{
+	if (registered_programmer_count >= PROGRAMMERS_MAX) {
+		msg_perr("Tried to register more than %i programmer "
+			 "interfaces.\n", PROGRAMMERS_MAX);
+		return ERROR_FLASHROM_LIMIT;
+	}
+	registered_programmers[registered_programmer_count] = *pgm;
+	registered_programmer_count++;
+
+	return 0;
+}
+
+enum chipbustype get_buses_supported(void)
+{
+	int i;
+	enum chipbustype ret = BUS_NONE;
+
+	for (i = 0; i < registered_programmer_count; i++)
+		ret |= registered_programmers[i].buses_supported;
+
+	return ret;
+}
Index: flashrom-register_all_programmers_register_generic/flashrom.c
===================================================================
--- flashrom-register_all_programmers_register_generic/flashrom.c	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/flashrom.c	(Arbeitskopie)
@@ -46,9 +46,6 @@
 
 static char *programmer_param = NULL;
 
-/* Supported buses for the current programmer. */
-enum chipbustype buses_supported;
-
 /*
  * Programmers supporting multiple buses can have differing size limits on
  * each bus. Store the limits for each bus in a common struct.
@@ -314,7 +311,6 @@
 		.fwh		= 0xffffffff,
 		.spi		= 0xffffffff,
 	};
-	buses_supported = BUS_NONE;
 	/* Default to top aligned flash at 4 GB. */
 	flashbase = 0;
 	/* Registering shutdown functions is now allowed. */
@@ -361,44 +357,44 @@
 
 void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	par_programmer->chip_writeb(flash, val, addr);
+	flash->pgm->par.chip_writeb(flash, val, addr);
 }
 
 void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
 {
-	par_programmer->chip_writew(flash, val, addr);
+	flash->pgm->par.chip_writew(flash, val, addr);
 }
 
 void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
-	par_programmer->chip_writel(flash, val, addr);
+	flash->pgm->par.chip_writel(flash, val, addr);
 }
 
 void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
 		 size_t len)
 {
-	par_programmer->chip_writen(flash, buf, addr, len);
+	flash->pgm->par.chip_writen(flash, buf, addr, len);
 }
 
 uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readb(flash, addr);
+	return flash->pgm->par.chip_readb(flash, addr);
 }
 
 uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readw(flash, addr);
+	return flash->pgm->par.chip_readw(flash, addr);
 }
 
 uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readl(flash, addr);
+	return flash->pgm->par.chip_readl(flash, addr);
 }
 
 void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
 		size_t len)
 {
-	par_programmer->chip_readn(flash, buf, addr, len);
+	flash->pgm->par.chip_readn(flash, buf, addr, len);
 }
 
 void programmer_delay(int usecs)
@@ -942,7 +938,8 @@
 	return 1;
 }
 
-int probe_flash(int startchip, struct flashctx *fill_flash, int force)
+int probe_flash(struct registered_programmer *pgm, int startchip,
+		struct flashctx *fill_flash, int force)
 {
 	const struct flashchip *flash;
 	unsigned long base = 0;
@@ -954,20 +951,9 @@
 	for (flash = flashchips + startchip; flash && flash->name; flash++) {
 		if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0)
 			continue;
-		buses_common = buses_supported & flash->bustype;
-		if (!buses_common) {
-			msg_gspew("Probing for %s %s, %d kB: skipped. ",
-			         flash->vendor, flash->name, flash->total_size);
-			tmp = flashbuses_to_text(buses_supported);
-			msg_gspew("Host bus type %s ", tmp);
-			free(tmp);
-			tmp = flashbuses_to_text(flash->bustype);
-			msg_gspew("and chip bus type %s are incompatible.",
-				  tmp);
-			free(tmp);
-			msg_gspew("\n");
+		buses_common = pgm->buses_supported & flash->bustype;
+		if (!buses_common)
 			continue;
-		}
 		msg_gdbg("Probing for %s %s, %d kB: ",
 			     flash->vendor, flash->name, flash->total_size);
 		if (!flash->probe && !force) {
@@ -981,6 +967,7 @@
 
 		/* Start filling in the dynamic data. */
 		memcpy(fill_flash, flash, sizeof(struct flashchip));
+		fill_flash->pgm = pgm;
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
 		fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);
Index: flashrom-register_all_programmers_register_generic/programmer.h
===================================================================
--- flashrom-register_all_programmers_register_generic/programmer.h	(Revision 1474)
+++ flashrom-register_all_programmers_register_generic/programmer.h	(Arbeitskopie)
@@ -133,6 +133,8 @@
 	int (*get_miso) (void);
 	void (*request_bus) (void);
 	void (*release_bus) (void);
+	/* Length of half a clock period in usecs. */
+	unsigned int half_period;
 };
 
 #if CONFIG_INTERNAL == 1
@@ -208,6 +210,7 @@
 
 #if NEED_PCI == 1
 /* pcidev.c */
+// FIXME: These need to be local, not global
 extern uint32_t io_base_addr;
 extern struct pci_access *pacc;
 extern struct pci_dev *pcidev_dev;
@@ -427,7 +430,7 @@
 #endif
 
 /* bitbang_spi.c */
-int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod);
+int bitbang_spi_init(const struct bitbang_spi_master *master);
 int bitbang_spi_shutdown(const struct bitbang_spi_master *master);
 
 /* buspirate_spi.c */
@@ -452,6 +455,7 @@
 	uint32_t fwh;
 	uint32_t spi;
 };
+// FIXME: These need to be local, not global
 extern struct decode_sizes max_rom_decode;
 extern int programmer_may_write;
 extern unsigned long flashbase;
@@ -498,7 +502,6 @@
 	SPI_CONTROLLER_SERPROG,
 #endif
 };
-extern const int spi_programmer_count;
 
 #define MAX_DATA_UNSPECIFIED 0
 #define MAX_DATA_READ_UNLIMITED 64 * 1024
@@ -514,15 +517,15 @@
 	/* Optimized functions for this programmer */
 	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	const void *data;
 };
 
-extern const struct spi_programmer *spi_programmer;
 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 			     const unsigned char *writearr, unsigned char *readarr);
 int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
-void register_spi_programmer(const struct spi_programmer *programmer);
+int register_spi_programmer(const struct spi_programmer *programmer);
 
 /* ichspi.c */
 #if CONFIG_INTERNAL == 1
@@ -570,15 +573,14 @@
 	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
+	const void *data;
 };
-extern const struct opaque_programmer *opaque_programmer;
-void register_opaque_programmer(const struct opaque_programmer *pgm);
+int register_opaque_programmer(const struct opaque_programmer *pgm);
 
 /* programmer.c */
 int noop_shutdown(void);
 void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
 void fallback_unmap(void *virt_addr, size_t len);
-uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr);
 void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
 void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
@@ -595,9 +597,20 @@
 	uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
 	uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
 	void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+	const void *data;
 };
-extern const struct par_programmer *par_programmer;
-void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
+int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
+struct registered_programmer {
+	enum chipbustype buses_supported;
+	union {
+		struct par_programmer par;
+		struct spi_programmer spi;
+		struct opaque_programmer opaque;
+	};
+};
+extern struct registered_programmer registered_programmers[];
+extern int registered_programmer_count;
+int register_programmer(struct registered_programmer *pgm);
 
 /* serprog.c */
 #if CONFIG_SERPROG == 1


-- 
http://www.hailfinger.org/



From adam.kalaska at gmail.com  Sun Dec 18 15:45:14 2011
From: adam.kalaska at gmail.com (Adam Kalaska)
Date: Sun, 18 Dec 2011 15:45:14 +0100
Subject: [flashrom] flash operation log
Message-ID: <CAL1-WxSiZzxY1Gd6g5aX2Hr+rnzS9z=kLrNrB4vAp9RRCCrQnA@mail.gmail.com>

for Your request send my logs

all operation success

thanks
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From marko.preuss at telecolumbus.net  Mon Dec 19 16:24:05 2011
From: marko.preuss at telecolumbus.net (Marko Preuss)
Date: Mon, 19 Dec 2011 16:24:05 +0100
Subject: [flashrom] Update Bios 11.10 Oneric
Message-ID: <1324308245.2985.2.camel@marko-desktop>

Hallo
This is flashrom - V
I will update Bios ?
Please help 

We is the update Befehl ? sudo flashrom - E  ? 
Beste regards

marko at marko-desktop:~$ flashrom -V
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with
libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at
http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2498M loops
per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us,
10000 myus = 10001 us, 4 myus = 4 us, OK.
Initializing internal programmer
ERROR: Could not get I/O privileges (Operation not permitted).
You need to be root.
marko at marko-desktop:~$ 




From marko.preuss at telecolumbus.net  Mon Dec 19 16:34:39 2011
From: marko.preuss at telecolumbus.net (Marko Preuss)
Date: Mon, 19 Dec 2011 16:34:39 +0100
Subject: [flashrom] Bios Update
Message-ID: <1324308879.3077.1.camel@marko-desktop>

Hello has  this updated ?


Output Informations in the teminal

marko at marko-desktop:~$ sudo flashrom -E -V
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with
libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at
http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2480M loops
per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 992 us, 10000
myus = 10222 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "ECS"
DMI string system-product-name: "GF7100/7050PVT-M3"
DMI string system-version: "1.0"
DMI string baseboard-manufacturer: "ECS"
DMI string baseboard-product-name: "GF7100/7050PVT-M3"
DMI string baseboard-version: "1.0"
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP73" with PCI ID 10de:07d7. 
This chipset is marked as untested. If you are using an up-to-date
version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Flash bus type is SPI
SPI on this chipset is WIP. Please report any success or failure by
mailing us the verbose output to flashrom at flashrom.org, thanks!
Found SMBus device 10de:07d8 at 00:03:1
MCP SPI BAR is at 0xfec80000
Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544.
SPI control is 0xc012, req=0, gnt=0
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support
for your
chipset. Thanks.
OK.
This chipset supports the following protocols: SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2
0x13
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Chip status register is 00
Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address
0xfff00000.
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (RDID), 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xef, id2 0x13
Erasing and writing flash chip... Trying erase function 0...
0x000000-0x000fff:E, 0x001000-0x001fff:E, 0x002000-0x002fff:E,
0x003000-0x003fff:E, 0x004000-0x004fff:E, 0x005000-0x005fff:E,
0x006000-0x006fff:E, 0x007000-0x007fff:E, 0x008000-0x008fff:E,
0x009000-0x009fff:E, 0x00a000-0x00afff:E, 0x00b000-0x00bfff:E,
0x00c000-0x00cfff:E, 0x00d000-0x00dfff:E, 0x00e000-0x00efff:E,
0x00f000-0x00ffff:E, 0x010000-0x010fff:E, 0x011000-0x011fff:E,
0x012000-0x012fff:E, 0x013000-0x013fff:E, 0x014000-0x014fff:E,
0x015000-0x015fff:E, 0x016000-0x016fff:E, 0x017000-0x017fff:E,
0x018000-0x018fff:E, 0x019000-0x019fff:E, 0x01a000-0x01afff:E,
0x01b000-0x01bfff:E, 0x01c000-0x01cfff:E, 0x01d000-0x01dfff:E,
0x01e000-0x01efff:E, 0x01f000-0x01ffff:E, 0x020000-0x020fff:E,
0x021000-0x021fff:E, 0x022000-0x022fff:E, 0x023000-0x023fff:E,
0x024000-0x024fff:E, 0x025000-0x025fff:E, 0x026000-0x026fff:E,
0x027000-0x027fff:E, 0x028000-0x028fff:E, 0x029000-0x029fff:E,
0x02a000-0x02afff:E, 0x02b000-0x02bfff:E, 0x02c000-0x02cfff:E,
0x02d000-0x02dfff:E, 0x02e000-0x02efff:E, 0x02f000-0x02ffff:E,
0x030000-0x030fff:E, 0x031000-0x031fff:E, 0x032000-0x032fff:E,
0x033000-0x033fff:E, 0x034000-0x034fff:E, 0x035000-0x035fff:E,
0x036000-0x036fff:E, 0x037000-0x037fff:E, 0x038000-0x038fff:E,
0x039000-0x039fff:E, 0x03a000-0x03afff:E, 0x03b000-0x03bfff:E,
0x03c000-0x03cfff:E, 0x03d000-0x03dfff:E, 0x03e000-0x03efff:E,
0x03f000-0x03ffff:E, 0x040000-0x040fff:E, 0x041000-0x041fff:E,
0x042000-0x042fff:E, 0x043000-0x043fff:E, 0x044000-0x044fff:E,
0x045000-0x045fff:E, 0x046000-0x046fff:E, 0x047000-0x047fff:E,
0x048000-0x048fff:E, 0x049000-0x049fff:E, 0x04a000-0x04afff:E,
0x04b000-0x04bfff:E, 0x04c000-0x04cfff:E, 0x04d000-0x04dfff:E,
0x04e000-0x04efff:E, 0x04f000-0x04ffff:E, 0x050000-0x050fff:E,
0x051000-0x051fff:E, 0x052000-0x052fff:E, 0x053000-0x053fff:E,
0x054000-0x054fff:E, 0x055000-0x055fff:E, 0x056000-0x056fff:E,
0x057000-0x057fff:E, 0x058000-0x058fff:E, 0x059000-0x059fff:E,
0x05a000-0x05afff:E, 0x05b000-0x05bfff:E, 0x05c000-0x05cfff:E,
0x05d000-0x05dfff:E, 0x05e000-0x05efff:E, 0x05f000-0x05ffff:E,
0x060000-0x060fff:E, 0x061000-0x061fff:E, 0x062000-0x062fff:E,
0x063000-0x063fff:E, 0x064000-0x064fff:E, 0x065000-0x065fff:E,
0x066000-0x066fff:E, 0x067000-0x067fff:E, 0x068000-0x068fff:E,
0x069000-0x069fff:E, 0x06a000-0x06afff:E, 0x06b000-0x06bfff:E,
0x06c000-0x06cfff:E, 0x06d000-0x06dfff:E, 0x06e000-0x06efff:E,
0x06f000-0x06ffff:E, 0x070000-0x070fff:E, 0x071000-0x071fff:E,
0x072000-0x072fff:E, 0x073000-0x073fff:E, 0x074000-0x074fff:E,
0x075000-0x075fff:E, 0x076000-0x076fff:E, 0x077000-0x077fff:E,
0x078000-0x078fff:E, 0x079000-0x079fff:E, 0x07a000-0x07afff:E,
0x07b000-0x07bfff:E, 0x07c000-0x07cfff:E, 0x07d000-0x07dfff:E,
0x07e000-0x07efff:E, 0x07f000-0x07ffff:E, 0x080000-0x080fff:E,
0x081000-0x081fff:E, 0x082000-0x082fff:E, 0x083000-0x083fff:E,
0x084000-0x084fff:E, 0x085000-0x085fff:E, 0x086000-0x086fff:E,
0x087000-0x087fff:E, 0x088000-0x088fff:E, 0x089000-0x089fff:E,
0x08a000-0x08afff:E, 0x08b000-0x08bfff:E, 0x08c000-0x08cfff:E,
0x08d000-0x08dfff:E, 0x08e000-0x08efff:E, 0x08f000-0x08ffff:E,
0x090000-0x090fff:E, 0x091000-0x091fff:E, 0x092000-0x092fff:E,
0x093000-0x093fff:E, 0x094000-0x094fff:E, 0x095000-0x095fff:E,
0x096000-0x096fff:E, 0x097000-0x097fff:E, 0x098000-0x098fff:E,
0x099000-0x099fff:E, 0x09a000-0x09afff:E, 0x09b000-0x09bfff:E,
0x09c000-0x09cfff:E, 0x09d000-0x09dfff:E, 0x09e000-0x09efff:E,
0x09f000-0x09ffff:E, 0x0a0000-0x0a0fff:E, 0x0a1000-0x0a1fff:E,
0x0a2000-0x0a2fff:E, 0x0a3000-0x0a3fff:E, 0x0a4000-0x0a4fff:E,
0x0a5000-0x0a5fff:E, 0x0a6000-0x0a6fff:E, 0x0a7000-0x0a7fff:E,
0x0a8000-0x0a8fff:E, 0x0a9000-0x0a9fff:E, 0x0aa000-0x0aafff:E,
0x0ab000-0x0abfff:E, 0x0ac000-0x0acfff:E, 0x0ad000-0x0adfff:E,
0x0ae000-0x0aefff:E, 0x0af000-0x0affff:E, 0x0b0000-0x0b0fff:E,
0x0b1000-0x0b1fff:E, 0x0b2000-0x0b2fff:E, 0x0b3000-0x0b3fff:E,
0x0b4000-0x0b4fff:E, 0x0b5000-0x0b5fff:E, 0x0b6000-0x0b6fff:E,
0x0b7000-0x0b7fff:E, 0x0b8000-0x0b8fff:E, 0x0b9000-0x0b9fff:E,
0x0ba000-0x0bafff:E, 0x0bb000-0x0bbfff:E, 0x0bc000-0x0bcfff:E,
0x0bd000-0x0bdfff:E, 0x0be000-0x0befff:E, 0x0bf000-0x0bffff:E,
0x0c0000-0x0c0fff:E, 0x0c1000-0x0c1fff:E, 0x0c2000-0x0c2fff:E,
0x0c3000-0x0c3fff:E, 0x0c4000-0x0c4fff:E, 0x0c5000-0x0c5fff:E,
0x0c6000-0x0c6fff:E, 0x0c7000-0x0c7fff:E, 0x0c8000-0x0c8fff:E,
0x0c9000-0x0c9fff:E, 0x0ca000-0x0cafff:E, 0x0cb000-0x0cbfff:E,
0x0cc000-0x0ccfff:E, 0x0cd000-0x0cdfff:E, 0x0ce000-0x0cefff:E,
0x0cf000-0x0cffff:E, 0x0d0000-0x0d0fff:E, 0x0d1000-0x0d1fff:E,
0x0d2000-0x0d2fff:E, 0x0d3000-0x0d3fff:E, 0x0d4000-0x0d4fff:E,
0x0d5000-0x0d5fff:E, 0x0d6000-0x0d6fff:E, 0x0d7000-0x0d7fff:E,
0x0d8000-0x0d8fff:E, 0x0d9000-0x0d9fff:E, 0x0da000-0x0dafff:E,
0x0db000-0x0dbfff:E, 0x0dc000-0x0dcfff:E, 0x0dd000-0x0ddfff:E,
0x0de000-0x0defff:E, 0x0df000-0x0dffff:E, 0x0e0000-0x0e0fff:E,
0x0e1000-0x0e1fff:E, 0x0e2000-0x0e2fff:E, 0x0e3000-0x0e3fff:E,
0x0e4000-0x0e4fff:E, 0x0e5000-0x0e5fff:E, 0x0e6000-0x0e6fff:E,
0x0e7000-0x0e7fff:E, 0x0e8000-0x0e8fff:E, 0x0e9000-0x0e9fff:E,
0x0ea000-0x0eafff:E, 0x0eb000-0x0ebfff:E, 0x0ec000-0x0ecfff:E,
0x0ed000-0x0edfff:E, 0x0ee000-0x0eefff:E, 0x0ef000-0x0effff:E,
0x0f0000-0x0f0fff:E, 0x0f1000-0x0f1fff:E, 0x0f2000-0x0f2fff:E,
0x0f3000-0x0f3fff:E, 0x0f4000-0x0f4fff:E, 0x0f5000-0x0f5fff:E,
0x0f6000-0x0f6fff:E, 0x0f7000-0x0f7fff:E, 0x0f8000-0x0f8fff:E,
0x0f9000-0x0f9fff:E, 0x0fa000-0x0fafff:E, 0x0fb000-0x0fbfff:E,
0x0fc000-0x0fcfff:E, 0x0fd000-0x0fdfff:E, 0x0fe000-0x0fefff:E,
0x0ff000-0x0fffff:E
Erase/write done.
marko at marko-desktop:~$ 


Best Regards



From nowens2 at illinois.edu  Mon Dec 19 18:15:30 2011
From: nowens2 at illinois.edu (Owens, Nathan D)
Date: Mon, 19 Dec 2011 17:15:30 +0000
Subject: [flashrom] FAIL: msi ms-7135 (k8n-neo3)
Message-ID: <E0D63A8EBAE7464ABC2FC7E10531308D12651071@chimbx2.ad.uillinois.edu>

Howdy,

I've been trying to flash the SST49LF160C on my ms-7135. Fails to verify with the same problem every time (see attached).

I've tried newer and older versions of flashrom, but always the same thing.

Oddly, when I use this board's original chip (SST49LF004A/B), flashing verifies without a problem.

Any ideas?

Thanks,
Nate Owens
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From flashrom at mkarcher.dialup.fu-berlin.de  Mon Dec 19 21:04:38 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Mon, 19 Dec 2011 21:04:38 +0100
Subject: [flashrom] FAIL: msi ms-7135 (k8n-neo3)
In-Reply-To: <E0D63A8EBAE7464ABC2FC7E10531308D12651071@chimbx2.ad.uillinois.edu>
References: <E0D63A8EBAE7464ABC2FC7E10531308D12651071@chimbx2.ad.uillinois.edu>
Message-ID: <1324325078.4037.41.camel@localhost>

Am Montag, den 19.12.2011, 17:15 +0000 schrieb Owens, Nathan D:
> I've been trying to flash the SST49LF160C on my ms-7135. Fails to
> verify with the same problem every time (see attached).
> 
> Oddly, when I use this board's original chip (SST49LF004A/B), flashing verifies without a problem.

You seem to have encountered either a bug in flashrom or a limit of your
mainboard, but I suspect the former. A problem with nVidia chipsets is
that there seems to be no public documentation about the register bits.

The issue you are facing is that you have an address decoding problem:
While the ROM address space of 2MB of your new chip is decoded correctly
(otherwise the probe would fail, as we probe at the low end of the
address space), the register dump looks suspicious:


> lockbits at address=0xb7154002 is 0xff
> lockbits at address=0xb7164002 is 0xff
> [...]
> lockbits at address=0xb7244002 is 0xff
> lockbits at address=0xb7254002 is 0x0
> lockbits at address=0xb7264002 is 0x0
> lockbits at address=0xb7334002 is 0x0
> [...]
> lockbits at address=0xb7344002 is 0x0
> lockbits at address=0xb734c002 is 0x0
> lockbits at address=0xb734e002 is 0x0
> lockbits at address=0xb7350002 is 0x0
The lockbits on this chip are accessed in a separate address space,
called the "register space", and should never read 0xff. So it is quite
likely that the reads returning 0xff are not routed to the ROM chip at
all, indacting a wrongly configured decoding. Only 1MB of register space
is decoded.

As your chip defaults to read-only, and you have to unlock it (which
flashrom tries through the register space), it will fail to unlock the
areas of the flash chip having lock registers that are inaccessible to
the processor. So the first half of your 2MB chip is read-only, and
writing to it fails.

> Any ideas?
Most likely, we need to reprogram the south bridge to route a larger
address space to the flash chip (just hoping that no PCI component has
been mapped at that area, which is at 0xFFA00000 .. 0xFFAFFFFF for the
unrouted half of the flash chip while 0xFFB00000 .. 0xFFBFFFFF) is
routed to the flash chip.

Please post the output of
lspci -nnvvvxxx (run as root)

Thanks in advance,
  Michael Karcher



From jakllsch at kollasch.net  Mon Dec 19 20:51:18 2011
From: jakllsch at kollasch.net (Jonathan A. Kollasch)
Date: Mon, 19 Dec 2011 19:51:18 +0000
Subject: [flashrom] FAIL: msi ms-7135 (k8n-neo3)
In-Reply-To: <E0D63A8EBAE7464ABC2FC7E10531308D12651071@chimbx2.ad.uillinois.edu>
References: <E0D63A8EBAE7464ABC2FC7E10531308D12651071@chimbx2.ad.uillinois.edu>
Message-ID: <20111219195117.GA15116@tazenda.kollasch.net>

On Mon, Dec 19, 2011 at 05:15:30PM +0000, Owens, Nathan D wrote:
> Howdy,
> 
> I've been trying to flash the SST49LF160C on my ms-7135. Fails to verify with the same problem every time (see attached).
> 
> I've tried newer and older versions of flashrom, but always the same thing.
> 
> Oddly, when I use this board's original chip (SST49LF004A/B), flashing verifies without a problem.
> 
> Any ideas?

I'm curious, what does the failure pattern look like?  The SST49LF080A I
sometimes use on my 7135 works fine last I checked.

	Jonathan Kollasch

(That is, write a test pattern to the chip, and then read it back and
compare hexdumps after a write failure.)


From flashrom at mkarcher.dialup.fu-berlin.de  Mon Dec 19 21:22:58 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Mon, 19 Dec 2011 21:22:58 +0100
Subject: [flashrom] Bios Update
In-Reply-To: <1324308879.3077.1.camel@marko-desktop>
References: <1324308879.3077.1.camel@marko-desktop>
Message-ID: <1324326178.4037.56.camel@localhost>

Am Montag, den 19.12.2011, 16:34 +0100 schrieb Marko Preuss:
> Hello has  this updated ?
I will do a dual-language response, as it seems you are German.
(Ich antworte zweisprachig, da Du deutsch zu sein scheinst.)

> marko at marko-desktop:~$ sudo flashrom -E -V
This command is not used for updating your flash chip, but for erasing
your flash chip, so that it is ready to get a new image written into it.
This explicit deleting is generally not needed with flashrom before
writing, as flashrom determines automatically, which areas need to be
erased.
(Dieses Kommando wird nicht zum Updaten des BIOS verwendet, sondern zum
L?schen des Inhalts des BIOS-Chips, so dass er ein neues BIOS aufnehmen
kann. Bei der Neuprogrammierung mit flashrom ist ein explizites L?schen
vorher nicht notwendig, da flashrom von selbst feststellt, welche
Bereiche vor dem Schreiben gel?scht werden m?ssen)

> Erase/write done.
Erasing your flash chip worked fine. This is both good and bad news. The
good news is that flashrom seems to work fine on your system, and
recovery to a sane state should work out-of-the-box. The bad news is
that your chip is now completely erased, so the computer is unable to
boot now, so keep it running until your issue is fixed. You need to
obtain a valid BIOS image for your board and write that to the flash
chip. Elitegroup/ECS provides a BIOS for your board at
http://eudownload.ecs.com.tw/dlfileecs/bios/mb/p4/GF7100PVT-M3/GF7100M3080707.zip
You have to download and extract that ZIP file and run 
 sudo flashrom -w GF7100-M3_080707.ROM
to write the image. If flashrom outputs "VERIFIED" at the end, your
system should be safe to reboot again.
(Der L?schvorgang war erfolgreich, das ist sowohl eine gute wie eine
schlechte Nachricht. Die gute Nachricht ist, dass flashrom auf Deinem
System zu funktionieren scheint, und damit eine problemlose
Wiederherstellung eines guten Zustands m?glich ist. Die schlechte
Nachricht ist, dass Dein BIOS-Chip derzeit komplett leer ist, und daher
der Computer nicht in der Lage ist, zu booten. Lasse das System daher
laufen, bis wieder ein g?ltiger Inhalt im Flash-Chip steht! Dazu musst
Du ein BIOS-Image f?r Dein Board besorgen und in den Flash-Chip
schreiben. Elitegroup/ECS stellt ein passendes BIOS unter
http://eudownload.ecs.com.tw/dlfileecs/bios/mb/p4/GF7100PVT-M3/GF7100M3080707.zip
zur Verf?gung. Du solltest diese Datei herunterladen auspacken, und dann
 sudo flashrom -w GF7100-M3_080707.ROM
ausf?hren, um das BIOS neu zu programmieren. Wenn flashrom "VERIFIED" am
Ende ausgibt, ist das System wieder in einem Zustand, in dem es einen
Neustart ?bersteht.

Regards hoping that this mail is not too late,
  Michael Karcher
(Gr??e in der Hoffnung, dass diese Mail nicht schon zu sp?t ist,
  Michael Karcher)



From flashrom at mkarcher.dialup.fu-berlin.de  Mon Dec 19 22:57:50 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Mon, 19 Dec 2011 22:57:50 +0100
Subject: [flashrom] [PATCH] Generic programmer registration: final part
In-Reply-To: <4EEE95A7.1020208@gmx.net>
References: <4EECA5FE.6060609@gmx.net> <1324214554.4037.29.camel@localhost>
	<4EEE95A7.1020208@gmx.net>
Message-ID: <1324331870.4037.75.camel@localhost>

Am Montag, den 19.12.2011, 02:38 +0100 schrieb Carl-Daniel Hailfinger:
> > A patch that is rebased to that revision and fixes a compiler warning
> > (which gets fatal due to -Werror) is attached.
> Used those changes as basis for my reworked patch. Did you introduce any
> functional changes except the compiler warning fix?
If I remember correctly, apart from that warning fix I just shuffled
whitespace around to fix the 80-column-wrap-mismatches.

> I don't see a good way to move the max_data_read check in
> default_spi_read to an init function, though, because you can never be
> sure at init time if default_spi_read will be called.
Currently, default_spi_read is only called directly from the spi
programmer structure, but we can't be sure a programmer decides to use
the default implementation only sometimes, so agreed, we have to keep
the checks.

> > I suggest to drop noop_chip_readb/noop_chip_writeb at the same time as
> > we drop par_programmer_none, as these functions are no longer used.
> noop_chip_readb dropped.
> noop_chip_writeb may be useful if we merge a programmer driver which
> does not support write.
> What do you think?
If we find a way to revive the "blind read via force", good idea. On the
other hand, I think a opaque mmap dumper would be more apt for the blind
read. It should just get the chip size and the optionally start or end
address of the mapping as parameter.

> >>  	msg_pdbg("This programmer supports the following protocols: %s.\n",
> >>  		 tempstr);
> > It's definitely not "this programmer", as should be obvious if you "kept
> > in mind" as I told you that get_buses_supportet returns the union of all
> > programmers.
> I beg to differ. This is a message to the end user, and the end user
> does not think of a mainboard as multiple programmers.
As on IRC: "The following protocols are supported".

> ichspi.c:
> Use ich_generation instead of spi_programmer->type (or
> flash->pgm->spi.type) in run_opcode to determine if the programmer was
> initialized correctly.
> This change is debatable because it uses a local static variable instead
> of the info available in flash->pgm, but OTOH now the internal usage is
> consistent.
consistency first - we can eliminate the local variable later anyway
(and we are going to, I expect)

> Another question is whether we should really check for
> correct initialization at this point.
I guess the checking makes no sense anymore, as there is no way to enter
this function without going through the init function.

> The programmer registration functions now return error/success instead
> of void, but their callers don't care. Fix now or later?
Fix later. We already inform the user if we are losing programmers,
that's enough for now.

> TODO?
> - max_decode is a programmer property, add it to the
> register_*_programmer parameters
> - programmer_may_write is a programmer property, add it to the
> register_*_programmer parameters
Yes, both of them should be added to the programmer structure. I am
unsure whether we want rarely used options (like may-not-write) as
parameters though. Having the size there is good - it makes the
programmer think about the maximum supported size.

> All programmer types (Parallel, SPI, Opaque) now register themselves
> into a generic programmer list and probing is now programmer-centric
> instead of chip-centric.
TODO: split the flash chip list into SPI and non-SPI lists. No need to
iterate over the other type and skip those chips because of bus
mismatches. Do it later.

> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

 
>  int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
>  {
> -	if (!bitbang_spi_master) {
> +	if (!master) {
>  		msg_perr("Shutting down an uninitialized SPI bitbang master!\n"
>  			 "Please report a bug at flashrom at flashrom.org\n");
>  		return 1;
As I just found out, bitbang_spi_shutdown is never called at all, but if
it will be called, it will be a callback registered in bitbang_spi_init
which already checked master for nullness. Also the function could be
made static in that case.

>  	msg_pdbg("This programmer supports the following protocols: %s.\n",
>  		 tempstr);
Message change: see intro.

>  	if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
>  		msg_perr("%s called with one of probe/read/write/erase being "
>  			 "NULL. Please report a bug at flashrom at flashrom.org\n",
>  			 __func__);
> -		return;
> +		return ERROR_FLASHROM_BUG;
Later, we could add a feature that allows read-only "programmers" that
have write and erase NULL, setting programmer_may_write to FALSE.

> -void register_spi_programmer(const struct spi_programmer *pgm)
> +int register_spi_programmer(const struct spi_programmer *pgm)
>  {
> -	spi_programmer = pgm;
> -	buses_supported |= BUS_SPI;
> +	struct registered_programmer rpgm;
> +
> +	if (!pgm->write_256 || !pgm->read || !pgm->command ||
> +	    !pgm->multicommand ||
> +	    ((pgm->command == default_spi_send_command) &&
> +	     (pgm->multicommand == default_spi_send_multicommand))) {
> +		msg_perr("%s called with inconsistent settings. "
s/inconsistent settings/incomplete programmer definition/

> +	if (!chip_writeb || !chip_writew || !chip_writel || !chip_writen ||
> +	    !chip_readb || !chip_readw || !chip_readl || !chip_readn) {
> +		msg_perr("%s called with one of probe/read/write/erase being "
dito.

Regards,
  Michael Karcher



From dhendrix at google.com  Mon Dec 19 23:15:58 2011
From: dhendrix at google.com (David Hendricks)
Date: Mon, 19 Dec 2011 14:15:58 -0800
Subject: [flashrom] [PATCH] Cross-compilation fixes
In-Reply-To: <4EEB969F.8090209@gmx.net>
References: <4EDC25BD.1090704@gmx.net> <4EE1123A.8040707@assembler.cz>
	<4EE11B7F.8080200@gmx.net>
	<CAKOoyUfUgS-+RkkLxm_NyBqdU_g1zuVeLuQyDhBt0XfZj+0CKA@mail.gmail.com>
	<4EEB969F.8090209@gmx.net>
Message-ID: <CAKOoyUc90Zk8=jWeR5a1jfLULCVEUzJL-A8keWJ39mtwVWwgsg@mail.gmail.com>

On Fri, Dec 16, 2011 at 11:06 AM, Carl-Daniel Hailfinger <
c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 09.12.2011 05:02 schrieb David Hendricks:
> > On Thu, Dec 8, 2011 at 12:18 PM, Carl-Daniel Hailfinger <
> > c-d.hailfinger.devel.2006 at gmx.net> wrote:
> >
> >>> Most likely no arm support?
> >> Indeed, ARM support is missing. I think it is mainy held back by libpci
> >> breakage for which we only have a really hackish workaround.
> >
> > For what it's worth, when I tested the patch earlier it worked on ARM
> with
> > that libpci hack.
>
> The patch has been tested natively on FreeBSD, MinGW, Linux,
> DragonFlyBSD, with gcc and clang, cross-compiled with clang on Linux for
> Windows, cross-compiled with DJGPP on Linux for DOS, cross-compiled on
> Linux for MinGW, natively on Linux PowerPC, ....
>
> Ack anyone?
>

Acked-by: David Hendricks <dhendrix at google.com>

-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
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From stefan.tauner at student.tuwien.ac.at  Tue Dec 20 01:07:42 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 20 Dec 2011 01:07:42 +0100
Subject: [flashrom] ECS K7SEM (V1.0) - OK
In-Reply-To: <CAJZVDJDnYvv2fGYd_0xC8PQhCFUHdkc=8osw-SJXk8RvvbouLA@mail.gmail.com>
References: <CAJZVDJDnYvv2fGYd_0xC8PQhCFUHdkc=8osw-SJXk8RvvbouLA@mail.gmail.com>
Message-ID: <201112200007.pBK07auO018559@mail2.student.tuwien.ac.at>

On Wed, 14 Dec 2011 16:30:51 -0200
Marcos Felipe Rasia de Mello <marcosfrm at gmail.com> wrote:

> ECS K7SEM (V1.0) success report.
> 
> Board link: http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?CategoryID=1&DetailID=229&DetailName=Feature&MenuID=24&LanID=0
> 
> BIOS: http://download.ecsusa.com/dlfileecs/bios/mb/k7/k7sem/k7sem_12b.exe
> (K7SEM Ver:1.2b 01/27/2003)
> 
> Marcos

thanks marcos!
i have added the mainboard and marked the chipset as tested locally.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Tue Dec 20 01:19:29 2011
From: svn at flashrom.org (repository service)
Date: Tue, 20 Dec 2011 01:19:29 +0100
Subject: [flashrom] [commit] r1475 - trunk
Message-ID: <E1RcnQX-0006m9-UJ@ra.coresystems.de>

Author: hailfinger
Date: Tue Dec 20 01:19:29 2011
New Revision: 1475
URL: http://flashrom.org/trac/flashrom/changeset/1475

Log:
Have all programmer init functions register bus masters/programmers

All programmer types (Parallel, SPI, Opaque) now register themselves
into a generic programmer list and probing is now programmer-centric
instead of chip-centric.
Registering multiple SPI/... masters at the same time is now possible
without any problems. Handling multiple flash chips is still unchanged,
but now we have the infrastructure to deal with "dual BIOS" and "one
flash behind southbridge and one flash behind EC" sanely.

A nice side effect is that this patch kills quite a few global variables
and improves the situation for libflashrom.

Hint for developers:
struct {spi,par,opaque}_programmer now have a void *data pointer to
store any additional programmer-specific data, e.g. hardware
configuration info.

Note:
flashrom -f -c FOO -r forced_read.bin
does not work anymore. We have to find an architecturally clean way to
solve this.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

Modified:
   trunk/bitbang_spi.c
   trunk/cli_classic.c
   trunk/flash.h
   trunk/flashrom.c
   trunk/ichspi.c
   trunk/mcp6x_spi.c
   trunk/nicintel_spi.c
   trunk/ogp_spi.c
   trunk/opaque.c
   trunk/programmer.c
   trunk/programmer.h
   trunk/rayer_spi.c
   trunk/spi.c
   trunk/spi25.c

Modified: trunk/bitbang_spi.c
==============================================================================
--- trunk/bitbang_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/bitbang_spi.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -25,42 +25,37 @@
 #include "programmer.h"
 #include "spi.h"
 
-/* Length of half a clock period in usecs. */
-static int bitbang_spi_half_period;
-
-static const struct bitbang_spi_master *bitbang_spi_master = NULL;
-
 /* Note that CS# is active low, so val=0 means the chip is active. */
-static void bitbang_spi_set_cs(int val)
+static void bitbang_spi_set_cs(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_cs(val);
+	master->set_cs(val);
 }
 
-static void bitbang_spi_set_sck(int val)
+static void bitbang_spi_set_sck(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_sck(val);
+	master->set_sck(val);
 }
 
-static void bitbang_spi_set_mosi(int val)
+static void bitbang_spi_set_mosi(const const struct bitbang_spi_master *master, int val)
 {
-	bitbang_spi_master->set_mosi(val);
+	master->set_mosi(val);
 }
 
-static int bitbang_spi_get_miso(void)
+static int bitbang_spi_get_miso(const const struct bitbang_spi_master *master)
 {
-	return bitbang_spi_master->get_miso();
+	return master->get_miso();
 }
 
-static void bitbang_spi_request_bus(void)
+static void bitbang_spi_request_bus(const const struct bitbang_spi_master *master)
 {
-	if (bitbang_spi_master->request_bus)
-		bitbang_spi_master->request_bus();
+	if (master->request_bus)
+		master->request_bus();
 }
 
-static void bitbang_spi_release_bus(void)
+static void bitbang_spi_release_bus(const const struct bitbang_spi_master *master)
 {
-	if (bitbang_spi_master->release_bus)
-		bitbang_spi_master->release_bus();
+	if (master->release_bus)
+		master->release_bus();
 }
 
 static int bitbang_spi_send_command(struct flashctx *flash,
@@ -78,67 +73,59 @@
 	.write_256	= default_spi_write_256,
 };
 
-int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod)
+#if 0 // until it is needed
+static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
 {
+	/* FIXME: Run bitbang_spi_release_bus here or per command? */
+	return 0;
+}
+#endif
+
+int bitbang_spi_init(const struct bitbang_spi_master *master)
+{
+	struct spi_programmer pgm = spi_programmer_bitbang;
 	/* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
 	 * we catch it here. Same goes for missing initialization of bitbanging
 	 * functions.
 	 */
 	if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
-	    !master->set_sck || !master->set_mosi || !master->get_miso) {
+	    !master->set_sck || !master->set_mosi || !master->get_miso ||
+	    (master->request_bus && !master->release_bus) ||
+	    (!master->request_bus && master->release_bus)) {
 		msg_perr("Incomplete SPI bitbang master setting!\n"
 			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
-	}
-	if (bitbang_spi_master) {
-		msg_perr("SPI bitbang master already initialized!\n"
-			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
+		return ERROR_FLASHROM_BUG;
 	}
 
-	bitbang_spi_master = master;
-	bitbang_spi_half_period = halfperiod;
+	pgm.data = master;
+	register_spi_programmer(&pgm);
 
-	register_spi_programmer(&spi_programmer_bitbang);
-
-	/* FIXME: Run bitbang_spi_request_bus here or in programmer init? */
-	bitbang_spi_set_cs(1);
-	bitbang_spi_set_sck(0);
-	bitbang_spi_set_mosi(0);
-	return 0;
-}
-
-int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
-{
-	if (!bitbang_spi_master) {
-		msg_perr("Shutting down an uninitialized SPI bitbang master!\n"
-			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
-	}
-	if (master != bitbang_spi_master) {
-		msg_perr("Shutting down a mismatched SPI bitbang master!\n"
-			 "Please report a bug at flashrom at flashrom.org\n");
-		return 1;
-	}
-
-	/* FIXME: Run bitbang_spi_release_bus here or per command? */
-	bitbang_spi_master = NULL;
+	/* Only mess with the bus if we're sure nobody else uses it. */
+	bitbang_spi_request_bus(master);
+	bitbang_spi_set_cs(master, 1);
+	bitbang_spi_set_sck(master, 0);
+	bitbang_spi_set_mosi(master, 0);
+	/* FIXME: Release SPI bus here and request it again for each command or
+	 * don't release it now and only release it on programmer shutdown?
+	 */
+	bitbang_spi_release_bus(master);
 	return 0;
 }
 
-static uint8_t bitbang_spi_readwrite_byte(uint8_t val)
+static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master,
+				   uint8_t val)
 {
 	uint8_t ret = 0;
 	int i;
 
 	for (i = 7; i >= 0; i--) {
-		bitbang_spi_set_mosi((val >> i) & 1);
-		programmer_delay(bitbang_spi_half_period);
-		bitbang_spi_set_sck(1);
+		bitbang_spi_set_mosi(master, (val >> i) & 1);
+		programmer_delay(master->half_period);
+		bitbang_spi_set_sck(master, 1);
 		ret <<= 1;
-		ret |= bitbang_spi_get_miso();
-		programmer_delay(bitbang_spi_half_period);
-		bitbang_spi_set_sck(0);
+		ret |= bitbang_spi_get_miso(master);
+		programmer_delay(master->half_period);
+		bitbang_spi_set_sck(master, 0);
 	}
 	return ret;
 }
@@ -149,23 +136,24 @@
 				    unsigned char *readarr)
 {
 	int i;
+	const struct bitbang_spi_master *master = flash->pgm->spi.data;
 
 	/* FIXME: Run bitbang_spi_request_bus here or in programmer init?
 	 * Requesting and releasing the SPI bus is handled in here to allow the
 	 * programmer to use its own SPI engine for native accesses.
 	 */
-	bitbang_spi_request_bus();
-	bitbang_spi_set_cs(0);
+	bitbang_spi_request_bus(master);
+	bitbang_spi_set_cs(master, 0);
 	for (i = 0; i < writecnt; i++)
-		bitbang_spi_readwrite_byte(writearr[i]);
+		bitbang_spi_rw_byte(master, writearr[i]);
 	for (i = 0; i < readcnt; i++)
-		readarr[i] = bitbang_spi_readwrite_byte(0);
+		readarr[i] = bitbang_spi_rw_byte(master, 0);
 
-	programmer_delay(bitbang_spi_half_period);
-	bitbang_spi_set_cs(1);
-	programmer_delay(bitbang_spi_half_period);
+	programmer_delay(master->half_period);
+	bitbang_spi_set_cs(master, 1);
+	programmer_delay(master->half_period);
 	/* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
-	bitbang_spi_release_bus();
+	bitbang_spi_release_bus(master);
 
 	return 0;
 }

Modified: trunk/cli_classic.c
==============================================================================
--- trunk/cli_classic.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/cli_classic.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -172,7 +172,7 @@
 	struct flashctx flashes[3];
 	struct flashctx *fill_flash;
 	const char *name;
-	int namelen, opt, i;
+	int namelen, opt, i, j;
 	int startchip = 0, chipcount = 0, option_index = 0, force = 0;
 #if CONFIG_PRINT_WIKI == 1
 	int list_supported_wiki = 0;
@@ -444,17 +444,21 @@
 		ret = 1;
 		goto out_shutdown;
 	}
-	tempstr = flashbuses_to_text(buses_supported);
-	msg_pdbg("This programmer supports the following protocols: %s.\n",
+	tempstr = flashbuses_to_text(get_buses_supported());
+	msg_pdbg("The following protocols are supported: %s.\n",
 		 tempstr);
 	free(tempstr);
 
-	for (i = 0; i < ARRAY_SIZE(flashes); i++) {
-		startchip = probe_flash(startchip, &flashes[i], 0);
-		if (startchip == -1)
-			break;
-		chipcount++;
-		startchip++;
+	for (j = 0; j < registered_programmer_count; j++) {
+		startchip = 0;
+		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
+			startchip = probe_flash(&registered_programmers[j],
+						startchip, &flashes[i], 0);
+			if (startchip == -1)
+				break;
+			chipcount++;
+			startchip++;
+		}
 	}
 
 	if (chipcount > 1) {
@@ -472,6 +476,7 @@
 			printf("Note: flashrom can never write if the flash "
 			       "chip isn't found automatically.\n");
 		}
+#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered?
 		if (force && read_it && chip_to_probe) {
 			printf("Force read (-f -r -c) requested, pretending "
 			       "the chip is there:\n");
@@ -486,6 +491,7 @@
 			       "contain garbage.\n");
 			return read_flash_to_file(&flashes[0], filename);
 		}
+#endif
 		ret = 1;
 		goto out_shutdown;
 	} else if (!chip_to_probe) {
@@ -502,7 +508,7 @@
 	check_chip_supported(fill_flash);
 
 	size = fill_flash->total_size * 1024;
-	if (check_max_decode((buses_supported & fill_flash->bustype), size) &&
+	if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->bustype, size) &&
 	    (!force)) {
 		fprintf(stderr, "Chip is too big for this programmer "
 			"(-V gives details). Use --force to override.\n");

Modified: trunk/flash.h
==============================================================================
--- trunk/flash.h	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/flash.h	Tue Dec 20 01:19:29 2011	(r1475)
@@ -171,6 +171,7 @@
 	chipaddr virtual_memory;
 	/* Some flash devices have an additional register space. */
 	chipaddr virtual_registers;
+	struct registered_programmer *pgm;
 };
 
 #define TEST_UNTESTED	0
@@ -224,14 +225,13 @@
 	write_gran_1byte,
 	write_gran_256bytes,
 };
-extern enum chipbustype buses_supported;
 extern int verbose;
 extern const char flashrom_version[];
 extern char *chip_to_probe;
 void map_flash_registers(struct flashctx *flash);
 int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int erase_flash(struct flashctx *flash);
-int probe_flash(int startchip, struct flashctx *fill_flash, int force);
+int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force);
 int read_flash_to_file(struct flashctx *flash, const char *filename);
 int min(int a, int b);
 int max(int a, int b);
@@ -256,6 +256,13 @@
 
 /* Something happened that shouldn't happen, we'll abort. */
 #define ERROR_FATAL -0xee
+#define ERROR_FLASHROM_BUG -200
+/* We reached one of the hardcoded limits of flashrom. This can be fixed by
+ * increasing the limit of a compile-time allocation or by switching to dynamic
+ * allocation.
+ * Note: If this warning is triggered, check first for runaway registrations.
+ */
+#define ERROR_FLASHROM_LIMIT -201
 
 /* cli_output.c */
 /* Let gcc and clang check for correct printf-style format strings. */
@@ -297,4 +304,5 @@
 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
 uint32_t spi_get_valid_read_addr(struct flashctx *flash);
 
+enum chipbustype get_buses_supported(void);
 #endif				/* !__FLASH_H__ */

Modified: trunk/flashrom.c
==============================================================================
--- trunk/flashrom.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/flashrom.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -46,9 +46,6 @@
 
 static char *programmer_param = NULL;
 
-/* Supported buses for the current programmer. */
-enum chipbustype buses_supported;
-
 /*
  * Programmers supporting multiple buses can have differing size limits on
  * each bus. Store the limits for each bus in a common struct.
@@ -314,7 +311,6 @@
 		.fwh		= 0xffffffff,
 		.spi		= 0xffffffff,
 	};
-	buses_supported = BUS_NONE;
 	/* Default to top aligned flash at 4 GB. */
 	flashbase = 0;
 	/* Registering shutdown functions is now allowed. */
@@ -361,44 +357,44 @@
 
 void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	par_programmer->chip_writeb(flash, val, addr);
+	flash->pgm->par.chip_writeb(flash, val, addr);
 }
 
 void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
 {
-	par_programmer->chip_writew(flash, val, addr);
+	flash->pgm->par.chip_writew(flash, val, addr);
 }
 
 void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
-	par_programmer->chip_writel(flash, val, addr);
+	flash->pgm->par.chip_writel(flash, val, addr);
 }
 
 void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
 		 size_t len)
 {
-	par_programmer->chip_writen(flash, buf, addr, len);
+	flash->pgm->par.chip_writen(flash, buf, addr, len);
 }
 
 uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readb(flash, addr);
+	return flash->pgm->par.chip_readb(flash, addr);
 }
 
 uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readw(flash, addr);
+	return flash->pgm->par.chip_readw(flash, addr);
 }
 
 uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
-	return par_programmer->chip_readl(flash, addr);
+	return flash->pgm->par.chip_readl(flash, addr);
 }
 
 void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
 		size_t len)
 {
-	par_programmer->chip_readn(flash, buf, addr, len);
+	flash->pgm->par.chip_readn(flash, buf, addr, len);
 }
 
 void programmer_delay(int usecs)
@@ -942,7 +938,8 @@
 	return 1;
 }
 
-int probe_flash(int startchip, struct flashctx *fill_flash, int force)
+int probe_flash(struct registered_programmer *pgm, int startchip,
+		struct flashctx *fill_flash, int force)
 {
 	const struct flashchip *flash;
 	unsigned long base = 0;
@@ -954,20 +951,9 @@
 	for (flash = flashchips + startchip; flash && flash->name; flash++) {
 		if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0)
 			continue;
-		buses_common = buses_supported & flash->bustype;
-		if (!buses_common) {
-			msg_gspew("Probing for %s %s, %d kB: skipped. ",
-			         flash->vendor, flash->name, flash->total_size);
-			tmp = flashbuses_to_text(buses_supported);
-			msg_gspew("Host bus type %s ", tmp);
-			free(tmp);
-			tmp = flashbuses_to_text(flash->bustype);
-			msg_gspew("and chip bus type %s are incompatible.",
-				  tmp);
-			free(tmp);
-			msg_gspew("\n");
+		buses_common = pgm->buses_supported & flash->bustype;
+		if (!buses_common)
 			continue;
-		}
 		msg_gdbg("Probing for %s %s, %d kB: ",
 			     flash->vendor, flash->name, flash->total_size);
 		if (!flash->probe && !force) {
@@ -981,6 +967,7 @@
 
 		/* Start filling in the dynamic data. */
 		memcpy(fill_flash, flash, sizeof(struct flashchip));
+		fill_flash->pgm = pgm;
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
 		fill_flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);

Modified: trunk/ichspi.c
==============================================================================
--- trunk/ichspi.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/ichspi.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -635,7 +635,7 @@
 
 /* Read len bytes from the fdata/spid register into the data array.
  *
- * Note that using len > spi_programmer->max_data_read will return garbage or
+ * Note that using len > flash->pgm->spi.max_data_read will return garbage or
  * may even crash.
  */
 static void ich_read_data(uint8_t *data, int len, int reg0_off)
@@ -653,7 +653,7 @@
 
 /* Fill len bytes from the data array into the fdata/spid registers.
  *
- * Note that using len > spi_programmer->max_data_write will trash the registers
+ * Note that using len > flash->pgm->spi.max_data_write will trash the registers
  * following the data registers.
  */
 static void ich_fill_data(const uint8_t *data, int len, int reg0_off)
@@ -960,9 +960,9 @@
 		      uint8_t datalength, uint8_t * data)
 {
 	/* max_data_read == max_data_write for all Intel/VIA SPI masters */
-	uint8_t maxlength = spi_programmer->max_data_read;
+	uint8_t maxlength = flash->pgm->spi.max_data_read;
 
-	if (spi_programmer->type == SPI_CONTROLLER_NONE) {
+	if (ich_generation == CHIPSET_ICH_UNKNOWN) {
 		msg_perr("%s: unsupported chipset\n", __func__);
 		return -1;
 	}
@@ -1297,7 +1297,7 @@
 	REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
 
 	while (len > 0) {
-		block_len = min(len, opaque_programmer->max_data_read);
+		block_len = min(len, flash->pgm->opaque.max_data_read);
 		ich_hwseq_set_addr(addr);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* set read operation */
@@ -1336,7 +1336,7 @@
 
 	while (len > 0) {
 		ich_hwseq_set_addr(addr);
-		block_len = min(len, opaque_programmer->max_data_write);
+		block_len = min(len, flash->pgm->opaque.max_data_write);
 		ich_fill_data(buf, block_len, ICH9_REG_FDATA0);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* clear operation */

Modified: trunk/mcp6x_spi.c
==============================================================================
--- trunk/mcp6x_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/mcp6x_spi.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -98,6 +98,7 @@
 	.get_miso = mcp6x_bitbang_get_miso,
 	.request_bus = mcp6x_request_spibus,
 	.release_bus = mcp6x_release_spibus,
+	.half_period = 0,
 };
 
 int mcp6x_spi_init(int want_spi)
@@ -159,8 +160,7 @@
 		 (status >> MCP6X_SPI_GRANT) & 0x1);
 	mcp_gpiostate = status & 0xff;
 
-	/* Zero halfperiod delay. */
-	if (bitbang_spi_init(&bitbang_spi_master_mcp6x, 0)) {
+	if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) {
 		/* This should never happen. */
 		msg_perr("MCP6X bitbang SPI master init failed!\n");
 		return 1;

Modified: trunk/nicintel_spi.c
==============================================================================
--- trunk/nicintel_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/nicintel_spi.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -137,6 +137,7 @@
 	.get_miso = nicintel_bitbang_get_miso,
 	.request_bus = nicintel_request_spibus,
 	.release_bus = nicintel_release_spibus,
+	.half_period = 1,
 };
 
 static int nicintel_spi_shutdown(void *data)
@@ -181,8 +182,7 @@
 	if (register_shutdown(nicintel_spi_shutdown, NULL))
 		return 1;
 
-	/* 1 usec halfperiod delay for now. */
-	if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1))
+	if (bitbang_spi_init(&bitbang_spi_master_nicintel))
 		return 1;
 
 	return 0;

Modified: trunk/ogp_spi.c
==============================================================================
--- trunk/ogp_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/ogp_spi.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -91,6 +91,7 @@
 	.get_miso = ogp_bitbang_get_miso,
 	.request_bus = ogp_request_spibus,
 	.release_bus = ogp_release_spibus,
+	.half_period = 0,
 };
 
 static int ogp_spi_shutdown(void *data)
@@ -136,8 +137,7 @@
 	if (register_shutdown(ogp_spi_shutdown, NULL))
 		return 1;
 
-	/* no delay for now. */
-	if (bitbang_spi_init(&bitbang_spi_master_ogp, 0))
+	if (bitbang_spi_init(&bitbang_spi_master_ogp))
 		return 1;
 
 	return 0;

Modified: trunk/opaque.c
==============================================================================
--- trunk/opaque.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/opaque.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -30,70 +30,37 @@
 #include "chipdrivers.h"
 #include "programmer.h"
 
-const struct opaque_programmer opaque_programmer_none = {
-	.max_data_read = MAX_DATA_UNSPECIFIED,
-	.max_data_write = MAX_DATA_UNSPECIFIED,
-	.probe = NULL,
-	.read = NULL,
-	.write = NULL,
-	.erase = NULL,
-};
-
-const struct opaque_programmer *opaque_programmer = &opaque_programmer_none;
-
 int probe_opaque(struct flashctx *flash)
 {
-	if (!opaque_programmer->probe) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 0;
-	}
-
-	return opaque_programmer->probe(flash);
+	return flash->pgm->opaque.probe(flash);
 }
 
 int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	if (!opaque_programmer->read) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 1;
-	}
-	return opaque_programmer->read(flash, buf, start, len);
+	return flash->pgm->opaque.read(flash, buf, start, len);
 }
 
 int write_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	if (!opaque_programmer->write) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 1;
-	}
-	return opaque_programmer->write(flash, buf, start, len);
+	return flash->pgm->opaque.write(flash, buf, start, len);
 }
 
 int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
-	if (!opaque_programmer->erase) {
-		msg_perr("%s called before register_opaque_programmer. "
-			 "Please report a bug at flashrom at flashrom.org\n",
-			 __func__);
-		return 1;
-	}
-	return opaque_programmer->erase(flash, blockaddr, blocklen);
+	return flash->pgm->opaque.erase(flash, blockaddr, blocklen);
 }
 
-void register_opaque_programmer(const struct opaque_programmer *pgm)
+int register_opaque_programmer(const struct opaque_programmer *pgm)
 {
+	struct registered_programmer rpgm;
+
 	if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
-		msg_perr("%s called with one of probe/read/write/erase being "
-			 "NULL. Please report a bug at flashrom at flashrom.org\n",
+		msg_perr("%s called with incomplete programmer definition. "
+			 "Please report a bug at flashrom at flashrom.org\n",
 			 __func__);
-		return;
+		return ERROR_FLASHROM_BUG;
 	}
-	opaque_programmer = pgm;
-	buses_supported |= BUS_PROG;
+	rpgm.buses_supported = BUS_PROG;
+	rpgm.opaque = *pgm;
+	return register_programmer(&rpgm);
 }

Modified: trunk/programmer.c
==============================================================================
--- trunk/programmer.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/programmer.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -21,19 +21,6 @@
 #include "flash.h"
 #include "programmer.h"
 
-static const struct par_programmer par_programmer_none = {
-		.chip_readb		= noop_chip_readb,
-		.chip_readw		= fallback_chip_readw,
-		.chip_readl		= fallback_chip_readl,
-		.chip_readn		= fallback_chip_readn,
-		.chip_writeb		= noop_chip_writeb,
-		.chip_writew		= fallback_chip_writew,
-		.chip_writel		= fallback_chip_writel,
-		.chip_writen		= fallback_chip_writen,
-};
-
-const struct par_programmer *par_programmer = &par_programmer_none;
-
 /* No-op shutdown() for programmers which don't need special handling */
 int noop_shutdown(void)
 {
@@ -52,13 +39,7 @@
 {
 }
 
-/* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
-uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr)
-{
-	return 0xff;
-}
-
-/* No-op chip_writeb() for drivers not supporting addr/data pair accesses */
+/* No-op chip_writeb() for parallel style drivers not supporting writes */
 void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
 }
@@ -115,8 +96,50 @@
 	return;
 }
 
-void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses)
+int register_par_programmer(const struct par_programmer *pgm,
+			    const enum chipbustype buses)
+{
+	struct registered_programmer rpgm;
+	if (!pgm->chip_writeb || !pgm->chip_writew || !pgm->chip_writel ||
+	    !pgm->chip_writen || !pgm->chip_readb || !pgm->chip_readw ||
+	    !pgm->chip_readl || !pgm->chip_readn) {
+		msg_perr("%s called with incomplete programmer definition. "
+			 "Please report a bug at flashrom at flashrom.org\n",
+			 __func__);
+		return ERROR_FLASHROM_BUG;
+	}
+
+	rpgm.buses_supported = buses;
+	rpgm.par = *pgm;
+	return register_programmer(&rpgm);
+}
+
+/* The limit of 4 is totally arbitrary. */
+#define PROGRAMMERS_MAX 4
+struct registered_programmer registered_programmers[PROGRAMMERS_MAX];
+int registered_programmer_count = 0;
+
+/* This function copies the struct registered_programmer parameter. */
+int register_programmer(struct registered_programmer *pgm)
+{
+	if (registered_programmer_count >= PROGRAMMERS_MAX) {
+		msg_perr("Tried to register more than %i programmer "
+			 "interfaces.\n", PROGRAMMERS_MAX);
+		return ERROR_FLASHROM_LIMIT;
+	}
+	registered_programmers[registered_programmer_count] = *pgm;
+	registered_programmer_count++;
+
+	return 0;
+}
+
+enum chipbustype get_buses_supported(void)
 {
-	par_programmer = pgm;
-	buses_supported |= buses;
+	int i;
+	enum chipbustype ret = BUS_NONE;
+
+	for (i = 0; i < registered_programmer_count; i++)
+		ret |= registered_programmers[i].buses_supported;
+
+	return ret;
 }

Modified: trunk/programmer.h
==============================================================================
--- trunk/programmer.h	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/programmer.h	Tue Dec 20 01:19:29 2011	(r1475)
@@ -133,6 +133,8 @@
 	int (*get_miso) (void);
 	void (*request_bus) (void);
 	void (*release_bus) (void);
+	/* Length of half a clock period in usecs. */
+	unsigned int half_period;
 };
 
 #if CONFIG_INTERNAL == 1
@@ -208,6 +210,7 @@
 
 #if NEED_PCI == 1
 /* pcidev.c */
+// FIXME: These need to be local, not global
 extern uint32_t io_base_addr;
 extern struct pci_access *pacc;
 extern struct pci_dev *pcidev_dev;
@@ -427,8 +430,7 @@
 #endif
 
 /* bitbang_spi.c */
-int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod);
-int bitbang_spi_shutdown(const struct bitbang_spi_master *master);
+int bitbang_spi_init(const struct bitbang_spi_master *master);
 
 /* buspirate_spi.c */
 #if CONFIG_BUSPIRATE_SPI == 1
@@ -452,6 +454,7 @@
 	uint32_t fwh;
 	uint32_t spi;
 };
+// FIXME: These need to be local, not global
 extern struct decode_sizes max_rom_decode;
 extern int programmer_may_write;
 extern unsigned long flashbase;
@@ -498,7 +501,6 @@
 	SPI_CONTROLLER_SERPROG,
 #endif
 };
-extern const int spi_programmer_count;
 
 #define MAX_DATA_UNSPECIFIED 0
 #define MAX_DATA_READ_UNLIMITED 64 * 1024
@@ -514,15 +516,15 @@
 	/* Optimized functions for this programmer */
 	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write_256)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
+	const void *data;
 };
 
-extern const struct spi_programmer *spi_programmer;
 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 			     const unsigned char *writearr, unsigned char *readarr);
 int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds);
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
-void register_spi_programmer(const struct spi_programmer *programmer);
+int register_spi_programmer(const struct spi_programmer *programmer);
 
 /* ichspi.c */
 #if CONFIG_INTERNAL == 1
@@ -570,15 +572,14 @@
 	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
+	const void *data;
 };
-extern const struct opaque_programmer *opaque_programmer;
-void register_opaque_programmer(const struct opaque_programmer *pgm);
+int register_opaque_programmer(const struct opaque_programmer *pgm);
 
 /* programmer.c */
 int noop_shutdown(void);
 void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
 void fallback_unmap(void *virt_addr, size_t len);
-uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr);
 void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
 void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
@@ -595,9 +596,20 @@
 	uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr);
 	uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr);
 	void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
+	const void *data;
 };
-extern const struct par_programmer *par_programmer;
-void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
+int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
+struct registered_programmer {
+	enum chipbustype buses_supported;
+	union {
+		struct par_programmer par;
+		struct spi_programmer spi;
+		struct opaque_programmer opaque;
+	};
+};
+extern struct registered_programmer registered_programmers[];
+extern int registered_programmer_count;
+int register_programmer(struct registered_programmer *pgm);
 
 /* serprog.c */
 #if CONFIG_SERPROG == 1

Modified: trunk/rayer_spi.c
==============================================================================
--- trunk/rayer_spi.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/rayer_spi.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -92,6 +92,7 @@
 	.set_sck = rayer_bitbang_set_sck,
 	.set_mosi = rayer_bitbang_set_mosi,
 	.get_miso = rayer_bitbang_get_miso,
+	.half_period = 0,
 };
 
 int rayer_spi_init(void)
@@ -171,8 +172,7 @@
 	/* Get the initial value before writing to any line. */
 	lpt_outbyte = INB(lpt_iobase);
 
-	/* Zero halfperiod delay. */
-	if (bitbang_spi_init(&bitbang_spi_master_rayer, 0))
+	if (bitbang_spi_init(&bitbang_spi_master_rayer))
 		return 1;
 
 	return 0;

Modified: trunk/spi.c
==============================================================================
--- trunk/spi.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/spi.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -1,7 +1,7 @@
 /*
  * This file is part of the flashrom project.
  *
- * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger
+ * Copyright (C) 2007, 2008, 2009, 2010, 2011 Carl-Daniel Hailfinger
  * Copyright (C) 2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
@@ -30,43 +30,17 @@
 #include "programmer.h"
 #include "spi.h"
 
-const struct spi_programmer spi_programmer_none = {
-	.type = SPI_CONTROLLER_NONE,
-	.max_data_read = MAX_DATA_UNSPECIFIED,
-	.max_data_write = MAX_DATA_UNSPECIFIED,
-	.command = NULL,
-	.multicommand = NULL,
-	.read = NULL,
-	.write_256 = NULL,
-};
-
-const struct spi_programmer *spi_programmer = &spi_programmer_none;
-
 int spi_send_command(struct flashctx *flash, unsigned int writecnt,
 		     unsigned int readcnt, const unsigned char *writearr,
 		     unsigned char *readarr)
 {
-	if (!spi_programmer->command) {
-		msg_perr("%s called, but SPI is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
-
-	return spi_programmer->command(flash, writecnt, readcnt, writearr,
+	return flash->pgm->spi.command(flash, writecnt, readcnt, writearr,
 				       readarr);
 }
 
 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds)
 {
-	if (!spi_programmer->multicommand) {
-		msg_perr("%s called, but SPI is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
-
-	return spi_programmer->multicommand(flash, cmds);
+	return flash->pgm->spi.multicommand(flash, cmds);
 }
 
 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt,
@@ -104,7 +78,7 @@
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		     unsigned int len)
 {
-	unsigned int max_data = spi_programmer->max_data_read;
+	unsigned int max_data = flash->pgm->spi.max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI read chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -117,7 +91,7 @@
 int default_spi_write_256(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len)
 {
-	unsigned int max_data = spi_programmer->max_data_write;
+	unsigned int max_data = flash->pgm->spi.max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI write chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -131,12 +105,6 @@
 		  unsigned int len)
 {
 	unsigned int addrbase = 0;
-	if (!spi_programmer->read) {
-		msg_perr("%s called, but SPI read is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
 
 	/* Check if the chip fits between lowest valid and highest possible
 	 * address. Highest possible address with the current SPI implementation
@@ -157,7 +125,7 @@
 			 "access window.\n");
 		msg_perr("Read will probably return garbage.\n");
 	}
-	return spi_programmer->read(flash, buf, addrbase + start, len);
+	return flash->pgm->spi.read(flash, buf, addrbase + start, len);
 }
 
 /*
@@ -170,14 +138,7 @@
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		       unsigned int len)
 {
-	if (!spi_programmer->write_256) {
-		msg_perr("%s called, but SPI page write is unsupported on this "
-			 "hardware. Please report a bug at "
-			 "flashrom at flashrom.org\n", __func__);
-		return 1;
-	}
-
-	return spi_programmer->write_256(flash, buf, start, len);
+	return flash->pgm->spi.write_256(flash, buf, start, len);
 }
 
 /*
@@ -187,7 +148,7 @@
  */
 uint32_t spi_get_valid_read_addr(struct flashctx *flash)
 {
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_ICH7:
@@ -200,8 +161,22 @@
 	}
 }
 
-void register_spi_programmer(const struct spi_programmer *pgm)
+int register_spi_programmer(const struct spi_programmer *pgm)
 {
-	spi_programmer = pgm;
-	buses_supported |= BUS_SPI;
+	struct registered_programmer rpgm;
+
+	if (!pgm->write_256 || !pgm->read || !pgm->command ||
+	    !pgm->multicommand ||
+	    ((pgm->command == default_spi_send_command) &&
+	     (pgm->multicommand == default_spi_send_multicommand))) {
+		msg_perr("%s called with incomplete programmer definition. "
+			 "Please report a bug at flashrom at flashrom.org\n",
+			 __func__);
+		return ERROR_FLASHROM_BUG;
+	}
+
+
+	rpgm.buses_supported = BUS_SPI;
+	rpgm.spi = *pgm;
+	return register_programmer(&rpgm);
 }

Modified: trunk/spi25.c
==============================================================================
--- trunk/spi25.c	Sun Dec 18 16:01:24 2011	(r1474)
+++ trunk/spi25.c	Tue Dec 20 01:19:29 2011	(r1475)
@@ -179,7 +179,7 @@
 	/* Some SPI controllers do not support commands with writecnt=1 and
 	 * readcnt=4.
 	 */
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:
@@ -1120,7 +1120,7 @@
 		.readarr	= NULL,
 	}};
 
-	switch (spi_programmer->type) {
+	switch (flash->pgm->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:


From c-d.hailfinger.devel.2006 at gmx.net  Tue Dec 20 01:20:32 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 20 Dec 2011 01:20:32 +0100
Subject: [flashrom] [PATCH] Generic programmer registration: final part
In-Reply-To: <1324331870.4037.75.camel@localhost>
References: <4EECA5FE.6060609@gmx.net> <1324214554.4037.29.camel@localhost>
	<4EEE95A7.1020208@gmx.net> <1324331870.4037.75.camel@localhost>
Message-ID: <4EEFD4D0.3090205@gmx.net>

Am 19.12.2011 22:57 schrieb Michael Karcher:
> Am Montag, den 19.12.2011, 02:38 +0100 schrieb Carl-Daniel Hailfinger:
>>> I suggest to drop noop_chip_readb/noop_chip_writeb at the same time as
>>> we drop par_programmer_none, as these functions are no longer used.
>> noop_chip_readb dropped.
>> noop_chip_writeb may be useful if we merge a programmer driver which
>> does not support write.
>> What do you think?
> If we find a way to revive the "blind read via force", good idea. On the
> other hand, I think a opaque mmap dumper would be more apt for the blind
> read. It should just get the chip size and the optionally start or end
> address of the mapping as parameter.

I'll leave the #if 0 forced read code in cli_classic.c until we have a
blind read solution again.

 
>>>>  	msg_pdbg("This programmer supports the following protocols: %s.\n",
>>>>  		 tempstr);
>>> It's definitely not "this programmer", as should be obvious if you "kept
>>> in mind" as I told you that get_buses_supportet returns the union of all
>>> programmers.
>> I beg to differ. This is a message to the end user, and the end user
>> does not think of a mainboard as multiple programmers.
> As on IRC: "The following protocols are supported".

Done.


>> ichspi.c:
>> Use ich_generation instead of spi_programmer->type (or
>> flash->pgm->spi.type) in run_opcode to determine if the programmer was
>> initialized correctly.
>> This change is debatable because it uses a local static variable instead
>> of the info available in flash->pgm, but OTOH now the internal usage is
>> consistent.
> consistency first - we can eliminate the local variable later anyway
> (and we are going to, I expect)

OK.


>> Another question is whether we should really check for
>> correct initialization at this point.
> I guess the checking makes no sense anymore, as there is no way to enter
> this function without going through the init function.

Hm yes, it would only serve as a check against buggy init functions.
Looking at one of the recent ICH init additions in r1430 where new code
was committed because it worked, but it was not really integrated well
with existing ICH init code.


>> The programmer registration functions now return error/success instead
>> of void, but their callers don't care. Fix now or later?
> Fix later. We already inform the user if we are losing programmers,
> that's enough for now.

OK.


>> TODO?
>> - max_decode is a programmer property, add it to the
>> register_*_programmer parameters
>> - programmer_may_write is a programmer property, add it to the
>> register_*_programmer parameters
> Yes, both of them should be added to the programmer structure. I am
> unsure whether we want rarely used options (like may-not-write) as
> parameters though. Having the size there is good - it makes the
> programmer think about the maximum supported size.

Postponed.


>> All programmer types (Parallel, SPI, Opaque) now register themselves
>> into a generic programmer list and probing is now programmer-centric
>> instead of chip-centric.
> TODO: split the flash chip list into SPI and non-SPI lists. No need to
> iterate over the other type and skip those chips because of bus
> mismatches. Do it later.

Postponed, but given that flash chips may support multiple buses (some
weird currently unsupported models even speak SPI and parallel), the
reordering is not something I want to do.


>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>

Thanks a lot for the review, committed in r1475 with the changes
mentioned during review.


>>  int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
>>  {
>> -	if (!bitbang_spi_master) {
>> +	if (!master) {
>>  		msg_perr("Shutting down an uninitialized SPI bitbang master!\n"
>>  			 "Please report a bug at flashrom at flashrom.org\n");
>>  		return 1;
> As I just found out, bitbang_spi_shutdown is never called at all, but if
> it will be called, it will be a callback registered in bitbang_spi_init
> which already checked master for nullness. Also the function could be
> made static in that case.

Unfortunately, register_shutdown() takes a non-const void *parameter,
and that causes warnings if it is called from bitbang_spi_init with
const struct bitbang_spi_master *. Made static inside #if 0 for now
until register_shutdown is changed.


>>  	msg_pdbg("This programmer supports the following protocols: %s.\n",
>>  		 tempstr);
> Message change: see intro.
>
>>  	if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
>>  		msg_perr("%s called with one of probe/read/write/erase being "
>>  			 "NULL. Please report a bug at flashrom at flashrom.org\n",
>>  			 __func__);
>> -		return;
>> +		return ERROR_FLASHROM_BUG;
> Later, we could add a feature that allows read-only "programmers" that
> have write and erase NULL, setting programmer_may_write to FALSE.

Or we check for programmer_may_write==FALSE and then skip the
erase/write member check.


>> -void register_spi_programmer(const struct spi_programmer *pgm)
>> +int register_spi_programmer(const struct spi_programmer *pgm)
>>  {
>> -	spi_programmer = pgm;
>> -	buses_supported |= BUS_SPI;
>> +	struct registered_programmer rpgm;
>> +
>> +	if (!pgm->write_256 || !pgm->read || !pgm->command ||
>> +	    !pgm->multicommand ||
>> +	    ((pgm->command == default_spi_send_command) &&
>> +	     (pgm->multicommand == default_spi_send_multicommand))) {
>> +		msg_perr("%s called with inconsistent settings. "
> s/inconsistent settings/incomplete programmer definition/
>
>> +	if (!chip_writeb || !chip_writew || !chip_writel || !chip_writen ||
>> +	    !chip_readb || !chip_readw || !chip_readl || !chip_readn) {
>> +		msg_perr("%s called with one of probe/read/write/erase being "
> dito.

Done.

-- 
http://www.hailfinger.org/



From svn at flashrom.org  Tue Dec 20 01:51:44 2011
From: svn at flashrom.org (repository service)
Date: Tue, 20 Dec 2011 01:51:44 +0100
Subject: [flashrom] [commit] r1476 - trunk
Message-ID: <E1Rcnvk-0003pV-S2@ra.coresystems.de>

Author: hailfinger
Date: Tue Dec 20 01:51:44 2011
New Revision: 1476
URL: http://flashrom.org/trac/flashrom/changeset/1476

Log:
Cross-compilation fixes

Switch from host OS detection to target OS detection.
Complain about unknown target OS/architecture.
Disable annoying format string warnings on DJGPP.

Native and cross-compilation now usually just require setting CC.
Examples:
make CC=i586-pc-msdosdjgpp-gcc
make CC="clang -m64"
make CC=i686-w64-mingw32-gcc

Tested for a boatload of native and cross compilation configurations.

There is a new target "make libpayload" in case you don't want to
specify all tools by hand.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: David Hendricks <dhendrix at google.com>

Added:
   trunk/os.h
Modified:
   trunk/Makefile

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile	Tue Dec 20 01:19:29 2011	(r1475)
+++ trunk/Makefile	Tue Dec 20 01:51:44 2011	(r1476)
@@ -37,27 +37,40 @@
 CFLAGS += -Werror
 endif
 
-# FIXME We have to differentiate between host and target OS architecture.
-OS_ARCH	?= $(shell uname)
-ifneq ($(OS_ARCH), SunOS)
+# HOST_OS is only used to work around local toolchain issues.
+HOST_OS	?= $(shell uname)
+ifeq ($(HOST_OS), MINGW32_NT-5.1)
+# Explicitly set CC = gcc on MinGW, otherwise: "cc: command not found".
+CC = gcc
+endif
+ifneq ($(HOST_OS), SunOS)
 STRIP_ARGS = -s
 endif
-ifeq ($(OS_ARCH), Darwin)
+
+# Determine the destination processor architecture.
+# IMPORTANT: The following line must be placed before TARGET_OS is ever used
+# (of course), but should come after any lines setting CC because the line
+# below uses CC itself.
+override TARGET_OS := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E os.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
+
+ifeq ($(TARGET_OS), Darwin)
 CPPFLAGS += -I/opt/local/include -I/usr/local/include
 # DirectHW framework can be found in the DirectHW library.
 LDFLAGS += -framework IOKit -framework DirectHW -L/opt/local/lib -L/usr/local/lib
 endif
-ifeq ($(OS_ARCH), FreeBSD)
+ifeq ($(TARGET_OS), FreeBSD)
 CPPFLAGS += -I/usr/local/include
 LDFLAGS += -L/usr/local/lib
 endif
-ifeq ($(OS_ARCH), OpenBSD)
+ifeq ($(TARGET_OS), OpenBSD)
 CPPFLAGS += -I/usr/local/include
 LDFLAGS += -L/usr/local/lib
 endif
-ifeq ($(OS_ARCH), DOS)
+ifeq ($(TARGET_OS), DOS)
 EXEC_SUFFIX := .exe
 CPPFLAGS += -I../libgetopt -I../libpci/include
+# DJGPP has odd uint*_t definitions which cause lots of format string warnings.
+CPPFLAGS += -Wno-format
 # FIXME Check if we can achieve the same effect with -L../libgetopt -lgetopt
 LIBS += ../libgetopt/libgetopt.a
 # Bus Pirate and Serprog are not supported under DOS (missing serial support).
@@ -84,9 +97,9 @@
 endif
 endif
 
-ifeq ($(OS_ARCH), MINGW32_NT-5.1)
-# Explicitly set CC = gcc on MinGW, otherwise: "cc: command not found".
-CC = gcc
+# FIXME: Should we check for Cygwin/MSVC as well?
+ifeq ($(TARGET_OS), MinGW)
+EXEC_SUFFIX := .exe
 # MinGW doesn't have the ffs() function, but we can use gcc's __builtin_ffs().
 CFLAGS += -Dffs=__builtin_ffs
 # libusb-win32/libftdi stuff is usually installed in /usr/local.
@@ -166,10 +179,7 @@
 endif
 endif
 
-ifeq ($(OS_ARCH), libpayload)
-CC:=CC=i386-elf-gcc lpgcc
-AR:=i386-elf-ar
-RANLIB:=i386-elf-ranlib
+ifeq ($(TARGET_OS), libpayload)
 CPPFLAGS += -DSTANDALONE
 ifeq ($(CONFIG_DUMMY), yes)
 UNSUPPORTED_FEATURES += CONFIG_DUMMY=yes
@@ -202,10 +212,10 @@
 # Determine the destination processor architecture.
 # IMPORTANT: The following line must be placed before ARCH is ever used
 # (of course), but should come after any lines setting CC because the line
-# below uses CC itself. In some cases we set CC based on OS_ARCH, see above.
-override ARCH := $(strip $(shell LC_ALL=C $(CC) -E arch.h 2>/dev/null | grep -v '^\#'))
+# below uses CC itself.
+override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
 
-ifeq ($(ARCH), "ppc")
+ifeq ($(ARCH), ppc)
 # There's no PCI port I/O support on PPC/PowerPC, yet.
 ifeq ($(CONFIG_NIC3COM), yes)
 UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes
@@ -348,7 +358,7 @@
 ifeq ($(CONFIG_INTERNAL), yes)
 FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1'
 PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o
-ifeq ($(ARCH),"x86")
+ifeq ($(ARCH), x86)
 PROGRAMMER_OBJS += it87spi.o it85spi.o sb600spi.o wbsio_spi.o mcp6x_spi.o
 PROGRAMMER_OBJS += ichspi.o ich_descriptors.o
 else
@@ -476,7 +486,7 @@
 endif
 
 ifeq ($(NEED_NET), yes)
-ifeq ($(OS_ARCH), SunOS)
+ifeq ($(TARGET_OS), SunOS)
 LIBS += -lsocket
 endif
 endif
@@ -485,18 +495,18 @@
 CHECK_LIBPCI = yes
 FEATURE_CFLAGS += -D'NEED_PCI=1'
 PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o
-ifeq ($(OS_ARCH), NetBSD)
+ifeq ($(TARGET_OS), NetBSD)
 # The libpci we want is called libpciutils on NetBSD and needs NetBSD libpci.
 LIBS += -lpciutils -lpci
 # For (i386|x86_64)_iopl(2).
 LIBS += -l$(shell uname -p)
 else
-ifeq ($(OS_ARCH), DOS)
+ifeq ($(TARGET_OS), DOS)
 # FIXME There needs to be a better way to do this
 LIBS += ../libpci/lib/libpci.a
 else
 LIBS += -lpci
-ifeq ($(OS_ARCH), OpenBSD)
+ifeq ($(TARGET_OS), OpenBSD)
 # For (i386|amd64)_iopl(2).
 LIBS += -l$(shell uname -m)
 endif
@@ -564,11 +574,16 @@
 		echo "found." || ( echo "not found."; \
 		rm -f .test.c .test$(EXEC_SUFFIX); exit 1)
 	@rm -f .test.c .test$(EXEC_SUFFIX)
-	@printf "ARCH is "
+	@printf "Target arch is "
 	@# FreeBSD wc will output extraneous whitespace.
-	@echo $(ARCH)|wc -l|grep -q '^[[:blank:]]*1[[:blank:]]*$$' ||	\
+	@echo $(ARCH)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' ||	\
 		( echo "unknown. Aborting."; exit 1)
 	@printf "%s\n" '$(ARCH)'
+	@printf "Target OS is "
+	@# FreeBSD wc will output extraneous whitespace.
+	@echo $(TARGET_OS)|wc -w|grep -q '^[[:blank:]]*1[[:blank:]]*$$' ||	\
+		( echo "unknown. Aborting."; exit 1)
+	@printf "%s\n" '$(TARGET_OS)'
 
 define LIBPCI_TEST
 /* Avoid a failing test due to libpci header symbol shadowing breakage */
@@ -684,7 +699,9 @@
 	@echo Created $(EXPORTDIR)/flashrom-$(RELEASENAME).tar.bz2
 
 djgpp-dos: clean
-	make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip WARNERROR=no OS_ARCH=DOS
+	make CC=i586-pc-msdosdjgpp-gcc STRIP=i586-pc-msdosdjgpp-strip
+libpayload: clean
+	make CC="CC=i386-elf-gcc lpgcc" AR=i386-elf-ar RANLIB=i386-elf-ranlib
 
 .PHONY: all clean distclean compiler pciutils features export tarball dos featuresavailable
 

Added: trunk/os.h
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ trunk/os.h	Tue Dec 20 01:51:44 2011	(r1476)
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2011 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/*
+ * Header file for OS checking.
+ */
+
+// Solaris
+#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#define __FLASHROM_OS__ "SunOS"
+// OS X
+#elif defined(__MACH__) && defined(__APPLE__)
+#define __FLASHROM_OS__ "Darwin"
+// FreeBSD
+#elif defined(__FreeBSD__)
+#define __FLASHROM_OS__ "FreeBSD"
+// DragonFlyBSD
+#elif defined(__DragonFly__)
+#define __FLASHROM_OS__ "DragonFlyBSD"
+// NetBSD
+#elif defined(__NetBSD__)
+#define __FLASHROM_OS__ "NetBSD"
+// OpenBSD
+#elif defined(__OpenBSD__)
+#define __FLASHROM_OS__ "OpenBSD"
+// DJGPP
+#elif defined(__DJGPP__)
+#define __FLASHROM_OS__ "DOS"
+// MinGW (always has _WIN32 available)
+#elif defined(__MINGW32__)
+#define __FLASHROM_OS__ "MinGW"
+// Cygwin (usually without _WIN32)
+#elif defined( __CYGWIN__)
+#define __FLASHROM_OS__ "Cygwin"
+// libpayload
+#elif defined(__LIBPAYLOAD__)
+#define __FLASHROM_OS__ "libpayload"
+// Linux
+#elif defined(__linux__)
+#define __FLASHROM_OS__ "Linux"
+#endif
+__FLASHROM_OS__


From c-d.hailfinger.devel.2006 at gmx.net  Tue Dec 20 01:53:04 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 20 Dec 2011 01:53:04 +0100
Subject: [flashrom] [PATCH] Cross-compilation fixes
In-Reply-To: <CAKOoyUc90Zk8=jWeR5a1jfLULCVEUzJL-A8keWJ39mtwVWwgsg@mail.gmail.com>
References: <4EDC25BD.1090704@gmx.net> <4EE1123A.8040707@assembler.cz>
	<4EE11B7F.8080200@gmx.net>
	<CAKOoyUfUgS-+RkkLxm_NyBqdU_g1zuVeLuQyDhBt0XfZj+0CKA@mail.gmail.com>
	<4EEB969F.8090209@gmx.net>
	<CAKOoyUc90Zk8=jWeR5a1jfLULCVEUzJL-A8keWJ39mtwVWwgsg@mail.gmail.com>
Message-ID: <4EEFDC70.2070501@gmx.net>

Am 19.12.2011 23:15 schrieb David Hendricks:
> On Fri, Dec 16, 2011 at 11:06 AM, Carl-Daniel Hailfinger <
> c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> Am 09.12.2011 05:02 schrieb David Hendricks:
>>> On Thu, Dec 8, 2011 at 12:18 PM, Carl-Daniel Hailfinger <
>>> c-d.hailfinger.devel.2006 at gmx.net> wrote:
>>>
>>>>> Most likely no arm support?
>>>> Indeed, ARM support is missing. I think it is mainy held back by libpci
>>>> breakage for which we only have a really hackish workaround.
>>> For what it's worth, when I tested the patch earlier it worked on ARM
>> with
>>> that libpci hack.
>> The patch has been tested natively on FreeBSD, MinGW, Linux,
>> DragonFlyBSD, with gcc and clang, cross-compiled with clang on Linux for
>> Windows, cross-compiled with DJGPP on Linux for DOS, cross-compiled on
>> Linux for MinGW, natively on Linux PowerPC, ....
>>
>> Ack anyone?
>>
> Acked-by: David Hendricks <dhendrix at google.com>

Thanks, committed in r1476.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From svn at flashrom.org  Tue Dec 20 02:54:19 2011
From: svn at flashrom.org (repository service)
Date: Tue, 20 Dec 2011 02:54:19 +0100
Subject: [flashrom] [commit] r1477 - trunk
Message-ID: <E1RcouJ-0005Nq-OZ@ra.coresystems.de>

Author: hailfinger
Date: Tue Dec 20 02:54:19 2011
New Revision: 1477
URL: http://flashrom.org/trac/flashrom/changeset/1477

Log:
Speed up dediprog SPI page writes

All chips which use spi_chip_write_256 should be written at native
speed. Chips using spi_chip_write_1 or spi_chip_write_aai will
still be slow.

Thanks to Steven A. Falco for testing with a ST/Numonyx M25P16.
Thanks to David Hendricks for testing with a Winbond W25Q64.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Steven A. Falco <sfalco at coincident.com>

Modified:
   trunk/dediprog.c

Modified: trunk/dediprog.c
==============================================================================
--- trunk/dediprog.c	Tue Dec 20 01:51:44 2011	(r1476)
+++ trunk/dediprog.c	Tue Dec 20 02:54:19 2011	(r1477)
@@ -299,22 +299,109 @@
 	return 0;
 }
 
+/* Bulk write interface, will read multiple page_size byte chunks aligned to page_size bytes.
+ * @start	start address
+ * @len		length
+ * @return	0 on success, 1 on failure
+ */
+static int dediprog_spi_bulk_write(struct flashctx *flash, uint8_t *buf,
+				   unsigned int start, unsigned int len)
+{
+	int ret;
+	unsigned int i;
+	/* USB transfer size must be 512, other sizes will NOT work at all.
+	 * chunksize is the real data size per USB bulk transfer. The remaining
+	 * space in a USB bulk transfer must be filled with 0xff padding.
+	 */
+	const unsigned int chunksize = flash->page_size;
+	const unsigned int count = len / chunksize;
+	const char count_and_chunk[] = {count & 0xff,
+					(count >> 8) & 0xff,
+					chunksize & 0xff,
+					(chunksize >> 8) & 0xff};
+	char usbbuf[512];
+
+	if ((start % chunksize) || (len % chunksize)) {
+		msg_perr("%s: Unaligned start=%i, len=%i! Please report a bug "
+			 "at flashrom at flashrom.org\n", __func__, start, len);
+		return 1;
+	}
+
+	/* No idea if the hardware can handle empty writes, so chicken out. */
+	if (!len)
+		return 0;
+	/* Command Write SPI Bulk. No idea which write command is used on the
+	 * SPI side.
+	 */
+	ret = usb_control_msg(dediprog_handle, 0x42, 0x30, start % 0x10000,
+			      start / 0x10000, (char *)count_and_chunk,
+			      sizeof(count_and_chunk), DEFAULT_TIMEOUT);
+	if (ret != sizeof(count_and_chunk)) {
+		msg_perr("Command Write SPI Bulk failed, %i %s!\n", ret,
+			 usb_strerror());
+		return 1;
+	}
+
+	for (i = 0; i < count; i++) {
+		memset(usbbuf, 0xff, sizeof(usbbuf));
+		memcpy(usbbuf, buf + i * chunksize, chunksize);
+		ret = usb_bulk_write(dediprog_handle, dediprog_endpoint,
+				    usbbuf, 512,
+				    DEFAULT_TIMEOUT);
+		if (ret != 512) {
+			msg_perr("SPI bulk write failed, expected %i, got %i "
+				 "%s!\n", 512, ret, usb_strerror());
+			return 1;
+		}
+	}
+
+	return 0;
+}
+
 static int dediprog_spi_write_256(struct flashctx *flash, uint8_t *buf,
 				  unsigned int start, unsigned int len)
 {
 	int ret;
+	const unsigned int chunksize = flash->page_size;
+	unsigned int residue = start % chunksize ? chunksize - start % chunksize : 0;
+	unsigned int bulklen;
 
 	dediprog_set_leds(PASS_OFF|BUSY_ON|ERROR_OFF);
 
-	/* No idea about the real limit. Maybe 12, maybe more, maybe less. */
-	ret = spi_write_chunked(flash, buf, start, len, 12);
+	if (residue) {
+		msg_pdbg("Slow write for partial block from 0x%x, length 0x%x\n",
+			 start, residue);
+		/* No idea about the real limit. Maybe 12, maybe more. */
+		ret = spi_write_chunked(flash, buf, start, residue, 12);
+		if (ret) {
+			dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
+			return ret;
+		}
+	}
 
-	if (ret)
+	/* Round down. */
+	bulklen = (len - residue) / chunksize * chunksize;
+	ret = dediprog_spi_bulk_write(flash, buf + residue, start + residue,
+				     bulklen);
+	if (ret) {
 		dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
-	else
-		dediprog_set_leds(PASS_ON|BUSY_OFF|ERROR_OFF);
+		return ret;
+	}
 
-	return ret;
+	len -= residue + bulklen;
+	if (len) {
+		msg_pdbg("Slow write for partial block from 0x%x, length 0x%x\n",
+			 start, len);
+		ret = spi_write_chunked(flash, buf + residue + bulklen,
+				        start + residue + bulklen, len, 12);
+		if (ret) {
+			dediprog_set_leds(PASS_OFF|BUSY_OFF|ERROR_ON);
+			return ret;
+		}
+	}
+
+	dediprog_set_leds(PASS_ON|BUSY_OFF|ERROR_OFF);
+	return 0;
 }
 
 static int dediprog_spi_send_command(struct flashctx *flash,
@@ -494,6 +581,76 @@
 	}
 	return 0;
 }
+
+/* Start/stop blinking?
+ * Present in eng_detect_blink.log with firmware 3.1.8
+ * Preceded by Command J
+ */
+static int dediprog_command_g(void)
+{
+	int ret;
+
+	ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x03, NULL, 0x0, DEFAULT_TIMEOUT);
+	if (ret != 0x0) {
+		msg_perr("Command G failed (%s)!\n", usb_strerror());
+		return 1;
+	}
+	return 0;
+}
+
+/* Something.
+ * Present in all logs with firmware 5.1.5
+ * Always preceded by Command Receive Device String
+ * Always followed by Command Set SPI Voltage nonzero
+ */
+static int dediprog_command_h(void)
+{
+	int ret;
+
+	ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x05, NULL, 0x0, DEFAULT_TIMEOUT);
+	if (ret != 0x0) {
+		msg_perr("Command H failed (%s)!\n", usb_strerror());
+		return 1;
+	}
+	return 0;
+}
+
+/* Shutdown for firmware 5.x?
+ * Present in all logs with firmware 5.1.5
+ * Often preceded by a SPI operation (Command Read SPI Bulk or Receive SPI)
+ * Always followed by Command Set SPI Voltage 0x0000
+ */
+static int dediprog_command_i(void)
+{
+	int ret;
+
+	ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x06, NULL, 0x0, DEFAULT_TIMEOUT);
+	if (ret != 0x0) {
+		msg_perr("Command I failed (%s)!\n", usb_strerror());
+		return 1;
+	}
+	return 0;
+}
+
+/* Start/stop blinking?
+ * Present in all logs with firmware 5.1.5
+ * Always preceded by Command Receive Device String on 5.1.5
+ * Always followed by Command Set SPI Voltage nonzero on 5.1.5
+ * Present in eng_detect_blink.log with firmware 3.1.8
+ * Preceded by Command B in eng_detect_blink.log
+ * Followed by Command G in eng_detect_blink.log
+ */
+static int dediprog_command_j(void)
+{
+	int ret;
+
+	ret = usb_control_msg(dediprog_handle, 0x42, 0x07, 0x09, 0x07, NULL, 0x0, DEFAULT_TIMEOUT);
+	if (ret != 0x0) {
+		msg_perr("Command J failed (%s)!\n", usb_strerror());
+		return 1;
+	}
+	return 0;
+}
 #endif
 
 static int parse_voltage(char *voltage)
@@ -558,6 +715,13 @@
 {
 	msg_pspew("%s\n", __func__);
 
+#if 0
+	/* Shutdown on firmware 5.x */
+	if (dediprog_firmwareversion == 5)
+		if (dediprog_command_i())
+			return 1;
+#endif
+
 	/* URB 28. Command Set SPI Voltage to 0. */
 	if (dediprog_set_spi_voltage(0x0))
 		return 1;


From c-d.hailfinger.devel.2006 at gmx.net  Tue Dec 20 02:56:51 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 20 Dec 2011 02:56:51 +0100
Subject: [flashrom] [PATCH] Speed up dediprog writes
In-Reply-To: <4EE6AFBC.4090401@coincident.com>
References: <4EE6AFBC.4090401@coincident.com>
Message-ID: <4EEFEB63.2050205@gmx.net>

Hi Steven,

thanks for your tests and the enthusiastic response!

Am 13.12.2011 02:51 schrieb Steven A. Falco:
> I have just tested the following patch:
>
> http://patchwork.coreboot.org/patch/3469/
>
> which I applied to flashrom r1472.
>
> It is fantastic!
>
> I can now program and verify a M25P16 in just 15 seconds.  Every
> bit as fast as the Windows app.
>
> Therefore:
>
> Acked-by: Steven A. Falco <sfalco at coincident.com>

Thanks, committed in r1477.

Note: This also includes
[PATCH] Implement unknown Dediprog commands
which was
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Tue Dec 20 02:59:56 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 20 Dec 2011 02:59:56 +0100
Subject: [flashrom] [PATCH] Implement unknown Dediprog commands
In-Reply-To: <20110729195641.GT4802@greenwood>
References: <4CDF21A5.8090109@gmx.net> <20110729195641.GT4802@greenwood>
Message-ID: <4EEFEC1C.5000901@gmx.net>

Am 29.07.2011 21:56 schrieb Uwe Hermann:
> On Sun, Nov 14, 2010 at 12:39:17AM +0100, Carl-Daniel Hailfinger wrote:
>> Secret knowledge is cool, but public knowledge is better.
>> Implement all Dediprog commands found in USB traces, even if their
>> purpose is not yet known.
>> Annotate unknown commands with info about the call sequence they are
>> embedded in and the firmware version of the log.
>>
>> Add a new shutdown command for firmware 5.x.
>>
>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

Thanks, committed in r1477 with some changes (bulk write added).
My apologies for forgetting to paste your Ack into the changelog, I had
overlooked your mail completely.


> +#if 0
> +/* Something.
> + * Present in eng_detect_blink.log with firmware 3.1.8
> + * Always preceded by Command Receive Device String
> + */
> +static int dediprog_command_b(void)
> +{
> +	int ret;
> +	char buf[0x3];
> Minor nitpick: I like 0x3 -> 3 better here. Feel free to ignore, though.
>
>
>> +	memset(buf, 0, sizeof(buf));
>> +	ret = usb_control_msg(dediprog_handle, 0xc3, 0x7, 0x0, 0xef00, buf, 0x3, DEFAULT_TIMEOUT);
> Please wrap, longer than 80 chars/line. Same goes for a few other
> usb_control_msg() lines.
>
>
>> +	if ((ret != 0x3) || (buf[0] != 0xff) || (buf[1] != 0xff) ||
>                     ^^^
>   And here I like 0x03 better for consistency with the rest of the line :)
>
>
>> +	/* Shutdown on firmware 5.x */
>> +	if (dediprog_firmwareversion == 5)
>> +		if (dediprog_command_i())
>> +			return 1;
> Maybe add a msg_* here to notify the user.

Yes, dediprog.c definitely needs some housekeeping.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Tue Dec 20 03:04:43 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 20 Dec 2011 03:04:43 +0100
Subject: [flashrom] dediprog speedup
In-Reply-To: <20111125090131.169110@gmx.net>
References: <20111125090131.169110@gmx.net>
Message-ID: <4EEFED3B.7040108@gmx.net>

Hi Thomas,

Am 25.11.2011 10:01 schrieb Thomas Kurkowski:
> http://paste.flashrom.org/view.php?id=919

Latest flashrom (r1477) has the dediprog speedups I mentioned. They
might not work for your chip, but it makes sense to try.

Regards,
Carl-Daniel
-- 
http://www.hailfinger.org/



From svn at flashrom.org  Tue Dec 20 03:08:15 2011
From: svn at flashrom.org (repository service)
Date: Tue, 20 Dec 2011 03:08:15 +0100
Subject: [flashrom] [commit] r1478 - trunk
Message-ID: <E1Rcp7n-0007qN-1b@ra.coresystems.de>

Author: hailfinger
Date: Tue Dec 20 03:08:14 2011
New Revision: 1478
URL: http://flashrom.org/trac/flashrom/changeset/1478

Log:
ft2232_spi: fix arm-usb-ocd and arm-usb-ocd-h

These devices have an additional output buffer which is activated only
by pulling ADBUS4 low. This patch was real-life tested with
arm-usb-ocd; arm-usb-ocd-h should be the same (as it shares the same
documentation).

Signed-off-by: Paul Fertser <fercerpav at gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/ft2232_spi.c

Modified: trunk/ft2232_spi.c
==============================================================================
--- trunk/ft2232_spi.c	Tue Dec 20 02:54:19 2011	(r1477)
+++ trunk/ft2232_spi.c	Tue Dec 20 03:08:14 2011	(r1478)
@@ -204,6 +204,8 @@
 			ft2232_vid = OLIMEX_VID;
 			ft2232_type = OLIMEX_ARM_OCD_PID;
 			ft2232_interface = INTERFACE_A;
+			cs_bits = 0x08;
+			pindir = 0x1b;
 		} else if (!strcasecmp(arg, "arm-usb-tiny")) {
 			ft2232_vid = OLIMEX_VID;
 			ft2232_type = OLIMEX_ARM_TINY_PID;
@@ -212,6 +214,8 @@
 			ft2232_vid = OLIMEX_VID;
 			ft2232_type = OLIMEX_ARM_OCD_H_PID;
 			ft2232_interface = INTERFACE_A;
+			cs_bits = 0x08;
+			pindir = 0x1b;
 		} else if (!strcasecmp(arg, "arm-usb-tiny-h")) {
 			ft2232_vid = OLIMEX_VID;
 			ft2232_type = OLIMEX_ARM_TINY_H_PID;


From c-d.hailfinger.devel.2006 at gmx.net  Tue Dec 20 03:09:00 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 20 Dec 2011 03:09:00 +0100
Subject: [flashrom] [PATCH] ft2232_spi: fix arm-usb-ocd and arm-usb-ocd-h
In-Reply-To: <201111181828.pAIISQ1O005771@home.pavel.comp>
References: <201111181828.pAIISQ1O005771@home.pavel.comp>
Message-ID: <4EEFEE3C.4070109@gmx.net>

Hi Paul,

thanks for your patch!

Am 18.11.2011 19:15 schrieb Paul Fertser:
> These devices have an additional output buffer which is activated only
> by pulling ADBUS4 low. This patch was real-life tested with
> arm-usb-ocd; arm-usb-ocd-h should be the same (as it shares the same
> documentation).
>
> Signed-off-by: Paul Fertser <fercerpav at gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
and committed in r1478.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From nowens2 at illinois.edu  Tue Dec 20 05:25:06 2011
From: nowens2 at illinois.edu (Nathan Owens)
Date: Mon, 19 Dec 2011 23:25:06 -0500
Subject: [flashrom] FAIL: msi ms-7135 (k8n-neo3)
In-Reply-To: <1324325078.4037.41.camel@localhost>
References: <E0D63A8EBAE7464ABC2FC7E10531308D12651071@chimbx2.ad.uillinois.edu>
	<1324325078.4037.41.camel@localhost>
Message-ID: <4EF00E22.5050108@illinois.edu>

Here is the output for lspci -nnvvvxxx (run as root). Let me know if
you'd like me to do anything else. I'm not really a programmer, but I
know my way around the command line and am a bit of  a sysadmin.

Nathan Owens


> Am Montag, den 19.12.2011, 17:15 +0000 schrieb Owens, Nathan D:
>   
>> I've been trying to flash the SST49LF160C on my ms-7135. Fails to
>> verify with the same problem every time (see attached).
>>
>> Oddly, when I use this board's original chip (SST49LF004A/B), flashing verifies without a problem.
>>     
> You seem to have encountered either a bug in flashrom or a limit of your
> mainboard, but I suspect the former. A problem with nVidia chipsets is
> that there seems to be no public documentation about the register bits.
>
> The issue you are facing is that you have an address decoding problem:
> While the ROM address space of 2MB of your new chip is decoded correctly
> (otherwise the probe would fail, as we probe at the low end of the
> address space), the register dump looks suspicious:
>
>
>   
>> lockbits at address=0xb7154002 is 0xff
>> lockbits at address=0xb7164002 is 0xff
>> [...]
>> lockbits at address=0xb7244002 is 0xff
>> lockbits at address=0xb7254002 is 0x0
>> lockbits at address=0xb7264002 is 0x0
>> lockbits at address=0xb7334002 is 0x0
>> [...]
>> lockbits at address=0xb7344002 is 0x0
>> lockbits at address=0xb734c002 is 0x0
>> lockbits at address=0xb734e002 is 0x0
>> lockbits at address=0xb7350002 is 0x0
>>     
> The lockbits on this chip are accessed in a separate address space,
> called the "register space", and should never read 0xff. So it is quite
> likely that the reads returning 0xff are not routed to the ROM chip at
> all, indacting a wrongly configured decoding. Only 1MB of register space
> is decoded.
>
> As your chip defaults to read-only, and you have to unlock it (which
> flashrom tries through the register space), it will fail to unlock the
> areas of the flash chip having lock registers that are inaccessible to
> the processor. So the first half of your 2MB chip is read-only, and
> writing to it fails.
>
>   
>> Any ideas?
>>     
> Most likely, we need to reprogram the south bridge to route a larger
> address space to the flash chip (just hoping that no PCI component has
> been mapped at that area, which is at 0xFFA00000 .. 0xFFAFFFFF for the
> unrouted half of the flash chip while 0xFFB00000 .. 0xFFBFFFFF) is
> routed to the flash chip.
>
> Please post the output of
> lspci -nnvvvxxx (run as root)
>
> Thanks in advance,
>   Michael Karcher
>
>   

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From lukenshiro at ngi.it  Wed Dec 21 08:47:52 2011
From: lukenshiro at ngi.it (LukenShiro)
Date: Wed, 21 Dec 2011 08:47:52 +0100
Subject: [flashrom] Matsonic MS9327E+(USB) OK
Message-ID: <20111221084752.79631f0f@hamalay.mnt>

I've tested reading and writing successfully with flashrom on this
motherboard (unfortunately I had to re-write current bios, as a new bios
version seems not to be available nowadays), with no particular flags.

I'm attaching: flashrom -V, flashrom -Vr, flashrom -Vw, superiotool and
dmidecode.

Best Regards.

-- 
GNU/Linux * Slackware64 current/multilib
LU #210970 SU #12583 LM #98222/#412913

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From stefan.tauner at student.tuwien.ac.at  Wed Dec 21 12:36:25 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 21 Dec 2011 12:36:25 +0100
Subject: [flashrom] Matsonic MS9327E+(USB) OK
In-Reply-To: <20111221084752.79631f0f@hamalay.mnt>
References: <20111221084752.79631f0f@hamalay.mnt>
Message-ID: <201112211136.pBLBaQA5030042@mail2.student.tuwien.ac.at>

On Wed, 21 Dec 2011 08:47:52 +0100
LukenShiro <lukenshiro at ngi.it> wrote:

> Erasing and writing flash chip... Trying erase function 0... 0x000000-0x01ffff:S, 0x020000-0x037fff:S, 0x038000-0x039fff:S, 0x03a000-0x03bfff:S, 0x03c000-0x03ffff:S
> Erase/write done.


Hello LukenShiro,

thanks for your report!
Unfortunately the "S"es in the quote above state that all blocks were
skipped (because the data was checked for equality before erasing), so
this result is not newsworthy.

If you REALLY want to test flashrom on that hardware you would have to
erase it manually with -E and write it afterwards with -w as usual.
I am not suggesting this though. If -E works, but -w hits a bug, you
are left with an empty flash chip.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From jimmie at southpole.se  Wed Dec 21 14:20:15 2011
From: jimmie at southpole.se (Jimmie Tauriainen)
Date: Wed, 21 Dec 2011 14:20:15 +0100
Subject: [flashrom] X8DTT-H
Message-ID: <4EF1DD0F.70902@southpole.se>

Hi,

This is a Supermicro X8DTT-HIBQF but it uses the same BIOS as X8DTT-H as 
refered in DMI. Probably all H8DTT* boards uses same.

Anyway attaching flashrom -V outputs.

root at spts-10-143:~/flashrom# dmidecode -t baseboard
# dmidecode 2.9
SMBIOS 2.6 present.

Handle 0x0002, DMI type 2, 15 bytes
Base Board Information
	Manufacturer: Supermicro
	Product Name: X8DTT-H
	Version: 2.0
	Serial Number: 1234567890
	Asset Tag: 1234567890
	Features:
		Board is a hosting board
		Board is replaceable
	Location In Chassis: 1234567890
	Chassis Handle: 0x0003
	Type: Motherboard
	Contained Object Handles: 0


Best regards,
Jimmie
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From michael at fuckner.net  Wed Dec 21 15:26:21 2011
From: michael at fuckner.net (Michael Fuckner)
Date: Wed, 21 Dec 2011 15:26:21 +0100
Subject: [flashrom] X8DTT-H
In-Reply-To: <4EF1DD0F.70902@southpole.se>
References: <4EF1DD0F.70902@southpole.se>
Message-ID: <4EF1EC8D.6070400@fuckner.net>

On 12/21/2011 02:20 PM, Jimmie Tauriainen wrote:
> Hi,
>
> This is a Supermicro X8DTT-HIBQF but it uses the same BIOS as X8DTT-H as
> refered in DMI. Probably all H8DTT* boards uses same.
>
All X8DTT-H* use the same Bios, the Versions without Hot-Swap Support 
(X8DTT*) use different Bios- as well as X8DTT-INFF with DDR-Infiniband.

Regards,
  Michael!


From vidwer at gmail.com  Wed Dec 21 16:07:34 2011
From: vidwer at gmail.com (Idwer Vollering)
Date: Wed, 21 Dec 2011 16:07:34 +0100
Subject: [flashrom] X8DTT-H
In-Reply-To: <4EF1DD0F.70902@southpole.se>
References: <4EF1DD0F.70902@southpole.se>
Message-ID: <CAPp9OrmE3GWt-hT-e9aAYyp=Ti8w+p9o79J4ezZkXuqEy8wX5Q@mail.gmail.com>

Hi,

2011/12/21 Jimmie Tauriainen <jimmie at southpole.se>:
> Hi,
>
> This is a Supermicro X8DTT-HIBQF but it uses the same BIOS as X8DTT-H as
> refered in DMI. Probably all H8DTT* boards uses same.
>
> Anyway attaching flashrom -V outputs.

Can you attach the output of 'lspci -nnvvvxxx' and 'superiotool -deV'
(run as root) as well? Some code needs to be written to clear the
erase/write protection, see http://flashrom.org/Board_Enable

>
> root at spts-10-143:~/flashrom# dmidecode -t baseboard
> # dmidecode 2.9
> SMBIOS 2.6 present.
>
> Handle 0x0002, DMI type 2, 15 bytes
> Base Board Information
> ? ? ? ?Manufacturer: Supermicro
> ? ? ? ?Product Name: X8DTT-H
> ? ? ? ?Version: 2.0
> ? ? ? ?Serial Number: 1234567890
> ? ? ? ?Asset Tag: 1234567890
> ? ? ? ?Features:
> ? ? ? ? ? ? ? ?Board is a hosting board
> ? ? ? ? ? ? ? ?Board is replaceable
> ? ? ? ?Location In Chassis: 1234567890
> ? ? ? ?Chassis Handle: 0x0003
> ? ? ? ?Type: Motherboard
> ? ? ? ?Contained Object Handles: 0
>
>
> Best regards,
> Jimmie
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom


From herbr at istop.com  Wed Dec 21 17:59:39 2011
From: herbr at istop.com (Herb Radford)
Date: Wed, 21 Dec 2011 11:59:39 -0500
Subject: [flashrom] Detecting flash on P3B-F
Message-ID: <1324486779.2284.12.camel@i1720>

I have 2 of these boards and want to try coreboot on them.
I have a Willem Programmer which does not have the capability to
recognize/burn the Mosel V29C51002T device on the board.
So I tried flashrom-0.9.4. Well to my dismay, the motherboard was
detected as an "Intel PIIX4/4E/4M" but cannot detect the flash device.
Searching the mail archives tells me that this motherboard has not been
tested but "May still work". I'm sorry to tell you that it doesn't.
I can try to help with fixes but I'm not yet clear on how the flashrom
software is structured.
Any ideas?

Regards, Herb



From marcosfrm at gmail.com  Wed Dec 21 20:11:50 2011
From: marcosfrm at gmail.com (Marcos Felipe Rasia de Mello)
Date: Wed, 21 Dec 2011 17:11:50 -0200
Subject: [flashrom] Detecting flash on P3B-F
In-Reply-To: <1324486779.2284.12.camel@i1720>
References: <1324486779.2284.12.camel@i1720>
Message-ID: <CAJZVDJAmMJb1wBJHkvcgZ3Mfb_oBcB8gLDX4SLo0v2PRsu0A=w@mail.gmail.com>

2011/12/21 Herb Radford <herbr at istop.com>:
> I have 2 of these boards and want to try coreboot on them.
> I have a Willem Programmer which does not have the capability to
> recognize/burn the Mosel V29C51002T device on the board.
> So I tried flashrom-0.9.4. Well to my dismay, the motherboard was
> detected as an "Intel PIIX4/4E/4M" but cannot detect the flash device.
> Searching the mail archives tells me that this motherboard has not been
> tested but "May still work". I'm sorry to tell you that it doesn't.
> I can try to help with fixes but I'm not yet clear on how the flashrom
> software is structured.
> Any ideas?
>
> Regards, Herb
>

It uses the AS99127F:

http://www.flashrom.org/pipermail/flashrom/2011-October/008171.html

Marcos


From lukenshiro at ngi.it  Wed Dec 21 20:48:52 2011
From: lukenshiro at ngi.it (LukenShiro)
Date: Wed, 21 Dec 2011 20:48:52 +0100
Subject: [flashrom] Matsonic MS9327E+(USB) OK
In-Reply-To: <201112211136.pBLBaQA5030042@mail2.student.tuwien.ac.at>
References: <20111221084752.79631f0f@hamalay.mnt>
	<201112211136.pBLBaQA5030042@mail2.student.tuwien.ac.at>
Message-ID: <20111221204852.1022417d@hamalay.mnt>

Il giorno Wed, 21 Dec 2011 12:36:25 +0100
Stefan Tauner <stefan.tauner at student.tuwien.ac.at> ha scritto:
> > Erasing and writing flash chip... Trying erase function 0...
> > 0x000000-0x01ffff:S, 0x020000-0x037fff:S, 0x038000-0x039fff:S,
> > 0x03a000-0x03bfff:S, 0x03c000-0x03ffff:S Erase/write done.
> thanks for your report!
> Unfortunately the "S"es in the quote above state that all blocks were
> skipped (because the data was checked for equality before erasing), so
> this result is not newsworthy.

Sorry, my fault, I didn't realize it :-/
 
> If you REALLY want to test flashrom on that hardware you would have to
> erase it manually with -E and write it afterwards with -w as usual.
> I am not suggesting this though. If -E works, but -w hits a bug, you
> are left with an empty flash chip.

Unfortunately, it's a PC I cannot actually take the risk on, at the
moment, as I don't have a recover means as "parachute". Sorry!
Best regards.

-- 
GNU/Linux * Slackware64 current/multilib
LU #210970 SU #12583 LM #98222/#412913


From the_niz at nurdspace.nl  Wed Dec 21 22:12:48 2011
From: the_niz at nurdspace.nl (The Niz .)
Date: Wed, 21 Dec 2011 21:12:48 +0000
Subject: [flashrom] satasii PCI0680 tested V29C51002T-90P write
Message-ID: <BLU159-W3138144C0D2FA612891E8AC0A50@phx.gbl>


Hello list,
This is my first one, so please just tell me if something is wrong/missing...Write is verified to be working correctly (I booted using the flashed chip)
Chip markings:9928FV29C51002T-90P
Programmer:Advance 29133 PATA controller with Silicon Image Sil06080CL144
Every time I ran flashrom and redirected output to a logfile it showed this line on the console:Mapping SATA SIL registers at 0xe3000000, unaligned size 0x100.
Following logs (in order) represent -V -Vr -VE -VW and another -VW
flashrom v0.9.4-r1395 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7, GCC 4.4.5, little endianflashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 3 usecs, 333M loops per second, 10 myus = 12 us, 100 myus = 102 us, 1000 myus = 1029 us, 10000 myus = 10106 us, 12 myus = 15 us, OK.Initializing satasii programmerFound "Silicon Image PCI0680 Ultra ATA-133 Host Ctrl" (1095:0680, BDF 00:09.0).Requested BAR is I/OProbing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x22, id2 0x2d, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x22, id2 0x2d, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Found SyncMOS/MoselVitelic flash chip "{F,S,V}29C51002T" (256 kB, Parallel) on satasii.Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02===This flash part has status UNTESTED for operations: WRITEThe test status of this chip may have been updated in the latest developmentversion of flashrom. If you are running the latest development version,please email a report to flashrom at flashrom.org if any of the above operationswork correctly for you with this flash part. Please include the flashromoutput with the additional -V option for all operations you tested (-V, -Vr,-Vw, -VE), and mention which mainboard or programmer you tested.Please mention your board in the subject line. Thanks for your help!No operations were specified.flashrom v0.9.4-r1395 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7, GCC 4.4.5, little endianflashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 3 usecs, 333M loops per second, 10 myus = 12 us, 100 myus = 103 us, 1000 myus = 1028 us, 10000 myus = 10014 us, 12 myus = 15 us, OK.Initializing satasii programmerFound "Silicon Image PCI0680 Ultra ATA-133 Host Ctrl" (1095:0680, BDF 00:09.0).Requested BAR is I/OProbing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x22, id2 0x2d, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x22, id2 0x2d, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Found SyncMOS/MoselVitelic flash chip "{F,S,V}29C51002T" (256 kB, Parallel) on satasii.Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02===This flash part has status UNTESTED for operations: WRITEThe test status of this chip may have been updated in the latest developmentversion of flashrom. If you are running the latest development version,please email a report to flashrom at flashrom.org if any of the above operationswork correctly for you with this flash part. Please include the flashromoutput with the additional -V option for all operations you tested (-V, -Vr,-Vw, -VE), and mention which mainboard or programmer you tested.Please mention your board in the subject line. Thanks for your help!Reading flash... done.flashrom v0.9.4-r1395 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7, GCC 4.4.5, little endianflashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 4 usecs, 333M loops per second, 10 myus = 12 us, 100 myus = 102 us, 1000 myus = 1029 us, 10000 myus = 10014 us, 16 myus = 18 us, OK.Initializing satasii programmerFound "Silicon Image PCI0680 Ultra ATA-133 Host Ctrl" (1095:0680, BDF 00:09.0).Requested BAR is I/OProbing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x22, id2 0x2d, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x22, id2 0x2d, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002T, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x22, id2 0x2dProbing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Found SyncMOS/MoselVitelic flash chip "{F,S,V}29C51002T" (256 kB, Parallel) on satasii.Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x22, id2 0xfd, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02===This flash part has status UNTESTED for operations: WRITEThe test status of this chip may have been updated in the latest developmentversion of flashrom. If you are running the latest development version,please email a report to flashrom at flashrom.org if any of the above operationswork correctly for you with this flash part. Please include the flashromoutput with the additional -V option for all operations you tested (-V, -Vr,-Vw, -VE), and mention which mainboard or programmer you tested.Please mention your board in the subject line. Thanks for your help!Erasing and writing flash chip... Trying erase function 0... 0x000000-0x0001ff:E, 0x000200-0x0003ff:E, 0x000400-0x0005ff:E, 0x000600-0x0007ff:E, 0x000800-0x0009ff:E, 0x000a00-0x000bff:E, 0x000c00-0x000dff:E, 0x000e00-0x000fff:E, 0x001000-0x0011ff:E, 0x001200-0x0013ff:E, 0x001400-0x0015ff:E, 0x001600-0x0017ff:E, 0x001800-0x0019ff:E, 0x001a00-0x001bff:E, 0x001c00-0x001dff:E, 0x001e00-0x001fff:E, 0x002000-0x0021ff:E, 0x002200-0x0023ff:E, 0x002400-0x0025ff:E, 0x002600-0x0027ff:E, 0x002800-0x0029ff:E, 0x002a00-0x002bff:E, 0x002c00-0x002dff:E, 0x002e00-0x002fff:E, 0x003000-0x0031ff:E, 0x003200-0x0033ff:E, 0x003400-0x0035ff:E, 0x003600-0x0037ff:E, 0x003800-0x0039ff:E, 0x003a00-0x003bff:E, 0x003c00-0x003dff:E, 0x003e00-0x003fff:E, 0x004000-0x0041ff:E, 0x004200-0x0043ff:E, 0x004400-0x0045ff:E, 0x004600-0x0047ff:E, 0x004800-0x0049ff:E, 0x004a00-0x004bff:E, 0x004c00-0x004dff:E, 0x004e00-0x004fff:E, 0x005000-0x0051ff:E, 0x005200-0x0053ff:E, 0x005400-0x0055ff:E, 0x005600-0x0057ff:E, 0x005800-0x0059ff:E, 0x005a00-0x005bff:E, 0x005c00-0x005dff:E, 0x005e00-0x005fff:E, 0x006000-0x0061ff:E, 0x006200-0x0063ff:E, 0x006400-0x0065ff:E, 0x006600-0x0067ff:E, 0x006800-0x0069ff:E, 0x006a00-0x006bff:E, 0x006c00-0x006dff:E, 0x006e00-0x006fff:E, 0x007000-0x0071ff:E, 0x007200-0x0073ff:E, 0x007400-0x0075ff:E, 0x007600-0x0077ff:E, 0x007800-0x0079ff:E, 0x007a00-0x007bff:E, 0x007c00-0x007dff:E, 0x007e00-0x007fff:E, 0x008000-0x0081ff:E, 0x008200-0x0083ff:E, 0x008400-0x0085ff:E, 0x008600-0x0087ff:E, 0x008800-0x0089ff:E, 0x008a00-0x008bff:E, 0x008c00-0x008dff:E, 0x008e00-0x008fff:E, 0x009000-0x0091ff:E, 0x009200-0x0093ff:E, 0x009400-0x0095ff:E, 0x009600-0x0097ff:E, 0x009800-0x0099ff:E, 0x009a00-0x009bff:E, 0x009c00-0x009dff:E, 0x009e00-0x009fff:E, 0x00a000-0x00a1ff:E, 0x00a200-0x00a3ff:E, 0x00a400-0x00a5ff:E, 0x00a600-0x00a7ff:E, 0x00a800-0x00a9ff:E, 0x00aa00-0x00abff:E, 0x00ac00-0x00adff:E, 0x00ae00-0x00afff:E, 0x00b000-0x00b1ff:E, 0x00b200-0x00b3ff:E, 0x00b400-0x00b5ff:E, 0x00b600-0x00b7ff:E, 0x00b800-0x00b9ff:E, 0x00ba00-0x00bbff:E, 0x00bc00-0x00bdff:E, 0x00be00-0x00bfff:E, 0x00c000-0x00c1ff:E, 0x00c200-0x00c3ff:E, 0x00c400-0x00c5ff:E, 0x00c600-0x00c7ff:E, 0x00c800-0x00c9ff:E, 0x00ca00-0x00cbff:E, 0x00cc00-0x00cdff:E, 0x00ce00-0x00cfff:E, 0x00d000-0x00d1ff:E, 0x00d200-0x00d3ff:E, 0x00d400-0x00d5ff:E, 0x00d600-0x00d7ff:E, 0x00d800-0x00d9ff:E, 0x00da00-0x00dbff:E, 0x00dc00-0x00ddff:E, 0x00de00-0x00dfff:E, 0x00e000-0x00e1ff:E, 0x00e200-0x00e3ff:E, 0x00e400-0x00e5ff:E, 0x00e600-0x00e7ff:E, 0x00e800-0x00e9ff:E, 0x00ea00-0x00ebff:E, 0x00ec00-0x00edff:E, 0x00ee00-0x00efff:E, 0x00f000-0x00f1ff:E, 0x00f200-0x00f3ff:E, 0x00f400-0x00f5ff:E, 0x00f600-0x00f7ff:E, 0x00f800-0x00f9ff:E, 0x00fa00-0x00fbff:E, 0x00fc00-0x00fdff:E, 0x00fe00-0x00ffff:E, 0x010000-0x0101ff:E, 0x010200-0x0103ff:E, 0x010400-0x0105ff:E, 0x010600-0x0107ff:E, 0x010800-0x0109ff:E, 0x010a00-0x010bff:E, 0x010c00-0x010dff:E, 0x010e00-0x010fff:E, 0x011000-0x0111ff:E, 0x011200-0x0113ff:E, 0x011400-0x0115ff:E, 0x011600-0x0117ff:E, 0x011800-0x0119ff:E, 0x011a00-0x011bff:E, 0x011c00-0x011dff:E, 0x011e00-0x011fff:E, 0x012000-0x0121ff:E, 0x012200-0x0123ff:E, 0x012400-0x0125ff:E, 0x012600-0x0127ff:E, 0x012800-0x0129ff:E, 0x012a00-0x012bff:E, 0x012c00-0x012dff:E, 0x012e00-0x012fff:E, 0x013000-0x0131ff:E, 0x013200-0x0133ff:E, 0x013400-0x0135ff:E, 0x013600-0x0137ff:E, 0x013800-0x0139ff:E, 0x013a00-0x013bff:E, 0x013c00-0x013dff:E, 0x013e00-0x013fff:E, 0x014000-0x0141ff:E, 0x014200-0x0143ff:E, 0x014400-0x0145ff:E, 0x014600-0x0147ff:E, 0x014800-0x0149ff:E, 0x014a00-0x014bff:E, 0x014c00-0x014dff:E, 0x014e00-0x014fff:E, 0x015000-0x0151ff:E, 0x015200-0x0153ff:E, 0x015400-0x0155ff:E, 0x015600-0x0157ff:E, 0x015800-0x0159ff:E, 0x015a00-0x015bff:E, 0x015c00-0x015dff:E, 0x015e00-0x015fff:E, 0x016000-0x0161ff:E, 0x016200-0x0163ff:E, 0x016400-0x0165ff:E, 0x016600-0x0167ff:E, 0x016800-0x0169ff:E, 0x016a00-0x016bff:E, 0x016c00-0x016dff:E, 0x016e00-0x016fff:E, 0x017000-0x0171ff:E, 0x017200-0x0173ff:E, 0x017400-0x0175ff:E, 0x017600-0x0177ff:E, 0x017800-0x0179ff:E, 0x017a00-0x017bff:E, 0x017c00-0x017dff:E, 0x017e00-0x017fff:E, 0x018000-0x0181ff:E, 0x018200-0x0183ff:E, 0x018400-0x0185ff:E, 0x018600-0x0187ff:E, 0x018800-0x0189ff:E, 0x018a00-0x018bff:E, 0x018c00-0x018dff:E, 0x018e00-0x018fff:E, 0x019000-0x0191ff:E, 0x019200-0x0193ff:E, 0x019400-0x0195ff:E, 0x019600-0x0197ff:E, 0x019800-0x0199ff:E, 0x019a00-0x019bff:E, 0x019c00-0x019dff:E, 0x019e00-0x019fff:E, 0x01a000-0x01a1ff:E, 0x01a200-0x01a3ff:E, 0x01a400-0x01a5ff:E, 0x01a600-0x01a7ff:E, 0x01a800-0x01a9ff:E, 0x01aa00-0x01abff:E, 0x01ac00-0x01adff:E, 0x01ae00-0x01afff:E, 0x01b000-0x01b1ff:E, 0x01b200-0x01b3ff:E, 0x01b400-0x01b5ff:E, 0x01b600-0x01b7ff:E, 0x01b800-0x01b9ff:E, 0x01ba00-0x01bbff:E, 0x01bc00-0x01bdff:E, 0x01be00-0x01bfff:E, 0x01c000-0x01c1ff:E, 0x01c200-0x01c3ff:E, 0x01c400-0x01c5ff:E, 0x01c600-0x01c7ff:E, 0x01c800-0x01c9ff:E, 0x01ca00-0x01cbff:E, 0x01cc00-0x01cdff:E, 0x01ce00-0x01cfff:E, 0x01d000-0x01d1ff:E, 0x01d200-0x01d3ff:E, 0x01d400-0x01d5ff:E, 0x01d600-0x01d7ff:E, 0x01d800-0x01d9ff:E, 0x01da00-0x01dbff:E, 0x01dc00-0x01ddff:E, 0x01de00-0x01dfff:E, 0x01e000-0x01e1ff:E, 0x01e200-0x01e3ff:E, 0x01e400-0x01e5ff:E, 0x01e600-0x01e7ff:E, 0x01e800-0x01e9ff:E, 0x01ea00-0x01ebff:E, 0x01ec00-0x01edff:E, 0x01ee00-0x01efff:E, 0x01f000-0x01f1ff:E, 0x01f200-0x01f3ff:E, 0x01f400-0x01f5ff:E, 0x01f600-0x01f7ff:E, 0x01f800-0x01f9ff:E, 0x01fa00-0x01fbff:E, 0x01fc00-0x01fdff:E, 0x01fe00-0x01ffff:E, 0x020000-0x0201ff:E, 0x020200-0x0203ff:E, 0x020400-0x0205ff:E, 0x020600-0x0207ff:E, 0x020800-0x0209ff:E, 0x020a00-0x020bff:E, 0x020c00-0x020dff:E, 0x020e00-0x020fff:E, 0x021000-0x0211ff:E, 0x021200-0x0213ff:E, 0x021400-0x0215ff:E, 0x021600-0x0217ff:E, 0x021800-0x0219ff:E, 0x021a00-0x021bff:E, 0x021c00-0x021dff:E, 0x021e00-0x021fff:E, 0x022000-0x0221ff:E, 0x022200-0x0223ff:E, 0x022400-0x0225ff:E, 0x022600-0x0227ff:E, 0x022800-0x0229ff:E, 0x022a00-0x022bff:E, 0x022c00-0x022dff:E, 0x022e00-0x022fff:E, 0x023000-0x0231ff:E, 0x023200-0x0233ff:E, 0x023400-0x0235ff:E, 0x023600-0x0237ff:E, 0x023800-0x0239ff:E, 0x023a00-0x023bff:E, 0x023c00-0x023dff:E, 0x023e00-0x023fff:E, 0x024000-0x0241ff:E, 0x024200-0x0243ff:E, 0x024400-0x0245ff:E, 0x024600-0x0247ff:E, 0x024800-0x0249ff:E, 0x024a00-0x024bff:E, 0x024c00-0x024dff:E, 0x024e00-0x024fff:E, 0x025000-0x0251ff:E, 0x025200-0x0253ff:E, 0x025400-0x0255ff:E, 0x025600-0x0257ff:E, 0x025800-0x0259ff:E, 0x025a00-0x025bff:E, 0x025c00-0x025dff:E, 0x025e00-0x025fff:E, 0x026000-0x0261ff:E, 0x026200-0x0263ff:E, 0x026400-0x0265ff:E, 0x026600-0x0267ff:E, 0x026800-0x0269ff:E, 0x026a00-0x026bff:E, 0x026c00-0x026dff:E, 0x026e00-0x026fff:E, 0x027000-0x0271ff:E, 0x027200-0x0273ff:E, 0x027400-0x0275ff:E, 0x027600-0x0277ff:E, 0x027800-0x0279ff:E, 0x027a00-0x027bff:E, 0x027c00-0x027dff:E, 0x027e00-0x027fff:E, 0x028000-0x0281ff:E, 0x028200-0x0283ff:E, 0x028400-0x0285ff:E, 0x028600-0x0287ff:E, 0x028800-0x0289ff:E, 0x028a00-0x028bff:E, 0x028c00-0x028dff:E, 0x028e00-0x028fff:E, 0x029000-0x0291ff:E, 0x029200-0x0293ff:E, 0x029400-0x0295ff:E, 0x029600-0x0297ff:E, 0x029800-0x0299ff:E, 0x029a00-0x029bff:E, 0x029c00-0x029dff:E, 0x029e00-0x029fff:E, 0x02a000-0x02a1ff:E, 0x02a200-0x02a3ff:E, 0x02a400-0x02a5ff:E, 0x02a600-0x02a7ff:E, 0x02a800-0x02a9ff:E, 0x02aa00-0x02abff:E, 0x02ac00-0x02adff:E, 0x02ae00-0x02afff:E, 0x02b000-0x02b1ff:E, 0x02b200-0x02b3ff:E, 0x02b400-0x02b5ff:E, 0x02b600-0x02b7ff:E, 0x02b800-0x02b9ff:E, 0x02ba00-0x02bbff:E, 0x02bc00-0x02bdff:E, 0x02be00-0x02bfff:E, 0x02c000-0x02c1ff:E, 0x02c200-0x02c3ff:E, 0x02c400-0x02c5ff:E, 0x02c600-0x02c7ff:E, 0x02c800-0x02c9ff:E, 0x02ca00-0x02cbff:E, 0x02cc00-0x02cdff:E, 0x02ce00-0x02cfff:E, 0x02d000-0x02d1ff:E, 0x02d200-0x02d3ff:E, 0x02d400-0x02d5ff:E, 0x02d600-0x02d7ff:E, 0x02d800-0x02d9ff:E, 0x02da00-0x02dbff:E, 0x02dc00-0x02ddff:E, 0x02de00-0x02dfff:E, 0x02e000-0x02e1ff:E, 0x02e200-0x02e3ff:E, 0x02e400-0x02e5ff:E, 0x02e600-0x02e7ff:E, 0x02e800-0x02e9ff:E, 0x02ea00-0x02ebff:E, 0x02ec00-0x02edff:E, 0x02ee00-0x02efff:E, 0x02f000-0x02f1ff:E, 0x02f200-0x02f3ff:E, 0x02f400-0x02f5ff:E, 0x02f600-0x02f7ff:E, 0x02f800-0x02f9ff:E, 0x02fa00-0x02fbff:E, 0x02fc00-0x02fdff:E, 0x02fe00-0x02ffff:E, 0x030000-0x0301ff:E, 0x030200-0x0303ff:E, 0x030400-0x0305ff:E, 0x030600-0x0307ff:E, 0x030800-0x0309ff:E, 0x030a00-0x030bff:E, 0x030c00-0x030dff:E, 0x030e00-0x030fff:E, 0x031000-0x0311ff:E, 0x031200-0x0313ff:E, 0x031400-0x0315ff:E, 0x031600-0x0317ff:E, 0x031800-0x0319ff:E, 0x031a00-0x031bff:E, 0x031c00-0x031dff:E, 0x031e00-0x031fff:E, 0x032000-0x0321ff:E, 0x032200-0x0323ff:E, 0x032400-0x0325ff:E, 0x032600-0x0327ff:E, 0x032800-0x0329ff:E, 0x032a00-0x032bff:E, 0x032c00-0x032dff:E, 0x032e00-0x032fff:E, 0x033000-0x0331ff:E, 0x033200-0x0333ff:E, 0x033400-0x0335ff:E, 0x033600-0x0337ff:E, 0x033800-0x0339ff:E, 0x033a00-0x033bff:E, 0x033c00-0x033dff:E, 0x033e00-0x033fff:E, 0x034000-0x0341ff:E, 0x034200-0x0343ff:E, 0x034400-0x0345ff:E, 0x034600-0x0347ff:E, 0x034800-0x0349ff:E, 0x034a00-0x034bff:E, 0x034c00-0x034dff:E, 0x034e00-0x034fff:E, 0x035000-0x0351ff:E, 0x035200-0x0353ff:E, 0x035400-0x0355ff:E, 0x035600-0x0357ff:E, 0x035800-0x0359ff:E, 0x035a00-0x035bff:E, 0x035c00-0x035dff:E, 0x035e00-0x035fff:E, 0x036000-0x0361ff:E, 0x036200-0x0363ff:E, 0x036400-0x0365ff:E, 0x036600-0x0367ff:E, 0x036800-0x0369ff:E, 0x036a00-0x036bff:E, 0x036c00-0x036dff:E, 0x036e00-0x036fff:E, 0x037000-0x0371ff:E, 0x037200-0x0373ff:E, 0x037400-0x0375ff:E, 0x037600-0x0377ff:E, 0x037800-0x0379ff:E, 0x037a00-0x037bff:E, 0x037c00-0x037dff:E, 0x037e00-0x037fff:E, 0x038000-0x0381ff:E, 0x038200-0x0383ff:E, 0x038400-0x0385ff:E, 0x038600-0x0387ff:E, 0x038800-0x0389ff:E, 0x038a00-0x038bff:E, 0x038c00-0x038dff:E, 0x038e00-0x038fff:E, 0x039000-0x0391ff:E, 0x039200-0x0393ff:E, 0x039400-0x0395ff:E, 0x039600-0x0397ff:E, 0x039800-0x0399ff:E, 0x039a00-0x039bff:E, 0x039c00-0x039dff:E, 0x039e00-0x039fff:E, 0x03a000-0x03a1ff:E, 0x03a200-0x03a3ff:E, 0x03a400-0x03a5ff:E, 0x03a600-0x03a7ff:E, 0x03a800-0x03a9ff:E, 0x03aa00-0x03abff:E, 0x03ac00-0x03adff:E, 0x03ae00-0x03afff:E, 0x03b000-0x03b1ff:E, 0x03b200-0x03b3ff:E, 0x03b400-0x03b5ff:E, 0x03b600-0x03b7ff:E, 0x03b800-0x03b9ff:E, 0x03ba00-0x03bbff:E, 0x03bc00-0x03bdff:E, 0x03be00-0x03bfff:E, 0x03c000-0x03c1ff:E, 0x03c200-0x03c3ff:E, 0x03c400-0x03c5ff:E, 0x03c600-0x03c7ff:E, 0x03c800-0x03c9ff:E, 0x03ca00-0x03cbff:E, 0x03cc00-0x03cdff:E, 0x03ce00-0x03cfff:E, 0x03d000-0x03d1ff:E, 0x03d200-0x03d3ff:E, 0x03d400-0x03d5ff:E, 0x03d600-0x03d7ff:E, 0x03d800-0x03d9ff:E, 0x03da00-0x03dbff:E, 0x03dc00-0x03ddff:E, 0x03de00-0x03dfff:E, 0x03e000-0x03e1ff:E, 0x03e200-0x03e3ff:E, 0x03e400-0x03e5ff:E, 0x03e600-0x03e7ff:E, 0x03e800-0x03e9ff:E, 0x03ea00-0x03ebff:E, 0x03ec00-0x03edff:E, 0x03ee00-0x03efff:E, 0x03f000-0x03f1ff:E, 0x03f200-0x03f3ff:E, 0x03f400-0x03f5ff:E, 0x03f600-0x03f7ff:E, 0x03f800-0x03f9ff:E, 0x03fa00-0x03fbff:E, 0x03fc00-0x03fdff:E, 0x03fe00-0x03ffff:EErase/write done.flashrom v0.9.4-r1395 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7, GCC 4.4.5, little endianflashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 3 usecs, 333M loops per second, 10 myus = 12 us, 100 myus = 102 us, 1000 myus = 997 us, 10000 myus = 10014 us, 12 myus = 15 us, OK.Initializing satasii programmerFound "Silicon Image PCI0680 Ultra ATA-133 Host Ctrl" (1095:0680, BDF 00:09.0).Requested BAR is I/OProbing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xffProbing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xffProbing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xffProbing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xffProbing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Found SyncMOS/MoselVitelic flash chip "{F,S,V}29C51002T" (256 kB, Parallel) on satasii.Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02===This flash part has status UNTESTED for operations: WRITEThe test status of this chip may have been updated in the latest developmentversion of flashrom. If you are running the latest development version,please email a report to flashrom at flashrom.org if any of the above operationswork correctly for you with this flash part. Please include the flashromoutput with the additional -V option for all operations you tested (-V, -Vr,-Vw, -VE), and mention which mainboard or programmer you tested.Please mention your board in the subject line. Thanks for your help!Reading old flash chip contents... done.Erasing and writing flash chip... Trying erase function 0... 0x000000-0x0001ff:W, 0x000200-0x0003ff:W, 0x000400-0x0005ff:W, 0x000600-0x0007ff:W, 0x000800-0x0009ff:W, 0x000a00-0x000bff:W, 0x000c00-0x000dff:W, 0x000e00-0x000fff:W, 0x001000-0x0011ff:W, 0x001200-0x0013ff:W, 0x001400-0x0015ff:W, 0x001600-0x0017ff:W, 0x001800-0x0019ff:W, 0x001a00-0x001bff:W, 0x001c00-0x001dff:W, 0x001e00-0x001fff:W, 0x002000-0x0021ff:W, 0x002200-0x0023ff:W, 0x002400-0x0025ff:W, 0x002600-0x0027ff:W, 0x002800-0x0029ff:W, 0x002a00-0x002bff:W, 0x002c00-0x002dff:W, 0x002e00-0x002fff:W, 0x003000-0x0031ff:W, 0x003200-0x0033ff:W, 0x003400-0x0035ff:W, 0x003600-0x0037ff:W, 0x003800-0x0039ff:W, 0x003a00-0x003bff:W, 0x003c00-0x003dff:W, 0x003e00-0x003fff:W, 0x004000-0x0041ff:W, 0x004200-0x0043ff:W, 0x004400-0x0045ff:W, 0x004600-0x0047ff:W, 0x004800-0x0049ff:W, 0x004a00-0x004bff:W, 0x004c00-0x004dff:W, 0x004e00-0x004fff:W, 0x005000-0x0051ff:W, 0x005200-0x0053ff:W, 0x005400-0x0055ff:W, 0x005600-0x0057ff:W, 0x005800-0x0059ff:W, 0x005a00-0x005bff:W, 0x005c00-0x005dff:W, 0x005e00-0x005fff:W, 0x006000-0x0061ff:W, 0x006200-0x0063ff:W, 0x006400-0x0065ff:W, 0x006600-0x0067ff:W, 0x006800-0x0069ff:W, 0x006a00-0x006bff:W, 0x006c00-0x006dff:W, 0x006e00-0x006fff:W, 0x007000-0x0071ff:W, 0x007200-0x0073ff:W, 0x007400-0x0075ff:W, 0x007600-0x0077ff:W, 0x007800-0x0079ff:W, 0x007a00-0x007bff:W, 0x007c00-0x007dff:W, 0x007e00-0x007fff:W, 0x008000-0x0081ff:W, 0x008200-0x0083ff:W, 0x008400-0x0085ff:W, 0x008600-0x0087ff:W, 0x008800-0x0089ff:W, 0x008a00-0x008bff:W, 0x008c00-0x008dff:W, 0x008e00-0x008fff:W, 0x009000-0x0091ff:W, 0x009200-0x0093ff:W, 0x009400-0x0095ff:W, 0x009600-0x0097ff:W, 0x009800-0x0099ff:W, 0x009a00-0x009bff:W, 0x009c00-0x009dff:W, 0x009e00-0x009fff:W, 0x00a000-0x00a1ff:W, 0x00a200-0x00a3ff:W, 0x00a400-0x00a5ff:W, 0x00a600-0x00a7ff:W, 0x00a800-0x00a9ff:W, 0x00aa00-0x00abff:W, 0x00ac00-0x00adff:W, 0x00ae00-0x00afff:W, 0x00b000-0x00b1ff:W, 0x00b200-0x00b3ff:W, 0x00b400-0x00b5ff:W, 0x00b600-0x00b7ff:W, 0x00b800-0x00b9ff:W, 0x00ba00-0x00bbff:W, 0x00bc00-0x00bdff:W, 0x00be00-0x00bfff:W, 0x00c000-0x00c1ff:W, 0x00c200-0x00c3ff:W, 0x00c400-0x00c5ff:W, 0x00c600-0x00c7ff:W, 0x00c800-0x00c9ff:W, 0x00ca00-0x00cbff:W, 0x00cc00-0x00cdff:W, 0x00ce00-0x00cfff:W, 0x00d000-0x00d1ff:W, 0x00d200-0x00d3ff:W, 0x00d400-0x00d5ff:W, 0x00d600-0x00d7ff:W, 0x00d800-0x00d9ff:W, 0x00da00-0x00dbff:W, 0x00dc00-0x00ddff:W, 0x00de00-0x00dfff:W, 0x00e000-0x00e1ff:W, 0x00e200-0x00e3ff:W, 0x00e400-0x00e5ff:W, 0x00e600-0x00e7ff:W, 0x00e800-0x00e9ff:W, 0x00ea00-0x00ebff:W, 0x00ec00-0x00edff:W, 0x00ee00-0x00efff:W, 0x00f000-0x00f1ff:W, 0x00f200-0x00f3ff:W, 0x00f400-0x00f5ff:W, 0x00f600-0x00f7ff:W, 0x00f800-0x00f9ff:W, 0x00fa00-0x00fbff:W, 0x00fc00-0x00fdff:W, 0x00fe00-0x00ffff:W, 0x010000-0x0101ff:W, 0x010200-0x0103ff:W, 0x010400-0x0105ff:W, 0x010600-0x0107ff:W, 0x010800-0x0109ff:W, 0x010a00-0x010bff:W, 0x010c00-0x010dff:W, 0x010e00-0x010fff:W, 0x011000-0x0111ff:W, 0x011200-0x0113ff:W, 0x011400-0x0115ff:W, 0x011600-0x0117ff:W, 0x011800-0x0119ff:W, 0x011a00-0x011bff:W, 0x011c00-0x011dff:W, 0x011e00-0x011fff:W, 0x012000-0x0121ff:W, 0x012200-0x0123ff:W, 0x012400-0x0125ff:W, 0x012600-0x0127ff:W, 0x012800-0x0129ff:W, 0x012a00-0x012bff:W, 0x012c00-0x012dff:W, 0x012e00-0x012fff:W, 0x013000-0x0131ff:W, 0x013200-0x0133ff:W, 0x013400-0x0135ff:W, 0x013600-0x0137ff:W, 0x013800-0x0139ff:W, 0x013a00-0x013bff:W, 0x013c00-0x013dff:W, 0x013e00-0x013fff:W, 0x014000-0x0141ff:W, 0x014200-0x0143ff:W, 0x014400-0x0145ff:W, 0x014600-0x0147ff:W, 0x014800-0x0149ff:W, 0x014a00-0x014bff:W, 0x014c00-0x014dff:W, 0x014e00-0x014fff:W, 0x015000-0x0151ff:W, 0x015200-0x0153ff:W, 0x015400-0x0155ff:W, 0x015600-0x0157ff:W, 0x015800-0x0159ff:W, 0x015a00-0x015bff:W, 0x015c00-0x015dff:W, 0x015e00-0x015fff:W, 0x016000-0x0161ff:W, 0x016200-0x0163ff:W, 0x016400-0x0165ff:W, 0x016600-0x0167ff:W, 0x016800-0x0169ff:W, 0x016a00-0x016bff:W, 0x016c00-0x016dff:W, 0x016e00-0x016fff:W, 0x017000-0x0171ff:W, 0x017200-0x0173ff:W, 0x017400-0x0175ff:W, 0x017600-0x0177ff:W, 0x017800-0x0179ff:W, 0x017a00-0x017bff:W, 0x017c00-0x017dff:W, 0x017e00-0x017fff:W, 0x018000-0x0181ff:W, 0x018200-0x0183ff:W, 0x018400-0x0185ff:W, 0x018600-0x0187ff:W, 0x018800-0x0189ff:W, 0x018a00-0x018bff:W, 0x018c00-0x018dff:W, 0x018e00-0x018fff:W, 0x019000-0x0191ff:W, 0x019200-0x0193ff:W, 0x019400-0x0195ff:W, 0x019600-0x0197ff:W, 0x019800-0x0199ff:W, 0x019a00-0x019bff:W, 0x019c00-0x019dff:W, 0x019e00-0x019fff:W, 0x01a000-0x01a1ff:W, 0x01a200-0x01a3ff:W, 0x01a400-0x01a5ff:W, 0x01a600-0x01a7ff:W, 0x01a800-0x01a9ff:W, 0x01aa00-0x01abff:W, 0x01ac00-0x01adff:W, 0x01ae00-0x01afff:W, 0x01b000-0x01b1ff:W, 0x01b200-0x01b3ff:W, 0x01b400-0x01b5ff:W, 0x01b600-0x01b7ff:W, 0x01b800-0x01b9ff:W, 0x01ba00-0x01bbff:W, 0x01bc00-0x01bdff:W, 0x01be00-0x01bfff:W, 0x01c000-0x01c1ff:W, 0x01c200-0x01c3ff:W, 0x01c400-0x01c5ff:W, 0x01c600-0x01c7ff:W, 0x01c800-0x01c9ff:W, 0x01ca00-0x01cbff:W, 0x01cc00-0x01cdff:W, 0x01ce00-0x01cfff:W, 0x01d000-0x01d1ff:W, 0x01d200-0x01d3ff:W, 0x01d400-0x01d5ff:W, 0x01d600-0x01d7ff:W, 0x01d800-0x01d9ff:W, 0x01da00-0x01dbff:W, 0x01dc00-0x01ddff:W, 0x01de00-0x01dfff:W, 0x01e000-0x01e1ff:W, 0x01e200-0x01e3ff:W, 0x01e400-0x01e5ff:W, 0x01e600-0x01e7ff:W, 0x01e800-0x01e9ff:S, 0x01ea00-0x01ebff:S, 0x01ec00-0x01edff:S, 0x01ee00-0x01efff:S, 0x01f000-0x01f1ff:S, 0x01f200-0x01f3ff:S, 0x01f400-0x01f5ff:S, 0x01f600-0x01f7ff:S, 0x01f800-0x01f9ff:S, 0x01fa00-0x01fbff:S, 0x01fc00-0x01fdff:S, 0x01fe00-0x01ffff:S, 0x020000-0x0201ff:W, 0x020200-0x0203ff:W, 0x020400-0x0205ff:W, 0x020600-0x0207ff:W, 0x020800-0x0209ff:W, 0x020a00-0x020bff:W, 0x020c00-0x020dff:W, 0x020e00-0x020fff:W, 0x021000-0x0211ff:W, 0x021200-0x0213ff:W, 0x021400-0x0215ff:W, 0x021600-0x0217ff:W, 0x021800-0x0219ff:W, 0x021a00-0x021bff:W, 0x021c00-0x021dff:W, 0x021e00-0x021fff:W, 0x022000-0x0221ff:W, 0x022200-0x0223ff:W, 0x022400-0x0225ff:W, 0x022600-0x0227ff:W, 0x022800-0x0229ff:W, 0x022a00-0x022bff:W, 0x022c00-0x022dff:W, 0x022e00-0x022fff:W, 0x023000-0x0231ff:W, 0x023200-0x0233ff:W, 0x023400-0x0235ff:W, 0x023600-0x0237ff:W, 0x023800-0x0239ff:W, 0x023a00-0x023bff:W, 0x023c00-0x023dff:W, 0x023e00-0x023fff:W, 0x024000-0x0241ff:W, 0x024200-0x0243ff:W, 0x024400-0x0245ff:W, 0x024600-0x0247ff:W, 0x024800-0x0249ff:W, 0x024a00-0x024bff:W, 0x024c00-0x024dff:W, 0x024e00-0x024fff:W, 0x025000-0x0251ff:W, 0x025200-0x0253ff:W, 0x025400-0x0255ff:W, 0x025600-0x0257ff:W, 0x025800-0x0259ff:W, 0x025a00-0x025bff:W, 0x025c00-0x025dff:W, 0x025e00-0x025fff:W, 0x026000-0x0261ff:W, 0x026200-0x0263ff:W, 0x026400-0x0265ff:W, 0x026600-0x0267ff:W, 0x026800-0x0269ff:W, 0x026a00-0x026bff:W, 0x026c00-0x026dff:W, 0x026e00-0x026fff:W, 0x027000-0x0271ff:W, 0x027200-0x0273ff:W, 0x027400-0x0275ff:W, 0x027600-0x0277ff:W, 0x027800-0x0279ff:W, 0x027a00-0x027bff:W, 0x027c00-0x027dff:W, 0x027e00-0x027fff:W, 0x028000-0x0281ff:W, 0x028200-0x0283ff:W, 0x028400-0x0285ff:W, 0x028600-0x0287ff:W, 0x028800-0x0289ff:W, 0x028a00-0x028bff:W, 0x028c00-0x028dff:W, 0x028e00-0x028fff:W, 0x029000-0x0291ff:W, 0x029200-0x0293ff:W, 0x029400-0x0295ff:W, 0x029600-0x0297ff:W, 0x029800-0x0299ff:W, 0x029a00-0x029bff:W, 0x029c00-0x029dff:W, 0x029e00-0x029fff:W, 0x02a000-0x02a1ff:W, 0x02a200-0x02a3ff:W, 0x02a400-0x02a5ff:W, 0x02a600-0x02a7ff:W, 0x02a800-0x02a9ff:W, 0x02aa00-0x02abff:W, 0x02ac00-0x02adff:W, 0x02ae00-0x02afff:W, 0x02b000-0x02b1ff:W, 0x02b200-0x02b3ff:W, 0x02b400-0x02b5ff:W, 0x02b600-0x02b7ff:W, 0x02b800-0x02b9ff:W, 0x02ba00-0x02bbff:W, 0x02bc00-0x02bdff:W, 0x02be00-0x02bfff:W, 0x02c000-0x02c1ff:W, 0x02c200-0x02c3ff:W, 0x02c400-0x02c5ff:W, 0x02c600-0x02c7ff:W, 0x02c800-0x02c9ff:W, 0x02ca00-0x02cbff:W, 0x02cc00-0x02cdff:W, 0x02ce00-0x02cfff:W, 0x02d000-0x02d1ff:W, 0x02d200-0x02d3ff:W, 0x02d400-0x02d5ff:W, 0x02d600-0x02d7ff:W, 0x02d800-0x02d9ff:W, 0x02da00-0x02dbff:W, 0x02dc00-0x02ddff:W, 0x02de00-0x02dfff:W, 0x02e000-0x02e1ff:W, 0x02e200-0x02e3ff:W, 0x02e400-0x02e5ff:W, 0x02e600-0x02e7ff:W, 0x02e800-0x02e9ff:W, 0x02ea00-0x02ebff:W, 0x02ec00-0x02edff:W, 0x02ee00-0x02efff:W, 0x02f000-0x02f1ff:W, 0x02f200-0x02f3ff:W, 0x02f400-0x02f5ff:W, 0x02f600-0x02f7ff:W, 0x02f800-0x02f9ff:W, 0x02fa00-0x02fbff:W, 0x02fc00-0x02fdff:W, 0x02fe00-0x02ffff:W, 0x030000-0x0301ff:W, 0x030200-0x0303ff:W, 0x030400-0x0305ff:W, 0x030600-0x0307ff:W, 0x030800-0x0309ff:W, 0x030a00-0x030bff:W, 0x030c00-0x030dff:W, 0x030e00-0x030fff:W, 0x031000-0x0311ff:W, 0x031200-0x0313ff:W, 0x031400-0x0315ff:W, 0x031600-0x0317ff:W, 0x031800-0x0319ff:W, 0x031a00-0x031bff:W, 0x031c00-0x031dff:W, 0x031e00-0x031fff:W, 0x032000-0x0321ff:W, 0x032200-0x0323ff:W, 0x032400-0x0325ff:W, 0x032600-0x0327ff:W, 0x032800-0x0329ff:W, 0x032a00-0x032bff:W, 0x032c00-0x032dff:W, 0x032e00-0x032fff:W, 0x033000-0x0331ff:W, 0x033200-0x0333ff:W, 0x033400-0x0335ff:W, 0x033600-0x0337ff:W, 0x033800-0x0339ff:W, 0x033a00-0x033bff:W, 0x033c00-0x033dff:W, 0x033e00-0x033fff:W, 0x034000-0x0341ff:W, 0x034200-0x0343ff:W, 0x034400-0x0345ff:W, 0x034600-0x0347ff:W, 0x034800-0x0349ff:S, 0x034a00-0x034bff:S, 0x034c00-0x034dff:S, 0x034e00-0x034fff:S, 0x035000-0x0351ff:S, 0x035200-0x0353ff:S, 0x035400-0x0355ff:S, 0x035600-0x0357ff:S, 0x035800-0x0359ff:S, 0x035a00-0x035bff:S, 0x035c00-0x035dff:S, 0x035e00-0x035fff:S, 0x036000-0x0361ff:W, 0x036200-0x0363ff:W, 0x036400-0x0365ff:W, 0x036600-0x0367ff:W, 0x036800-0x0369ff:W, 0x036a00-0x036bff:W, 0x036c00-0x036dff:W, 0x036e00-0x036fff:W, 0x037000-0x0371ff:W, 0x037200-0x0373ff:W, 0x037400-0x0375ff:W, 0x037600-0x0377ff:W, 0x037800-0x0379ff:W, 0x037a00-0x037bff:W, 0x037c00-0x037dff:W, 0x037e00-0x037fff:W, 0x038000-0x0381ff:W, 0x038200-0x0383ff:W, 0x038400-0x0385ff:S, 0x038600-0x0387ff:S, 0x038800-0x0389ff:S, 0x038a00-0x038bff:S, 0x038c00-0x038dff:S, 0x038e00-0x038fff:W, 0x039000-0x0391ff:W, 0x039200-0x0393ff:W, 0x039400-0x0395ff:W, 0x039600-0x0397ff:W, 0x039800-0x0399ff:S, 0x039a00-0x039bff:S, 0x039c00-0x039dff:S, 0x039e00-0x039fff:S, 0x03a000-0x03a1ff:W, 0x03a200-0x03a3ff:W, 0x03a400-0x03a5ff:W, 0x03a600-0x03a7ff:W, 0x03a800-0x03a9ff:W, 0x03aa00-0x03abff:W, 0x03ac00-0x03adff:W, 0x03ae00-0x03afff:W, 0x03b000-0x03b1ff:S, 0x03b200-0x03b3ff:S, 0x03b400-0x03b5ff:S, 0x03b600-0x03b7ff:S, 0x03b800-0x03b9ff:S, 0x03ba00-0x03bbff:S, 0x03bc00-0x03bdff:S, 0x03be00-0x03bfff:S, 0x03c000-0x03c1ff:W, 0x03c200-0x03c3ff:W, 0x03c400-0x03c5ff:W, 0x03c600-0x03c7ff:W, 0x03c800-0x03c9ff:W, 0x03ca00-0x03cbff:W, 0x03cc00-0x03cdff:W, 0x03ce00-0x03cfff:W, 0x03d000-0x03d1ff:W, 0x03d200-0x03d3ff:W, 0x03d400-0x03d5ff:W, 0x03d600-0x03d7ff:W, 0x03d800-0x03d9ff:W, 0x03da00-0x03dbff:W, 0x03dc00-0x03ddff:W, 0x03de00-0x03dfff:W, 0x03e000-0x03e1ff:W, 0x03e200-0x03e3ff:W, 0x03e400-0x03e5ff:W, 0x03e600-0x03e7ff:W, 0x03e800-0x03e9ff:W, 0x03ea00-0x03ebff:W, 0x03ec00-0x03edff:W, 0x03ee00-0x03efff:W, 0x03f000-0x03f1ff:W, 0x03f200-0x03f3ff:W, 0x03f400-0x03f5ff:W, 0x03f600-0x03f7ff:W, 0x03f800-0x03f9ff:W, 0x03fa00-0x03fbff:W, 0x03fc00-0x03fdff:W, 0x03fe00-0x03ffff:WErase/write done.Verifying flash... VERIFIED. ? ? ? ? ?flashrom v0.9.4-r1395 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7, GCC 4.4.5, little endianflashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 3 usecs, 333M loops per second, 10 myus = 12 us, 100 myus = 102 us, 1000 myus = 999 us, 10000 myus = 10040 us, 12 myus = 14 us, OK.Initializing satasii programmerFound "Silicon Image PCI0680 Ultra ATA-133 Host Ctrl" (1095:0680, BDF 00:09.0).Requested BAR is I/OProbing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2dProbing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2dProbing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0x25, id2 0x2d, id1 is normal flash content, id2 is normal flash contentProbing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0x25, id2 0x2d, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F002T, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2dProbing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0x25, id2 0x2dProbing for ST M29W010B, 128 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W040B, 512 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for ST M29W512B, 64 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Found SyncMOS/MoselVitelic flash chip "{F,S,V}29C51002T" (256 kB, Parallel) on satasii.Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x25, id2 0x28, id1 is normal flash content, id2 is normal flash contentProbing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x40, id2 0x02Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x40, id2 0x02===This flash part has status UNTESTED for operations: WRITEThe test status of this chip may have been updated in the latest developmentversion of flashrom. If you are running the latest development version,please email a report to flashrom at flashrom.org if any of the above operationswork correctly for you with this flash part. Please include the flashromoutput with the additional -V option for all operations you tested (-V, -Vr,-Vw, -VE), and mention which mainboard or programmer you tested.Please mention your board in the subject line. Thanks for your help!Reading old flash chip contents... done.Erasing and writing flash chip... Trying erase function 0... 0x000000-0x0001ff:EW, 0x000200-0x0003ff:EW, 0x000400-0x0005ff:EW, 0x000600-0x0007ff:EW, 0x000800-0x0009ff:EW, 0x000a00-0x000bff:EW, 0x000c00-0x000dff:EW, 0x000e00-0x000fff:EW, 0x001000-0x0011ff:EW, 0x001200-0x0013ff:EW, 0x001400-0x0015ff:EW, 0x001600-0x0017ff:EW, 0x001800-0x0019ff:EW, 0x001a00-0x001bff:EW, 0x001c00-0x001dff:EW, 0x001e00-0x001fff:EW, 0x002000-0x0021ff:EW, 0x002200-0x0023ff:EW, 0x002400-0x0025ff:EW, 0x002600-0x0027ff:EW, 0x002800-0x0029ff:EW, 0x002a00-0x002bff:EW, 0x002c00-0x002dff:EW, 0x002e00-0x002fff:EW, 0x003000-0x0031ff:EW, 0x003200-0x0033ff:EW, 0x003400-0x0035ff:EW, 0x003600-0x0037ff:EW, 0x003800-0x0039ff:EW, 0x003a00-0x003bff:EW, 0x003c00-0x003dff:EW, 0x003e00-0x003fff:EW, 0x004000-0x0041ff:EW, 0x004200-0x0043ff:EW, 0x004400-0x0045ff:EW, 0x004600-0x0047ff:EW, 0x004800-0x0049ff:EW, 0x004a00-0x004bff:EW, 0x004c00-0x004dff:EW, 0x004e00-0x004fff:EW, 0x005000-0x0051ff:EW, 0x005200-0x0053ff:EW, 0x005400-0x0055ff:EW, 0x005600-0x0057ff:EW, 0x005800-0x0059ff:EW, 0x005a00-0x005bff:EW, 0x005c00-0x005dff:EW, 0x005e00-0x005fff:EW, 0x006000-0x0061ff:EW, 0x006200-0x0063ff:EW, 0x006400-0x0065ff:EW, 0x006600-0x0067ff:EW, 0x006800-0x0069ff:EW, 0x006a00-0x006bff:EW, 0x006c00-0x006dff:EW, 0x006e00-0x006fff:EW, 0x007000-0x0071ff:EW, 0x007200-0x0073ff:EW, 0x007400-0x0075ff:EW, 0x007600-0x0077ff:EW, 0x007800-0x0079ff:EW, 0x007a00-0x007bff:EW, 0x007c00-0x007dff:EW, 0x007e00-0x007fff:EW, 0x008000-0x0081ff:EW, 0x008200-0x0083ff:EW, 0x008400-0x0085ff:EW, 0x008600-0x0087ff:EW, 0x008800-0x0089ff:EW, 0x008a00-0x008bff:EW, 0x008c00-0x008dff:EW, 0x008e00-0x008fff:EW, 0x009000-0x0091ff:EW, 0x009200-0x0093ff:EW, 0x009400-0x0095ff:EW, 0x009600-0x0097ff:EW, 0x009800-0x0099ff:EW, 0x009a00-0x009bff:EW, 0x009c00-0x009dff:EW, 0x009e00-0x009fff:EW, 0x00a000-0x00a1ff:EW, 0x00a200-0x00a3ff:EW, 0x00a400-0x00a5ff:EW, 0x00a600-0x00a7ff:EW, 0x00a800-0x00a9ff:EW, 0x00aa00-0x00abff:EW, 0x00ac00-0x00adff:EW, 0x00ae00-0x00afff:EW, 0x00b000-0x00b1ff:EW, 0x00b200-0x00b3ff:EW, 0x00b400-0x00b5ff:EW, 0x00b600-0x00b7ff:EW, 0x00b800-0x00b9ff:EW, 0x00ba00-0x00bbff:EW, 0x00bc00-0x00bdff:EW, 0x00be00-0x00bfff:EW, 0x00c000-0x00c1ff:EW, 0x00c200-0x00c3ff:EW, 0x00c400-0x00c5ff:EW, 0x00c600-0x00c7ff:EW, 0x00c800-0x00c9ff:EW, 0x00ca00-0x00cbff:EW, 0x00cc00-0x00cdff:EW, 0x00ce00-0x00cfff:EW, 0x00d000-0x00d1ff:EW, 0x00d200-0x00d3ff:EW, 0x00d400-0x00d5ff:EW, 0x00d600-0x00d7ff:EW, 0x00d800-0x00d9ff:EW, 0x00da00-0x00dbff:EW, 0x00dc00-0x00ddff:EW, 0x00de00-0x00dfff:EW, 0x00e000-0x00e1ff:EW, 0x00e200-0x00e3ff:EW, 0x00e400-0x00e5ff:EW, 0x00e600-0x00e7ff:EW, 0x00e800-0x00e9ff:EW, 0x00ea00-0x00ebff:EW, 0x00ec00-0x00edff:EW, 0x00ee00-0x00efff:EW, 0x00f000-0x00f1ff:EW, 0x00f200-0x00f3ff:EW, 0x00f400-0x00f5ff:EW, 0x00f600-0x00f7ff:EW, 0x00f800-0x00f9ff:EW, 0x00fa00-0x00fbff:EW, 0x00fc00-0x00fdff:EW, 0x00fe00-0x00ffff:EW, 0x010000-0x0101ff:EW, 0x010200-0x0103ff:EW, 0x010400-0x0105ff:EW, 0x010600-0x0107ff:EW, 0x010800-0x0109ff:EW, 0x010a00-0x010bff:EW, 0x010c00-0x010dff:EW, 0x010e00-0x010fff:EW, 0x011000-0x0111ff:EW, 0x011200-0x0113ff:EW, 0x011400-0x0115ff:EW, 0x011600-0x0117ff:EW, 0x011800-0x0119ff:EW, 0x011a00-0x011bff:EW, 0x011c00-0x011dff:EW, 0x011e00-0x011fff:EW, 0x012000-0x0121ff:EW, 0x012200-0x0123ff:EW, 0x012400-0x0125ff:EW, 0x012600-0x0127ff:EW, 0x012800-0x0129ff:EW, 0x012a00-0x012bff:EW, 0x012c00-0x012dff:EW, 0x012e00-0x012fff:EW, 0x013000-0x0131ff:EW, 0x013200-0x0133ff:EW, 0x013400-0x0135ff:EW, 0x013600-0x0137ff:EW, 0x013800-0x0139ff:EW, 0x013a00-0x013bff:EW, 0x013c00-0x013dff:EW, 0x013e00-0x013fff:EW, 0x014000-0x0141ff:EW, 0x014200-0x0143ff:EW, 0x014400-0x0145ff:EW, 0x014600-0x0147ff:EW, 0x014800-0x0149ff:EW, 0x014a00-0x014bff:EW, 0x014c00-0x014dff:EW, 0x014e00-0x014fff:EW, 0x015000-0x0151ff:EW, 0x015200-0x0153ff:EW, 0x015400-0x0155ff:EW, 0x015600-0x0157ff:EW, 0x015800-0x0159ff:EW, 0x015a00-0x015bff:EW, 0x015c00-0x015dff:EW, 0x015e00-0x015fff:EW, 0x016000-0x0161ff:EW, 0x016200-0x0163ff:EW, 0x016400-0x0165ff:EW, 0x016600-0x0167ff:EW, 0x016800-0x0169ff:EW, 0x016a00-0x016bff:EW, 0x016c00-0x016dff:EW, 0x016e00-0x016fff:EW, 0x017000-0x0171ff:EW, 0x017200-0x0173ff:EW, 0x017400-0x0175ff:EW, 0x017600-0x0177ff:EW, 0x017800-0x0179ff:EW, 0x017a00-0x017bff:EW, 0x017c00-0x017dff:EW, 0x017e00-0x017fff:EW, 0x018000-0x0181ff:EW, 0x018200-0x0183ff:EW, 0x018400-0x0185ff:EW, 0x018600-0x0187ff:EW, 0x018800-0x0189ff:EW, 0x018a00-0x018bff:EW, 0x018c00-0x018dff:EW, 0x018e00-0x018fff:EW, 0x019000-0x0191ff:EW, 0x019200-0x0193ff:EW, 0x019400-0x0195ff:EW, 0x019600-0x0197ff:EW, 0x019800-0x0199ff:EW, 0x019a00-0x019bff:EW, 0x019c00-0x019dff:EW, 0x019e00-0x019fff:EW, 0x01a000-0x01a1ff:EW, 0x01a200-0x01a3ff:EW, 0x01a400-0x01a5ff:EW, 0x01a600-0x01a7ff:EW, 0x01a800-0x01a9ff:EW, 0x01aa00-0x01abff:EW, 0x01ac00-0x01adff:EW, 0x01ae00-0x01afff:EW, 0x01b000-0x01b1ff:EW, 0x01b200-0x01b3ff:EW, 0x01b400-0x01b5ff:EW, 0x01b600-0x01b7ff:EW, 0x01b800-0x01b9ff:EW, 0x01ba00-0x01bbff:EW, 0x01bc00-0x01bdff:EW, 0x01be00-0x01bfff:EW, 0x01c000-0x01c1ff:EW, 0x01c200-0x01c3ff:EW, 0x01c400-0x01c5ff:EW, 0x01c600-0x01c7ff:EW, 0x01c800-0x01c9ff:EW, 0x01ca00-0x01cbff:EW, 0x01cc00-0x01cdff:EW, 0x01ce00-0x01cfff:EW, 0x01d000-0x01d1ff:EW, 0x01d200-0x01d3ff:EW, 0x01d400-0x01d5ff:EW, 0x01d600-0x01d7ff:EW, 0x01d800-0x01d9ff:EW, 0x01da00-0x01dbff:EW, 0x01dc00-0x01ddff:E, 0x01de00-0x01dfff:E, 0x01e000-0x01e1ff:E, 0x01e200-0x01e3ff:E, 0x01e400-0x01e5ff:E, 0x01e600-0x01e7ff:E, 0x01e800-0x01e9ff:S, 0x01ea00-0x01ebff:S, 0x01ec00-0x01edff:S, 0x01ee00-0x01efff:S, 0x01f000-0x01f1ff:S, 0x01f200-0x01f3ff:S, 0x01f400-0x01f5ff:S, 0x01f600-0x01f7ff:S, 0x01f800-0x01f9ff:S, 0x01fa00-0x01fbff:S, 0x01fc00-0x01fdff:S, 0x01fe00-0x01ffff:S, 0x020000-0x0201ff:E, 0x020200-0x0203ff:E, 0x020400-0x0205ff:E, 0x020600-0x0207ff:E, 0x020800-0x0209ff:E, 0x020a00-0x020bff:E, 0x020c00-0x020dff:E, 0x020e00-0x020fff:E, 0x021000-0x0211ff:E, 0x021200-0x0213ff:E, 0x021400-0x0215ff:E, 0x021600-0x0217ff:E, 0x021800-0x0219ff:E, 0x021a00-0x021bff:E, 0x021c00-0x021dff:E, 0x021e00-0x021fff:E, 0x022000-0x0221ff:E, 0x022200-0x0223ff:E, 0x022400-0x0225ff:E, 0x022600-0x0227ff:E, 0x022800-0x0229ff:E, 0x022a00-0x022bff:E, 0x022c00-0x022dff:E, 0x022e00-0x022fff:E, 0x023000-0x0231ff:E, 0x023200-0x0233ff:E, 0x023400-0x0235ff:E, 0x023600-0x0237ff:E, 0x023800-0x0239ff:E, 0x023a00-0x023bff:E, 0x023c00-0x023dff:E, 0x023e00-0x023fff:E, 0x024000-0x0241ff:E, 0x024200-0x0243ff:E, 0x024400-0x0245ff:E, 0x024600-0x0247ff:E, 0x024800-0x0249ff:E, 0x024a00-0x024bff:E, 0x024c00-0x024dff:E, 0x024e00-0x024fff:E, 0x025000-0x0251ff:E, 0x025200-0x0253ff:E, 0x025400-0x0255ff:E, 0x025600-0x0257ff:E, 0x025800-0x0259ff:E, 0x025a00-0x025bff:E, 0x025c00-0x025dff:E, 0x025e00-0x025fff:E, 0x026000-0x0261ff:E, 0x026200-0x0263ff:E, 0x026400-0x0265ff:E, 0x026600-0x0267ff:E, 0x026800-0x0269ff:E, 0x026a00-0x026bff:E, 0x026c00-0x026dff:E, 0x026e00-0x026fff:E, 0x027000-0x0271ff:E, 0x027200-0x0273ff:E, 0x027400-0x0275ff:E, 0x027600-0x0277ff:E, 0x027800-0x0279ff:E, 0x027a00-0x027bff:E, 0x027c00-0x027dff:E, 0x027e00-0x027fff:E, 0x028000-0x0281ff:E, 0x028200-0x0283ff:E, 0x028400-0x0285ff:E, 0x028600-0x0287ff:E, 0x028800-0x0289ff:E, 0x028a00-0x028bff:E, 0x028c00-0x028dff:E, 0x028e00-0x028fff:E, 0x029000-0x0291ff:E, 0x029200-0x0293ff:E, 0x029400-0x0295ff:E, 0x029600-0x0297ff:E, 0x029800-0x0299ff:E, 0x029a00-0x029bff:E, 0x029c00-0x029dff:E, 0x029e00-0x029fff:E, 0x02a000-0x02a1ff:E, 0x02a200-0x02a3ff:E, 0x02a400-0x02a5ff:E, 0x02a600-0x02a7ff:E, 0x02a800-0x02a9ff:E, 0x02aa00-0x02abff:E, 0x02ac00-0x02adff:E, 0x02ae00-0x02afff:E, 0x02b000-0x02b1ff:E, 0x02b200-0x02b3ff:E, 0x02b400-0x02b5ff:E, 0x02b600-0x02b7ff:E, 0x02b800-0x02b9ff:E, 0x02ba00-0x02bbff:E, 0x02bc00-0x02bdff:E, 0x02be00-0x02bfff:E, 0x02c000-0x02c1ff:E, 0x02c200-0x02c3ff:E, 0x02c400-0x02c5ff:E, 0x02c600-0x02c7ff:E, 0x02c800-0x02c9ff:E, 0x02ca00-0x02cbff:E, 0x02cc00-0x02cdff:E, 0x02ce00-0x02cfff:E, 0x02d000-0x02d1ff:E, 0x02d200-0x02d3ff:E, 0x02d400-0x02d5ff:E, 0x02d600-0x02d7ff:E, 0x02d800-0x02d9ff:E, 0x02da00-0x02dbff:E, 0x02dc00-0x02ddff:E, 0x02de00-0x02dfff:E, 0x02e000-0x02e1ff:E, 0x02e200-0x02e3ff:E, 0x02e400-0x02e5ff:E, 0x02e600-0x02e7ff:E, 0x02e800-0x02e9ff:E, 0x02ea00-0x02ebff:E, 0x02ec00-0x02edff:E, 0x02ee00-0x02efff:E, 0x02f000-0x02f1ff:E, 0x02f200-0x02f3ff:E, 0x02f400-0x02f5ff:E, 0x02f600-0x02f7ff:E, 0x02f800-0x02f9ff:E, 0x02fa00-0x02fbff:E, 0x02fc00-0x02fdff:E, 0x02fe00-0x02ffff:E, 0x030000-0x0301ff:E, 0x030200-0x0303ff:E, 0x030400-0x0305ff:E, 0x030600-0x0307ff:E, 0x030800-0x0309ff:E, 0x030a00-0x030bff:E, 0x030c00-0x030dff:E, 0x030e00-0x030fff:E, 0x031000-0x0311ff:E, 0x031200-0x0313ff:E, 0x031400-0x0315ff:E, 0x031600-0x0317ff:E, 0x031800-0x0319ff:E, 0x031a00-0x031bff:E, 0x031c00-0x031dff:E, 0x031e00-0x031fff:E, 0x032000-0x0321ff:E, 0x032200-0x0323ff:E, 0x032400-0x0325ff:E, 0x032600-0x0327ff:E, 0x032800-0x0329ff:E, 0x032a00-0x032bff:E, 0x032c00-0x032dff:E, 0x032e00-0x032fff:E, 0x033000-0x0331ff:E, 0x033200-0x0333ff:E, 0x033400-0x0335ff:E, 0x033600-0x0337ff:E, 0x033800-0x0339ff:E, 0x033a00-0x033bff:E, 0x033c00-0x033dff:E, 0x033e00-0x033fff:E, 0x034000-0x0341ff:E, 0x034200-0x0343ff:E, 0x034400-0x0345ff:E, 0x034600-0x0347ff:E, 0x034800-0x0349ff:S, 0x034a00-0x034bff:S, 0x034c00-0x034dff:S, 0x034e00-0x034fff:S, 0x035000-0x0351ff:S, 0x035200-0x0353ff:S, 0x035400-0x0355ff:S, 0x035600-0x0357ff:S, 0x035800-0x0359ff:S, 0x035a00-0x035bff:S, 0x035c00-0x035dff:S, 0x035e00-0x035fff:S, 0x036000-0x0361ff:E, 0x036200-0x0363ff:E, 0x036400-0x0365ff:E, 0x036600-0x0367ff:E, 0x036800-0x0369ff:E, 0x036a00-0x036bff:E, 0x036c00-0x036dff:E, 0x036e00-0x036fff:E, 0x037000-0x0371ff:E, 0x037200-0x0373ff:E, 0x037400-0x0375ff:E, 0x037600-0x0377ff:E, 0x037800-0x0379ff:E, 0x037a00-0x037bff:E, 0x037c00-0x037dff:E, 0x037e00-0x037fff:E, 0x038000-0x0381ff:E, 0x038200-0x0383ff:E, 0x038400-0x0385ff:S, 0x038600-0x0387ff:S, 0x038800-0x0389ff:S, 0x038a00-0x038bff:S, 0x038c00-0x038dff:S, 0x038e00-0x038fff:E, 0x039000-0x0391ff:E, 0x039200-0x0393ff:E, 0x039400-0x0395ff:E, 0x039600-0x0397ff:E, 0x039800-0x0399ff:S, 0x039a00-0x039bff:S, 0x039c00-0x039dff:S, 0x039e00-0x039fff:S, 0x03a000-0x03a1ff:E, 0x03a200-0x03a3ff:E, 0x03a400-0x03a5ff:E, 0x03a600-0x03a7ff:E, 0x03a800-0x03a9ff:E, 0x03aa00-0x03abff:E, 0x03ac00-0x03adff:E, 0x03ae00-0x03afff:E, 0x03b000-0x03b1ff:S, 0x03b200-0x03b3ff:S, 0x03b400-0x03b5ff:S, 0x03b600-0x03b7ff:S, 0x03b800-0x03b9ff:S, 0x03ba00-0x03bbff:S, 0x03bc00-0x03bdff:S, 0x03be00-0x03bfff:S, 0x03c000-0x03c1ff:E, 0x03c200-0x03c3ff:E, 0x03c400-0x03c5ff:E, 0x03c600-0x03c7ff:E, 0x03c800-0x03c9ff:E, 0x03ca00-0x03cbff:E, 0x03cc00-0x03cdff:E, 0x03ce00-0x03cfff:E, 0x03d000-0x03d1ff:E, 0x03d200-0x03d3ff:E, 0x03d400-0x03d5ff:E, 0x03d600-0x03d7ff:E, 0x03d800-0x03d9ff:E, 0x03da00-0x03dbff:E, 0x03dc00-0x03ddff:E, 0x03de00-0x03dfff:E, 0x03e000-0x03e1ff:E, 0x03e200-0x03e3ff:E, 0x03e400-0x03e5ff:E, 0x03e600-0x03e7ff:E, 0x03e800-0x03e9ff:E, 0x03ea00-0x03ebff:E, 0x03ec00-0x03edff:E, 0x03ee00-0x03efff:E, 0x03f000-0x03f1ff:E, 0x03f200-0x03f3ff:E, 0x03f400-0x03f5ff:E, 0x03f600-0x03f7ff:E, 0x03f800-0x03f9ff:E, 0x03fa00-0x03fbff:E, 0x03fc00-0x03fdff:EW, 0x03fe00-0x03ffff:EWErase/write done.Verifying flash... VERIFIED. ? ? ? ? ? 		 	   		  

From stefan.tauner at student.tuwien.ac.at  Thu Dec 22 00:38:56 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 22 Dec 2011 00:38:56 +0100
Subject: [flashrom] satasii PCI0680 tested V29C51002T-90P write
In-Reply-To: <BLU159-W3138144C0D2FA612891E8AC0A50@phx.gbl>
References: <BLU159-W3138144C0D2FA612891E8AC0A50@phx.gbl>
Message-ID: <201112212339.pBLNd8KQ004932@mail2.student.tuwien.ac.at>

On Wed, 21 Dec 2011 21:12:48 +0000
"The Niz ." <the_niz at nurdspace.nl> wrote:

> 
> Hello list,
> This is my first one, so please just tell me if something is wrong/missing...Write is verified to be working correctly (I booted using the flashed chip)
> Chip markings:9928FV29C51002T-90P
> Programmer:Advance 29133 PATA controller with Silicon Image Sil06080CL144

hi there and thanks for your report.

the flashchip was already reported to be working in october:
http://www.flashrom.org/pipermail/flashrom/2011-October/008052.html
and is marked in the source as such since r1454. that's the "developer
version" advantage we were talking about on IRC ;)

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Thu Dec 22 00:42:14 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 22 Dec 2011 00:42:14 +0100
Subject: [flashrom] Detecting flash on P3B-F
In-Reply-To: <1324486779.2284.12.camel@i1720>
References: <1324486779.2284.12.camel@i1720>
Message-ID: <201112212342.pBLNgMTc007304@mail2.student.tuwien.ac.at>

On Wed, 21 Dec 2011 11:59:39 -0500
Herb Radford <herbr at istop.com> wrote:

> I have 2 of these boards and want to try coreboot on them.
> I have a Willem Programmer which does not have the capability to
> recognize/burn the Mosel V29C51002T device on the board.
> So I tried flashrom-0.9.4. Well to my dismay, the motherboard was
> detected as an "Intel PIIX4/4E/4M" but cannot detect the flash device.
> Searching the mail archives tells me that this motherboard has not been
> tested but "May still work". I'm sorry to tell you that it doesn't.
> I can try to help with fixes but I'm not yet clear on how the flashrom
> software is structured.
> Any ideas?

hi there.

that board is somewhat special as that it needs some i2c communication
to let us access the flash chip AFAICS.
there was a patch in the works about a year ago[1], but i doubt this
will be ready soonish, sorry. if you want to work on this please start
from that patch and discuss your plans with us or ask question here or
on IRC.

1: http://patchwork.coreboot.org/patch/2034/
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Thu Dec 22 00:53:00 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 22 Dec 2011 00:53:00 +0100
Subject: [flashrom] Detecting flash on P3B-F
In-Reply-To: <1324486779.2284.12.camel@i1720>
References: <1324486779.2284.12.camel@i1720>
Message-ID: <201112212353.pBLNr8Ql012803@mail2.student.tuwien.ac.at>

On Wed, 21 Dec 2011 11:59:39 -0500
Herb Radford <herbr at istop.com> wrote:

> I have a Willem Programmer which does not have the capability to
> recognize/burn the Mosel V29C51002T device on the board.

oh, and that chip is not yet added to flashrom. but the V29C51000*
versions are, which are very similar - just bigger and with a slightly
different layout. so this would be easy to add.
this is also a good start to get to know flashrom's source a bit, so
you could add it yourself. you want to look at flashchips.c in that
case and start by copying the V29C51000B and V29C51000T definitions.
hint: T and B stand for top and bottom respectively and they differ
from each other "just" by the block layout. this is useful for big and
little endian machines respectively.
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From flashrom at mkarcher.dialup.fu-berlin.de  Thu Dec 22 01:38:09 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Thu, 22 Dec 2011 01:38:09 +0100
Subject: [flashrom] [PATCH 1/1] Fix programmer-centric probe
Message-ID: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>

As reported by Stefan Tauner on IRC, the new programmer-centric logic
is broken by re-using occupied members of the flashes array when changing
to the next programmer. This fixes it

Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
---
 cli_classic.c |   15 +++++++++------
 1 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/cli_classic.c b/cli_classic.c
index 543b644..10ed0f4 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -451,14 +451,17 @@ int main(int argc, char *argv[])
 
 	for (j = 0; j < registered_programmer_count; j++) {
 		startchip = 0;
-		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
+		do {
 			startchip = probe_flash(&registered_programmers[j],
-						startchip, &flashes[i], 0);
-			if (startchip == -1)
-				break;
-			chipcount++;
-			startchip++;
+						startchip, 
+						&flashes[chipcount], 0);
+			if (startchip != -1)
+			{
+				chipcount++;
+				startchip++;
+			}
 		}
+		while( startchip != -1 && chipcount < ARRAY_SIZE(flashes) );
 	}
 
 	if (chipcount > 1) {
-- 
1.7.7.3



From stefan.tauner at student.tuwien.ac.at  Thu Dec 22 02:16:55 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 22 Dec 2011 02:16:55 +0100
Subject: [flashrom] [PATCH 1/1] Fix programmer-centric probe
In-Reply-To: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
References: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
Message-ID: <201112220117.pBM1H5VH011603@mail2.student.tuwien.ac.at>

On Thu, 22 Dec 2011 01:38:09 +0100
Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de> wrote:

> As reported by Stefan Tauner on IRC, the new programmer-centric logic
> is broken by re-using occupied members of the flashes array when changing
> to the next programmer. This fixes it
> 
> Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
> ---
>  cli_classic.c |   15 +++++++++------
>  1 files changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/cli_classic.c b/cli_classic.c
> index 543b644..10ed0f4 100644
> --- a/cli_classic.c
> +++ b/cli_classic.c
> @@ -451,14 +451,17 @@ int main(int argc, char *argv[])
>  
>  	for (j = 0; j < registered_programmer_count; j++) {
>  		startchip = 0;
> -		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
> +		do {
>  			startchip = probe_flash(&registered_programmers[j],
> -						startchip, &flashes[i], 0);
> -			if (startchip == -1)
> -				break;
> -			chipcount++;
> -			startchip++;
> +						startchip, 
^ white space at EOL
> +						&flashes[chipcount], 0);
> +			if (startchip != -1)
> +			{
^ should be in the same line as the "if"
> +				chipcount++;
> +				startchip++;
> +			}
>  		}
> +		while( startchip != -1 && chipcount < ARRAY_SIZE(flashes) );
^ spaces inside the while braces but not on the outside. wrong way
around afaics.
>  	}
>  
>  	if (chipcount > 1) {

the semantics look ok, but i dont get the change of the inner "if".
startchip is reset anyway, chipcount is not touched in either version.
why did you change it? see below for my version (a cheap ripoff of your
patch, of course).

i still hate the index tossed around in the probing process. in theory
the segregation between the caller of probe_flash and itself is
advantageous because the caller decides what to do on a chip match. but
in practice this has bitten us a few times, is awfully readable because
the important paths are spread over two pretty complicated functions and
does not buy us anything(! imho). allocating a few simple list elements
does not cost anything relative to the costs of probing the chips.

i would just return a null terminated single linked list and be happy.
or even save the pointer to the head of that list in struct
registered_programmer and just return success.
carldani: btw why is the "void *data" not in the common part of
registered_programmer (like buses_supported) but inside each of the 3
programmer types?

Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
and if need be:
Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 cli_classic.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/cli_classic.c b/cli_classic.c
index 543b644..c495714 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -451,14 +451,17 @@ int main(int argc, char *argv[])
 
 	for (j = 0; j < registered_programmer_count; j++) {
 		startchip = 0;
-		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
+		do {
 			startchip = probe_flash(&registered_programmers[j],
-						startchip, &flashes[i], 0);
+						startchip,
+						&flashes[chipcount], 0);
 			if (startchip == -1)
 				break;
+
 			chipcount++;
 			startchip++;
 		}
+		while(chipcount < ARRAY_SIZE(flashes));
 	}
 
 	if (chipcount > 1) {

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From flashrom at mkarcher.dialup.fu-berlin.de  Thu Dec 22 08:15:39 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Thu, 22 Dec 2011 08:15:39 +0100
Subject: [flashrom] [PATCH 1/1] Fix programmer-centric probe (patch v2)
In-Reply-To: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
References: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
Message-ID: <1324538139-14821-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>

As reported by Stefan Tauner on IRC, the new programmer-centric logic
is broken by re-using occupied members of the flashes array when changing
to the next programmer. This fixes it.

patch v2:
  prevent probing one chip per programmer even if the array is full. Using
  a do-while loop was a bad idea.

Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
---
 cli_classic.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/cli_classic.c b/cli_classic.c
index 543b644..6580f7f 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -451,11 +451,12 @@ int main(int argc, char *argv[])
 
 	for (j = 0; j < registered_programmer_count; j++) {
 		startchip = 0;
-		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
+		while( chipcount < ARRAY_SIZE(flashes) ) {
 			startchip = probe_flash(&registered_programmers[j],
-						startchip, &flashes[i], 0);
+						startchip, 
+						&flashes[chipcount], 0);
 			if (startchip == -1)
-				break;
+                        	break;
 			chipcount++;
 			startchip++;
 		}
-- 
1.7.7.3



From Michael.Karcher at fu-berlin.de  Thu Dec 22 08:28:08 2011
From: Michael.Karcher at fu-berlin.de (Michael Karcher)
Date: Thu, 22 Dec 2011 08:28:08 +0100
Subject: [flashrom] [PATCH 1/1] Fix programmer-centric probe (patch v2)
In-Reply-To: <1324538139-14821-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
References: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
	<1324538139-14821-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
Message-ID: <1324538888.11179.3.camel@localhost>

Am Donnerstag, den 22.12.2011, 08:15 +0100 schrieb Michael Karcher:
> Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
self-review :)

> +		while( chipcount < ARRAY_SIZE(flashes) ) {
wrong spacing convention, as Stefan Tauner already pointed out in v1 of
the patch. Fixed locally to
                while (chipcount < ARRAY_SIZE(flashes)) {

>  			startchip = probe_flash(&registered_programmers[j],
> -						startchip, &flashes[i], 0);
> +						startchip, 
> +						&flashes[chipcount], 0);
>  			if (startchip == -1)
> -				break;
> +                        	break;
spaces before tabs. The whitespace change of this line is unintentional.
Fixed locally. The end result is a small and clean patch, replacing only
the bad for loop and using chipcount instead of the local counter i as
index for flashes.

Regards,
  Michael Karcher
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From marko.preuss at telecolumbus.net  Thu Dec 22 21:36:52 2011
From: marko.preuss at telecolumbus.net (Marko Preuss)
Date: Thu, 22 Dec 2011 21:36:52 +0100
Subject: [flashrom] Update
Message-ID: <1324586212.2498.3.camel@marko-desktop>

Hallo

This is a Board 

ECS 
GF7100 PVT-M3

BIOS from INC is suportet

See here for Ubuntuusers Coreboot
http://wiki.ubuntuusers.de/Baustelle/BIOS_aktualisieren

Best Regards



marko at marko-desktop:~$ flashrom -V
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with
libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at
http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2498M loops
per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 999 us,
10000 myus = 10003 us, 4 myus = 4 us, OK.
Initializing internal programmer
ERROR: Could not get I/O privileges (Operation not permitted).
You need to be root.
marko at marko-desktop:~$ sudo flashrom -V
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with
libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at
http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2499M loops
per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1000 us,
10000 myus = 10004 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "ECS"
DMI string system-product-name: "GF7100/7050PVT-M3"
DMI string system-version: "1.0"
DMI string baseboard-manufacturer: "ECS"
DMI string baseboard-product-name: "GF7100/7050PVT-M3"
DMI string baseboard-version: "1.0"
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP73" with PCI ID 10de:07d7. 
This chipset is marked as untested. If you are using an up-to-date
version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Flash bus type is SPI
SPI on this chipset is WIP. Please report any success or failure by
mailing us the verbose output to flashrom at flashrom.org, thanks!
Found SMBus device 10de:07d8 at 00:03:1
MCP SPI BAR is at 0xfec80000
Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544.
SPI control is 0xc012, req=0, gnt=0
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support
for your
chipset. Thanks.
OK.
This chipset supports the following protocols: SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014marko at marko-desktop:~$ flashrom -V
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with
libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at
http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2498M loops
per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 999 us,
10000 myus = 10003 us, 4 myus = 4 us, OK.
Initializing internal programmer
ERROR: Could not get I/O privileges (Operation not permitted).
You need to be root.
marko at marko-desktop:~$ sudo flashrom -V
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (i686), built with
libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at
http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2499M loops
per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 1000 us,
10000 myus = 10004 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "ECS"
DMI string system-product-name: "GF7100/7050PVT-M3"
DMI string system-version: "1.0"
DMI string baseboard-manufacturer: "ECS"
DMI string baseboard-product-name: "GF7100/7050PVT-M3"
DMI string baseboard-version: "1.0"
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP73" with PCI ID 10de:07d7. 
This chipset is marked as untested. If you are using an up-to-date
version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Flash bus type is SPI
SPI on this chipset is WIP. Please report any success or failure by
mailing us the verbose output to flashrom at flashrom.org, thanks!
Found SMBus device 10de:07d8 at 00:03:1
MCP SPI BAR is at 0xfec80000
Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544.
SPI control is 0xc012, req=0, gnt=0
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support
for your
chipset. Thanks.
OK.
This chipset supports the following protocols: SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2
0x13
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Chip status register is 00
Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address
0xfff00000.
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (RDID), 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xef, id2 0x13
No operations were specified.
marko at marko-desktop:~$ 

Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2
0x13
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2
0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x3014
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Chip status register is 00
Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address
0xfff00000.
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x3014
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x3014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (RDID), 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xef, id2 0x13
No operations were specified.
marko at marko-desktop:~$ 




From flashrom at mkarcher.dialup.fu-berlin.de  Thu Dec 22 23:54:56 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Thu, 22 Dec 2011 23:54:56 +0100
Subject: [flashrom] Success report for MCP73
Message-ID: <1324594496.11179.23.camel@localhost>

Hello fellow developers,

attached is a private mail I received that contains a successful write
on a board with a MCP73 south bridge. The successful erase report by the
same author already went to the flashrom list. I guess, we can mark
MCP73 as tested now.

Regards,
  Michael Karcher
-------------- next part --------------
An embedded message was scrubbed...
From: Marko Preuss <marko.preuss at telecolumbus.net>
Subject: BIOS Update Chip getauscht
Date: Thu, 22 Dec 2011 21:17:42 +0100
Size: 4402
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20111222/a18f1293/attachment.mht>

From c-d.hailfinger.devel.2006 at gmx.net  Fri Dec 23 00:24:25 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 23 Dec 2011 00:24:25 +0100
Subject: [flashrom] [PATCH 1/1] Fix programmer-centric probe (patch v2)
In-Reply-To: <1324538888.11179.3.camel@localhost>
References: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
	<1324538139-14821-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
	<1324538888.11179.3.camel@localhost>
Message-ID: <4EF3BC29.2030709@gmx.net>

Am 22.12.2011 08:28 schrieb Michael Karcher:
> Am Donnerstag, den 22.12.2011, 08:15 +0100 schrieb Michael Karcher:
>> Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
>>
>> +                while (chipcount < ARRAY_SIZE(flashes)) {
>>  			startchip = probe_flash(&registered_programmers[j],
>> -						startchip, &flashes[i], 0);
>> +						startchip, 
>> +						&flashes[chipcount], 0);
>>  			if (startchip == -1)

Looks good. Thanks for fixing up after my megapatch.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Fri Dec 23 00:25:00 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 23 Dec 2011 00:25:00 +0100
Subject: [flashrom] Success report for MCP73
In-Reply-To: <1324594496.11179.23.camel@localhost>
References: <1324594496.11179.23.camel@localhost>
Message-ID: <201112222325.pBMNPAOU004392@mail2.student.tuwien.ac.at>

On Thu, 22 Dec 2011 23:54:56 +0100
Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de> wrote:

> Hello fellow developers,
> 
> attached is a private mail I received that contains a successful write
> on a board with a MCP73 south bridge. The successful erase report by the
> same author already went to the flashrom list. I guess, we can mark
> MCP73 as tested now.

thanks!
i have marked the MCP73 (:07d7) as tested and added the board to our
list of supported boards.
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Fri Dec 23 00:27:03 2011
From: svn at flashrom.org (repository service)
Date: Fri, 23 Dec 2011 00:27:03 +0100
Subject: [flashrom] [commit] r1479 - trunk
Message-ID: <E1Rds2R-0000Le-JG@ra.coresystems.de>

Author: mkarcher
Date: Fri Dec 23 00:27:03 2011
New Revision: 1479
URL: http://flashrom.org/trac/flashrom/changeset/1479

Log:
Fix programmer-centric probe (patch v2)

As reported by Stefan Tauner on IRC, the new programmer-centric logic
is broken by re-using occupied members of the flashes array when changing
to the next programmer. This fixes it.

patch v2:
  prevent probing one chip per programmer even if the array is full. Using
  a do-while loop was a bad idea.

Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/cli_classic.c

Modified: trunk/cli_classic.c
==============================================================================
--- trunk/cli_classic.c	Tue Dec 20 03:08:14 2011	(r1478)
+++ trunk/cli_classic.c	Fri Dec 23 00:27:03 2011	(r1479)
@@ -451,9 +451,10 @@
 
 	for (j = 0; j < registered_programmer_count; j++) {
 		startchip = 0;
-		for (i = 0; i < ARRAY_SIZE(flashes); i++) {
+		while (chipcount < ARRAY_SIZE(flashes)) {
 			startchip = probe_flash(&registered_programmers[j],
-						startchip, &flashes[i], 0);
+						startchip, 
+						&flashes[chipcount], 0);
 			if (startchip == -1)
 				break;
 			chipcount++;


From flashrom at mkarcher.dialup.fu-berlin.de  Fri Dec 23 00:28:14 2011
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Fri, 23 Dec 2011 00:28:14 +0100
Subject: [flashrom] [PATCH 1/1] Fix programmer-centric probe (patch v2)
In-Reply-To: <4EF3BC29.2030709@gmx.net>
References: <1324514289-13728-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
	<1324538139-14821-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
	<1324538888.11179.3.camel@localhost> <4EF3BC29.2030709@gmx.net>
Message-ID: <1324596494.11179.25.camel@localhost>

Am Freitag, den 23.12.2011, 00:24 +0100 schrieb Carl-Daniel Hailfinger:
> Am 22.12.2011 08:28 schrieb Michael Karcher:
> > Am Donnerstag, den 22.12.2011, 08:15 +0100 schrieb Michael Karcher:
> >> Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
> >>
> >> +                while (chipcount < ARRAY_SIZE(flashes)) {
> >>  			startchip = probe_flash(&registered_programmers[j],
> >> -						startchip, &flashes[i], 0);
> >> +						startchip, 
> >> +						&flashes[chipcount], 0);
> >>  			if (startchip == -1)
> 
> Looks good. Thanks for fixing up after my megapatch.
> 
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
committed in r1479.
Thanks for the ack.

Regards,
  Michael Karcher



From larkin.robertl at gmail.com  Fri Dec 23 00:39:05 2011
From: larkin.robertl at gmail.com (Robert Larkin)
Date: Thu, 22 Dec 2011 17:39:05 -0600
Subject: [flashrom] SE7520JR22D
Message-ID: <CAPBUVWmJeytUHqvn6K0_Yh+E66jKLXf9fpOFiKK_829POTDyCw@mail.gmail.com>

flashrom -V
http://paste.flashrom.org/view.php?id=981

lspci -nnvvvxxx
http://paste.flashrom.org/view.php?id=982

superiotool -deV
http://paste.flashrom.org/view.php?id=983


From svn at flashrom.org  Sat Dec 24 01:00:32 2011
From: svn at flashrom.org (repository service)
Date: Sat, 24 Dec 2011 01:00:32 +0100
Subject: [flashrom] [commit] r1480 - in trunk: . util/ich_descriptors_tool
Message-ID: <E1ReF2O-0001o1-Pv@ra.coresystems.de>

Author: stefanct
Date: Sat Dec 24 01:00:32 2011
New Revision: 1480
URL: http://flashrom.org/trac/flashrom/changeset/1480

Log:
Add ich_descriptor_tool to decode all flash descriptors stored in a flash dump file

This patch adds an external utility that shares most of the existing descriptor
decoding source code. Additionally to what is available via FDOC/FDOD this
allows to access:
 - the softstraps which are used to configure the chipset by flash content
   without the need for BIOS routines. on ICH8 it is possible to read those
   with FDOC/FDOC too, but this was removed in later chipsets.
 - the ME VSCC (Vendor Specific Component Capabilities) table. simply put,
   this is an SPI chip database used to figure out the flash's capabilities.
 - the MAC address stored in the GbE image.

Intel thinks this information should be confidential for ICH9 and up, but
references some tidbits in their public documentation.
This patch includes the human-readable information for ICH8, Ibex Peak
(5 series) and Cougar Point (6 series); the latter two were obtained from
leaked "SPI Flash Programming Guides" found by google. Data regarding ICH9
and 10 is unknown to us yet. It can probably found in:
"Intel? ICH7, ICH8, ICH9 and ICH10 ? SPI Family Flash Programming Guide"
Information regarding the upcoming Panther Point chipset is also not included.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Matthias Wenzel <bios at mazzoo.de>

Added:
   trunk/util/ich_descriptors_tool/
   trunk/util/ich_descriptors_tool/Makefile   (contents, props changed)
   trunk/util/ich_descriptors_tool/TODO
   trunk/util/ich_descriptors_tool/ich_descriptors_tool.c   (contents, props changed)
Modified:
   trunk/ich_descriptors.c
   trunk/ich_descriptors.h
   trunk/programmer.h

Modified: trunk/ich_descriptors.c
==============================================================================
--- trunk/ich_descriptors.c	Fri Dec 23 00:27:03 2011	(r1479)
+++ trunk/ich_descriptors.c	Sat Dec 24 01:00:32 2011	(r1480)
@@ -22,9 +22,29 @@
 #if defined(__i386__) || defined(__x86_64__)
 
 #include "ich_descriptors.h"
+
+#ifdef ICH_DESCRIPTORS_FROM_DUMP
+
+#include <stdio.h>
+#define print(t, ...) printf(__VA_ARGS__)
+#define DESCRIPTOR_MODE_SIGNATURE 0x0ff0a55a
+/* The upper map is located in the word before the 256B-long OEM section at the
+ * end of the 4kB-long flash descriptor.
+ */
+#define UPPER_MAP_OFFSET (4096 - 256 - 4)
+#define getVTBA(flumap)	(((flumap)->FLUMAP1 << 4) & 0x00000ff0)
+
+#else /* ICH_DESCRIPTORS_FROM_DUMP */
+
 #include "flash.h" /* for msg_* */
 #include "programmer.h"
 
+#endif /* ICH_DESCRIPTORS_FROM_DUMP */
+
+#ifndef min
+#define min(a, b) (a < b) ? a : b
+#endif
+
 void prettyprint_ich_reg_vscc(uint32_t reg_val, int verbosity)
 {
 	print(verbosity, "BES=0x%x, ",	(reg_val & VSCC_BES)  >> VSCC_BES_OFF);
@@ -47,6 +67,12 @@
 	prettyprint_ich_descriptor_component(desc);
 	prettyprint_ich_descriptor_region(desc);
 	prettyprint_ich_descriptor_master(&desc->master);
+#ifdef ICH_DESCRIPTORS_FROM_DUMP
+	if (cs >= CHIPSET_ICH8) {
+		prettyprint_ich_descriptor_upper_map(&desc->upper);
+		prettyprint_ich_descriptor_straps(cs, desc);
+	}
+#endif /* ICH_DESCRIPTORS_FROM_DUMP */
 }
 
 void prettyprint_ich_descriptor_content(const struct ich_desc_content *cont)
@@ -213,6 +239,506 @@
 	msg_pdbg2("\n");
 }
 
+#ifdef ICH_DESCRIPTORS_FROM_DUMP
+
+void prettyprint_ich_descriptor_straps_ich8(const struct ich_descriptors *desc)
+{
+	static const char * const str_GPIO12[4] = {
+		"GPIO12",
+		"LAN PHY Power Control Function (Native Output)",
+		"GLAN_DOCK# (Native Input)",
+		"invalid configuration",
+	};
+
+	msg_pdbg2("--- MCH details ---\n");
+	msg_pdbg2("ME B is %sabled.\n", desc->north.ich8.MDB ? "dis" : "en");
+	msg_pdbg2("\n");
+
+	msg_pdbg2("--- ICH details ---\n");
+	msg_pdbg2("ME SMBus Address 1: 0x%02x\n", desc->south.ich8.ASD);
+	msg_pdbg2("ME SMBus Address 2: 0x%02x\n", desc->south.ich8.ASD2);
+	msg_pdbg2("ME SMBus Controller is connected to the %s.\n",
+		  desc->south.ich8.MESM2SEL ? "SMLink pins" : "SMBus pins");
+	msg_pdbg2("SPI CS1 is used for %s.\n",
+		  desc->south.ich8.SPICS1_LANPHYPC_SEL ?
+		  "LAN PHY Power Control Function" :
+		  "SPI Chip Select");
+	msg_pdbg2("GPIO12 is used as %s.\n",
+		  str_GPIO12[desc->south.ich8.GPIO12_SEL]);
+	msg_pdbg2("PCIe Port 6 is used for %s.\n",
+	     desc->south.ich8.GLAN_PCIE_SEL ? "integrated LAN" : "PCI Express");
+	msg_pdbg2("%sn BMC Mode: "
+		  "Intel AMT SMBus Controller 1 is connected to %s.\n",
+		  desc->south.ich8.BMCMODE ? "I" : "Not i",
+		  desc->south.ich8.BMCMODE ? "SMLink" : "SMBus");
+	msg_pdbg2("TCO is in %s Mode.\n",
+	       desc->south.ich8.TCOMODE ? "Advanced TCO" : "Legacy/Compatible");
+	msg_pdbg2("ME A is %sabled.\n",
+		  desc->south.ich8.ME_DISABLE ? "dis" : "en");
+	msg_pdbg2("\n");
+}
+
+static void prettyprint_ich_descriptor_straps_56_pciecs(uint8_t conf, uint8_t off)
+{
+	msg_pdbg2("PCI Express Port Configuration Strap %d: ", off+1);
+
+	off *= 4;
+	switch(conf){
+	case 0:
+		msg_pdbg2("4x1 Ports %d-%d (x1)", 1+off, 4+off);
+		break;
+	case 1:
+		msg_pdbg2("1x2, 2x1 Port %d (x2), Port %d (disabled), "
+			  "Ports %d, %d (x1)", 1+off, 2+off, 3+off, 4+off);
+		break;
+	case 2:
+		msg_pdbg2("2x2 Port %d (x2), Port %d (x2), Ports "
+			  "%d, %d (disabled)", 1+off, 3+off, 2+off, 4+off);
+		break;
+	case 3:
+		msg_pdbg2("1x4 Port %d (x4), Ports %d-%d (disabled)",
+			  1+off, 2+off, 4+off);
+		break;
+	}
+	msg_pdbg2("\n");
+}
+
+void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_strap *s)
+{
+	/* PCHSTRP4 */
+	msg_pdbg2("Intel PHY is %s.\n",
+		  (s->ibex.PHYCON == 2) ? "connected" :
+			  (s->ibex.PHYCON == 0) ? "disconnected" : "reserved");
+	msg_pdbg2("GbE MAC SMBus address is %sabled.\n",
+		  s->ibex.GBEMAC_SMBUS_ADDR_EN ? "en" : "dis");
+	msg_pdbg2("GbE MAC SMBus address: 0x%02x\n",
+		  s->ibex.GBEMAC_SMBUS_ADDR);
+	msg_pdbg2("GbE PHY SMBus address: 0x%02x\n",
+		  s->ibex.GBEPHY_SMBUS_ADDR);
+
+	/* PCHSTRP5 */
+	/* PCHSTRP6 */
+	/* PCHSTRP7 */
+	msg_pdbg2("Intel ME SMBus Subsystem Vendor ID: 0x%04x\n",
+		  s->ibex.MESMA2UDID_VENDOR);
+	msg_pdbg2("Intel ME SMBus Subsystem Device ID: 0x%04x\n",
+		  s->ibex.MESMA2UDID_VENDOR);
+
+	/* PCHSTRP8 */
+}
+
+void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_strap *s)
+{
+	/* PCHSTRP11 */
+	msg_pdbg2("SMLink1 GP Address is %sabled.\n",
+		  s->ibex.SML1GPAEN ? "en" : "dis");
+	msg_pdbg2("SMLink1 controller General Purpose Target address: 0x%02x\n",
+		  s->ibex.SML1GPA);
+	msg_pdbg2("SMLink1 I2C Target address is %sabled.\n",
+		  s->ibex.SML1I2CAEN ? "en" : "dis");
+	msg_pdbg2("SMLink1 I2C Target address: 0x%02x\n",
+		  s->ibex.SML1I2CA);
+
+	/* PCHSTRP12 */
+	/* PCHSTRP13 */
+}
+
+void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s)
+{
+	static const uint8_t const dec_t209min[4] = {
+		100,
+		50,
+		5,
+		1
+	};
+
+	msg_pdbg2("--- PCH ---\n");
+
+	/* PCHSTRP0 */
+	msg_pdbg2("Chipset configuration Softstrap 2: %d\n", s->ibex.cs_ss2);
+	msg_pdbg2("Intel ME SMBus Select is %sabled.\n",
+		  s->ibex.SMB_EN ? "en" : "dis");
+	msg_pdbg2("SMLink0 segment is %sabled.\n",
+		  s->ibex.SML0_EN ? "en" : "dis");
+	msg_pdbg2("SMLink1 segment is %sabled.\n",
+		  s->ibex.SML1_EN ? "en" : "dis");
+	msg_pdbg2("SMLink1 Frequency: %s\n",
+		  (s->ibex.SML1FRQ == 1) ? "100 kHz" : "reserved");
+	msg_pdbg2("Intel ME SMBus Frequency: %s\n",
+		  (s->ibex.SMB0FRQ == 1) ? "100 kHz" : "reserved");
+	msg_pdbg2("SMLink0 Frequency: %s\n",
+		  (s->ibex.SML0FRQ == 1) ? "100 kHz" : "reserved");
+	msg_pdbg2("GPIO12 is used as %s.\n", s->ibex.LANPHYPC_GP12_SEL ?
+		  "LAN_PHY_PWR_CTRL" : "general purpose output");
+	msg_pdbg2("Chipset configuration Softstrap 1: %d\n", s->ibex.cs_ss1);
+	msg_pdbg2("DMI RequesterID Checks are %sabled.\n",
+		  s->ibex.DMI_REQID_DIS ? "en" : "dis");
+	msg_pdbg2("BIOS Boot-Block size (BBBS): %d kB.\n",
+		  1 << (6 + s->ibex.BBBS));
+
+	/* PCHSTRP1 */
+	msg_pdbg2("Chipset configuration Softstrap 3: 0x%x\n", s->ibex.cs_ss3);
+
+	/* PCHSTRP2 */
+	msg_pdbg2("ME SMBus ASD address is %sabled.\n",
+		  s->ibex.MESMASDEN ? "en" : "dis");
+	msg_pdbg2("ME SMBus Controller ASD Target address: 0x%02x\n",
+		  s->ibex.MESMASDA);
+	msg_pdbg2("ME SMBus I2C address is %sabled.\n",
+		  s->ibex.MESMI2CEN ? "en" : "dis");
+	msg_pdbg2("ME SMBus I2C target address: 0x%02x\n",
+		  s->ibex.MESMI2CA);
+
+	/* PCHSTRP3 */
+	prettyprint_ich_descriptor_pchstraps45678_56(s);
+	/* PCHSTRP9 */
+	prettyprint_ich_descriptor_straps_56_pciecs(s->ibex.PCIEPCS1, 0);
+	prettyprint_ich_descriptor_straps_56_pciecs(s->ibex.PCIEPCS1, 1);
+	msg_pdbg2("PCIe Lane Reversal 1: PCIe Lanes 0-3 are %sreserved.\n",
+		  s->ibex.PCIELR1 ? "" : "not ");
+	msg_pdbg2("PCIe Lane Reversal 2: PCIe Lanes 4-7 are %sreserved.\n",
+		  s->ibex.PCIELR2 ? "" : "not ");
+	msg_pdbg2("DMI Lane Reversal: DMI Lanes 0-3 are %sreserved.\n",
+		  s->ibex.DMILR ? "" : "not ");
+	msg_pdbg2("Default PHY PCIe Port is %d.\n", s->ibex.PHY_PCIEPORTSEL+1);
+	msg_pdbg2("Integrated MAC/PHY communication over PCIe is %sabled.\n",
+		  s->ibex.PHY_PCIE_EN ? "en" : "dis");
+
+	/* PCHSTRP10 */
+	msg_pdbg2("Management Engine will boot from %sflash.\n",
+		  s->ibex.ME_BOOT_FLASH ? "" : "ROM, then ");
+	msg_pdbg2("Chipset configuration Softstrap 5: %d\n", s->ibex.cs_ss5);
+	msg_pdbg2("Virtualization Engine Enable 1 is %sabled.\n",
+		  s->ibex.VE_EN ? "en" : "dis");
+	msg_pdbg2("ME Memory-attached Debug Display Device is %sabled.\n",
+		  s->ibex.MMDDE ? "en" : "dis");
+	msg_pdbg2("ME Memory-attached Debug Display Device address: 0x%02x\n",
+		  s->ibex.MMADDR);
+	msg_pdbg2("Chipset configuration Softstrap 7: %d\n", s->ibex.cs_ss7);
+	msg_pdbg2("Integrated Clocking Configuration is %d.\n",
+		  (s->ibex.ICC_SEL == 7) ? 0 : s->ibex.ICC_SEL);
+	msg_pdbg2("PCH Signal CL_RST1# does %sassert when Intel ME performs a "
+		  "reset.\n", s->ibex.MER_CL1 ? "" : "not ");
+
+	prettyprint_ich_descriptor_pchstraps111213_56(s);
+
+	/* PCHSTRP14 */
+	msg_pdbg2("Virtualization Engine Enable 2 is %sabled.\n",
+		  s->ibex.VE_EN2 ? "en" : "dis");
+	msg_pdbg2("Virtualization Engine will boot from %sflash.\n",
+		  s->ibex.VE_BOOT_FLASH ? "" : "ROM, then ");
+	msg_pdbg2("Braidwood SSD functionality is %sabled.\n",
+		  s->ibex.BW_SSD ? "en" : "dis");
+	msg_pdbg2("Braidwood NVMHCI functionality is %sabled.\n",
+		  s->ibex.NVMHCI_EN ? "en" : "dis");
+
+	/* PCHSTRP15 */
+	msg_pdbg2("Chipset configuration Softstrap 6: %d\n", s->ibex.cs_ss6);
+	msg_pdbg2("Integrated wired LAN Solution is %sabled.\n",
+		  s->ibex.IWL_EN ? "en" : "dis");
+	msg_pdbg2("t209 min Timing: %d ms\n",
+		  dec_t209min[s->ibex.t209min]);
+	msg_pdbg2("\n");
+}
+
+void prettyprint_ich_descriptor_straps_cougar(const struct ich_desc_south_strap *s)
+{
+	msg_pdbg2("--- PCH ---\n");
+
+	/* PCHSTRP0 */
+	msg_pdbg2("Chipset configuration Softstrap 1: %d\n", s->cougar.cs_ss1);
+	msg_pdbg2("Intel ME SMBus Select is %sabled.\n",
+		  s->ibex.SMB_EN ? "en" : "dis");
+	msg_pdbg2("SMLink0 segment is %sabled.\n",
+		  s->ibex.SML0_EN ? "en" : "dis");
+	msg_pdbg2("SMLink1 segment is %sabled.\n",
+		  s->ibex.SML1_EN ? "en" : "dis");
+	msg_pdbg2("SMLink1 Frequency: %s\n",
+		  (s->ibex.SML1FRQ == 1) ? "100 kHz" : "reserved");
+	msg_pdbg2("Intel ME SMBus Frequency: %s\n",
+		  (s->ibex.SMB0FRQ == 1) ? "100 kHz" : "reserved");
+	msg_pdbg2("SMLink0 Frequency: %s\n",
+		  (s->ibex.SML0FRQ == 1) ? "100 kHz" : "reserved");
+	msg_pdbg2("GPIO12 is used as %s.\n", s->ibex.LANPHYPC_GP12_SEL ?
+		  "LAN_PHY_PWR_CTRL" : "general purpose output");
+	msg_pdbg2("LinkSec is %sabled.\n",
+		  s->cougar.LINKSEC_DIS ? "en" : "dis");
+	msg_pdbg2("DMI RequesterID Checks are %sabled.\n",
+		  s->ibex.DMI_REQID_DIS ? "en" : "dis");
+	msg_pdbg2("BIOS Boot-Block size (BBBS): %d kB.\n",
+		  1 << (6 + s->ibex.BBBS));
+
+	/* PCHSTRP1 */
+	msg_pdbg2("Chipset configuration Softstrap 3: 0x%x\n", s->ibex.cs_ss3);
+	msg_pdbg2("Chipset configuration Softstrap 2: 0x%x\n", s->ibex.cs_ss2);
+
+	/* PCHSTRP2 */
+	msg_pdbg2("ME SMBus ASD address is %sabled.\n",
+		  s->ibex.MESMASDEN ? "en" : "dis");
+	msg_pdbg2("ME SMBus Controller ASD Target address: 0x%02x\n",
+		  s->ibex.MESMASDA);
+	msg_pdbg2("ME SMBus MCTP Address is %sabled.\n",
+		  s->cougar.MESMMCTPAEN ? "en" : "dis");
+	msg_pdbg2("ME SMBus MCTP target address: 0x%02x\n",
+		  s->cougar.MESMMCTPA);
+	msg_pdbg2("ME SMBus I2C address is %sabled.\n",
+		  s->ibex.MESMI2CEN ? "en" : "dis");
+	msg_pdbg2("ME SMBus I2C target address: 0x%02x\n",
+		  s->ibex.MESMI2CA);
+
+	/* PCHSTRP3 */
+	prettyprint_ich_descriptor_pchstraps45678_56(s);
+	/* PCHSTRP9 */
+	prettyprint_ich_descriptor_straps_56_pciecs(s->ibex.PCIEPCS1, 0);
+	prettyprint_ich_descriptor_straps_56_pciecs(s->ibex.PCIEPCS1, 1);
+	msg_pdbg2("PCIe Lane Reversal 1: PCIe Lanes 0-3 are %sreserved.\n",
+		  s->ibex.PCIELR1 ? "" : "not ");
+	msg_pdbg2("PCIe Lane Reversal 2: PCIe Lanes 4-7 are %sreserved.\n",
+		  s->ibex.PCIELR2 ? "" : "not ");
+	msg_pdbg2("DMI Lane Reversal: DMI Lanes 0-3 are %sreserved.\n",
+		  s->ibex.DMILR ? "" : "not ");
+	msg_pdbg2("ME Debug status writes over SMBUS are %sabled.\n",
+		  s->cougar.MDSMBE_EN ? "en" : "dis");
+	msg_pdbg2("ME Debug SMBus Emergency Mode address: 0x%02x (raw)\n",
+		  s->cougar.MDSMBE_ADD);
+	msg_pdbg2("Default PHY PCIe Port is %d.\n", s->ibex.PHY_PCIEPORTSEL+1);
+	msg_pdbg2("Integrated MAC/PHY communication over PCIe is %sabled.\n",
+		  s->ibex.PHY_PCIE_EN ? "en" : "dis");
+	msg_pdbg2("PCIe ports Subtractive Decode Agent is %sabled.\n",
+		  s->cougar.SUB_DECODE_EN ? "en" : "dis");
+	msg_pdbg2("GPIO74 is used as %s.\n", s->cougar.PCHHOT_SML1ALERT_SEL ?
+		  "PCHHOT#" : "SML1ALERT#");
+
+	/* PCHSTRP10 */
+	msg_pdbg2("Management Engine will boot from %sflash.\n",
+		  s->ibex.ME_BOOT_FLASH ? "" : "ROM, then ");
+
+	msg_pdbg2("ME Debug SMBus Emergency Mode is %sabled.\n",
+		  s->cougar.MDSMBE_EN ? "en" : "dis");
+	msg_pdbg2("ME Debug SMBus Emergency Mode Address: 0x%02x\n",
+		  s->cougar.MDSMBE_ADD);
+
+	msg_pdbg2("Integrated Clocking Configuration used: %d\n",
+		  s->cougar.ICC_SEL);
+	msg_pdbg2("PCH Signal CL_RST1# does %sassert when Intel ME performs a "
+		  "reset.\n", s->ibex.MER_CL1 ? "" : "not ");
+	msg_pdbg2("ICC Profile is selected by %s.\n",
+		  s->cougar.ICC_PRO_SEL ? "Softstraps" : "BIOS");
+	msg_pdbg2("Deep SX is %ssupported on the platform.\n",
+		  s->cougar.Deep_SX_EN ? "not " : "");
+	msg_pdbg2("ME Debug LAN Emergency Mode is %sabled.\n",
+		  s->cougar.ME_DBG_LAN ? "en" : "dis");
+
+	prettyprint_ich_descriptor_pchstraps111213_56(s);
+
+	/* PCHSTRP14 */
+	/* PCHSTRP15 */
+	msg_pdbg2("Chipset configuration Softstrap 6: %d\n", s->cougar.cs_ss6);
+	msg_pdbg2("Integrated wired LAN is %sabled.\n",
+		  s->cougar.IWL_EN ? "en" : "dis");
+	msg_pdbg2("Chipset configuration Softstrap 5: %d\n", s->cougar.cs_ss5);
+	msg_pdbg2("SMLink1 provides temperature from %s.\n",
+		  s->cougar.SMLINK1_THERM_SEL ?
+					 "PCH only" : "the CPU, PCH and DIMMs");
+	msg_pdbg2("GPIO29 is used as %s.\n", s->cougar.SLP_LAN_GP29_SEL ?
+		  "general purpose output" : "SLP_LAN#");
+
+	/* PCHSTRP16 */
+	/* PCHSTRP17 */
+	msg_pdbg2("Integrated Clock: %s Clock Mode\n",
+		  s->cougar.ICML ? "Buffered Through" : "Full Integrated");
+	msg_pdbg2("\n");
+}
+
+void prettyprint_ich_descriptor_straps(enum ich_chipset cs, const struct ich_descriptors *desc)
+{
+	unsigned int i, max;
+	msg_pdbg2("=== Softstraps ===\n");
+
+	if (sizeof(desc->north.STRPs) / 4 + 1 < desc->content.MSL) {
+		max = sizeof(desc->north.STRPs) / 4 + 1;
+		msg_pdbg2("MSL (%u) is greater than the current maximum of %u "
+			  "entries.\n", desc->content.MSL, max + 1);
+		msg_pdbg2("Only the first %u entries will be printed.\n", max);
+	} else
+		max = desc->content.MSL;
+
+	msg_pdbg2("--- North/MCH/PROC (%d entries) ---\n", max);
+	for (i = 0; i < max; i++)
+		msg_pdbg2("STRP%-2d = 0x%08x\n", i, desc->north.STRPs[i]);
+	msg_pdbg2("\n");
+
+	if (sizeof(desc->south.STRPs) / 4 < desc->content.ISL) {
+		max = sizeof(desc->south.STRPs) / 4;
+		msg_pdbg2("ISL (%u) is greater than the current maximum of %u "
+			  "entries.\n", desc->content.ISL, max);
+		msg_pdbg2("Only the first %u entries will be printed.\n", max);
+	} else
+		max = desc->content.ISL;
+
+	msg_pdbg2("--- South/ICH/PCH (%d entries) ---\n", max);
+	for (i = 0; i < max; i++)
+		msg_pdbg2("STRP%-2d = 0x%08x\n", i, desc->south.STRPs[i]);
+	msg_pdbg2("\n");
+
+	switch (cs) {
+	case CHIPSET_ICH8:
+		if (sizeof(desc->north.ich8) / 4 != desc->content.MSL)
+			msg_pdbg2("Detailed North/MCH/PROC information is "
+				  "probably not reliable, printing anyway.\n");
+		if (sizeof(desc->south.ich8) / 4 != desc->content.ISL)
+			msg_pdbg2("Detailed South/ICH/PCH information is "
+				  "probably not reliable, printing anyway.\n");
+		prettyprint_ich_descriptor_straps_ich8(desc);
+		break;
+	case CHIPSET_5_SERIES_IBEX_PEAK:
+		/* PCH straps only. PROCSTRPs are unknown. */
+		if (sizeof(desc->south.ibex) / 4 != desc->content.ISL)
+			msg_pdbg2("Detailed South/ICH/PCH information is "
+				  "probably not reliable, printing anyway.\n");
+		prettyprint_ich_descriptor_straps_ibex(&desc->south);
+		break;
+	case CHIPSET_6_SERIES_COUGAR_POINT:
+		/* PCH straps only. PROCSTRP0 is "reserved". */
+		if (sizeof(desc->south.cougar) / 4 != desc->content.ISL)
+			msg_pdbg2("Detailed South/ICH/PCH information is "
+				  "probably not reliable, printing anyway.\n");
+		prettyprint_ich_descriptor_straps_cougar(&desc->south);
+		break;
+	case CHIPSET_ICH_UNKNOWN:
+		break;
+	default:
+		msg_pdbg2("The meaning of the descriptor straps are unknown "
+			  "yet.\n\n");
+		break;
+	}
+}
+
+void prettyprint_rdid(uint32_t reg_val)
+{
+	uint8_t mid = reg_val & 0xFF;
+	uint16_t did = ((reg_val >> 16) & 0xFF) | (reg_val & 0xFF00);
+	msg_pdbg2("Manufacturer ID 0x%02x, Device ID 0x%04x\n", mid, did);
+}
+
+void prettyprint_ich_descriptor_upper_map(const struct ich_desc_upper_map *umap)
+{
+	int i;
+	msg_pdbg2("=== Upper Map Section ===\n");
+	msg_pdbg2("FLUMAP1  0x%08x\n", umap->FLUMAP1);
+	msg_pdbg2("\n");
+
+	msg_pdbg2("--- Details ---\n");
+	msg_pdbg2("VTL (length in DWORDS) = %d\n", umap->VTL);
+	msg_pdbg2("VTBA (base address)    = 0x%6.6x\n", getVTBA(umap));
+	msg_pdbg2("\n");
+
+	msg_pdbg2("VSCC Table: %d entries\n", umap->VTL/2);
+	for (i = 0; i < umap->VTL/2; i++)
+	{
+		uint32_t jid = umap->vscc_table[i].JID;
+		uint32_t vscc = umap->vscc_table[i].VSCC;
+		msg_pdbg2("  JID%d  = 0x%08x\n", i, jid);
+		msg_pdbg2("  VSCC%d = 0x%08x\n", i, vscc);
+		msg_pdbg2("    "); /* indention */
+		prettyprint_rdid(jid);
+		msg_pdbg2("    "); /* indention */
+		prettyprint_ich_reg_vscc(vscc, 0);
+	}
+	msg_pdbg2("\n");
+}
+
+/* len is the length of dump in bytes */
+int read_ich_descriptors_from_dump(const uint32_t *dump, unsigned int len, struct ich_descriptors *desc)
+{
+	unsigned int i, max;
+	uint8_t pch_bug_offset = 0;
+
+	if (dump == NULL || desc == NULL)
+		return ICH_RET_PARAM;
+
+	if (dump[0] != DESCRIPTOR_MODE_SIGNATURE) {
+		if (dump[4] == DESCRIPTOR_MODE_SIGNATURE)
+			pch_bug_offset = 4;
+		else
+			return ICH_RET_ERR;
+	}
+
+	/* map */
+	if (len < (4 + pch_bug_offset) * 4 - 1)
+		return ICH_RET_OOB;
+	desc->content.FLVALSIG	= dump[0 + pch_bug_offset];
+	desc->content.FLMAP0	= dump[1 + pch_bug_offset];
+	desc->content.FLMAP1	= dump[2 + pch_bug_offset];
+	desc->content.FLMAP2	= dump[3 + pch_bug_offset];
+
+	/* component */
+	if (len < (getFCBA(&desc->content) + 3 * 4 - 1))
+		return ICH_RET_OOB;
+	desc->component.FLCOMP	= dump[(getFCBA(&desc->content) >> 2) + 0];
+	desc->component.FLILL	= dump[(getFCBA(&desc->content) >> 2) + 1];
+	desc->component.FLPB	= dump[(getFCBA(&desc->content) >> 2) + 2];
+
+	/* region */
+	if (len < (getFRBA(&desc->content) + 5 * 4 - 1))
+		return ICH_RET_OOB;
+	desc->region.FLREGs[0] = dump[(getFRBA(&desc->content) >> 2) + 0];
+	desc->region.FLREGs[1] = dump[(getFRBA(&desc->content) >> 2) + 1];
+	desc->region.FLREGs[2] = dump[(getFRBA(&desc->content) >> 2) + 2];
+	desc->region.FLREGs[3] = dump[(getFRBA(&desc->content) >> 2) + 3];
+	desc->region.FLREGs[4] = dump[(getFRBA(&desc->content) >> 2) + 4];
+
+	/* master */
+	if (len < (getFMBA(&desc->content) + 3 * 4 - 1))
+		return ICH_RET_OOB;
+	desc->master.FLMSTR1 = dump[(getFMBA(&desc->content) >> 2) + 0];
+	desc->master.FLMSTR2 = dump[(getFMBA(&desc->content) >> 2) + 1];
+	desc->master.FLMSTR3 = dump[(getFMBA(&desc->content) >> 2) + 2];
+
+	/* upper map */
+	desc->upper.FLUMAP1 = dump[(UPPER_MAP_OFFSET >> 2) + 0];
+
+	/* VTL is 8 bits long. Quote from the Ibex Peak SPI programming guide:
+	 * "Identifies the 1s based number of DWORDS contained in the VSCC
+	 * Table. Each SPI component entry in the table is 2 DWORDS long." So
+	 * the maximum of 255 gives us 127.5 SPI components(!?) 8 bytes each. A
+	 * check ensures that the maximum offset actually accessed is available.
+	 */
+	if (len < (getVTBA(&desc->upper) + (desc->upper.VTL / 2 * 8) - 1))
+		return ICH_RET_OOB;
+
+	for (i = 0; i < desc->upper.VTL/2; i++) {
+		desc->upper.vscc_table[i].JID  =
+				 dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 0];
+		desc->upper.vscc_table[i].VSCC =
+				 dump[(getVTBA(&desc->upper) >> 2) + i * 2 + 1];
+	}
+
+	/* MCH/PROC (aka. North) straps */
+	if (len < getFMSBA(&desc->content) + desc->content.MSL * 4)
+		return ICH_RET_OOB;
+
+	/* limit the range to be written */
+	max = min(sizeof(desc->north.STRPs) / 4, desc->content.MSL);
+	for (i = 0; i < max; i++)
+			desc->north.STRPs[i] =
+				      dump[(getFMSBA(&desc->content) >> 2) + i];
+
+	/* ICH/PCH (aka. South) straps */
+	if (len < getFISBA(&desc->content) + desc->content.ISL * 4)
+		return ICH_RET_OOB;
+
+	/* limit the range to be written */
+	max = min(sizeof(desc->south.STRPs) / 4, desc->content.ISL);
+	for (i = 0; i < max; i++)
+			desc->south.STRPs[i] =
+				      dump[(getFISBA(&desc->content) >> 2) + i];
+
+	return ICH_RET_OK;
+}
+
+#else /* ICH_DESCRIPTORS_FROM_DUMP */
+
 /** Returns the integer representation of the component density with index
 idx in bytes or 0 if a correct size can not be determined. */
 int getFCBA_component_density(const struct ich_descriptors *desc, uint8_t idx)
@@ -313,4 +839,5 @@
 	msg_pdbg2(" done.\n");
 	return ICH_RET_OK;
 }
+#endif /* ICH_DESCRIPTORS_FROM_DUMP */
 #endif /* defined(__i386__) || defined(__x86_64__) */

Modified: trunk/ich_descriptors.h
==============================================================================
--- trunk/ich_descriptors.h	Fri Dec 23 00:27:03 2011	(r1479)
+++ trunk/ich_descriptors.h	Sat Dec 24 01:00:32 2011	(r1480)
@@ -227,22 +227,349 @@
 	};
 };
 
+#ifdef ICH_DESCRIPTORS_FROM_DUMP
+struct ich_desc_north_strap {
+	union {
+		uint32_t STRPs[1]; /* current maximum: ich8 */
+		struct { /* ich8 */
+			struct { /* STRP2 (in the datasheet) */
+				uint32_t MDB			:1,
+								:31;
+			};
+		} ich8;
+	};
+};
+
+struct ich_desc_south_strap {
+	union {
+		uint32_t STRPs[16]; /* current maximum: ibex peak */
+		struct { /* ich8 */
+			struct { /* STRP1 */
+				uint32_t ME_DISABLE		:1,
+								:6,
+					 TCOMODE		:1,
+					 ASD			:7,
+					 BMCMODE		:1,
+								:3,
+					 GLAN_PCIE_SEL		:1,
+					 GPIO12_SEL		:2,
+					 SPICS1_LANPHYPC_SEL	:1,
+					 MESM2SEL		:1,
+								:1,
+					 ASD2			:7;
+			};
+		} ich8;
+		struct { /* ibex peak */
+			struct { /* STRP0 */
+				uint32_t			:1,
+					 cs_ss2			:1,
+								:5,
+					 SMB_EN			:1,
+					 SML0_EN		:1,
+					 SML1_EN		:1,
+					 SML1FRQ		:2,
+					 SMB0FRQ		:2,
+					 SML0FRQ		:2,
+								:4,
+					 LANPHYPC_GP12_SEL	:1,
+					 cs_ss1			:1,
+								:2,
+					 DMI_REQID_DIS		:1,
+								:4,
+					 BBBS			:2,
+								:1;
+			};
+			struct { /* STRP1 */
+				uint32_t cs_ss3			:4,
+								:28;
+			};
+			struct { /* STRP2 */
+				uint32_t			:8,
+					 MESMASDEN		:1,
+					 MESMASDA		:7,
+								:8,
+					 MESMI2CEN		:1,
+					 MESMI2CA		:7;
+			};
+			struct { /* STRP3 */
+				uint32_t			:32;
+			};
+			struct { /* STRP4 */
+				uint32_t PHYCON			:2,
+								:6,
+					 GBEMAC_SMBUS_ADDR_EN	:1,
+					 GBEMAC_SMBUS_ADDR	:7,
+								:1,
+					 GBEPHY_SMBUS_ADDR	:7,
+								:8;
+			};
+			struct { /* STRP5 */
+				uint32_t			:32;
+			};
+			struct { /* STRP6 */
+				uint32_t			:32;
+			};
+			struct { /* STRP7 */
+				uint32_t MESMA2UDID_VENDOR	:16,
+					 MESMA2UDID_DEVICE	:16;
+			};
+			struct { /* STRP8 */
+				uint32_t			:32;
+			};
+			struct { /* STRP9 */
+				uint32_t PCIEPCS1		:2,
+					 PCIEPCS2		:2,
+					 PCIELR1		:1,
+					 PCIELR2		:1,
+					 DMILR			:1,
+								:1,
+					 PHY_PCIEPORTSEL	:3,
+					 PHY_PCIE_EN		:1,
+								:20;
+			};
+			struct { /* STRP10 */
+				uint32_t			:1,
+					 ME_BOOT_FLASH		:1,
+					 cs_ss5			:1,
+					 VE_EN			:1,
+								:4,
+					 MMDDE			:1,
+					 MMADDR			:7,
+					 cs_ss7			:1,
+								:1,
+					 ICC_SEL		:3,
+					 MER_CL1		:1,
+								:10;
+			};
+			struct { /* STRP11 */
+				uint32_t SML1GPAEN		:1,
+					 SML1GPA		:7,
+								:16,
+					 SML1I2CAEN		:1,
+					 SML1I2CA		:7;
+			};
+			struct { /* STRP12 */
+				uint32_t			:32;
+			};
+			struct { /* STRP13 */
+				uint32_t			:32;
+			};
+			struct { /* STRP14 */
+				uint32_t			:8,
+					 VE_EN2			:1,
+								:5,
+					 VE_BOOT_FLASH		:1,
+								:1,
+					 BW_SSD			:1,
+					 NVMHCI_EN		:1,
+								:14;
+			};
+			struct { /* STRP15 */
+				uint32_t			:3,
+					 cs_ss6			:2,
+								:1,
+					 IWL_EN			:1,
+								:1,
+					 t209min		:2,
+								:22;
+			};
+		} ibex;
+		struct { /* cougar point */
+			struct { /* STRP0 */
+				uint32_t			:1,
+					 cs_ss1			:1,
+								:5,
+					 SMB_EN			:1,
+					 SML0_EN		:1,
+					 SML1_EN		:1,
+					 SML1FRQ		:2,
+					 SMB0FRQ		:2,
+					 SML0FRQ		:2,
+								:4,
+					 LANPHYPC_GP12_SEL	:1,
+					 LINKSEC_DIS		:1,
+								:2,
+					 DMI_REQID_DIS		:1,
+								:4,
+					 BBBS			:2,
+								:1;
+			};
+			struct { /* STRP1 */
+				uint32_t cs_ss3			:4,
+								:4,
+					 cs_ss2			:1,
+								:28;
+			};
+			struct { /* STRP2 */
+				uint32_t			:8,
+					 MESMASDEN		:1,
+					 MESMASDA		:7,
+					 MESMMCTPAEN		:1,
+					 MESMMCTPA		:7,
+					 MESMI2CEN		:1,
+					 MESMI2CA		:7;
+			};
+			struct { /* STRP3 */
+				uint32_t			:32;
+			};
+			struct { /* STRP4 */
+				uint32_t PHYCON			:2,
+								:6,
+					 GBEMAC_SMBUS_ADDR_EN	:1,
+					 GBEMAC_SMBUS_ADDR	:7,
+								:1,
+					 GBEPHY_SMBUS_ADDR	:7,
+								:8;
+			};
+			struct { /* STRP5 */
+				uint32_t			:32;
+			};
+			struct { /* STRP6 */
+				uint32_t			:32;
+			};
+			struct { /* STRP7 */
+				uint32_t MESMA2UDID_VENDOR	:16,
+					 MESMA2UDID_DEVICE	:16;
+			};
+			struct { /* STRP8 */
+				uint32_t			:32;
+			};
+			struct { /* STRP9 */
+				uint32_t PCIEPCS1		:2,
+					 PCIEPCS2		:2,
+					 PCIELR1		:1,
+					 PCIELR2		:1,
+					 DMILR			:1,
+					 cs_ss4			:1,
+					 PHY_PCIEPORTSEL	:3,
+					 PHY_PCIE_EN		:1,
+								:2,
+					 SUB_DECODE_EN		:1,
+								:7,
+					 PCHHOT_SML1ALERT_SEL	:1,
+								:9;
+			};
+			struct { /* STRP10 */
+				uint32_t			:1,
+					 ME_BOOT_FLASH		:1,
+								:6,
+					 MDSMBE_EN		:1,
+					 MDSMBE_ADD		:7,
+								:2,
+					 ICC_SEL		:3,
+					 MER_CL1		:1,
+					 ICC_PRO_SEL		:1,
+					 Deep_SX_EN		:1,
+					 ME_DBG_LAN		:1,
+								:7;
+			};
+			struct { /* STRP11 */
+				uint32_t SML1GPAEN		:1,
+					 SML1GPA		:7,
+								:16,
+					 SML1I2CAEN		:1,
+					 SML1I2CA		:7;
+			};
+			struct { /* STRP12 */
+				uint32_t			:32;
+			};
+			struct { /* STRP13 */
+				uint32_t			:32;
+			};
+			struct { /* STRP14 */
+				uint32_t			:32;
+			};
+			struct { /* STRP15 */
+				uint32_t cs_ss6			:6,
+					 IWL_EN			:1,
+					 cs_ss5			:2,
+								:4,
+					 SMLINK1_THERM_SEL	:1,
+					 SLP_LAN_GP29_SEL	:1,
+								:16;
+			};
+			struct { /* STRP16 */
+				uint32_t			:32;
+			};
+			struct { /* STRP17 */
+				uint32_t ICML			:1,
+					 cs_ss7			:1,
+								:30;
+			};
+		} cougar;
+	};
+};
+
+struct ich_desc_upper_map {
+	union {
+		uint32_t FLUMAP1;		/* Flash Upper Map 1 */
+		struct {
+			uint32_t VTBA	:8,	/* ME VSCC Table Base Address */
+				 VTL	:8,	/* ME VSCC Table Length */
+					:16;
+		};
+	};
+	struct {
+		union {		/* JEDEC-ID Register */
+			uint32_t JID;
+			struct {
+				uint32_t vid	:8, /* Vendor ID */
+					 cid0	:8, /* Component ID 0 */
+					 cid1	:8, /* Component ID 1 */
+						:8;
+			};
+		};
+		union {		/* Vendor Specific Component Capabilities */
+			uint32_t VSCC;
+			struct {
+				uint32_t ubes	:2, /* Upper Block/Sector Erase Size */
+					 uwg	:1, /* Upper Write Granularity */
+					 uwsr	:1, /* Upper Write Status Required */
+					 uwews	:1, /* Upper Write Enable on Write Status */
+						:3,
+					 ueo	:8, /* Upper Erase Opcode */
+					 lbes	:2, /* Lower Block/Sector Erase Size */
+					 lwg	:1, /* Lower Write Granularity */
+					 lwsr	:1, /* Lower Write Status Required */
+					 lwews	:1, /* Lower Write Enable on Write Status */
+						:3,
+					 leo	:16; /* Lower Erase Opcode */
+			};
+		};
+	} vscc_table[128];
+};
+#endif /* ICH_DESCRIPTORS_FROM_DUMP */
+
 struct ich_descriptors {
 	struct ich_desc_content content;
 	struct ich_desc_component component;
 	struct ich_desc_region region;
 	struct ich_desc_master master;
+#ifdef ICH_DESCRIPTORS_FROM_DUMP
+	struct ich_desc_north_strap north;
+	struct ich_desc_south_strap south;
+	struct ich_desc_upper_map upper;
+#endif /* ICH_DESCRIPTORS_FROM_DUMP */
 };
 
-void prettyprint_ich_descriptors(enum ich_chipset, const struct ich_descriptors *desc);
+void prettyprint_ich_descriptors(enum ich_chipset cs, const struct ich_descriptors *desc);
 
 void prettyprint_ich_descriptor_content(const struct ich_desc_content *content);
 void prettyprint_ich_descriptor_component(const struct ich_descriptors *desc);
 void prettyprint_ich_descriptor_region(const struct ich_descriptors *desc);
 void prettyprint_ich_descriptor_master(const struct ich_desc_master *master);
 
+#ifdef ICH_DESCRIPTORS_FROM_DUMP
+
+void prettyprint_ich_descriptor_upper_map(const struct ich_desc_upper_map *umap);
+void prettyprint_ich_descriptor_straps(enum ich_chipset cs, const struct ich_descriptors *desc);
+int read_ich_descriptors_from_dump(const uint32_t *dump, unsigned int len, struct ich_descriptors *desc);
+
+#else /* ICH_DESCRIPTORS_FROM_DUMP */
+
 int read_ich_descriptors_via_fdo(void *spibar, struct ich_descriptors *desc);
 int getFCBA_component_density(const struct ich_descriptors *desc, uint8_t idx);
 
+#endif /* ICH_DESCRIPTORS_FROM_DUMP */
 #endif /* __ICH_DESCRIPTORS_H__ */
 #endif /* defined(__i386__) || defined(__x86_64__) */

Modified: trunk/programmer.h
==============================================================================
--- trunk/programmer.h	Fri Dec 23 00:27:03 2011	(r1479)
+++ trunk/programmer.h	Sat Dec 24 01:00:32 2011	(r1480)
@@ -527,7 +527,6 @@
 int register_spi_programmer(const struct spi_programmer *programmer);
 
 /* ichspi.c */
-#if CONFIG_INTERNAL == 1
 enum ich_chipset {
 	CHIPSET_ICH_UNKNOWN,
 	CHIPSET_ICH7 = 7,
@@ -539,6 +538,7 @@
 	CHIPSET_7_SERIES_PANTHER_POINT
 };
 
+#if CONFIG_INTERNAL == 1
 extern uint32_t ichspi_bbar;
 int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		 enum ich_chipset ich_generation);

Added: trunk/util/ich_descriptors_tool/Makefile
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ trunk/util/ich_descriptors_tool/Makefile	Sat Dec 24 01:00:32 2011	(r1480)
@@ -0,0 +1,42 @@
+CC ?= gcc
+
+PROGRAM=ich_descriptors_tool
+EXTRAINCDIRS = ../../ .
+DEPPATH = .dep
+OBJATH = .obj
+SHAREDSRC = ich_descriptors.c
+SHAREDSRCDIR = ../..
+
+SRC = $(wildcard *.c)
+
+CFLAGS += -Wall
+CFLAGS += -MMD -MP -MF $(DEPPATH)/$(@F).d
+# enables functions that populate the descriptor structs from plain binary dumps
+CFLAGS += -D ICH_DESCRIPTORS_FROM_DUMP
+CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
+
+OBJ = $(OBJATH)/$(SRC:%.c=%.o)
+
+SHAREDOBJ = $(OBJATH)/$(notdir $(SHAREDSRC:%.c=%.o))
+
+all:$(PROGRAM)
+
+$(OBJ): $(OBJATH)/%.o : %.c
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+# this enables us to share source files without simultaneously sharing .o files
+# with flashrom, which would lead to unexpected results (w/o running make clean)
+$(SHAREDOBJ): $(OBJATH)/%.o : $(SHAREDSRCDIR)/%.c
+	$(CC) $(CFLAGS) -o $@ -c $<
+
+$(PROGRAM): $(OBJ) $(SHAREDOBJ)
+	$(CC) -o $(PROGRAM) $(OBJ) $(SHAREDOBJ)
+
+clean:
+	rm -f $(PROGRAM)
+	rm -rf $(DEPPATH) $(OBJATH)
+
+# Include the dependency files.
+-include $(shell mkdir -p $(DEPPATH) $(OBJATH) 2>/dev/null) $(wildcard $(DEPPATH)/*)
+
+.PHONY: all clean

Added: trunk/util/ich_descriptors_tool/TODO
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ trunk/util/ich_descriptors_tool/TODO	Sat Dec 24 01:00:32 2011	(r1480)
@@ -0,0 +1,10 @@
+- reverse the path: assemble a descriptormode image from various
+  blobs (BIOS, GbE, ME, OEM) and a description (xml? custom config?
+  sane defaults and cmd-line switches?)
+- dump 256 OEM bytes
+- deal with the various possible locations of mac address(es?)
+	/* mazzoo said: from what I've seen, the MAC address is the 1st or
+	 * 2nd 6 bytes in the GbE region. It seems the PXE-OpROM and/or the
+	 * intel EEUPDATE-tool copies the MAC address to the 2nd part.
+	 */
+- add descriptions for the missing chipsets

Added: trunk/util/ich_descriptors_tool/ich_descriptors_tool.c
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ trunk/util/ich_descriptors_tool/ich_descriptors_tool.c	Sat Dec 24 01:00:32 2011	(r1480)
@@ -0,0 +1,227 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010  Matthias Wenzel <bios at mazzoo dot de>
+ * Copyright (C) 2011 Stefan Tauner
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/*
+ * dump information and binaries from BIOS images that are in descriptor mode
+ */
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <sys/mman.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <string.h>
+#include <errno.h>
+#include "ich_descriptors.h"
+
+static void dump_file(const char *basename, const uint32_t *dump, unsigned int len, struct ich_desc_region *reg, unsigned int i)
+{
+	int ret;
+	char *fn;
+	const char *reg_name;
+	uint32_t file_len;
+	const char *const region_names[5] = {
+		"Descriptor", "BIOS", "ME", "GbE", "Platform"
+	};
+	uint32_t base = ICH_FREG_BASE(reg->FLREGs[i]);
+	uint32_t limit = ICH_FREG_LIMIT(reg->FLREGs[i]);
+
+	reg_name = region_names[i];
+	if (base > limit) {
+		printf("The %s region is unused and thus not dumped.\n",
+		       reg_name);
+		return;
+	}
+
+	limit = limit | 0x0fff;
+	file_len = limit + 1 - base;
+	if (base + file_len > len) {
+		printf("The %s region is spanning 0x%08x-0x%08x, but it is "
+		       "not (fully) included in the image (0-0x%08x), thus not "
+		       "dumped.\n", reg_name, base, limit, len - 1);
+		return;
+	}
+
+	fn = malloc(strlen(basename) + strlen(reg_name) + strlen(".bin") + 2);
+	if (!fn) {
+		fprintf(stderr, "Out of memory!\n");
+		exit(1);
+	}
+	snprintf(fn, strlen(basename) + strlen(reg_name) + strlen(".bin") + 2,
+		 "%s.%s.bin", basename, reg_name);
+	printf("Dumping %u bytes of the %s region from 0x%08x-0x%08x to %s... ",
+	       file_len, region_names[i], base, limit, fn);
+	int fh = open(fn, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR);
+	free(fn);
+	if (fh < 0) {
+		fprintf(stderr,
+			"ERROR: couldn't open(%s): %s\n", fn, strerror(errno));
+		exit(1);
+	}
+
+	ret = write(fh, &dump[base >> 2], file_len);
+	if (ret != file_len) {
+		fprintf(stderr, "FAILED.\n");
+		exit(1);
+	}
+
+	printf("done.\n");
+	close(fh);
+}
+
+void dump_files(const char *n, const uint32_t *buf, unsigned int len, struct ich_desc_region *reg)
+{
+	unsigned int i;
+	printf("=== Dumping region files ===\n");
+	for (i = 0; i < 5; i++)
+		dump_file(n, buf, len, reg, i);
+	printf("\n");
+}
+
+static void usage(char *argv[], char *error)
+{
+	if (error != NULL) {
+		fprintf(stderr, "%s\n", error);
+	}
+	printf("usage: '%s -f <image file name> [-c <chipset name>] [-d]'\n\n"
+"where <image file name> points to an image of the contents of the SPI flash.\n"
+"In case the image is really in descriptor mode %s\n"
+"will pretty print some of the contained information.\n"
+"To also print the data stored in the descriptor strap you have to indicate\n"
+"the chipset series with the '-c' parameter and one of the possible arguments:\n"
+"\t- \"ich8\",\n"
+"\t- \"ich9\",\n"
+"\t- \"ich10\",\n"
+"\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n"
+"\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n"
+"\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n"
+"If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n"
+"the GbE blob that is required to initialize the GbE are also dumped to files.\n",
+	argv[0], argv[0]);
+	exit(1);
+}
+
+int main(int argc, char *argv[])
+{
+	int fd;			/* file descriptor to flash file */
+	int len;		/* file/buffer size in bytes */
+	uint32_t *buf;		/* mmap'd file */
+	uint8_t *pMAC;
+	int opt, ret;
+
+	int dump = 0;
+	const char *fn = NULL;
+	const char *csn = NULL;
+	enum ich_chipset cs = CHIPSET_ICH_UNKNOWN;
+	struct ich_descriptors desc = {{ 0 }};
+
+	while ((opt = getopt(argc, argv, "df:c:")) != -1) {
+		switch (opt) {
+		case 'd':
+			dump = 1;
+			break;
+		case 'f':
+			fn = optarg;
+			break;
+		case 'c':
+			csn = optarg;
+			break;
+		default: /* '?' */
+			usage(argv, NULL);
+		}
+	}
+	if (fn == NULL)
+		usage(argv,
+		      "Need a file name of a descriptor image to read from.");
+
+	fd = open(fn, O_RDONLY);
+	if (fd < 0)
+		usage(argv, "No such file");
+	len = lseek(fd, 0, SEEK_END);
+	if (len < 0)
+		usage(argv, "Seeking to the end of the file failed");
+
+	buf = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0);
+	if (buf == (void *) -1) {
+		/* fallback for stupid OSes like cygwin */
+		int ret;
+		buf = malloc(len);
+		if (!buf)
+			usage(argv, "Could not allocate memory");
+		lseek(fd, 0, SEEK_SET);
+		ret = read(fd, buf, len);
+		if (ret != len)
+			usage(argv, "Seeking to the end of the file failed");
+	}
+	printf("The flash image has a size of %d [0x%x] bytes.\n", len, len);
+	close(fd);
+
+	if (csn != NULL) {
+		if (strcmp(csn, "ich8") == 0)
+			cs = CHIPSET_ICH8;
+		else if (strcmp(csn, "ich9") == 0)
+			cs = CHIPSET_ICH9;
+		else if (strcmp(csn, "ich10") == 0)
+			cs = CHIPSET_ICH10;
+		else if ((strcmp(csn, "5") == 0) ||
+			 (strcmp(csn, "ibex") == 0))
+			cs = CHIPSET_5_SERIES_IBEX_PEAK;
+		else if ((strcmp(csn, "6") == 0) ||
+			 (strcmp(csn, "cougar") == 0))
+			cs = CHIPSET_6_SERIES_COUGAR_POINT;
+		else if ((strcmp(csn, "7") == 0) ||
+			 (strcmp(csn, "panther") == 0))
+			cs = CHIPSET_7_SERIES_PANTHER_POINT;
+	}
+
+	ret = read_ich_descriptors_from_dump(buf, len, &desc);
+	switch (ret) {
+	case ICH_RET_OK:
+		break;
+	case ICH_RET_ERR:
+		printf("Image not in descriptor mode.\n");
+		exit(1);
+	case ICH_RET_OOB:
+		printf("Tried to access a location out of bounds of the image. "
+		       "- Corrupt image?\n");
+		exit(1);
+	default:
+		printf("Unhandled return value at %s:%u, please report this.\n",
+		       __FILE__, __LINE__);
+		exit(1);
+	}
+
+	prettyprint_ich_descriptors(cs, &desc);
+
+	pMAC = (uint8_t *) &buf[ICH_FREG_BASE(desc.region.reg3_base) >> 2];
+	if (len >= ICH_FREG_BASE(desc.region.reg3_base) + 5 && pMAC[0] != 0xff)
+		printf("The MAC address might be at offset 0x%x: "
+		       "%02x:%02x:%02x:%02x:%02x:%02x\n",
+		       ICH_FREG_BASE(desc.region.reg3_base),
+		       pMAC[0], pMAC[1], pMAC[2], pMAC[3], pMAC[4], pMAC[5]);
+
+	if (dump == 1)
+		dump_files(fn, buf, len, &desc.region);
+
+	return 0;
+}


From stefan.tauner at student.tuwien.ac.at  Sat Dec 24 01:35:15 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 24 Dec 2011 01:35:15 +0100
Subject: [flashrom] [PATCH 0/5] layout patches 2.0
In-Reply-To: <1313766057-22781-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1313766057-22781-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

rebased to flashctx and unsignify.
2/5 was already acked by david hendricks.
3/5 has small changes due to the comments from david and a minor output fix.
everything else should be unchanged iirc.

Stefan Tauner (5):
  layout: change return type and name of find_next_included_romentry
  Add deferred -i processing
  layout: Add -i <image>[:<file>] support
  Use layout for verify operations too
  (not for merge) Fix the "Use layout for verify operations too" patch
    in a hacky way

 cli_classic.c |   10 +--
 flash.h       |   13 +++-
 flashrom.c    |  149 ++++++++++++++++++++++++++++++++-----------
 layout.c      |  196 +++++++++++++++++++++++++++++++++++++++++++++-----------
 4 files changed, 282 insertions(+), 86 deletions(-)



From stefan.tauner at student.tuwien.ac.at  Sat Dec 24 01:35:18 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 24 Dec 2011 01:35:18 +0100
Subject: [flashrom] [PATCH 3/5] layout: Add -i <image>[:<file>] support
In-Reply-To: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324686920-11113-4-git-send-email-stefan.tauner@student.tuwien.ac.at>

Add an optional sub-parameter to the -i parameter to allow building the
image to be written from multiple files. This will also allow regions to
be read from flash and written to separate image files in a later patch.

based on chromiumos'
d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8
Signed-off-by: David Hendricks <dhendrix at chromium.org>

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---

TODO:
 - man page
 - definition or at least an explanation of precedence of command line parameters
---
 flash.h    |   10 +++++-
 flashrom.c |  117 ++++++++++++++++++++++++++++++++++++++++++++---------------
 layout.c   |   84 ++++++++++++++++++++++++++++++++++++-------
 3 files changed, 167 insertions(+), 44 deletions(-)

diff --git a/flash.h b/flash.h
index e51b6d4..c4d747b 100644
--- a/flash.h
+++ b/flash.h
@@ -39,6 +39,13 @@
 #define TIMEOUT_ERROR	-101
 
 typedef unsigned long chipaddr;
+typedef struct {
+	unsigned int start;
+	unsigned int end;
+	unsigned int included;
+	char name[256];
+	char file[256]; /* file == "" means not specified. */
+} romlayout_t;
 
 int register_shutdown(int (*function) (void *data), void *data);
 void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
@@ -292,7 +299,8 @@ int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 int register_include_arg(char *name);
 int process_include_args(void);
 int read_romlayout(char *name);
-int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
+romlayout_t *get_next_included_romentry(unsigned int start);
+int build_new_image(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */
 struct spi_command {
diff --git a/flashrom.c b/flashrom.c
index f1a6165..e33152f 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1069,7 +1069,7 @@ int read_buf_from_file(unsigned char *buf, unsigned long size,
 	return 0;
 }
 
-int write_buf_to_file(unsigned char *buf, unsigned long size,
+int write_dump_to_file(unsigned char *buf, unsigned long size,
 		      const char *filename)
 {
 	unsigned long numbytes;
@@ -1094,26 +1094,81 @@ int write_buf_to_file(unsigned char *buf, unsigned long size,
 	return 0;
 }
 
+int write_buf_to_file(unsigned char *buf, unsigned long size,
+		      const char *filename)
+{
+	romlayout_t *l;
+	int ret = 0;
+
+	ret = write_dump_to_file(buf, size, filename);
+	if (ret)
+		return ret;
+
+	l = get_next_included_romentry(0);
+
+	while (l != NULL) {
+		const char* name = (l->file[0] == '\0') ? l->name : l->file;
+		unsigned int len = l->end - l->start + 1;
+		msg_gdbg2("Writing \"%s\" to \"%s\" 0x%08x - 0x%08x (%uB)... ",
+			  l->name, name, l->start, l->end, len);
+		if(write_dump_to_file(buf + l->start, len, name)) {
+			msg_gdbg2("failed. ");
+			return 1;
+		}
+		msg_gdbg2("done. ");
+		l = get_next_included_romentry(l->end + 1);
+	};
+
+	return 0;
+}
+
+int read_flash_to_buf(struct flashctx *flash, uint8_t *buf)
+{
+	romlayout_t *l;
+
+	if (!flash->read) {
+		msg_cerr("No read function available for this flash chip.\n");
+		return 1;
+	}
+
+	l = get_next_included_romentry(0);
+	/* No included rom entries. Assume complete readout wanted. */
+	if (l == NULL)
+		return flash->read(flash, buf, 0, flash->total_size * 1024);
+
+	do {
+		unsigned int len = l->end - l->start + 1;
+		msg_gdbg2("Reading \"%s\" 0x%08x - 0x%08x (%uB)... ", l->name,
+			  l->start, l->end, len);
+		if(flash->read(flash, buf + l->start, l->start, len)) {
+			msg_gdbg2("failed. ");
+			return 1;
+		}
+		msg_gdbg2("done. ");
+		l = get_next_included_romentry(l->end + 1);
+	} while (l != NULL);
+
+	return 0;
+}
+
 int read_flash_to_file(struct flashctx *flash, const char *filename)
 {
 	unsigned long size = flash->total_size * 1024;
-	unsigned char *buf = calloc(size, sizeof(char));
 	int ret = 0;
+	uint8_t *buf;
 
 	msg_cinfo("Reading flash... ");
-	if (!buf) {
+
+	buf = calloc(size, sizeof(uint8_t));
+	if (buf == NULL) {
 		msg_gerr("Memory allocation failed!\n");
-		msg_cinfo("FAILED.\n");
-		return 1;
-	}
-	if (!flash->read) {
-		msg_cerr("No read function available for this flash chip.\n");
 		ret = 1;
 		goto out_free;
 	}
-	if (flash->read(flash, buf, 0, size)) {
+
+	ret = read_flash_to_buf(flash, buf);
+	if (ret != 0) {
 		msg_cerr("Read operation failed!\n");
-		ret = 1;
 		goto out_free;
 	}
 
@@ -1679,6 +1734,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	uint8_t *newcontents;
 	int ret = 0;
 	unsigned long size = flash->total_size * 1024;
+	int read_all_first = 1; /* FIXME: Make this configurable. */
 
 	if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) {
 		msg_cerr("Aborting.\n");
@@ -1745,28 +1801,27 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 
 	/* Read the whole chip to be able to check whether regions need to be
 	 * erased and to give better diagnostics in case write fails.
-	 * The alternative would be to read only the regions which are to be
+	 * The alternative is to read only the regions which are to be
 	 * preserved, but in that case we might perform unneeded erase which
 	 * takes time as well.
 	 */
-	msg_cinfo("Reading old flash chip contents... ");
-	if (flash->read(flash, oldcontents, 0, size)) {
-		ret = 1;
-		msg_cinfo("FAILED.\n");
-		goto out;
+	if (read_all_first) {
+		msg_cinfo("Reading old flash chip contents... ");
+		if (flash->read(flash, oldcontents, 0, size)) {
+			ret = 1;
+			msg_cinfo("FAILED.\n");
+			goto out;
+		}
 	}
 	msg_cinfo("done.\n");
 
-	// This should be moved into each flash part's code to do it 
-	// cleanly. This does the job.
-	handle_romentries(flash, oldcontents, newcontents);
-
-	// ////////////////////////////////////////////////////////////
+	/* Build a new image from the given layout. */
+	build_new_image(flash, read_all_first, oldcontents, newcontents);
 
-	if (write_it) {
-		if (erase_and_write_flash(flash, oldcontents, newcontents)) {
-			msg_cerr("Uh oh. Erase/write failed. Checking if "
-				 "anything changed.\n");
+	if (write_it && erase_and_write_flash(flash, oldcontents, newcontents)) {
+		msg_cerr("Uh oh. Erase/write failed.");
+		if (read_all_first) {
+			msg_cerr("Checking if anything changed... ");
 			if (!flash->read(flash, newcontents, 0, size)) {
 				if (!memcmp(oldcontents, newcontents, size)) {
 					msg_cinfo("Good. It seems nothing was "
@@ -1775,11 +1830,13 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 					ret = 1;
 					goto out;
 				}
-			}
-			emergency_help_message();
-			ret = 1;
-			goto out;
-		}
+			} else
+				msg_cerr("failed.\n");
+		} else
+			msg_cerr("\n");
+		emergency_help_message();
+		ret = 1;
+		goto out;
 	}
 
 	if (verify_it) {
diff --git a/layout.c b/layout.c
index 3928699..e16d03b 100644
--- a/layout.c
+++ b/layout.c
@@ -21,6 +21,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
+#include <errno.h>
 #include <ctype.h>
 #include <limits.h>
 #include "flash.h"
@@ -34,13 +35,6 @@ static int romimages = 0;
 
 #define MAX_ROMLAYOUT	32
 
-typedef struct {
-	unsigned int start;
-	unsigned int end;
-	unsigned int included;
-	char name[256];
-} romlayout_t;
-
 /* include_args lists arguments specified at the command line with -i. They
  * must be processed at some point so that desired regions are marked as
  * "included" in the rom_entries list.
@@ -183,6 +177,7 @@ int read_romlayout(char *name)
 		rom_entries[romimages].start = strtol(tstr1, (char **)NULL, 16);
 		rom_entries[romimages].end = strtol(tstr2, (char **)NULL, 16);
 		rom_entries[romimages].included = 0;
+		strcpy(rom_entries[romimages].file, "");
 		romimages++;
 	}
 
@@ -220,14 +215,24 @@ int register_include_arg(char *name)
 static int find_romentry(char *name)
 {
 	int i;
+	char *file = NULL;
 
 	if (!romimages)
 		return -1;
 
-	msg_gspew("Looking for region \"%s\"... ", name);
+	/* -i <image>[:<file>] */
+	if (strtok(name, ":")) {
+		file = strtok(NULL, "");
+	}
+	msg_gspew("Looking for region \"%s\" (file=\"%s\")... ",
+		  name, file ? file : "<not specified>");
+
 	for (i = 0; i < romimages; i++) {
 		if (!strcmp(rom_entries[i].name, name)) {
 			rom_entries[i].included = 1;
+			snprintf(rom_entries[i].file,
+			         sizeof(rom_entries[i].file),
+			         "%s", file ? file : "");
 			msg_gspew("found.\n");
 			return i;
 		}
@@ -299,7 +304,55 @@ romlayout_t *get_next_included_romentry(unsigned int start)
 	return best_entry;
 }
 
-int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
+/* If a file name is specified for this region, read the file contents and
+ * overwrite @newcontents in the range specified by @entry.
+ */
+static int read_content_from_file(romlayout_t *entry, uint8_t *newcontents)
+{
+	char *file;
+	FILE *fp;
+	int len;
+
+	file = entry->file;
+	len = entry->end - entry->start + 1;
+	if (file[0] != '\0') {
+		int numbytes;
+		if ((fp = fopen(file, "rb")) == NULL) {
+			msg_gerr("Could not open file '%s': %s!\n", file,
+				 strerror(errno));
+			return 1;
+		}
+		numbytes = fread(newcontents + entry->start, 1, len, fp);
+		fclose(fp);
+		if (numbytes != len) {
+			msg_gerr("Could not read %d bytes from file '%s'!\n",
+				 len, file);
+			return 1;
+		}
+	}
+	return 0;
+}
+
+static void copy_old_content(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents, unsigned int start, unsigned int size)
+{
+	if (!oldcontents_valid) {
+		/* oldcontents is a zero-filled buffer. By reading into
+		 * oldcontents, we avoid a rewrite of identical regions even if
+		 * an initial full chip read didn't happen. */
+		msg_gdbg2("Read a chunk starting from 0x%06x (len=0x%06x).\n",
+			  start, size);
+		flash->read(flash, oldcontents + start, start, size);
+	}
+	memcpy(newcontents + start, oldcontents + start, size);
+}
+
+/**
+ * Modify @newcontents so that it contains the data that should be on the chip
+ * eventually. In the case the user wants to update only parts of it, copy
+ * the chunks to be preserved from @oldcontents to @newcontents. If @oldcontents
+ * is not valid, we need to fetch the current data from the chip first.
+ */
+int build_new_image(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
 	romlayout_t *entry;
@@ -318,14 +371,19 @@ int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *new
 		entry = get_next_included_romentry(start);
 		/* No more romentries for remaining region? */
 		if (entry == NULL) {
-			memcpy(newcontents + start, oldcontents + start,
-			       size - start);
+			copy_old_content(flash, oldcontents_valid, oldcontents,
+					 newcontents, start, size - start);
 			break;
 		}
 		/* For non-included region, copy from old content. */
 		if (entry->start > start)
-			memcpy(newcontents + start, oldcontents + start,
-			       entry->start - start);
+			copy_old_content(flash, oldcontents_valid, oldcontents,
+					 newcontents, start,
+					 entry->start - start);
+		/* For included region, copy from file if specified. */
+		if (read_content_from_file(entry, newcontents) < 0)
+			return 1;
+
 		/* Skip to location after current romentry. */
 		start = entry->end + 1;
 		/* Catch overflow. */
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Dec 24 01:35:19 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 24 Dec 2011 01:35:19 +0100
Subject: [flashrom] [PATCH 4/5] Use layout for verify operations too
In-Reply-To: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324686920-11113-5-git-send-email-stefan.tauner@student.tuwien.ac.at>

---
this still reads the whole image in...

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.c |   29 +++++++++++++++++++++--------
 1 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/flashrom.c b/flashrom.c
index e33152f..6aec3f2 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1022,16 +1022,29 @@ notfound:
 
 int verify_flash(struct flashctx *flash, uint8_t *buf)
 {
-	int ret;
 	unsigned int total_size = flash->total_size * 1024;
+	int ret = 0;
+	romlayout_t *l;
 
-	msg_cinfo("Verifying flash... ");
-
-	ret = verify_range(flash, buf, 0, total_size, NULL);
+	msg_cinfo("Verifying... ");
 
-	if (!ret)
-		msg_cinfo("VERIFIED.          \n");
+	l = get_next_included_romentry(0);
+	/* No included rom entries. Assume complete verify wanted. */
+	if (l == NULL)
+		ret = verify_range(flash, buf, 0, total_size, NULL);
+	else do {
+		unsigned int len = l->end - l->start + 1;
+		msg_gdbg2("Verifying \"%s\" 0x%08x - 0x%08x (%uB)... ", l->name,
+			  l->start, l->end, len);
+		if(verify_range(flash, buf + l->start, l->start, len, NULL)) {
+			return 1;
+		}
+		msg_gdbg2("done. ");
+		l = get_next_included_romentry(l->end + 1);
+	} while (l != NULL);
 
+	if (ret == 0)
+		msg_cinfo("VERIFIED.\n");
 	return ret;
 }
 
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Dec 24 01:35:20 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 24 Dec 2011 01:35:20 +0100
Subject: [flashrom] [PATCH 5/5] (not for merge) Fix the "Use layout for
	verify operations too" patch in a hacky way
In-Reply-To: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324686920-11113-6-git-send-email-stefan.tauner@student.tuwien.ac.at>

if you look at the second half of doit with this patch applied, it
is quite clear, that most of it should be guarded by a huge
if(write_it) clause. maybe move this into a function?

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/flashrom.c b/flashrom.c
index 6aec3f2..95e5c67 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1800,7 +1800,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 		goto out;
 	}
 
-	if (write_it || verify_it) {
+	if (write_it || verify_it) { /* always true: erase and read already goto'ed */
 		if (read_buf_from_file(newcontents, size, filename)) {
 			ret = 1;
 			goto out;
@@ -1818,7 +1818,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	 * preserved, but in that case we might perform unneeded erase which
 	 * takes time as well.
 	 */
-	if (read_all_first) {
+	if (read_all_first && write_it) {
 		msg_cinfo("Reading old flash chip contents... ");
 		if (flash->read(flash, oldcontents, 0, size)) {
 			ret = 1;
@@ -1829,7 +1829,8 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	msg_cinfo("done.\n");
 
 	/* Build a new image from the given layout. */
-	build_new_image(flash, read_all_first, oldcontents, newcontents);
+	if (write_it)
+		build_new_image(flash, read_all_first, oldcontents, newcontents);
 
 	if (write_it && erase_and_write_flash(flash, oldcontents, newcontents)) {
 		msg_cerr("Uh oh. Erase/write failed.");
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Dec 24 01:35:17 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 24 Dec 2011 01:35:17 +0100
Subject: [flashrom] [PATCH 2/5] Add deferred -i processing
In-Reply-To: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324686920-11113-3-git-send-email-stefan.tauner@student.tuwien.ac.at>

The general idea and most of the code is stolen from chromiumos:

8fc0740356ca15d02fb1c65ab43b10844f148c3b
bb9049c66ca55e0dc621dd2c70b5d2cb6e5179bf
Signed-off-by: Louis Yung-Chieh Lo <yjlou at chromium.org>

and the main part:
d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8
Signed-off-by: David Hendricks <dhendrix at chromium.org>

My implementation does not defer the processing until doit(), but after the
argument parsing loop only (doit() should not contain argument checks).

This allows to specify -i and -l parameters in any order.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: David Hendricks <dhendrix at google.com>
---
 cli_classic.c |   10 +++----
 flash.h       |    3 +-
 layout.c      |   85 ++++++++++++++++++++++++++++++++++++++++++++++++---------
 3 files changed, 78 insertions(+), 20 deletions(-)

diff --git a/cli_classic.c b/cli_classic.c
index a931de8..3928ded 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -295,14 +295,9 @@ int main(int argc, char *argv[])
 				cli_classic_abort_usage();
 			break;
 		case 'i':
-			/* FIXME: -l has to be specified before -i. */
 			tempstr = strdup(optarg);
-			if (find_romentry(tempstr) < 0) {
-				fprintf(stderr, "Error: image %s not found in "
-					"layout file or -i specified before "
-					"-l\n", tempstr);
+			if (register_include_arg(tempstr))
 				cli_classic_abort_usage();
-			}
 			break;
 		case 'L':
 			if (++operation_specified > 1) {
@@ -395,6 +390,9 @@ int main(int argc, char *argv[])
 		cli_classic_abort_usage();
 	}
 
+	if (process_include_args())
+		cli_classic_abort_usage();
+
 	/* FIXME: Print the actions flashrom will take. */
 
 	if (list_supported) {
diff --git a/flash.h b/flash.h
index e21a986..e51b6d4 100644
--- a/flash.h
+++ b/flash.h
@@ -289,8 +289,9 @@ int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 #define msg_cspew(...)	print(MSG_BARF, __VA_ARGS__)	/* chip debug barf  */
 
 /* layout.c */
+int register_include_arg(char *name);
+int process_include_args(void);
 int read_romlayout(char *name);
-int find_romentry(char *name);
 int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */
diff --git a/layout.c b/layout.c
index 68d05fd..3928699 100644
--- a/layout.c
+++ b/layout.c
@@ -41,6 +41,12 @@ typedef struct {
 	char name[256];
 } romlayout_t;
 
+/* include_args lists arguments specified at the command line with -i. They
+ * must be processed at some point so that desired regions are marked as
+ * "included" in the rom_entries list.
+ */
+static char *include_args[MAX_ROMLAYOUT];
+static int num_include_args = 0; /* the number of valid entries. */
 static romlayout_t rom_entries[MAX_ROMLAYOUT];
 
 #if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */
@@ -156,10 +162,8 @@ int read_romlayout(char *name)
 
 		if (romimages >= MAX_ROMLAYOUT) {
 			msg_gerr("Maximum number of ROM images (%i) in layout "
-				 "file reached before end of layout file.\n",
-				 MAX_ROMLAYOUT);
-			msg_gerr("Ignoring the rest of the layout file.\n");
-			break;
+				 "file reached.\n", MAX_ROMLAYOUT);
+			return 1;
 		}
 		if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name))
 			continue;
@@ -194,27 +198,80 @@ int read_romlayout(char *name)
 }
 #endif
 
-int find_romentry(char *name)
+/* register an include argument (-i) for later processing */
+int register_include_arg(char *name)
+{
+	if (num_include_args >= MAX_ROMLAYOUT) {
+		msg_gerr("Too many regions included (%i).\n", num_include_args);
+		return 1;
+	}
+
+	if (name == NULL) {
+		msg_gerr("<NULL> is a bad region name.\n");
+		return 1;
+	}
+
+	include_args[num_include_args] = name;
+	num_include_args++;
+	return 0;
+}
+
+/* returns the index of the entry (or a negative value if it is not found) */
+static int find_romentry(char *name)
 {
 	int i;
 
 	if (!romimages)
 		return -1;
 
-	msg_ginfo("Looking for \"%s\"... ", name);
-
+	msg_gspew("Looking for region \"%s\"... ", name);
 	for (i = 0; i < romimages; i++) {
 		if (!strcmp(rom_entries[i].name, name)) {
 			rom_entries[i].included = 1;
-			msg_ginfo("found.\n");
+			msg_gspew("found.\n");
 			return i;
 		}
 	}
-	msg_ginfo("not found.\n");	// Not found. Error.
-
+	msg_gspew("not found.\n");
 	return -1;
 }
 
+/* process -i arguments
+ * returns 0 to indicate success, >0 to indicate failure
+ */
+int process_include_args(void)
+{
+	int i;
+	unsigned int found = 0;
+
+	if (num_include_args == 0)
+		return 0;
+
+	for (i = 0; i < num_include_args; i++) {
+		/* User has specified an area, but no layout file is loaded. */
+		if (!romimages) {
+			msg_gerr("Region requested (with -i \"%s\"), "
+				 "but no layout data is available.\n",
+				 include_args[i]);
+			return 1;
+		}
+
+		if (find_romentry(include_args[i]) < 0) {
+			msg_gerr("Invalid region specified: \"%s\"\n",
+				 include_args[i]);
+			return 1;
+		}
+		found++;
+	}
+
+	msg_ginfo("Using region%s: \"%s\"", num_include_args > 1 ? "s" : "",
+		  include_args[0]);
+	for (i = 1; i < num_include_args; i++)
+		msg_ginfo(", \"%s\"", include_args[i]);
+	msg_ginfo(".\n");
+	return 0;
+}
+
 romlayout_t *get_next_included_romentry(unsigned int start)
 {
 	int i;
@@ -248,11 +305,12 @@ int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *new
 	romlayout_t *entry;
 	unsigned int size = flash->total_size * 1024;
 
-	/* If no layout file was specified or the layout file was empty, assume
-	 * that the user wants to flash the complete new image.
+	/* If no regions were specified for inclusion, assume
+	 * that the user wants to write the complete new image.
 	 */
-	if (!romimages)
+	if (num_include_args == 0)
 		return 0;
+
 	/* Non-included romentries are ignored.
 	 * The union of all included romentries is used from the new image.
 	 */
@@ -264,6 +322,7 @@ int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *new
 			       size - start);
 			break;
 		}
+		/* For non-included region, copy from old content. */
 		if (entry->start > start)
 			memcpy(newcontents + start, oldcontents + start,
 			       entry->start - start);
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Dec 24 01:35:16 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 24 Dec 2011 01:35:16 +0100
Subject: [flashrom] [PATCH 1/5] layout: change return type and name of
	find_next_included_romentry
In-Reply-To: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324686920-11113-2-git-send-email-stefan.tauner@student.tuwien.ac.at>

 - rename from find_next_included_romentry to get_next_included_romentry
 - return a pointer to a rom_entry instead of just its index

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 layout.c |   33 +++++++++++++++++----------------
 1 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/layout.c b/layout.c
index 530ebd5..68d05fd 100644
--- a/layout.c
+++ b/layout.c
@@ -215,26 +215,28 @@ int find_romentry(char *name)
 	return -1;
 }
 
-int find_next_included_romentry(unsigned int start)
+romlayout_t *get_next_included_romentry(unsigned int start)
 {
 	int i;
 	unsigned int best_start = UINT_MAX;
-	int best_entry = -1;
+	romlayout_t *best_entry = NULL;
+	romlayout_t *cur;
 
 	/* First come, first serve for overlapping regions. */
 	for (i = 0; i < romimages; i++) {
-		if (!rom_entries[i].included)
+		cur = &rom_entries[i];
+		if (!cur->included)
 			continue;
 		/* Already past the current entry? */
-		if (start > rom_entries[i].end)
+		if (start > cur->end)
 			continue;
 		/* Inside the current entry? */
-		if (start >= rom_entries[i].start)
-			return i;
+		if (start >= cur->start)
+			return cur;
 		/* Entry begins after start. */
-		if (best_start > rom_entries[i].start) {
-			best_start = rom_entries[i].start;
-			best_entry = i;
+		if (best_start > cur->start) {
+			best_start = cur->start;
+			best_entry = cur;
 		}
 	}
 	return best_entry;
@@ -243,7 +245,7 @@ int find_next_included_romentry(unsigned int start)
 int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
-	int entry;
+	romlayout_t *entry;
 	unsigned int size = flash->total_size * 1024;
 
 	/* If no layout file was specified or the layout file was empty, assume
@@ -255,22 +257,21 @@ int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *new
 	 * The union of all included romentries is used from the new image.
 	 */
 	while (start < size) {
-		entry = find_next_included_romentry(start);
+		entry = get_next_included_romentry(start);
 		/* No more romentries for remaining region? */
-		if (entry < 0) {
+		if (entry == NULL) {
 			memcpy(newcontents + start, oldcontents + start,
 			       size - start);
 			break;
 		}
-		if (rom_entries[entry].start > start)
+		if (entry->start > start)
 			memcpy(newcontents + start, oldcontents + start,
-			       rom_entries[entry].start - start);
+			       entry->start - start);
 		/* Skip to location after current romentry. */
-		start = rom_entries[entry].end + 1;
+		start = entry->end + 1;
 		/* Catch overflow. */
 		if (!start)
 			break;
 	}
-			
 	return 0;
 }
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Dec 24 01:16:43 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 24 Dec 2011 01:16:43 +0100
Subject: [flashrom] [PATCH 5/5] Add ich_descriptor_tool to decode all
 flash descriptors stored in a flash dump file
In-Reply-To: <1319150349-24326-6-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1319150349-24326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1319150349-24326-6-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <201112240017.pBO0Gv1A014376@mail2.student.tuwien.ac.at>

committed with a few additional changes after a review (on IRC) from
matthias wenzel (thx!) in r1480.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From jimmie at southpole.se  Fri Dec 23 08:26:15 2011
From: jimmie at southpole.se (Jimmie Tauriainen)
Date: Fri, 23 Dec 2011 08:26:15 +0100
Subject: [flashrom] X8DTT-H
In-Reply-To: <CAPp9OrmE3GWt-hT-e9aAYyp=Ti8w+p9o79J4ezZkXuqEy8wX5Q@mail.gmail.com>
References: <4EF1DD0F.70902@southpole.se>
	<CAPp9OrmE3GWt-hT-e9aAYyp=Ti8w+p9o79J4ezZkXuqEy8wX5Q@mail.gmail.com>
Message-ID: <4EF42D17.50400@southpole.se>

Sure attaching outputs from them.

Best regards,
Jimmie

On 2011-12-21 16:07, Idwer Vollering wrote:
>
> Hi,
>
> 2011/12/21 Jimmie Tauriainen<jimmie at southpole.se>:
>> Hi,
>>
>> This is a Supermicro X8DTT-HIBQF but it uses the same BIOS as X8DTT-H as
>> refered in DMI. Probably all H8DTT* boards uses same.
>>
>> Anyway attaching flashrom -V outputs.
>
> Can you attach the output of 'lspci -nnvvvxxx' and 'superiotool -deV'
> (run as root) as well? Some code needs to be written to clear the
> erase/write protection, see http://flashrom.org/Board_Enable
>
>>
>> root at spts-10-143:~/flashrom# dmidecode -t baseboard
>> # dmidecode 2.9
>> SMBIOS 2.6 present.
>>
>> Handle 0x0002, DMI type 2, 15 bytes
>> Base Board Information
>>         Manufacturer: Supermicro
>>         Product Name: X8DTT-H
>>         Version: 2.0
>>         Serial Number: 1234567890
>>         Asset Tag: 1234567890
>>         Features:
>>                 Board is a hosting board
>>                 Board is replaceable
>>         Location In Chassis: 1234567890
>>         Chassis Handle: 0x0003
>>         Type: Motherboard
>>         Contained Object Handles: 0
>>
>>
>> Best regards,
>> Jimmie
>>
>> _______________________________________________
>> flashrom mailing list
>> flashrom at flashrom.org
>> http://www.flashrom.org/mailman/listinfo/flashrom

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From c-d.hailfinger.devel.2006 at gmx.net  Sun Dec 25 01:08:34 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 25 Dec 2011 01:08:34 +0100
Subject: [flashrom] [PATCH 1/5] layout: change return type and name of
 find_next_included_romentry
In-Reply-To: <1324686920-11113-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4EF66982.9070302@gmx.net>

Am 24.12.2011 01:35 schrieb Stefan Tauner:
>  - rename from find_next_included_romentry to get_next_included_romentry
>  - return a pointer to a rom_entry instead of just its index
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

The changelog only describes what you're doing, but not the reason why.
If you add a short statement about the reason (readability improvement,
whatever) to the changelog, and if you change
if (entry == NULL) {
to
if  (!entry) {
this is
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Sun Dec 25 01:17:24 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 25 Dec 2011 01:17:24 +0100
Subject: [flashrom] [PATCH 2/5] Add deferred -i processing
In-Reply-To: <1324686920-11113-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4EF66B94.20003@gmx.net>

Hi Stefan,

minor commit log nitpicks only.

As first line of the changelog, use this instead for better
searchability of the changelog:
Add deferred --image processing

Am 24.12.2011 01:35 schrieb Stefan Tauner:
> The general idea and most of the code is stolen from chromiumos:

The general idea and most of the code are based on the following
commits in the chromiumos flashrom tree:



> 8fc0740356ca15d02fb1c65ab43b10844f148c3b
> bb9049c66ca55e0dc621dd2c70b5d2cb6e5179bf
> Signed-off-by: Louis Yung-Chieh Lo <yjlou at chromium.org>
>
> and the main part:
> d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8
> Signed-off-by: David Hendricks <dhendrix at chromium.org>
>
> My implementation does not defer the processing until doit(), but after the

s/My/This/


> argument parsing loop only (doit() should not contain argument checks).
>
> This allows to specify -i and -l parameters in any order.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> Acked-by: David Hendricks <dhendrix at google.com>

You already have an ack, go ahead.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Sun Dec 25 01:59:35 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 25 Dec 2011 01:59:35 +0100
Subject: [flashrom] [PATCH 3/5] layout: Add -i <image>[:<file>] support
In-Reply-To: <1324686920-11113-4-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-4-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4EF67577.7060106@gmx.net>

Am 24.12.2011 01:35 schrieb Stefan Tauner:
> Add an optional sub-parameter to the -i parameter to allow building the
> image to be written from multiple files. This will also allow regions to
> be read from flash and written to separate image files in a later patch.
>
> based on chromiumos'
> d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8
> Signed-off-by: David Hendricks <dhendrix at chromium.org>
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Just a few short comments, not a complete review yet.
General comment:
Author attribution seems to have been partially lost and/or another
patch ("make read before write configurable") was mixed in.

Implementation issues:
The function names are totally misleading. write_buf_to_file() does not
write a buffer to a file anymore. write_dump_to_file() doesn't do what
the function name says either. write_buf_to_file() should stay exactly
like it is now unless someone redefines what a buffer or a file is. If
you need a function which writes all flash chip contents to one file and
parts of it to other files, call it
write_chipcontents_to_files_with_layout or something like that.

Design issues:
Specifying a file name from which flashrom should fetch a region and to
which flashrom should write a region has three main issues:
- It kills UI consistency. What happens if you have a region called
"all" which covers the whole flash chip? Specifying a filename for
region "all" means any supplied filename as --read or --write parameter
will be completely ignored but still be required.
- If one image is specified with a file name, will the file name for
--read/--write be ignored? If not, this means we still can't deal with
read-locked regions. If yes, what's the point in requiring a file name
for --read/--write?
- IMHO specifying region file names should happen in a layout file, but
that's arguably debatable.


Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 09:59:50 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 09:59:50 +0100
Subject: [flashrom] [PATCH 1/5] layout: change return type and name of
 find_next_included_romentry
In-Reply-To: <4EF66982.9070302@gmx.net>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4EF66982.9070302@gmx.net>
Message-ID: <201112250900.pBP900bD024907@mail2.student.tuwien.ac.at>

On Sun, 25 Dec 2011 01:08:34 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 24.12.2011 01:35 schrieb Stefan Tauner:
> >  - rename from find_next_included_romentry to get_next_included_romentry
> >  - return a pointer to a rom_entry instead of just its index
> >
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> 
> The changelog only describes what you're doing, but not the reason why.
> If you add a short statement about the reason (readability improvement,
> whatever) to the changelog,

oh that's a hard task.
first of all because i dont remember why i did it back then. secondly
because there is no obvious reason to change it. the index allows
accessing more information than a pointer to just a single object/entry.
the benefit as i see it is - as you said - readability. but it is
also way more natural to dereference the pointer to an object and then
operate on it than accessing it by retrieving it manually from an
array. the former hides the retrieving process so that the entries
could be stored completely differently so it is also an improvement of
segregation.

ha, now it isnt that hard anymore :)

> and if you change
> if (entry == NULL) {
> to
> if  (!entry) {

i really hate, when c programmers do that. imho it's less readable
without any worthy benefits, especially if used in single-term ifs.
changed anyway.

> this is
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

thanks!
will commit it in r1481 if no one beats me to it ;)

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Sun Dec 25 10:08:00 2011
From: svn at flashrom.org (repository service)
Date: Sun, 25 Dec 2011 10:08:00 +0100
Subject: [flashrom] [commit] r1481 - trunk
Message-ID: <E1Rek3k-00046q-4Q@ra.coresystems.de>

Author: stefanct
Date: Sun Dec 25 10:07:59 2011
New Revision: 1481
URL: http://flashrom.org/trac/flashrom/changeset/1481

Log:
layout: change return type and name of find_next_included_romentry

 - rename from find_next_included_romentry to get_next_included_romentry
 - return a pointer to a rom_entry instead of just its index.
   this relieves the (single existing) caller from directly accessing the
   data structure holding the entries hence improving segregation and
   readability.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/layout.c

Modified: trunk/layout.c
==============================================================================
--- trunk/layout.c	Sat Dec 24 01:00:32 2011	(r1480)
+++ trunk/layout.c	Sun Dec 25 10:07:59 2011	(r1481)
@@ -215,26 +215,28 @@
 	return -1;
 }
 
-int find_next_included_romentry(unsigned int start)
+romlayout_t *get_next_included_romentry(unsigned int start)
 {
 	int i;
 	unsigned int best_start = UINT_MAX;
-	int best_entry = -1;
+	romlayout_t *best_entry = NULL;
+	romlayout_t *cur;
 
 	/* First come, first serve for overlapping regions. */
 	for (i = 0; i < romimages; i++) {
-		if (!rom_entries[i].included)
+		cur = &rom_entries[i];
+		if (!cur->included)
 			continue;
 		/* Already past the current entry? */
-		if (start > rom_entries[i].end)
+		if (start > cur->end)
 			continue;
 		/* Inside the current entry? */
-		if (start >= rom_entries[i].start)
-			return i;
+		if (start >= cur->start)
+			return cur;
 		/* Entry begins after start. */
-		if (best_start > rom_entries[i].start) {
-			best_start = rom_entries[i].start;
-			best_entry = i;
+		if (best_start > cur->start) {
+			best_start = cur->start;
+			best_entry = cur;
 		}
 	}
 	return best_entry;
@@ -243,7 +245,7 @@
 int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
-	int entry;
+	romlayout_t *entry;
 	unsigned int size = flash->total_size * 1024;
 
 	/* If no layout file was specified or the layout file was empty, assume
@@ -255,22 +257,21 @@
 	 * The union of all included romentries is used from the new image.
 	 */
 	while (start < size) {
-		entry = find_next_included_romentry(start);
+		entry = get_next_included_romentry(start);
 		/* No more romentries for remaining region? */
-		if (entry < 0) {
+		if (!entry) {
 			memcpy(newcontents + start, oldcontents + start,
 			       size - start);
 			break;
 		}
-		if (rom_entries[entry].start > start)
+		if (entry->start > start)
 			memcpy(newcontents + start, oldcontents + start,
-			       rom_entries[entry].start - start);
+			       entry->start - start);
 		/* Skip to location after current romentry. */
-		start = rom_entries[entry].end + 1;
+		start = entry->end + 1;
 		/* Catch overflow. */
 		if (!start)
 			break;
 	}
-			
 	return 0;
 }


From svn at flashrom.org  Sun Dec 25 10:12:16 2011
From: svn at flashrom.org (repository service)
Date: Sun, 25 Dec 2011 10:12:16 +0100
Subject: [flashrom] [commit] r1482 - trunk
Message-ID: <E1Rek7s-0004zR-OW@ra.coresystems.de>

Author: stefanct
Date: Sun Dec 25 10:12:16 2011
New Revision: 1482
URL: http://flashrom.org/trac/flashrom/changeset/1482

Log:
Add deferred --image processing

The general idea and most of the code are based on the following
commits in the chromiumos flashrom tree:

8fc0740356ca15d02fb1c65ab43b10844f148c3b
bb9049c66ca55e0dc621dd2c70b5d2cb6e5179bf
Signed-off-by: Louis Yung-Chieh Lo <yjlou at chromium.org>

and the main part:
d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8
Signed-off-by: David Hendricks <dhendrix at chromium.org>

This implementation does not defer the processing until doit(), but after the
argument parsing loop only (doit() should not contain argument checks).

This allows to specify -i and -l parameters in any order.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: David Hendricks <dhendrix at google.com>

Modified:
   trunk/cli_classic.c
   trunk/flash.h
   trunk/layout.c

Modified: trunk/cli_classic.c
==============================================================================
--- trunk/cli_classic.c	Sun Dec 25 10:07:59 2011	(r1481)
+++ trunk/cli_classic.c	Sun Dec 25 10:12:16 2011	(r1482)
@@ -295,14 +295,9 @@
 				cli_classic_abort_usage();
 			break;
 		case 'i':
-			/* FIXME: -l has to be specified before -i. */
 			tempstr = strdup(optarg);
-			if (find_romentry(tempstr) < 0) {
-				fprintf(stderr, "Error: image %s not found in "
-					"layout file or -i specified before "
-					"-l\n", tempstr);
+			if (register_include_arg(tempstr))
 				cli_classic_abort_usage();
-			}
 			break;
 		case 'L':
 			if (++operation_specified > 1) {
@@ -395,6 +390,9 @@
 		cli_classic_abort_usage();
 	}
 
+	if (process_include_args())
+		cli_classic_abort_usage();
+
 	/* FIXME: Print the actions flashrom will take. */
 
 	if (list_supported) {

Modified: trunk/flash.h
==============================================================================
--- trunk/flash.h	Sun Dec 25 10:07:59 2011	(r1481)
+++ trunk/flash.h	Sun Dec 25 10:12:16 2011	(r1482)
@@ -289,8 +289,9 @@
 #define msg_cspew(...)	print(MSG_BARF, __VA_ARGS__)	/* chip debug barf  */
 
 /* layout.c */
+int register_include_arg(char *name);
+int process_include_args(void);
 int read_romlayout(char *name);
-int find_romentry(char *name);
 int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */

Modified: trunk/layout.c
==============================================================================
--- trunk/layout.c	Sun Dec 25 10:07:59 2011	(r1481)
+++ trunk/layout.c	Sun Dec 25 10:12:16 2011	(r1482)
@@ -41,6 +41,12 @@
 	char name[256];
 } romlayout_t;
 
+/* include_args lists arguments specified at the command line with -i. They
+ * must be processed at some point so that desired regions are marked as
+ * "included" in the rom_entries list.
+ */
+static char *include_args[MAX_ROMLAYOUT];
+static int num_include_args = 0; /* the number of valid entries. */
 static romlayout_t rom_entries[MAX_ROMLAYOUT];
 
 #if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */
@@ -156,10 +162,8 @@
 
 		if (romimages >= MAX_ROMLAYOUT) {
 			msg_gerr("Maximum number of ROM images (%i) in layout "
-				 "file reached before end of layout file.\n",
-				 MAX_ROMLAYOUT);
-			msg_gerr("Ignoring the rest of the layout file.\n");
-			break;
+				 "file reached.\n", MAX_ROMLAYOUT);
+			return 1;
 		}
 		if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name))
 			continue;
@@ -194,27 +198,80 @@
 }
 #endif
 
-int find_romentry(char *name)
+/* register an include argument (-i) for later processing */
+int register_include_arg(char *name)
+{
+	if (num_include_args >= MAX_ROMLAYOUT) {
+		msg_gerr("Too many regions included (%i).\n", num_include_args);
+		return 1;
+	}
+
+	if (name == NULL) {
+		msg_gerr("<NULL> is a bad region name.\n");
+		return 1;
+	}
+
+	include_args[num_include_args] = name;
+	num_include_args++;
+	return 0;
+}
+
+/* returns the index of the entry (or a negative value if it is not found) */
+static int find_romentry(char *name)
 {
 	int i;
 
 	if (!romimages)
 		return -1;
 
-	msg_ginfo("Looking for \"%s\"... ", name);
-
+	msg_gspew("Looking for region \"%s\"... ", name);
 	for (i = 0; i < romimages; i++) {
 		if (!strcmp(rom_entries[i].name, name)) {
 			rom_entries[i].included = 1;
-			msg_ginfo("found.\n");
+			msg_gspew("found.\n");
 			return i;
 		}
 	}
-	msg_ginfo("not found.\n");	// Not found. Error.
-
+	msg_gspew("not found.\n");
 	return -1;
 }
 
+/* process -i arguments
+ * returns 0 to indicate success, >0 to indicate failure
+ */
+int process_include_args(void)
+{
+	int i;
+	unsigned int found = 0;
+
+	if (num_include_args == 0)
+		return 0;
+
+	for (i = 0; i < num_include_args; i++) {
+		/* User has specified an area, but no layout file is loaded. */
+		if (!romimages) {
+			msg_gerr("Region requested (with -i \"%s\"), "
+				 "but no layout data is available.\n",
+				 include_args[i]);
+			return 1;
+		}
+
+		if (find_romentry(include_args[i]) < 0) {
+			msg_gerr("Invalid region specified: \"%s\"\n",
+				 include_args[i]);
+			return 1;
+		}
+		found++;
+	}
+
+	msg_ginfo("Using region%s: \"%s\"", num_include_args > 1 ? "s" : "",
+		  include_args[0]);
+	for (i = 1; i < num_include_args; i++)
+		msg_ginfo(", \"%s\"", include_args[i]);
+	msg_ginfo(".\n");
+	return 0;
+}
+
 romlayout_t *get_next_included_romentry(unsigned int start)
 {
 	int i;
@@ -248,11 +305,12 @@
 	romlayout_t *entry;
 	unsigned int size = flash->total_size * 1024;
 
-	/* If no layout file was specified or the layout file was empty, assume
-	 * that the user wants to flash the complete new image.
+	/* If no regions were specified for inclusion, assume
+	 * that the user wants to write the complete new image.
 	 */
-	if (!romimages)
+	if (num_include_args == 0)
 		return 0;
+
 	/* Non-included romentries are ignored.
 	 * The union of all included romentries is used from the new image.
 	 */
@@ -264,6 +322,7 @@
 			       size - start);
 			break;
 		}
+		/* For non-included region, copy from old content. */
 		if (entry->start > start)
 			memcpy(newcontents + start, oldcontents + start,
 			       entry->start - start);


From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 10:14:39 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 10:14:39 +0100
Subject: [flashrom] [PATCH 2/5] Add deferred -i processing
In-Reply-To: <4EF66B94.20003@gmx.net>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4EF66B94.20003@gmx.net>
Message-ID: <201112250914.pBP9EnID030578@mail2.student.tuwien.ac.at>

On Sun, 25 Dec 2011 01:17:24 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Hi Stefan,
> 
> minor commit log nitpicks only.
> 
> As first line of the changelog, use this instead for better
> searchability of the changelog:
> Add deferred --image processing
> 
> Am 24.12.2011 01:35 schrieb Stefan Tauner:
> > The general idea and most of the code is stolen from chromiumos:
> 
> The general idea and most of the code are based on the following
> commits in the chromiumos flashrom tree:
> 
> 
> 
> > 8fc0740356ca15d02fb1c65ab43b10844f148c3b
> > bb9049c66ca55e0dc621dd2c70b5d2cb6e5179bf
> > Signed-off-by: Louis Yung-Chieh Lo <yjlou at chromium.org>
> >
> > and the main part:
> > d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8
> > Signed-off-by: David Hendricks <dhendrix at chromium.org>
> >
> > My implementation does not defer the processing until doit(), but after the
> 
> s/My/This/

just out of interest: why? this was added to emphasize the difference
to chromiumos.

> > argument parsing loop only (doit() should not contain argument checks).
> >
> > This allows to specify -i and -l parameters in any order.
> >
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> > Acked-by: David Hendricks <dhendrix at google.com>
> 
> You already have an ack, go ahead.

thanks, committed in r1482

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 17:42:25 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 17:42:25 +0100
Subject: [flashrom] [PATCH 3/5] layout: Add -i <image>[:<file>] support
In-Reply-To: <4EF67577.7060106@gmx.net>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-4-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4EF67577.7060106@gmx.net>
Message-ID: <201112251642.pBPGgc1R030494@mail2.student.tuwien.ac.at>

On Sun, 25 Dec 2011 01:59:35 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Author attribution seems to have been partially lost and/or another
> patch ("make read before write configurable") was mixed in.

right. i mangled and merged three of the patches together when rebasing
them for "Dispensored"'s X8DTU three days ago.
i will repost the series now as layout 2.1 in the hope that i have
separated them correctly (git helped a lot :) but please be aware of
possible artifacts.

some of the comments do not regard the --image patch but later ones. i
will work on those issues regardless of that - no need to re-comment
them.
 
> Design issues:
> Specifying a file name from which flashrom should fetch a region and to
> which flashrom should write a region has three main issues:
> - It kills UI consistency. What happens if you have a region called
> "all" which covers the whole flash chip? Specifying a filename for
> region "all" means any supplied filename as --read or --write parameter
> will be completely ignored but still be required.

for --read it is not ignored iirc but only those regions marked to be
fetched via -i are included and the rest is filled with 0x00s. this
creates a chip-sized file which might be useful to some e.g. if they
want to manipulate it by editing some stuff. i will call this (i.e.
files which are parameters to --write/--read/--verify but are
used/filled only partially) "complete" files below.
in the case of --read'ing "all" this would produce two identical files
(i guess). for --write you are right to the point.
i notices this problem but did not even try to mitigate it because i
wanted to discuss the whole approached first so thanks for bringing it
up :)

without thinking too much about the possible implementation i would say
that we want to *require* the bare minimum of files and images for a given
operation to complete it successfully.

currently i always write a "complete" image for --read operations but
this might not be wanted and could be optional - if the -i option is
used at least once. atm it is not necessary to give an image name
because it defaults to the range's name. but this also forcibly creates
files, when the -i option is used - even if the user does not need it.
maybe we should let the desire for an image be defined by including the
(optional) ':'?

for --write we need enough data to cover the to be written range(s).
this can come from the "complete" image or the -i ones. and in case we
care for the erase block layout we also need to be sure that the data
is read from the chip where it is needed because it would get deleted
but was not supplied/included via files. the latter is not an issue
(yet) because the complete chip is (still) read in the case of writes.

> - If one image is specified with a file name, will the file name for
> --read/--write be ignored? If not, this means we still can't deal with
> read-locked regions. If yes, what's the point in requiring a file name
> for --read/--write?
if one disables the complete reads (via the variable of the
infrastructure patch) it will not be ignored completely, but will not
get in the way either (i.e. provide "background" data for write
operations which is then not used for -i options where an image is also
included or for read operations as "complete" image).

> - IMHO specifying region file names should happen in a layout file, but
> that's arguably debatable.
no harm in supporting both :)
i did not do so due to the existing implementation in chromiumos and
the needed layout file changes.
the command line is easier to use in case you want to create
differently named files of the same region - for example when working
with multiple chips.
precedence of data to be written (to the chip) should imho be:
-i's file (name) > layout's file (name) > "complete" file

another point which needs to be discussed is the precedence of
overlapping regions. without any -i's files given this is not an issue.
we just merge the regions automatically - the data for a single address
is the same anyway.
when different files are given this is no longer true. i think the best
option would be to abort and/or require --force in that case in
addition to a defined precedence (e.g. last -i wins).
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 17:56:04 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 17:56:04 +0100
Subject: [flashrom] [PATCH 1/5] layout: Add -i <image>[:<file>] support
In-Reply-To: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324832168-15617-2-git-send-email-stefan.tauner@student.tuwien.ac.at>

Add an optional sub-parameter to the -i parameter to allow building the
image to be written from multiple files. This will also allow regions to
be read from flash and written to separate image files in a later patch.

based on chromiumos'
d0ea9ed71e7f86bb8e8db2ca7c32a96de25343d8
Signed-off-by: David Hendricks <dhendrix at chromium.org>

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---

TODO:
 - man page
 - handling or at least an explanation of precedence of command line
   parameters in case of overlapping regions.
---
 layout.c |   45 ++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 44 insertions(+), 1 deletions(-)

diff --git a/layout.c b/layout.c
index 1f7f01a..4bd1560 100644
--- a/layout.c
+++ b/layout.c
@@ -39,6 +39,7 @@ typedef struct {
 	unsigned int end;
 	unsigned int included;
 	char name[256];
+	char file[256]; /* file == "" means not specified. */
 } romlayout_t;
 
 /* include_args lists arguments specified at the command line with -i. They
@@ -183,6 +184,7 @@ int read_romlayout(char *name)
 		rom_entries[romimages].start = strtol(tstr1, (char **)NULL, 16);
 		rom_entries[romimages].end = strtol(tstr2, (char **)NULL, 16);
 		rom_entries[romimages].included = 0;
+		strcpy(rom_entries[romimages].file, "");
 		romimages++;
 	}
 
@@ -220,14 +222,24 @@ int register_include_arg(char *name)
 static int find_romentry(char *name)
 {
 	int i;
+	char *file = NULL;
 
 	if (!romimages)
 		return -1;
 
-	msg_gspew("Looking for region \"%s\"... ", name);
+	/* -i <image>[:<file>] */
+	if (strtok(name, ":")) {
+		file = strtok(NULL, "");
+	}
+	msg_gspew("Looking for region \"%s\" (file=\"%s\")... ",
+		  name, file ? file : "<not specified>");
+
 	for (i = 0; i < romimages; i++) {
 		if (!strcmp(rom_entries[i].name, name)) {
 			rom_entries[i].included = 1;
+			snprintf(rom_entries[i].file,
+			         sizeof(rom_entries[i].file),
+			         "%s", file ? file : "");
 			msg_gspew("found.\n");
 			return i;
 		}
@@ -299,6 +311,33 @@ romlayout_t *get_next_included_romentry(unsigned int start)
 	return best_entry;
 }
 
+/* If a file name is specified for this region, read the file contents and
+ * overwrite @newcontents in the range specified by @entry.
+ */
+static int read_content_from_file(romlayout_t *entry, uint8_t *newcontents)
+{
+	char *file;
+	FILE *fp;
+	int len;
+
+	file = entry->file;
+	len = entry->end - entry->start + 1;
+	if (file[0] != '\0') {
+		int numbytes;
+		if ((fp = fopen(file, "rb")) == NULL) {
+			perror(file);
+			return 1;
+		}
+		numbytes = fread(newcontents + entry->start, 1, len, fp);
+		fclose(fp);
+		if (numbytes != len) {
+			perror(file);
+			return 1;
+		}
+	}
+	return 0;
+}
+
 int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
@@ -326,6 +365,10 @@ int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *new
 		if (entry->start > start)
 			memcpy(newcontents + start, oldcontents + start,
 			       entry->start - start);
+		/* For included region, copy from file if specified. */
+		if (read_content_from_file(entry, newcontents) != 0)
+			return 1;
+
 		/* Skip to location after current romentry. */
 		start = entry->end + 1;
 		/* Catch overflow. */
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 17:56:03 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 17:56:03 +0100
Subject: [flashrom] [PATCH 0/5] layout patches 2.1
In-Reply-To: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

due to a major mistake the first three patches were merged together before the
2.0 version of this patchset was posted.

Stefan Tauner (5):
  layout: Add -i <image>[:<file>] support
  Make read before write configurable (infrastructure part)
  Use layout for read operations too
  Use layout for verify operations too
  (not for merge) Fix the "Use layout for verify operations too" patch
    in a hacky way

 flash.h    |   10 ++++-
 flashrom.c |  149 ++++++++++++++++++++++++++++++++++++++++++++----------------
 layout.c   |   81 +++++++++++++++++++++++++++-----
 3 files changed, 187 insertions(+), 53 deletions(-)



From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 17:56:05 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 17:56:05 +0100
Subject: [flashrom] [PATCH 2/5] Make read before write configurable
	(infrastructure part)
In-Reply-To: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324832168-15617-3-git-send-email-stefan.tauner@student.tuwien.ac.at>

 - Introduce a variable in doit() that allows to influence
   read-before-write and its consequences.
 - Rename handle_romentries to build_new_image and a description of
   its purpose.
 - Modify build_new_image so that it still works even if the old content
   is not read before.
 - Add copy_old_content() to ease the pain for future patches.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

---

TODO: add UI

This is completely wrong.

When the user wants to skip most of the chip AND wants to avoid the
safety net, it makes no sense at all to read most of the chip in
build_new_image. This is needed because the write/skip logic works by
comparing the old content with the new content.

In the case that old content is already known (because we have read
the whole chip before), this is no problem and even nice from a
architectural point of view. Allowing to skip the reading breaks the
concept though. This patch provides the ugly code that is necessary
so that this concept does not explode. It does not fix the concept
itself. In the case the user wants to write the whole chip, this
provides a real benefit. The smaller the region is that he wants to
update, the smaller the benefit becomes.

The real solution would be to provide the erase and write logic not
just a complete image, from which it can deduce what it can and
should skip, but also a layout-like map of what the user wants to be
changed (or something similar that allows the following). If the old
contents are known, then fine, but if not, read only the parts
needed due to erase block overheads and not everything unnecessarily.
---
 flash.h    |    2 +-
 flashrom.c |   42 ++++++++++++++++++++++--------------------
 layout.c   |   30 +++++++++++++++++++++++++-----
 3 files changed, 48 insertions(+), 26 deletions(-)

diff --git a/flash.h b/flash.h
index e51b6d4..6151e1c 100644
--- a/flash.h
+++ b/flash.h
@@ -292,7 +292,7 @@ int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 int register_include_arg(char *name);
 int process_include_args(void);
 int read_romlayout(char *name);
-int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
+int build_new_image(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */
 struct spi_command {
diff --git a/flashrom.c b/flashrom.c
index f1a6165..708dba0 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1679,6 +1679,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	uint8_t *newcontents;
 	int ret = 0;
 	unsigned long size = flash->total_size * 1024;
+	int read_all_first = 1; /* FIXME: Make this configurable. */
 
 	if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) {
 		msg_cerr("Aborting.\n");
@@ -1745,28 +1746,27 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 
 	/* Read the whole chip to be able to check whether regions need to be
 	 * erased and to give better diagnostics in case write fails.
-	 * The alternative would be to read only the regions which are to be
+	 * The alternative is to read only the regions which are to be
 	 * preserved, but in that case we might perform unneeded erase which
 	 * takes time as well.
 	 */
-	msg_cinfo("Reading old flash chip contents... ");
-	if (flash->read(flash, oldcontents, 0, size)) {
-		ret = 1;
-		msg_cinfo("FAILED.\n");
-		goto out;
+	if (read_all_first) {
+		msg_cinfo("Reading old flash chip contents... ");
+		if (flash->read(flash, oldcontents, 0, size)) {
+			ret = 1;
+			msg_cinfo("FAILED.\n");
+			goto out;
+		}
 	}
 	msg_cinfo("done.\n");
 
-	// This should be moved into each flash part's code to do it 
-	// cleanly. This does the job.
-	handle_romentries(flash, oldcontents, newcontents);
+	/* Build a new image from the given layout. */
+	build_new_image(flash, read_all_first, oldcontents, newcontents);
 
-	// ////////////////////////////////////////////////////////////
-
-	if (write_it) {
-		if (erase_and_write_flash(flash, oldcontents, newcontents)) {
-			msg_cerr("Uh oh. Erase/write failed. Checking if "
-				 "anything changed.\n");
+	if (write_it && erase_and_write_flash(flash, oldcontents, newcontents)) {
+		msg_cerr("Uh oh. Erase/write failed.");
+		if (read_all_first) {
+			msg_cerr("Checking if anything changed... ");
 			if (!flash->read(flash, newcontents, 0, size)) {
 				if (!memcmp(oldcontents, newcontents, size)) {
 					msg_cinfo("Good. It seems nothing was "
@@ -1775,11 +1775,13 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 					ret = 1;
 					goto out;
 				}
-			}
-			emergency_help_message();
-			ret = 1;
-			goto out;
-		}
+			} else
+				msg_cerr("failed.\n");
+		} else
+			msg_cerr("\n");
+		emergency_help_message();
+		ret = 1;
+		goto out;
 	}
 
 	if (verify_it) {
diff --git a/layout.c b/layout.c
index 4bd1560..dac9dac 100644
--- a/layout.c
+++ b/layout.c
@@ -338,7 +338,26 @@ static int read_content_from_file(romlayout_t *entry, uint8_t *newcontents)
 	return 0;
 }
 
-int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
+static void copy_old_content(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents, unsigned int start, unsigned int size)
+{
+	if (!oldcontents_valid) {
+		/* oldcontents is a zero-filled buffer. By reading into
+		 * oldcontents, we avoid a rewrite of identical regions even if
+		 * an initial full chip read didn't happen. */
+		msg_gdbg2("Read a chunk starting from 0x%06x (len=0x%06x).\n",
+			  start, size);
+		flash->read(flash, oldcontents + start, start, size);
+	}
+	memcpy(newcontents + start, oldcontents + start, size);
+}
+
+/**
+ * Modify @newcontents so that it contains the data that should be on the chip
+ * eventually. In the case the user wants to update only parts of it, copy
+ * the chunks to be preserved from @oldcontents to @newcontents. If @oldcontents
+ * is not valid, we need to fetch the current data from the chip first.
+ */
+int build_new_image(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
 	romlayout_t *entry;
@@ -357,14 +376,15 @@ int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *new
 		entry = get_next_included_romentry(start);
 		/* No more romentries for remaining region? */
 		if (!entry) {
-			memcpy(newcontents + start, oldcontents + start,
-			       size - start);
+			copy_old_content(flash, oldcontents_valid, oldcontents,
+					 newcontents, start, size - start);
 			break;
 		}
 		/* For non-included region, copy from old content. */
 		if (entry->start > start)
-			memcpy(newcontents + start, oldcontents + start,
-			       entry->start - start);
+			copy_old_content(flash, oldcontents_valid, oldcontents,
+					 newcontents, start,
+					 entry->start - start);
 		/* For included region, copy from file if specified. */
 		if (read_content_from_file(entry, newcontents) != 0)
 			return 1;
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 17:56:07 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 17:56:07 +0100
Subject: [flashrom] [PATCH 4/5] Use layout for verify operations too
In-Reply-To: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324832168-15617-5-git-send-email-stefan.tauner@student.tuwien.ac.at>

---
this still reads the whole image in...

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.c |   29 +++++++++++++++++++++--------
 1 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/flashrom.c b/flashrom.c
index 2eec0d6..57a5565 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1022,16 +1022,29 @@ notfound:
 
 int verify_flash(struct flashctx *flash, uint8_t *buf)
 {
-	int ret;
 	unsigned int total_size = flash->total_size * 1024;
+	int ret = 0;
+	romlayout_t *l;
 
-	msg_cinfo("Verifying flash... ");
-
-	ret = verify_range(flash, buf, 0, total_size, NULL);
+	msg_cinfo("Verifying... ");
 
-	if (!ret)
-		msg_cinfo("VERIFIED.          \n");
+	l = get_next_included_romentry(0);
+	/* No included rom entries. Assume complete verify wanted. */
+	if (l == NULL)
+		ret = verify_range(flash, buf, 0, total_size, NULL);
+	else do {
+		unsigned int len = l->end - l->start + 1;
+		msg_gdbg2("Verifying \"%s\" 0x%08x - 0x%08x (%uB)... ", l->name,
+			  l->start, l->end, len);
+		if(verify_range(flash, buf + l->start, l->start, len, NULL)) {
+			return 1;
+		}
+		msg_gdbg2("done. ");
+		l = get_next_included_romentry(l->end + 1);
+	} while (l != NULL);
 
+	if (ret == 0)
+		msg_cinfo("VERIFIED.\n");
 	return ret;
 }
 
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 17:56:06 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 17:56:06 +0100
Subject: [flashrom] [PATCH 3/5] Use layout for read operations too
In-Reply-To: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324832168-15617-4-git-send-email-stefan.tauner@student.tuwien.ac.at>

Previously using layout files was useful for write operations only, for
reads it was ignored. This patch added layout handling for reads.

Based on the "Add -i <image>[:<file>] support" patch this one will
output the selected regions to files. If the optional argument is given
it is used as a file name, else the image name will be used.

---
TODO: man page

side note: the execution path of forced reads is wrong or at least
worth a look. it does not use doit() but calls read_flash_to_file()
directly.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flash.h    |    8 ++++++
 flashrom.c |   75 ++++++++++++++++++++++++++++++++++++++++++++++++++++--------
 layout.c   |    8 ------
 3 files changed, 73 insertions(+), 18 deletions(-)

diff --git a/flash.h b/flash.h
index 6151e1c..c4d747b 100644
--- a/flash.h
+++ b/flash.h
@@ -39,6 +39,13 @@
 #define TIMEOUT_ERROR	-101
 
 typedef unsigned long chipaddr;
+typedef struct {
+	unsigned int start;
+	unsigned int end;
+	unsigned int included;
+	char name[256];
+	char file[256]; /* file == "" means not specified. */
+} romlayout_t;
 
 int register_shutdown(int (*function) (void *data), void *data);
 void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
@@ -292,6 +299,7 @@ int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 int register_include_arg(char *name);
 int process_include_args(void);
 int read_romlayout(char *name);
+romlayout_t *get_next_included_romentry(unsigned int start);
 int build_new_image(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */
diff --git a/flashrom.c b/flashrom.c
index 708dba0..2eec0d6 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1069,7 +1069,7 @@ int read_buf_from_file(unsigned char *buf, unsigned long size,
 	return 0;
 }
 
-int write_buf_to_file(unsigned char *buf, unsigned long size,
+int write_dump_to_file(unsigned char *buf, unsigned long size,
 		      const char *filename)
 {
 	unsigned long numbytes;
@@ -1094,26 +1094,81 @@ int write_buf_to_file(unsigned char *buf, unsigned long size,
 	return 0;
 }
 
+int write_buf_to_file(unsigned char *buf, unsigned long size,
+		      const char *filename)
+{
+	romlayout_t *l;
+	int ret = 0;
+
+	ret = write_dump_to_file(buf, size, filename);
+	if (ret)
+		return ret;
+
+	l = get_next_included_romentry(0);
+
+	while (l != NULL) {
+		const char* name = (l->file[0] == '\0') ? l->name : l->file;
+		unsigned int len = l->end - l->start + 1;
+		msg_gdbg2("Writing \"%s\" to \"%s\" 0x%08x - 0x%08x (%uB)... ",
+			  l->name, l->file, l->start, l->end, len);
+		if(write_dump_to_file(buf + l->start, len, name)) {
+			msg_gdbg2("failed. ");
+			return 1;
+		}
+		msg_gdbg2("done. ");
+		l = get_next_included_romentry(l->end + 1);
+	};
+
+	return 0;
+}
+
+int read_flash_to_buf(struct flashctx *flash, uint8_t *buf)
+{
+	romlayout_t *l;
+
+	if (!flash->read) {
+		msg_cerr("No read function available for this flash chip.\n");
+		return 1;
+	}
+
+	l = get_next_included_romentry(0);
+	/* No included rom entries. Assume complete readout wanted. */
+	if (l == NULL)
+		return flash->read(flash, buf, 0, flash->total_size * 1024);
+
+	do {
+		unsigned int len = l->end - l->start + 1;
+		msg_gdbg2("Reading \"%s\" 0x%08x - 0x%08x (%uB)... ", l->name,
+			  l->start, l->end, len);
+		if(flash->read(flash, buf + l->start, l->start, len)) {
+			msg_gdbg2("failed. ");
+			return 1;
+		}
+		msg_gdbg2("done. ");
+		l = get_next_included_romentry(l->end + 1);
+	} while (l != NULL);
+
+	return 0;
+}
+
 int read_flash_to_file(struct flashctx *flash, const char *filename)
 {
 	unsigned long size = flash->total_size * 1024;
-	unsigned char *buf = calloc(size, sizeof(char));
 	int ret = 0;
+	uint8_t *buf;
 
 	msg_cinfo("Reading flash... ");
-	if (!buf) {
+
+	buf = calloc(size, sizeof(uint8_t));
+	if (buf == NULL) {
 		msg_gerr("Memory allocation failed!\n");
-		msg_cinfo("FAILED.\n");
-		return 1;
-	}
-	if (!flash->read) {
-		msg_cerr("No read function available for this flash chip.\n");
 		ret = 1;
 		goto out_free;
 	}
-	if (flash->read(flash, buf, 0, size)) {
+
+	ret = read_flash_to_buf(flash, buf);
+	if (ret != 0) {
 		msg_cerr("Read operation failed!\n");
-		ret = 1;
 		goto out_free;
 	}
 
diff --git a/layout.c b/layout.c
index dac9dac..9b10bb3 100644
--- a/layout.c
+++ b/layout.c
@@ -34,14 +34,6 @@ static int romimages = 0;
 
 #define MAX_ROMLAYOUT	32
 
-typedef struct {
-	unsigned int start;
-	unsigned int end;
-	unsigned int included;
-	char name[256];
-	char file[256]; /* file == "" means not specified. */
-} romlayout_t;
-
 /* include_args lists arguments specified at the command line with -i. They
  * must be processed at some point so that desired regions are marked as
  * "included" in the rom_entries list.
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Dec 25 17:56:08 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 25 Dec 2011 17:56:08 +0100
Subject: [flashrom] [PATCH 5/5] (not for merge) Fix the "Use layout for
	verify operations too" patch in a hacky way
In-Reply-To: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324832168-15617-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1324832168-15617-6-git-send-email-stefan.tauner@student.tuwien.ac.at>

if you look at the second half of doit with this patch applied, it
is quite clear, that most of it should be guarded by a huge
if(write_it) clause. maybe move this into a function?

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/flashrom.c b/flashrom.c
index 57a5565..cafdacf 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -1800,7 +1800,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 		goto out;
 	}
 
-	if (write_it || verify_it) {
+	if (write_it || verify_it) { /* always true: erase and read already goto'ed */
 		if (read_buf_from_file(newcontents, size, filename)) {
 			ret = 1;
 			goto out;
@@ -1818,7 +1818,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	 * preserved, but in that case we might perform unneeded erase which
 	 * takes time as well.
 	 */
-	if (read_all_first) {
+	if (read_all_first && write_it) {
 		msg_cinfo("Reading old flash chip contents... ");
 		if (flash->read(flash, oldcontents, 0, size)) {
 			ret = 1;
@@ -1829,7 +1829,8 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	msg_cinfo("done.\n");
 
 	/* Build a new image from the given layout. */
-	build_new_image(flash, read_all_first, oldcontents, newcontents);
+	if (write_it)
+		build_new_image(flash, read_all_first, oldcontents, newcontents);
 
 	if (write_it && erase_and_write_flash(flash, oldcontents, newcontents)) {
 		msg_cerr("Uh oh. Erase/write failed.");
-- 
1.7.1



From leewdaugherty at gmail.com  Mon Dec 26 18:10:27 2011
From: leewdaugherty at gmail.com (Lee Daugherty)
Date: Mon, 26 Dec 2011 11:10:27 -0600
Subject: [flashrom] SUCCESS - NVIDIA MCP61 (10de:03e1)
Message-ID: <CABSyf6oQcNm8=DeudH8Pe3P31zLAzHP5FmEYrzWjOssQE7UZ7Q@mail.gmail.com>

ldaugherty at Desktop-AMD:~/Downloads$ sudo flashrom -V -w A7309NMS.A60
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (x86_64), built with libpci
3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 1155M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1006 us, 10000 myus
= 10005 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "MSI"
DMI string system-product-name: "MS-7309"
DMI string system-version: "2.0"
DMI string baseboard-manufacturer: "MSI"
DMI string baseboard-product-name: "K9N6PGM2-V2 (MS-7309)  "
DMI string baseboard-version: "2.0"
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP61" with PCI ID 10de:03e1.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Flash bus type is SPI
SPI on this chipset is WIP. Please report any success or failure by mailing
us the verbose output to flashrom at flashrom.org, thanks!
Found SMBus device 10de:03eb at 00:01:1
MCP SPI BAR is at 0xfec80000
Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544.
SPI control is 0x0002, req=0, gnt=0
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for
your
chipset. Thanks.
OK.
WARNING: unexpected second chipset match: "NVIDIA MCP61"
ignoring, please report lspci and board URL to flashrom at flashrom.org
with 'CHIPSET: your board name' in the subject line.
This chipset supports the following protocols: SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Chip status register is 00
Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address
0xfff00000.
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4014
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4014
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4014
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x4014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xef, id2 0x13
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0...
0x000000-0x000fff:EW, 0x001000-0x001fff:EW, 0x002000-0x002fff:EW,
0x003000-0x003fff:EW, 0x004000-0x004fff:EW, 0x005000-0x005fff:EW,
0x006000-0x006fff:EW, 0x007000-0x007fff:EW, 0x008000-0x008fff:EW,
0x009000-0x009fff:EW, 0x00a000-0x00afff:EW, 0x00b000-0x00bfff:EW,
0x00c000-0x00cfff:EW, 0x00d000-0x00dfff:EW, 0x00e000-0x00efff:EW,
0x00f000-0x00ffff:EW, 0x010000-0x010fff:EW, 0x011000-0x011fff:EW,
0x012000-0x012fff:EW, 0x013000-0x013fff:EW, 0x014000-0x014fff:EW,
0x015000-0x015fff:EW, 0x016000-0x016fff:EW, 0x017000-0x017fff:EW,
0x018000-0x018fff:EW, 0x019000-0x019fff:EW, 0x01a000-0x01afff:EW,
0x01b000-0x01bfff:EW, 0x01c000-0x01cfff:EW, 0x01d000-0x01dfff:EW,
0x01e000-0x01efff:EW, 0x01f000-0x01ffff:EW, 0x020000-0x020fff:EW,
0x021000-0x021fff:EW, 0x022000-0x022fff:EW, 0x023000-0x023fff:EW,
0x024000-0x024fff:EW, 0x025000-0x025fff:EW, 0x026000-0x026fff:EW,
0x027000-0x027fff:EW, 0x028000-0x028fff:EW, 0x029000-0x029fff:EW,
0x02a000-0x02afff:EW, 0x02b000-0x02bfff:EW, 0x02c000-0x02cfff:EW,
0x02d000-0x02dfff:EW, 0x02e000-0x02efff:EW, 0x02f000-0x02ffff:EW,
0x030000-0x030fff:EW, 0x031000-0x031fff:EW, 0x032000-0x032fff:EW,
0x033000-0x033fff:EW, 0x034000-0x034fff:EW, 0x035000-0x035fff:EW,
0x036000-0x036fff:EW, 0x037000-0x037fff:EW, 0x038000-0x038fff:EW,
0x039000-0x039fff:EW, 0x03a000-0x03afff:EW, 0x03b000-0x03bfff:EW,
0x03c000-0x03cfff:EW, 0x03d000-0x03dfff:EW, 0x03e000-0x03efff:EW,
0x03f000-0x03ffff:EW, 0x040000-0x040fff:EW, 0x041000-0x041fff:EW,
0x042000-0x042fff:EW, 0x043000-0x043fff:EW, 0x044000-0x044fff:EW,
0x045000-0x045fff:EW, 0x046000-0x046fff:EW, 0x047000-0x047fff:EW,
0x048000-0x048fff:EW, 0x049000-0x049fff:EW, 0x04a000-0x04afff:EW,
0x04b000-0x04bfff:EW, 0x04c000-0x04cfff:EW, 0x04d000-0x04dfff:EW,
0x04e000-0x04efff:EW, 0x04f000-0x04ffff:EW, 0x050000-0x050fff:EW,
0x051000-0x051fff:EW, 0x052000-0x052fff:EW, 0x053000-0x053fff:S,
0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x056000-0x056fff:S,
0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S,
0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S,
0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S,
0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S,
0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S,
0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S,
0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S,
0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S,
0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S,
0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S,
0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S,
0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S,
0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S,
0x07e000-0x07efff:S, 0x07f000-0x07ffff:S, 0x080000-0x080fff:S,
0x081000-0x081fff:S, 0x082000-0x082fff:S, 0x083000-0x083fff:S,
0x084000-0x084fff:S, 0x085000-0x085fff:S, 0x086000-0x086fff:S,
0x087000-0x087fff:S, 0x088000-0x088fff:S, 0x089000-0x089fff:S,
0x08a000-0x08afff:S, 0x08b000-0x08bfff:S, 0x08c000-0x08cfff:S,
0x08d000-0x08dfff:S, 0x08e000-0x08efff:S, 0x08f000-0x08ffff:S,
0x090000-0x090fff:E, 0x091000-0x091fff:S, 0x092000-0x092fff:S,
0x093000-0x093fff:EW, 0x094000-0x094fff:EW, 0x095000-0x095fff:EW,
0x096000-0x096fff:EW, 0x097000-0x097fff:EW, 0x098000-0x098fff:EW,
0x099000-0x099fff:EW, 0x09a000-0x09afff:EW, 0x09b000-0x09bfff:EW,
0x09c000-0x09cfff:EW, 0x09d000-0x09dfff:EW, 0x09e000-0x09efff:EW,
0x09f000-0x09ffff:EW, 0x0a0000-0x0a0fff:EW, 0x0a1000-0x0a1fff:EW,
0x0a2000-0x0a2fff:EW, 0x0a3000-0x0a3fff:EW, 0x0a4000-0x0a4fff:EW,
0x0a5000-0x0a5fff:EW, 0x0a6000-0x0a6fff:EW, 0x0a7000-0x0a7fff:EW,
0x0a8000-0x0a8fff:EW, 0x0a9000-0x0a9fff:EW, 0x0aa000-0x0aafff:EW,
0x0ab000-0x0abfff:EW, 0x0ac000-0x0acfff:EW, 0x0ad000-0x0adfff:EW,
0x0ae000-0x0aefff:EW, 0x0af000-0x0affff:EW, 0x0b0000-0x0b0fff:EW,
0x0b1000-0x0b1fff:EW, 0x0b2000-0x0b2fff:EW, 0x0b3000-0x0b3fff:EW,
0x0b4000-0x0b4fff:EW, 0x0b5000-0x0b5fff:EW, 0x0b6000-0x0b6fff:EW,
0x0b7000-0x0b7fff:EW, 0x0b8000-0x0b8fff:EW, 0x0b9000-0x0b9fff:EW,
0x0ba000-0x0bafff:EW, 0x0bb000-0x0bbfff:EW, 0x0bc000-0x0bcfff:EW,
0x0bd000-0x0bdfff:EW, 0x0be000-0x0befff:EW, 0x0bf000-0x0bffff:EW,
0x0c0000-0x0c0fff:EW, 0x0c1000-0x0c1fff:EW, 0x0c2000-0x0c2fff:EW,
0x0c3000-0x0c3fff:EW, 0x0c4000-0x0c4fff:EW, 0x0c5000-0x0c5fff:EW,
0x0c6000-0x0c6fff:EW, 0x0c7000-0x0c7fff:EW, 0x0c8000-0x0c8fff:EW,
0x0c9000-0x0c9fff:EW, 0x0ca000-0x0cafff:EW, 0x0cb000-0x0cbfff:EW,
0x0cc000-0x0ccfff:EW, 0x0cd000-0x0cdfff:EW, 0x0ce000-0x0cefff:EW,
0x0cf000-0x0cffff:EW, 0x0d0000-0x0d0fff:EW, 0x0d1000-0x0d1fff:EW,
0x0d2000-0x0d2fff:EW, 0x0d3000-0x0d3fff:EW, 0x0d4000-0x0d4fff:EW,
0x0d5000-0x0d5fff:EW, 0x0d6000-0x0d6fff:EW, 0x0d7000-0x0d7fff:EW,
0x0d8000-0x0d8fff:EW, 0x0d9000-0x0d9fff:EW, 0x0da000-0x0dafff:EW,
0x0db000-0x0dbfff:EW, 0x0dc000-0x0dcfff:EW, 0x0dd000-0x0ddfff:EW,
0x0de000-0x0defff:EW, 0x0df000-0x0dffff:EW, 0x0e0000-0x0e0fff:S,
0x0e1000-0x0e1fff:S, 0x0e2000-0x0e2fff:S, 0x0e3000-0x0e3fff:S,
0x0e4000-0x0e4fff:S, 0x0e5000-0x0e5fff:S, 0x0e6000-0x0e6fff:S,
0x0e7000-0x0e7fff:S, 0x0e8000-0x0e8fff:S, 0x0e9000-0x0e9fff:S,
0x0ea000-0x0eafff:S, 0x0eb000-0x0ebfff:S, 0x0ec000-0x0ecfff:E,
0x0ed000-0x0edfff:S, 0x0ee000-0x0eefff:S, 0x0ef000-0x0effff:S,
0x0f0000-0x0f0fff:EW, 0x0f1000-0x0f1fff:S, 0x0f2000-0x0f2fff:S,
0x0f3000-0x0f3fff:S, 0x0f4000-0x0f4fff:EW, 0x0f5000-0x0f5fff:EW,
0x0f6000-0x0f6fff:S, 0x0f7000-0x0f7fff:EW, 0x0f8000-0x0f8fff:EW,
0x0f9000-0x0f9fff:EW, 0x0fa000-0x0fafff:EW, 0x0fb000-0x0fbfff:EW,
0x0fc000-0x0fcfff:S, 0x0fd000-0x0fdfff:EW, 0x0fe000-0x0fefff:S,
0x0ff000-0x0fffff:EW
Erase/write done.
Verifying flash... VERIFIED.
ldaugherty at Desktop-AMD:~/Downloads$
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From c-d.hailfinger.devel.2006 at gmx.net  Mon Dec 26 20:39:21 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 26 Dec 2011 20:39:21 +0100
Subject: [flashrom] [PATCH 4/5] Use layout for verify operations too
In-Reply-To: <1324686920-11113-5-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-5-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4EF8CD69.90001@gmx.net>

Am 24.12.2011 01:35 schrieb Stefan Tauner:
> this still reads the whole image in...
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

This kills the flashrom reliability guarantee. If someone specifies an
image for inclusion and flashing goes wrong outside the image region
(accidental erase for a too large region, may happen for Macronix
eLiteFlash which has the same ID as normal Macronix flash or for any
chip/programmer driver bug), flashrom won't notice and the user is left
with garbage in the chip despite a "SUCCESS" message.

The only case where skipping verify of any region is allowable is an
unreadable region. Such an unreadable region should be skipped with a
message along the lines of "Skipping verify for inaccessible region
0xfoo-0xbar".

And in the end it boils down to the old problem: How do we specify
regions and their characteristics?

Suggestion, more of an RFC than a hard proposal:

struct region{
char *name;
unsigned int rwflags;
unsigned int start;
unsigned int end;
_Bool included;
};

rwflags would be a bit for each of may_write and may_read, or a bit for
each of dont_write and dont_read. Not sure which one is preferable.

This also means we need a new layout file version.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Mon Dec 26 22:03:54 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 26 Dec 2011 22:03:54 +0100
Subject: [flashrom] [PATCH 2/5] Add deferred -i processing
In-Reply-To: <201112250914.pBP9EnID030578@mail2.student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4EF66B94.20003@gmx.net>
	<201112250914.pBP9EnID030578@mail2.student.tuwien.ac.at>
Message-ID: <4EF8E13A.7050000@gmx.net>

Am 25.12.2011 10:14 schrieb Stefan Tauner:
> On Sun, 25 Dec 2011 01:17:24 +0100 Carl-Daniel Hailfinger wrote:
>> minor commit log nitpicks only.
>>
>>> My implementation does not defer the processing until doit(),
>>
>> s/My/This/
> just out of interest: why? this was added to emphasize the difference
> to chromiumos.

Ah, I didn't notice that. Makes sense. I just thought "this" was enough
of a differentiator, but you're right that "my" has a stronger emphasis.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Tue Dec 27 02:26:42 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 27 Dec 2011 02:26:42 +0100
Subject: [flashrom] [PATCH 4/5] Use layout for verify operations too
In-Reply-To: <4EF8CD69.90001@gmx.net>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-5-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4EF8CD69.90001@gmx.net>
Message-ID: <201112270127.pBR1R28i006832@mail2.student.tuwien.ac.at>

On Mon, 26 Dec 2011 20:39:21 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 24.12.2011 01:35 schrieb Stefan Tauner:
> > this still reads the whole image in...
> >
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> 
> This kills the flashrom reliability guarantee. If someone specifies an
> image for inclusion and flashing goes wrong outside the image region
> (accidental erase for a too large region, may happen for Macronix
> eLiteFlash which has the same ID as normal Macronix flash or for any
> chip/programmer driver bug), flashrom won't notice and the user is left
> with garbage in the chip despite a "SUCCESS" message.
right, this is nonsense. the patch afaics changes the verification not
only for -v but also for -w runs. how do you feel about changing the -v
operation only? my gut instinct screams "inconsistency!" but it might
be useful and the observed inconsistency real isn't one: the
verification in write mode needs to guarantee that old data is not
changed, but this is not necessary in -v.
if anyone would use this is another question of course :)

> The only case where skipping verify of any region is allowable is an
> unreadable region. Such an unreadable region should be skipped with a
> message along the lines of "Skipping verify for inaccessible region
> 0xfoo-0xbar".
jup, but this has nothing to do with what the user actually requested us
to do. this patch set focused on the CLI.

> And in the end it boils down to the old problem: How do we specify
> regions and their characteristics?
> 
> Suggestion, more of an RFC than a hard proposal:
> 
> struct region{
> char *name;
> unsigned int rwflags;
might also use _Bool, or bit fields.
both have the disadvantage that you cant access both bits
"concurrently". the question is if we will have to access them more
often together or individually.
we should probably implement macros to allow both no matter what the
data structure is(?)

> unsigned int start;
> unsigned int end;
or we could start introducing a flash address type and #define it to be
unsigned int? not really related, but id like to see something like
that sooner rather then later and this would be a good starting point :)

> _Bool included;

char *comment; // not to be used in a lot of places but at least in the
layout file itself. dunno if it makes sense to parse it (and hence
include in the data structure). 
we could specify information regarding the origin of a region and/or an
error message that explains the origin though.
by origin i mean that we will have various sources of access rights:
layout files, CLI switches, chips, programmers (and boards)... it might
be useful to know where it comes from in cases of errors or uncommon
behavior like your example above...
"Skipping verify for inaccessible region 0xfoo-0xbar specified by
programmer 'ichspi'".

> };
> 
> rwflags would be a bit for each of may_write and may_read, or a bit for
> each of dont_write and dont_read. Not sure which one is preferable.
hm. i wonder if we need more than that... namely a "don't care" state
for both (read and write). this would be useful to define requested
operations and unify them with access rights.
for example the CLI + layout information could be put into a collection
of regions with read and write bits set appropriately and any
restriction from the flash chip might be queried and returned by a
similar collection. before the process is carried out we unify the
collections and look for conflicts. we would need/want a "verify" and
"erase" flag too then...

i have only a vague idea where we will use the region data structure. we
should probably make a list of use cases and needed fields.

> This also means we need a new layout file version.
i dont like the current one anyway. hex numbers without a pre-/suffixes
are just wrong. ;)

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From the_niz at nurdspace.nl  Tue Dec 27 23:59:54 2011
From: the_niz at nurdspace.nl (The Niz .)
Date: Tue, 27 Dec 2011 22:59:54 +0000
Subject: [flashrom] satasii PCI0680 tested V29C51002T-90P write
In-Reply-To: <201112212339.pBLNd8KQ004932@mail2.student.tuwien.ac.at>
References: <BLU159-W3138144C0D2FA612891E8AC0A50@phx.gbl>,
	<201112212339.pBLNd8KQ004932@mail2.student.tuwien.ac.at>
Message-ID: <BLU159-W6938E7C1010B08D3F3EAFC0AF0@phx.gbl>


Hey Stefan,
Hehe okay, thanks for mentioning.I'll try to get some real results in the future :) See you soon on IRC!
Best regards,Dennis van der Linden

----------------------------------------
> Date: Thu, 22 Dec 2011 00:38:56 +0100
> From: stefan.tauner at student.tuwien.ac.at
> To: the_niz at nurdspace.nl
> CC: flashrom at flashrom.org
> Subject: Re: [flashrom] satasii PCI0680 tested V29C51002T-90P write
>
> On Wed, 21 Dec 2011 21:12:48 +0000
> "The Niz ."  wrote:
>
> >
> > Hello list,
> > This is my first one, so please just tell me if something is wrong/missing...Write is verified to be working correctly (I booted using the flashed chip)
> > Chip markings:9928FV29C51002T-90P
> > Programmer:Advance 29133 PATA controller with Silicon Image Sil06080CL144
>
> hi there and thanks for your report.
>
> the flashchip was already reported to be working in october:
> http://www.flashrom.org/pipermail/flashrom/2011-October/008052.html
> and is marked in the source as such since r1454. that's the "developer
> version" advantage we were talking about on IRC ;)
>
> --
> Kind regards/Mit freundlichen Gr??en, Stefan Tauner
 		 	   		  

From dhendrix at google.com  Tue Dec 27 23:52:29 2011
From: dhendrix at google.com (David Hendricks)
Date: Tue, 27 Dec 2011 14:52:29 -0800
Subject: [flashrom] [PATCH 3/5] layout: Add -i <image>[:<file>] support
In-Reply-To: <201112251642.pBPGgc1R030494@mail2.student.tuwien.ac.at>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-4-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4EF67577.7060106@gmx.net>
	<201112251642.pBPGgc1R030494@mail2.student.tuwien.ac.at>
Message-ID: <CAKOoyUdKjsS1vS5Zn6RRdZJnh8sp=GiNaqFa-EA4iy5Kw5X7yA@mail.gmail.com>

On Sun, Dec 25, 2011 at 8:42 AM, Stefan Tauner <
stefan.tauner at student.tuwien.ac.at> wrote:

> > Design issues:
> > Specifying a file name from which flashrom should fetch a region and to
> > which flashrom should write a region has three main issues:
> > - It kills UI consistency. What happens if you have a region called
> > "all" which covers the whole flash chip? Specifying a filename for
> > region "all" means any supplied filename as --read or --write parameter
> > will be completely ignored but still be required.
>
> for --read it is not ignored iirc but only those regions marked to be
> fetched via -i are included and the rest is filled with 0x00s. this
> creates a chip-sized file which might be useful to some e.g. if they
> want to manipulate it by editing some stuff. i will call this (i.e.
> files which are parameters to --write/--read/--verify but are
> used/filled only partially) "complete" files below.
>

Yes -- the idea here is to be able to quickly read only the specified
region(s), manipulate them, and then write them back.

It's kind of a funky usage model, but it's helped us save a lot of precious
time during device manufacturing.

in the case of --read'ing "all" this would produce two identical files
> (i guess).

for --write you are right to the point.
> i notices this problem but did not even try to mitigate it because i
> wanted to discuss the whole approached first so thanks for bringing it
> up :)
>

For read, if the sum of regions included covers the entire chip, then you
will end up with two identical files. Included regions will also show up in
the -r argument, while the rest is filled in with 0xff's.

For write, the -w argument gets ignored if a region and input file is
specified with -i region:filename. The -w argument is used if the :filename
portion is omitted, or if no -i argument is used. It's kind of a kludge,
and the "write_it" variable needs to be set somehow which is why -w is
required in any case.

In both cases, the assumption is that users to specify -i explicitly wish
to supersede default behavior of -r and -w. To make this more explicit,
perhaps -r and -w should no longer require an argument?

currently i always write a "complete" image for --read operations but
> this might not be wanted and could be optional - if the -i option is
> used at least once. atm it is not necessary to give an image name
> because it defaults to the range's name. but this also forcibly creates
> files, when the -i option is used - even if the user does not need it.
> maybe we should let the desire for an image be defined by including the
> (optional) ':'?
>

Using the :filename syntax is currently optional, and does not forcibly
create files. (Maybe there is something in your patch that is not in
chromium os branch that I am missing?)

for --write we need enough data to cover the to be written range(s).
> this can come from the "complete" image or the -i ones. and in case we
> care for the erase block layout we also need to be sure that the data
> is read from the chip where it is needed because it would get deleted
> but was not supplied/included via files. the latter is not an issue
> (yet) because the complete chip is (still) read in the case of writes.
>

Yes... I think the old infrastructure was not quite sufficient to take into
account the erase block sizes and intelligently read all the data necessary
to do the partial write. So we ended up just reading the entire ROM anyway.

another point which needs to be discussed is the precedence of
> overlapping regions. without any -i's files given this is not an issue.
> we just merge the regions automatically - the data for a single address
> is the same anyway.
> when different files are given this is no longer true. i think the best
> option would be to abort and/or require --force in that case in
> addition to a defined precedence (e.g. last -i wins).
>

I'd prefer to simply abort if -i files are given and the regions overlap.
Better to simply avoid doing something damaging in that case, IMHO.

-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
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From dhendrix at google.com  Wed Dec 28 00:00:54 2011
From: dhendrix at google.com (David Hendricks)
Date: Tue, 27 Dec 2011 15:00:54 -0800
Subject: [flashrom] [PATCH 3/5] layout: Add -i <image>[:<file>] support
In-Reply-To: <CAKOoyUdKjsS1vS5Zn6RRdZJnh8sp=GiNaqFa-EA4iy5Kw5X7yA@mail.gmail.com>
References: <1324686920-11113-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1324686920-11113-4-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4EF67577.7060106@gmx.net>
	<201112251642.pBPGgc1R030494@mail2.student.tuwien.ac.at>
	<CAKOoyUdKjsS1vS5Zn6RRdZJnh8sp=GiNaqFa-EA4iy5Kw5X7yA@mail.gmail.com>
Message-ID: <CAKOoyUddVCn+iMRUydZvc3P0jqudBuiaRUO=L86iL7F=uwO2nA@mail.gmail.com>

On Tue, Dec 27, 2011 at 2:52 PM, David Hendricks <dhendrix at google.com>wrote:

> For read, if the sum of regions included covers the entire chip, then you
> will end up with two identical files. Included regions will also show up in
> the -r argument, while the rest is filled in with 0xff's.
>

Bleh, sorry I did not make that very clear at all. Let's try again...

For read, if the region you specify covers the entire chip, then the file
output by -i region:file syntax will be identical to the file output by the
-r argument.

In other cases, the -r argument will be filled with the included regions,
and the rest will be filled with 0xff bytes.

>From a historical perspective, the ':filename' stuff was added later in
order keep the layout processing logic contained within flashrom. With our
flashmap data structure embedded in the ROM image itself, this makes the
logic required for scripts much simpler since they do not need to handle
layout files or have any knowledge of chip layout. They just need to know
the names of regions to look for.

-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
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From stefan.tauner at student.tuwien.ac.at  Wed Dec 28 01:57:00 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 28 Dec 2011 01:57:00 +0100
Subject: [flashrom] [PATCH 0/2] SFDP 2.1
In-Reply-To: <1309498436-25087-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1309498436-25087-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1325033822-9515-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

rebased to current HEAD and changed some verbosity levels.

1/2 reverts some flashctx changes that i feel are unnecessary and complicate
the SFDP patch. flashctx is to be used where the data in flashchip does not
suffice. this is not the case with the eraser checking functions (and probably
others which i did not touch (yet)) and it is easier to "upcast" some flashctx
"objects" to flashchip (which is safe) than the other way round, which would
require to allocate/copy stuff into a flashctx "object" (to be safe).

Stefan Tauner (2):
  revert flashctx to flashchip in block_eraser helper functions
  add support for SFDP (JESD216)

 chipdrivers.h |    1 +
 flashchips.c  |   24 +++++
 flashchips.h  |    1 +
 flashrom.c    |   42 ++++++--
 spi.h         |    5 +
 spi25.c       |  320 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 6 files changed, 385 insertions(+), 8 deletions(-)



From stefan.tauner at student.tuwien.ac.at  Wed Dec 28 01:57:01 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 28 Dec 2011 01:57:01 +0100
Subject: [flashrom] [PATCH 1/2] revert flashctx to flashchip in block_eraser
	helper functions
In-Reply-To: <1325033822-9515-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1325033822-9515-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1325033822-9515-2-git-send-email-stefan.tauner@student.tuwien.ac.at>

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
see 0/2 for a rationale

 flashrom.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/flashrom.c b/flashrom.c
index f1a6165..68b6d97 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -265,7 +265,7 @@ struct shutdown_func_data {
  */
 static int may_register_shutdown = 0;
 
-static int check_block_eraser(const struct flashctx *flash, int k, int log);
+static int check_block_eraser(const struct flashchip *flash, int k, int log);
 
 /* Register a function to be executed on programmer shutdown.
  * The advantage over atexit() is that you can supply a void pointer which will
@@ -522,7 +522,7 @@ char *extract_programmer_param(const char *param_name)
 }
 
 /* Returns the number of well-defined erasers for a chip. */
-static unsigned int count_usable_erasers(const struct flashctx *flash)
+static unsigned int count_usable_erasers(const struct flashchip *flash)
 {
 	unsigned int usable_erasefunctions = 0;
 	int k;
@@ -1283,7 +1283,7 @@ static int walk_eraseregions(struct flashctx *flash, int erasefunction,
 	return 0;
 }
 
-static int check_block_eraser(const struct flashctx *flash, int k, int log)
+static int check_block_eraser(const struct flashchip *flash, int k, int log)
 {
 	struct block_eraser eraser = flash->block_erasers[k];
 
@@ -1313,7 +1313,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
 	int k, ret = 1;
 	uint8_t *curcontents;
 	unsigned long size = flash->total_size * 1024;
-	unsigned int usable_erasefunctions = count_usable_erasers(flash);
+	unsigned int usable_erasefunctions = count_usable_erasers((struct flashchip*) flash);
 
 	msg_cinfo("Erasing and writing flash chip... ");
 	curcontents = malloc(size);
@@ -1332,7 +1332,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
 			break;
 		}
 		msg_cdbg("Trying erase function %i... ", k);
-		if (check_block_eraser(flash, k, 1))
+		if (check_block_eraser((struct flashchip*) flash, k, 1))
 			continue;
 		usable_erasefunctions--;
 		ret = walk_eraseregions(flash, k, &erase_and_write_block_helper,
@@ -1610,7 +1610,7 @@ void check_chip_supported(const struct flashctx *flash)
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(struct flashctx *flash, int force, int read_it,
+int chip_safety_check(struct flashchip *flash, int force, int read_it,
 		      int write_it, int erase_it, int verify_it)
 {
 	if (!programmer_may_write && (write_it || erase_it)) {
@@ -1680,7 +1680,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	int ret = 0;
 	unsigned long size = flash->total_size * 1024;
 
-	if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) {
+	if (chip_safety_check((struct flashchip*) flash, force, read_it, write_it, erase_it, verify_it)) {
 		msg_cerr("Aborting.\n");
 		ret = 1;
 		goto out_nofree;
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Dec 28 01:57:02 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 28 Dec 2011 01:57:02 +0100
Subject: [flashrom] [PATCH 2/2] add support for SFDP (JESD216)
In-Reply-To: <1325033822-9515-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1325033822-9515-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1325033822-9515-3-git-send-email-stefan.tauner@student.tuwien.ac.at>

Similar to ICH Hardware Sequencing this uses a generic struct
flashchip element in flashchips.c with dummy values and a special
probe function that fills the obtained values into that generic
struct.

Documentation used:
http://www.jedec.org/standards-documents/docs/jesd216 (2011-04)
W25Q32BV data sheet Revision F (2011-04-01)
EN25QH16 data sheet Revision F (2011-06-01)

todo:
 - make the dummy bytes needed work on all programmers
 - add a typedef for erase functions to flash.h (please)?
 - move the code from spi25.c to its own file
 - rephrase the 'default' message of get_erasefn_from_opcode so that it becomes universally usable?

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 chipdrivers.h |    1 +
 flashchips.c  |   24 +++++
 flashchips.h  |    1 +
 flashrom.c    |   28 +++++-
 spi.h         |    5 +
 spi25.c       |  320 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 6 files changed, 378 insertions(+), 1 deletions(-)

diff --git a/chipdrivers.h b/chipdrivers.h
index a1d0cd9..bbc403f 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -28,6 +28,7 @@
 #include "flash.h"	/* for chipaddr and flashctx */
 
 /* spi.c, should probably be in spi_chip.c */
+int probe_spi_sfdp(struct flashctx *flash);
 int probe_spi_rdid(struct flashctx *flash);
 int probe_spi_rdid4(struct flashctx *flash);
 int probe_spi_rems(struct flashctx *flash);
diff --git a/flashchips.c b/flashchips.c
index ca1c57f..f0fde20 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -8872,6 +8872,30 @@ const struct flashchip flashchips[] = {
 		.read		= read_memmapped,
 		.voltage	= {3000, 3600}, /* Also has 12V fast program */
 	},
+	
+	{
+		.vendor		= "Unknown",
+		.name		= "SFDP device",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GENERIC_MANUF_ID,
+		.model_id	= SFDP_DEVICE_ID,
+		/* We present our own "report this" text hence we do not
+		 * want the default "This flash part has status UNTESTED..."
+		 * text to be printed. */
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_sfdp,
+		.read		= spi_chip_read,
+		/* FIXME: some vendor extensions define this */
+		.voltage	= {},
+		 /* Everything below will be set by the probing function. */
+		.page_size	= 0,
+		.write		= NULL,
+		.total_size	= 0,
+		.feature_bits	= 0,
+		.block_erasers	= {},
+		.unlock		= NULL,
+		.printlock	= NULL,
+	},
 
 	{
 		.vendor		= "Programmer",
diff --git a/flashchips.h b/flashchips.h
index 03efb86..1f2a8ca 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -36,6 +36,7 @@
 
 #define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
 #define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
+#define SFDP_DEVICE_ID		0xfffe
 
 #define ALLIANCE_ID		0x52	/* Alliance Semiconductor */
 #define ALLIANCE_AS29F002B	0x34
diff --git a/flashrom.c b/flashrom.c
index 68b6d97..a3246b2 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -986,7 +986,33 @@ int probe_flash(struct registered_programmer *pgm, int startchip,
 		 * probe_flash() is the first one and thus no chip has been
 		 * found before.
 		 */
-		if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID)
+		if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) {
+			msg_cinfo("===\n"
+				  "SFDP has autodetected a flash chip which is "
+				  "not natively supported by flashrom yet.\n");
+			if (count_usable_erasers(flash) == 0)
+				msg_cinfo("The standard operations read and "
+					  "verify should work, but to support "
+					  "erase, write and all other "
+					  "possible features");
+			else
+				msg_cinfo("All standard operations (read, "
+					  "verify, erase and write) should "
+					  "work, but to support all possible "
+					  "features");
+
+			msg_cinfo(" we need to add them manually.\nYou "
+				  "can help us by mailing us the output of "
+				  "the following command to flashrom at flashrom."
+				  "org: \n'flashrom -VV [plus the "
+				  "-p/--programmer parameter (if needed)]"
+				  "'\nThanks for your help!\n"
+				  "===\n");
+		}
+
+		if (startchip == 0 ||
+		    ((fill_flash->model_id != GENERIC_DEVICE_ID) &&
+		     (fill_flash->model_id != SFDP_DEVICE_ID)))
 			break;
 
 notfound:
diff --git a/spi.h b/spi.h
index b908603..5f07eae 100644
--- a/spi.h
+++ b/spi.h
@@ -40,6 +40,11 @@
 #define JEDEC_REMS_OUTSIZE	0x04
 #define JEDEC_REMS_INSIZE	0x02
 
+/* Read Serial Flash Discoverable Parameters (SFDP) */
+#define JEDEC_SFDP		0x5a
+#define JEDEC_SFDP_OUTSIZE	0x05	/* 8b op, 24b addr, 8b dummy */
+/*      JEDEC_SFDP_INSIZE : any length */
+
 /* Read Electronic Signature */
 #define JEDEC_RES		0xab
 #define JEDEC_RES_OUTSIZE	0x04
diff --git a/spi25.c b/spi25.c
index 3ce7f08..3e57b9c 100644
--- a/spi25.c
+++ b/spi25.c
@@ -23,6 +23,7 @@
  */
 
 #include <string.h>
+#include <stdlib.h>
 #include "flash.h"
 #include "flashchips.h"
 #include "chipdrivers.h"
@@ -115,6 +116,325 @@ int spi_write_disable(struct flashctx *flash)
 	return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL);
 }
 
+static int spi_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
+{
+	const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = {
+		JEDEC_SFDP,
+		(address >> 16) & 0xff,
+		(address >> 8) & 0xff,
+		(address >> 0) & 0xff,
+		0
+	};
+	return spi_send_command(flash, sizeof(cmd), len, cmd, buf);
+}
+
+struct sfdp_tbl_hdr {
+	uint8_t id;
+	uint8_t v_minor;
+	uint8_t v_major;
+	uint8_t len;
+	uint32_t ptp; /* 24b pointer */
+};
+
+static int (*get_erasefn_from_opcode(uint8_t opcode)) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
+{
+	switch(opcode){
+	case 0x00:
+	case 0xff:
+		/* Not specified, assuming "not supported". */
+		return NULL;
+	case 0x20:
+		return &spi_block_erase_20;
+		break;
+	case 0x52:
+		return &spi_block_erase_52;
+		break;
+	case 0x60:
+		return &spi_block_erase_60;
+		break;
+	case 0xc7:
+		return &spi_block_erase_c7;
+		break;
+	case 0xd7:
+		return &spi_block_erase_d7;
+		break;
+	case 0xd8:
+		return &spi_block_erase_d8;
+	default:
+		msg_cinfo("%s: unknown opcode (0x%02x) in SFDP table. "
+			 "Please report this at "
+			 "flashrom at flashrom.org\n",
+			 __func__, opcode);
+		return NULL;
+	}
+}
+
+static int sfdp_fill_flash(struct flashctx *f, uint8_t *buf, uint16_t len)
+{
+	uint32_t tmp32;
+	uint8_t tmp8;
+	uint32_t total_size; /* in bytes */
+	uint32_t bsize;
+	uint8_t opcode_4k = 0xFF;
+	int dw, j;
+	int (*erasefn) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
+
+
+	msg_cdbg2("Parsing JEDEC SFDP parameter table...\n");
+	if (len == 9 * 4) {
+		msg_cerr("%s: len out of spec\n", __func__);
+		return 1;
+	}
+
+	/* 1. double word */
+	dw = 0;
+	tmp32 = buf[(4 * dw) + 0];
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+
+	tmp8 = (tmp32 >> 17) & 0x3;
+	switch (tmp8) {
+	case 0x0:
+		msg_cdbg2("  3-Byte only addressing.\n");
+		break;
+	case 0x1:
+		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
+		break;
+	case 0x2:
+		msg_cdbg("  4-Byte only addressing not supported.\n");
+		return 1;
+	default:
+		msg_cdbg("  Required addressing mode (0x%x) not supported.\n",
+			 tmp8);
+		return 1;
+	}
+
+	msg_cdbg2("  Writes to the status register have ");
+	if (tmp32 & (1 << 3)) {
+		f->unlock = spi_disable_blockprotect;
+		msg_cdbg2("to be enabled with ");
+		if (tmp32 & (1 << 4)) {
+			f->feature_bits = FEATURE_WRSR_WREN;
+			msg_cdbg2("WREN (0x06).\n");
+		} else {
+			f->feature_bits = FEATURE_WRSR_EWSR;
+			msg_cdbg2("EWSR (0x50).\n");
+		}
+	} else
+		msg_cdbg2("not to be especially enabled.\n");
+
+	msg_cdbg2("  Write granularity is ");
+	if (tmp32 & (1 << 2)) {
+		msg_cdbg2(" at least 64 B.\n");
+		f->page_size = 64;
+		f->write = spi_chip_write_256;
+	} else {
+		msg_cdbg2(" 1 B only.\n");
+		f->page_size = 265; /* ? */
+		f->write = spi_chip_write_1;
+	}
+
+	if ((tmp32 & 0x3) == 0x1) {
+		opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
+	}
+
+	/* 2. double word */
+	dw = 1;
+	tmp32 = buf[(4 * dw) + 0];
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+
+	if (tmp32 & (1 << 31)) {
+		msg_cdbg("  Flash chip size >= 4 Gb/500 MB not supported.\n");
+		return 1;
+	}
+	total_size = (tmp32 & 0x7FFFFFFF) / 8;
+	f->total_size = total_size / 1024;
+	msg_cdbg2("  Flash chip size is %d kB.\n", f->total_size);
+
+	dw = 8;
+	for(j = 0; j < 4; j++) {
+		/* 8 double words from the start + 2 words for every eraser */
+		tmp32 = buf[(4 * dw) + (2 * j)];
+		if (tmp32 == 0) {
+			msg_cdbg2("  Block eraser %d is unused.\n", j);
+			continue;
+		}
+		if (tmp32 >= 31) {
+			msg_cdbg2("  Block size of eraser %d (2^%d) is too big."
+				  "\n", j, tmp32);
+			continue;
+		}
+		bsize = 1 << (tmp32); /* bsize = 2 ^ field */
+
+		tmp8 = buf[(4 * dw) + (2 * j) + 1];
+		erasefn = get_erasefn_from_opcode(tmp8);
+		if (erasefn == NULL)
+			continue;
+		f->block_erasers[j].block_erase = erasefn;
+		f->block_erasers[j].eraseblocks[0].size = bsize;
+		f->block_erasers[j].eraseblocks[0].count = total_size/bsize;
+		msg_cdbg2("  Block eraser %d: %d x %d B with opcode 0x%02x\n",
+			  j, total_size/bsize, bsize, tmp8);
+		/* If there is a valid 4k value in the last double words,
+		 * we override the value from double word 1. */
+		if (bsize == 4 * 1024)
+			opcode_4k = 0xFF;
+	}
+	if (opcode_4k != 0xFF &&
+	    ((erasefn = get_erasefn_from_opcode(opcode_4k)) != NULL)) {
+		for (j = 0; j < NUM_ERASEFUNCTIONS; j++) {
+			struct block_eraser eraser = f->block_erasers[j];
+			if (eraser.eraseblocks[0].size != 0)
+				continue;
+			eraser.block_erase = erasefn;
+			eraser.eraseblocks[0].size = 4 * 1024;
+			eraser.eraseblocks[0].count = total_size/bsize;
+			msg_cdbg2("  Block eraser %d: %d x %d B with opcode "
+				  "0x%02x\n", j, total_size/bsize, bsize,
+				  opcode_4k);
+			break;
+		}
+		msg_cinfo("%s: Not enough space to store another eraser (j=%d)."
+			  " Please report this at flashrom at flashrom.org\n",
+			  __func__, j);
+	}
+	return 0;
+}
+
+static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len)
+{
+	uint16_t i;
+	if (spi_sfdp(flash, addr, buf, len)) {
+		msg_cerr("Receiving SFDP parameter table failed.\n");
+		return 1;
+	}
+	msg_cspew("  Parameter table contents:\n");
+	for(i = 0; i < len; i++) {
+		if ((i % 8) == 0) {
+			msg_cspew("    0x%03x: ", i);
+		}
+		msg_cspew(" 0x%02x", buf[i]);
+		if ((i % 8) == 7) {
+			msg_cspew("\n");
+			continue;
+		}
+		if ((i % 8) == 3) {
+			msg_cspew(" ");
+			continue;
+		}
+	}
+	msg_cspew("\n");
+	return 0;
+}
+
+int probe_spi_sfdp(struct flashctx *flash)
+{
+	int ret = 0;
+	uint8_t buf[8];
+	uint16_t tmp16;
+	uint32_t tmp32;
+	uint8_t nph;
+	uint8_t i;
+	struct sfdp_tbl_hdr *hdrs;
+	uint8_t *hbuf;
+	uint8_t *tbuf;
+
+	if (spi_sfdp(flash, 0x0, buf, 4)) {
+		msg_cerr("Receiving SFDP signature failed.\n");
+		return 0;
+	}
+	tmp32 = buf[0];
+	tmp32 |= ((unsigned int)buf[1]) << 8;
+	tmp32 |= ((unsigned int)buf[2]) << 16;
+	tmp32 |= ((unsigned int)buf[3]) << 24;
+
+	msg_cdbg2("SFDP signature = 0x%08x (should be 0x50444653)\n", tmp32);
+	if (tmp32 != 0x50444653) {
+		msg_cdbg("No SFDP signature found.\n");
+		return 0;
+	}
+	if (spi_sfdp(flash, 0x4, buf, 3)) {
+		msg_cerr("Receiving SFDP revision and number of parameter "
+			 "headers (NPH) failed. ");
+		return 0;
+	}
+	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
+	nph = buf[3];
+	msg_cdbg2("SFDP number of parameter headers (NPH) = %d (+ 1 mandatory)"
+		  "\n", nph);
+
+	/* Fetch all parameter headers, even if we don't use them all (yet). */
+	hbuf = malloc(sizeof(struct sfdp_tbl_hdr) * (nph + 1));
+	hdrs = malloc((nph + 1) * 8);
+	if (hbuf == NULL || hdrs == NULL ) {
+		msg_gerr("Out of memory!\n");
+		exit(1); /* FIXME: shutdown gracefully */
+	}
+	if (spi_sfdp(flash, 0x8, hbuf, (nph + 1) * 8)) {
+		msg_cerr("Receiving SFDP parameter table headers failed.\n");
+		goto cleanup_hdrs;
+	}
+
+	i = 0;
+	do{
+		hdrs[i].id = hbuf[(8 * i) + 0];
+		hdrs[i].v_minor = hbuf[(8 * i) + 1];
+		hdrs[i].v_major = hbuf[(8 * i) + 2];
+		hdrs[i].len = hbuf[(8 * i) + 3];
+		hdrs[i].ptp = hbuf[(8 * i) + 4];
+		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8;
+		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16;
+		msg_cdbg2("SFDP parameter table header %d:\n", i);
+		msg_cdbg2("  ID 0x%02x, version %d.%d\n", hdrs[i].id,
+			  hdrs[i].v_major, hdrs[i].v_minor);
+		tmp16 = hdrs[i].len * 4;
+		tmp32 = hdrs[i].ptp;
+		msg_cdbg2("  Length %d B, Parameter Table Pointer 0x%06x\n",
+			  tmp16, tmp32);
+
+		tbuf = malloc(tmp16);
+		if (tbuf == NULL) {
+			msg_gerr("Out of memory!\n");
+			exit(1); /* FIXME: shutdown gracefully */
+		}
+		if (sfdp_fetch_pt(flash, tmp32, tbuf, tmp16)){
+			msg_cerr("Fetching SFDP parameter table %d failed.\n",
+				 i);
+			free(tbuf);
+			break;
+		}
+		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
+			if (hdrs[i].id != 0)
+				msg_cdbg("ID of the mandatory JEDEC SFDP "
+					 "parameter table is not 0 as demanded "
+					 "by JESD216 (warning only).\n");
+
+			if (hdrs[i].len != (9 * 4)) {
+				msg_cdbg("Length of the mandatory JEDEC SFDP "
+					 "parameter table is not 24 B as "
+					 "demanded by JESD216.\n");
+				if (hdrs[i].len == (4 * 4))
+					msg_cdbg("It seems like it is the "
+						 "preliminary Intel version of "
+						 "SFDP, which we don't support."
+						 "\n");
+			} else if (sfdp_fill_flash(flash, tbuf, tmp16) == 0)
+				ret = 1;
+		}
+		
+		free(tbuf);
+		i++;
+	} while(i <= nph);
+
+cleanup_hdrs:
+	free(hdrs);
+	free(hbuf);
+	return ret;
+}
+
 static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
 {
 	unsigned char readarr[4];
-- 
1.7.1



From philipp at redfish-solutions.com  Thu Dec 29 03:11:11 2011
From: philipp at redfish-solutions.com (Philip Prindeville)
Date: Wed, 28 Dec 2011 19:11:11 -0700
Subject: [flashrom] 2CHIPSET: Alix 6F2
Message-ID: <4EFBCC3F.9080309@redfish-solutions.com>

# flashrom
flashrom v0.9.3-r1205 on Linux 2.6.39.4 (i586), built with libpci 3.1.7, GCC 4.5.4 20110808 (prerelease), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
No coreboot table found.
Found chipset "AMD CS5536", enabling flash write... OK.
WARNING: unexpected second chipset match: "AMD CS5536"
ignoring, please report lspci and board URL to flashrom at flashrom.org
with 2CHIPSET: your board name in the subject line.
This chipset supports the following protocols: Non-SPI.
Found chip "AMIC A49LF040A" (512 KB, LPC) at physical address 0xfff80000.
No operations were specified.
#


From paulepanter at users.sourceforge.net  Thu Dec 29 11:21:11 2011
From: paulepanter at users.sourceforge.net (Paul Menzel)
Date: Thu, 29 Dec 2011 11:21:11 +0100
Subject: [flashrom] 2CHIPSET: Alix 6F2 (flashrom v0.9.3-r1205)
In-Reply-To: <4EFBCC3F.9080309@redfish-solutions.com>
References: <4EFBCC3F.9080309@redfish-solutions.com>
Message-ID: <1325154071.4930.5.camel@mattotaupa>

Dear Philip,


Am Mittwoch, den 28.12.2011, 19:11 -0700 schrieb Philip Prindeville:
> # flashrom
> flashrom v0.9.3-r1205 on Linux 2.6.39.4 (i586), built with libpci 3.1.7, GCC 4.5.4 20110808 (prerelease), little endian

[?]

could you test if that error shows also up with v0.9.4 or the latest
code from the SVN repository [1]?


Thanks,

Paul


[1] http://flashrom.org/Downloads
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From Raghuramchary.Jallipalli at lntinfotech.com  Thu Dec 29 07:39:42 2011
From: Raghuramchary.Jallipalli at lntinfotech.com (Raghuramchary Jallipalli)
Date: Thu, 29 Dec 2011 12:09:42 +0530
Subject: [flashrom] Help: unable to upgrade bios
Message-ID: <F7A627F10F4B9E4F833E292AA04A4BE63C84CD2F@CHNINMSMBX01.chennaiodc.lntinfotech.com>

Hello Experts,
I have tried installing the flashrom-0.9.4 in my laptop having Ubuntu 9.10. The flashchip is AT25DF321A and the chipset is QM67. When I tried to execute the flashrom utility I got the below output:
#########################

root at ubuntu:~#

root at ubuntu:~# flashrom

flashrom v0.9.4-r1395 on Linux 2.6.31-14-generic (i686), built with libpci 3.0.0, GCC 4.4.1, little endian flashrom is free software, get the source code at http://www.flashrom.org



Calibrating delay loop... OK.

========================================================================

WARNING! You seem to be running flashrom on an unsupported laptop.

Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller

(EC) in these machines often interacts badly with flashing.

See http://www.flashrom.org/Laptops for details.



If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop.

Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff.

You have been warned.

========================================================================

Aborting.

root at ubuntu:~#

root at ubuntu:~#
###########################

Can anyone please help on how to proceed further?

Thanks for the help,
Raghu



________________________________
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From stefan.tauner at student.tuwien.ac.at  Thu Dec 29 13:21:07 2011
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 29 Dec 2011 13:21:07 +0100
Subject: [flashrom] Help: unable to upgrade bios
In-Reply-To: <F7A627F10F4B9E4F833E292AA04A4BE63C84CD2F@CHNINMSMBX01.chennaiodc.lntinfotech.com>
References: <F7A627F10F4B9E4F833E292AA04A4BE63C84CD2F@CHNINMSMBX01.chennaiodc.lntinfotech.com>
Message-ID: <201112291221.pBTCLKR7030043@mail2.student.tuwien.ac.at>

On Thu, 29 Dec 2011 12:09:42 +0530
Raghuramchary Jallipalli <Raghuramchary.Jallipalli at lntinfotech.com>
wrote:

> Hello Experts,
> I have tried installing the flashrom-0.9.4 in my laptop having Ubuntu 9.10. The flashchip is AT25DF321A and the chipset is QM67. When I tried to execute the flashrom utility I got the below output:
> #########################
> 
> root at ubuntu:~#
> 
> root at ubuntu:~# flashrom
> 
> flashrom v0.9.4-r1395 on Linux 2.6.31-14-generic (i686), built with libpci 3.0.0, GCC 4.4.1, little endian flashrom is free software, get the source code at http://www.flashrom.org
> 
> 
> 
> Calibrating delay loop... OK.
> 
> ========================================================================
> 
> WARNING! You seem to be running flashrom on an unsupported laptop.
> 
> Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller
> 
> (EC) in these machines often interacts badly with flashing.
> 
> See http://www.flashrom.org/Laptops for details.
> 
> 
> 
> If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop.
> 
> Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff.
> 
> You have been warned.
> 
> ========================================================================
> 
> Aborting.
> 
> root at ubuntu:~#
> 
> root at ubuntu:~#
> ###########################
> 
> Can anyone please help on how to proceed further?
> 

Hello Raghu!

The answer to your question can be found in the manpage of flashrom.
The warning is set up for a reason (explained in the warning itself,
the linked webpage and also in the manpage). If you understand and
accept the possible consequences go ahead with the procedure in the
manpage.

Most probably it will not work even then, because the QM67 chipset can
is probably locked down, which we can not unlock yet. We could verify
that with a verbose log (after following the manpage). It would also be
interesting to know which laptop that is (then).

This procedure is not to annoy you, but to ensure that users do not
take the warning lightly and look at it more closely.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From philipp_subx at redfish-solutions.com  Thu Dec 29 21:40:38 2011
From: philipp_subx at redfish-solutions.com (Philip Prindeville)
Date: Thu, 29 Dec 2011 13:40:38 -0700
Subject: [flashrom] 2CHIPSET: Alix 6F2 (flashrom v0.9.3-r1205)
In-Reply-To: <1325154071.4930.5.camel@mattotaupa>
References: <4EFBCC3F.9080309@redfish-solutions.com>
	<1325154071.4930.5.camel@mattotaupa>
Message-ID: <4EFCD046.1010703@redfish-solutions.com>

On 12/29/11 3:21 AM, Paul Menzel wrote:
> Dear Philip,
> 
> 
> Am Mittwoch, den 28.12.2011, 19:11 -0700 schrieb Philip Prindeville:
>> # flashrom
>> flashrom v0.9.3-r1205 on Linux 2.6.39.4 (i586), built with libpci 3.1.7, GCC 4.5.4 20110808 (prerelease), little endian
> 
> [?]
> 
> could you test if that error shows also up with v0.9.4 or the latest
> code from the SVN repository [1]?
> 
> 
> Thanks,
> 
> Paul
> 
> 
> [1] http://flashrom.org/Downloads

Hmm...  Also worth noting:

PC Engines      Alix.1c                          OK
PC Engines      Alix.2c2                         OK
PC Engines      Alix.2c3                         OK
PC Engines      Alix.3c3                         OK
PC Engines      Alix.3d3                         OK
PC Engines      WRAP.2E                          OK


that the 2D3, 2D13, 6E2, and 6F2 boards aren't listed (these are popular in astlinux, m0n0wall, and OpenWRT circles).

-Philip


From philipp_subx at redfish-solutions.com  Thu Dec 29 21:37:18 2011
From: philipp_subx at redfish-solutions.com (Philip Prindeville)
Date: Thu, 29 Dec 2011 13:37:18 -0700
Subject: [flashrom] 2CHIPSET: Alix 6F2 (flashrom v0.9.3-r1205)
In-Reply-To: <1325154071.4930.5.camel@mattotaupa>
References: <4EFBCC3F.9080309@redfish-solutions.com>
	<1325154071.4930.5.camel@mattotaupa>
Message-ID: <4EFCCF7E.7000205@redfish-solutions.com>

On 12/29/11 3:21 AM, Paul Menzel wrote:
> Dear Philip,
> 
> 
> Am Mittwoch, den 28.12.2011, 19:11 -0700 schrieb Philip Prindeville:
>> # flashrom
>> flashrom v0.9.3-r1205 on Linux 2.6.39.4 (i586), built with libpci 3.1.7, GCC 4.5.4 20110808 (prerelease), little endian
> 
> [?]
> 
> could you test if that error shows also up with v0.9.4 or the latest
> code from the SVN repository [1]?
> 
> 
> Thanks,
> 
> Paul
> 
> 
> [1] http://flashrom.org/Downloads

Definitely shows up with 0.9.4...

root at OpenWrt:/# flashrom
flashrom v0.9.4-r1395 on Linux 2.6.39.4 (i586), built with libpci 3.1.7, GCC 4.5.4 20110808 (prerelease), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
========================================================================
WARNING! You may be running flashrom on an unsupported laptop. We could
not detect this for sure because your vendor has not setup the SMBIOS
tables correctly. You can enforce execution by adding
'-p internal:laptop=force_I_want_a_brick' to the command line, but
please read the following warning if you are not sure.

Laptops, notebooks and netbooks are difficult to support and we
recommend to use the vendor flashing utility. The embedded controller
(EC) in these machines often interacts badly with flashing.
See http://www.flashrom.org/Laptops for details.

If flash is shared with the EC, erase is guaranteed to brick your laptop
and write may brick your laptop.
Read and probe may irritate your EC and cause fan failure, backlight
failure and sudden poweroff.
You have been warned.
========================================================================
Aborting.
root at OpenWrt:/#


From Raghuramchary.Jallipalli at lntinfotech.com  Fri Dec 30 10:15:55 2011
From: Raghuramchary.Jallipalli at lntinfotech.com (Raghuramchary Jallipalli)
Date: Fri, 30 Dec 2011 14:45:55 +0530
Subject: [flashrom] Help: unable to upgrade bios
In-Reply-To: <201112291221.pBTCLKR7030043@mail2.student.tuwien.ac.at>
References: <F7A627F10F4B9E4F833E292AA04A4BE63C84CD2F@CHNINMSMBX01.chennaiodc.lntinfotech.com>
	<201112291221.pBTCLKR7030043@mail2.student.tuwien.ac.at>
Message-ID: <F7A627F10F4B9E4F833E292AA04A4BE63C84D4E4@CHNINMSMBX01.chennaiodc.lntinfotech.com>

Thanks for the reply Stefan.

Thanks,
Raghu

-----Original Message-----
From: Stefan Tauner [mailto:stefan.tauner at student.tuwien.ac.at]
Sent: Thursday, December 29, 2011 5:51 PM
To: Raghuramchary Jallipalli
Cc: flashrom at flashrom.org
Subject: Re: [flashrom] Help: unable to upgrade bios

On Thu, 29 Dec 2011 12:09:42 +0530
Raghuramchary Jallipalli <Raghuramchary.Jallipalli at lntinfotech.com>
wrote:

> Hello Experts,
> I have tried installing the flashrom-0.9.4 in my laptop having Ubuntu 9.10. The flashchip is AT25DF321A and the chipset is QM67. When I tried to execute the flashrom utility I got the below output:
> #########################
>
> root at ubuntu:~#
>
> root at ubuntu:~# flashrom
>
> flashrom v0.9.4-r1395 on Linux 2.6.31-14-generic (i686), built with libpci 3.0.0, GCC 4.4.1, little endian flashrom is free software, get the source code at http://www.flashrom.org
>
>
>
> Calibrating delay loop... OK.
>
> ========================================================================
>
> WARNING! You seem to be running flashrom on an unsupported laptop.
>
> Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller
>
> (EC) in these machines often interacts badly with flashing.
>
> See http://www.flashrom.org/Laptops for details.
>
>
>
> If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop.
>
> Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff.
>
> You have been warned.
>
> ========================================================================
>
> Aborting.
>
> root at ubuntu:~#
>
> root at ubuntu:~#
> ###########################
>
> Can anyone please help on how to proceed further?
>

Hello Raghu!

The answer to your question can be found in the manpage of flashrom.
The warning is set up for a reason (explained in the warning itself,
the linked webpage and also in the manpage). If you understand and
accept the possible consequences go ahead with the procedure in the
manpage.

Most probably it will not work even then, because the QM67 chipset can
is probably locked down, which we can not unlock yet. We could verify
that with a verbose log (after following the manpage). It would also be
interesting to know which laptop that is (then).

This procedure is not to annoy you, but to ensure that users do not
take the warning lightly and look at it more closely.

--
Kind regards/Mit freundlichen Gren, Stefan Tauner

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From r.marek at assembler.cz  Fri Dec 30 13:42:05 2011
From: r.marek at assembler.cz (Rudolf Marek)
Date: Fri, 30 Dec 2011 13:42:05 +0100
Subject: [flashrom] AMD SB7xx/SB8xx w/IMC: enable specs
In-Reply-To: <4C6D4AE1.3010701@gmail.com>
References: <4C6D4AE1.3010701@gmail.com>
Message-ID: <4EFDB19D.7000303@assembler.cz>

Hi all,

I know bit more about IMC now (I did some research in this direction).

> All PCI and IO accesses following are byte-width.
>
> There are several IO ports used, which will be defined here:
> 	NMI_Status	0x0061
> 	NMI_Enable	0x0070
> 	RtcDataPort	0x0071
> 	Isa_Misc	0x0C6F
> 	PM_Index	0x0CD6
> 	PM_Data		0x0CD7
>
> One PM register, accessed via the PM_Index and PM_Data ports above, is used:
> 	TESTENABLE	0x53
> 	  SMI_Disable	(1 << 3)
>
> This is the board-enable procedure:
> 1.	Check LPC/ISA Bridge register 40 (00:14.03[40]) bit 7 (IntegratedImcPresent)
> 1.a.		If the IntegratedImcPresent bit is not set, skip to step 12

Yes also noted as "IMC active" not yet sure if IMC is in "IDLE" if it is unset. 
Most likely yes.

> 2.	Disable SMIs:
> 2.a.		Write TESTENABLE to PM_Index
> 2.b.		Read PM_Data
> 2.c.		Set the SMI_Disable bit
> 2.d.		Write the new value to PM_Data
> 3.	Clear bit 3 in SMBus/ACPI register 43 (00:14.00[43])
> 4.	Check SMBus/ACPI register 20 (00:14.00[20]) bit 1
> 4.a.		If it is set, skip to step 11
> 5.	Set bit 1 in SMBus/ACPI register 20 (00:14.00[20])
> 6.	Do some IO:
> 6.a.		Write 0x7D to NMI_Enable
> 6.b.		Read NMI_Status
> 6.c.		Read NMI_Status
> 6.d.		Read RtcDataPort
> 6.d.1.			If the value returned has bit 3 clear, skip to step 11
> 7.	Check LPC/ISA Bridge register 40 (00:14.03[40]) bit 7 (IntegratedImcPresent)
> 7.a.		If the IntegratedImcPresent bit is not set, skip to step 11

Yes so this seems yet another check if IMC went to IDLE (this is like x86 HLT, 
CLK is stopped but IRQs will wakup the 8051).

> 8.	Do some IO:

I know what it is. It is mailbox interface to the firmware. I described that 
here: http://www.coreboot.org/AMD_IMC the 0x3e base is set in LDN9 as mailbox 
base. You should obtain this address from the LDN9.

> 8.a.		Write 0x82 to 0x003E
> 8.b.		Write 0x00 to 0x003F
> 8.c.		Write 0x83 to 0x003E
> 8.d.		Write 0xB4 to 0x003F

Are you sure the 0x00 goes to 82? and B4 goes to 83? While analyzing the 
firmware I think it was vice-versa. I can recheck this.


> 8.e.		Write 0x84 to 0x003E
> 8.f.		Write 0x00 to 0x003F
> 8.g.		Write 0x80 to 0x003E
> 8.h.		Write 0x96 to 0x003F

The command is 0x96 which means go to sleep. You should check in 0x82 for 0xfa 
maybe? It means firmware acked command.

> 9.	Loop: Set the loop variable to 4000 (0xFA0)
> 9.a.		Busy-poll bit 4 (RefClk) of NmiStatus until it is set
> 9.b.		Decrement the loop variable and exit the loop if it is 0
> 9.c.		Busy-poll bit 4 (RefClk) of NmiStatus until it is clear
> 9.d.		Decrement the loop variable and exit the loop if it is 0
> 10.	Loop:
> 10.a.		Loop: Set the loop variable to 66 (0x42)
> 10.a.1.			Busy-poll bit 4 (RefClk) of NmiStatus until it is set
> 10.a.2.			Decrement the loop variable and exit the loop if it is 0
> 10.a.3.			Busy-poll bit 4 (RefClk) of NmiStatus until it is clear
> 10.a.4.			Decrement the loop variable and exit the loop if it is 0
> 10.b.		Write 0x82 to 0x003E
> 10.c.		Read 0x003F and exit the loop if it is 0xFA

Yes this just waits for firmware. Maybe it is using refclk as timeout value 
which should be up to 100ms.

> 11.	Set bit 3 in SMBus/ACPI register 43 (00:14.00[43])

Yes this makes me wonder what does firmware do with the bit. It should enables 
the writes to the registers. Maybe firmware uses that as scratchpad?

> 12.	Set bit 0 in SMBus/ACPI register 79 (00:14.00[79])
> 13.	Set bit 6 in Isa_Misc

Hm the bit6 is documented in SB600 and it shhould be used only if PCI bus is 
used instead of flash.?

Thanks
Rudolf




From pietrushnic at gmail.com  Fri Dec 30 14:11:39 2011
From: pietrushnic at gmail.com (=?ISO-8859-1?Q?Piotr_Kr=F3l?=)
Date: Fri, 30 Dec 2011 14:11:39 +0100
Subject: [flashrom] Shuttle AV18S403 erase and write pass
Message-ID: <CAGznQ=hXaCGXkQ6XtsQGRZEoWAFhHXd_Ue36fzwB+XZ7jvf_gw@mail.gmail.com>

Hi,
I tested this motherboard for erase and write and everything seems to work
properly.
Logs in attachments.
flashrom -V
flashrom -VE
flashrom -Vw bios_bckp.bin
lspci -nnvvxxx
superiotool -deV - http://paste.flashrom.org/view.php?id=993


Kind Regards
Piotr
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From geprouser at gmail.com  Fri Dec 30 20:21:17 2011
From: geprouser at gmail.com (David Gordon)
Date: Fri, 30 Dec 2011 14:21:17 -0500
Subject: [flashrom] flashrom -V
Message-ID: <CAOJJEpmWb5s=-cSn4G1DzvDyVJ4PDm4vjBBmwBKF27oLpFhhLw@mail.gmail.com>

Motherboard XFX MG-610I-7059
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From prakashp at arcor.de  Sat Dec 31 10:55:08 2011
From: prakashp at arcor.de (Prakash Punnoor)
Date: Sat, 31 Dec 2011 10:55:08 +0100
Subject: [flashrom] Difference of factory bios and dumped image
Message-ID: <6081648.skmm3Pho3G@graviton>

Hi,

flashrom kind of works on my system, but not with the factory images. If I 
read it out with flashrom and write it back with flashrom (also to a different 
chip) it works. The sizes of factory and dumped image are same but they are 
somewhat binary different. Any idea? The motherboard is Abit A-S78H. As I am 
playing around with coreboot - so far unsuccessfully - I want to know whether 
flashrom is writing the generated image correctly... I can upload both images 
somewhere if interested. This is flashrom output on my system:


flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with libpci 3.1.7, 
GCC 4.5.2, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK.
This chipset supports the following protocols: LPC, FWH, SPI.
Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 
0xfff00000.
No operations were specified.

Regards,

Prakash
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From paulepanter at users.sourceforge.net  Sat Dec 31 11:39:07 2011
From: paulepanter at users.sourceforge.net (Paul Menzel)
Date: Sat, 31 Dec 2011 11:39:07 +0100
Subject: [flashrom] Difference of factory bios and dumped image
In-Reply-To: <6081648.skmm3Pho3G@graviton>
References: <6081648.skmm3Pho3G@graviton>
Message-ID: <1325327947.3742.72.camel@mattotaupa>

Dear Parkash,


please do just send plain text messages to mailing lists [1]. Since you
are using KMail this should  be easily configurable.

Am Samstag, den 31.12.2011, 10:55 +0100 schrieb Prakash Punnoor:

> flashrom kind of works on my system, but not with the factory images. If I 
> read it out with flashrom and write it back with flashrom (also to a different 
> chip) it works. The sizes of factory and dumped image are same but they are 
> somewhat binary different. Any idea? The motherboard is Abit A-S78H. As I am 
> playing around with coreboot - so far unsuccessfully - I want to know whether 
> flashrom is writing the generated image correctly... I can upload both images 
> somewhere if interested. This is flashrom output on my system:
> 
> 
> flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with libpci 3.1.7, 
> GCC 4.5.2, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
> 
> Calibrating delay loop... OK.
> Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK.
> This chipset supports the following protocols: LPC, FWH, SPI.
> Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 
> 0xfff00000.
> No operations were specified.

Unfortunately this question seems not be listed in the FAQ. Most of the
time some areas differ because the MAC address and other configuration
data of the downloaded images differs [2]. I hope you mean the
downloaded image by factory/vendor image.


Thanks,

Paul


[1] http://en.opensuse.org/openSUSE:Mailing_list_netiquette
[2] http://flashrom.org/IRC/Bot#.21macaddr
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From prakashp at arcor.de  Sat Dec 31 12:51:30 2011
From: prakashp at arcor.de (Prakash Punnoor)
Date: Sat, 31 Dec 2011 12:51:30 +0100
Subject: [flashrom] Difference of factory bios and dumped image
In-Reply-To: <1325327947.3742.72.camel@mattotaupa>
References: <6081648.skmm3Pho3G@graviton> <1325327947.3742.72.camel@mattotaupa>
Message-ID: <4EFEF742.1050001@arcor.de>

On 31.12.2011 11:39, Paul Menzel wrote:

> Am Samstag, den 31.12.2011, 10:55 +0100 schrieb Prakash Punnoor:
>
>> flashrom kind of works on my system, but not with the factory images. If I 
>> read it out with flashrom and write it back with flashrom (also to a different 
>> chip) it works. The sizes of factory and dumped image are same but they are 
>> somewhat binary different. Any idea? The motherboard is Abit A-S78H. As I am 
>> playing around with coreboot - so far unsuccessfully - I want to know whether 
>> flashrom is writing the generated image correctly... I can upload both images 
>> somewhere if interested. This is flashrom output on my system:
>>
>>
>> flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with libpci 3.1.7, 
>> GCC 4.5.2, little endian
>> flashrom is free software, get the source code at http://www.flashrom.org
>>
>> Calibrating delay loop... OK.
>> Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK.
>> This chipset supports the following protocols: LPC, FWH, SPI.
>> Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 
>> 0xfff00000.
>> No operations were specified.
> Unfortunately this question seems not be listed in the FAQ. Most of the
> time some areas differ because the MAC address and other configuration
> data of the downloaded images differs [2]. I hope you mean the
> downloaded image by factory/vendor image.
To clarify:
- Image I got from vendor web page: Flashed with flashrom won't work
(machine doesn't POST). Flashed with awdflash works.
- Image flashed with awdflash, dumped from bios chip using flashrom and
writing back using flashrom (to an empty chip also) works (machine does
POST and I can boot my OS)
- I haven't tried writing flashrom dumped image using awdflash.
- If I write a dumped image using flashrom and later do a flashrom -v it
will complain about some difference. But flashrom -w verify pass was OK.

This makes my head scratch and I wonder whether flashrom is working 100%
correctly - especially using the generated coreboot rom.

Regards,

Prakash



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From vidwer at gmail.com  Sat Dec 31 13:55:45 2011
From: vidwer at gmail.com (Idwer Vollering)
Date: Sat, 31 Dec 2011 13:55:45 +0100
Subject: [flashrom] Difference of factory bios and dumped image
In-Reply-To: <4EFEF742.1050001@arcor.de>
References: <6081648.skmm3Pho3G@graviton> <1325327947.3742.72.camel@mattotaupa>
	<4EFEF742.1050001@arcor.de>
Message-ID: <CAPp9OrmPqww-OgF1TZs9HnOjyKPtyT4pKo_ha1SXYJg7mK77HQ@mail.gmail.com>

2011/12/31 Prakash Punnoor <prakashp at arcor.de>:
> On 31.12.2011 11:39, Paul Menzel wrote:
>
>> Am Samstag, den 31.12.2011, 10:55 +0100 schrieb Prakash Punnoor:
>>
>>> flashrom kind of works on my system, but not with the factory images. If I
>>> read it out with flashrom and write it back with flashrom (also to a different
>>> chip) it works. The sizes of factory and dumped image are same but they are
>>> somewhat binary different. Any idea? The motherboard is Abit A-S78H. As I am
>>> playing around with coreboot - so far unsuccessfully - I want to know whether
>>> flashrom is writing the generated image correctly... I can upload both images
>>> somewhere if interested. This is flashrom output on my system:
>>>
>>>
>>> flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with libpci 3.1.7,
>>> GCC 4.5.2, little endian
>>> flashrom is free software, get the source code at http://www.flashrom.org
>>>
>>> Calibrating delay loop... OK.
>>> Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK.
>>> This chipset supports the following protocols: LPC, FWH, SPI.
>>> Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address
>>> 0xfff00000.
>>> No operations were specified.
>> Unfortunately this question seems not be listed in the FAQ. Most of the
>> time some areas differ because the MAC address and other configuration
>> data of the downloaded images differs [2]. I hope you mean the
>> downloaded image by factory/vendor image.
> To clarify:
> - Image I got from vendor web page: Flashed with flashrom won't work
> (machine doesn't POST). Flashed with awdflash works.

Is the bootblock in the downloaded image intact/present? You can use
bios_extract: http://cgit.freedesktop.org/~libv/bios_extract

What happens when you reset the CMOS/ESCD data after flashing with
flashrom? awdflash does that with the /cp parameter, see
http://www.plasma-online.de/textual/howto/flash_award.html

> - Image flashed with awdflash, dumped from bios chip using flashrom and
> writing back using flashrom (to an empty chip also) works (machine does
> POST and I can boot my OS)
> - I haven't tried writing flashrom dumped image using awdflash.
> - If I write a dumped image using flashrom and later do a flashrom -v it
> will complain about some difference. But flashrom -w verify pass was OK.
>
> This makes my head scratch and I wonder whether flashrom is working 100%
> correctly - especially using the generated coreboot rom.

Do you have a POST card? You can get one off dealextreme..
http://www.dealextreme.com/p/pc-motherboard-repair-troubleshoot-boot-failure-diagnostic-pci-card-21997

>
> Regards,
>
> Prakash
>
>
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom


From prakashp at arcor.de  Sat Dec 31 14:51:39 2011
From: prakashp at arcor.de (Prakash Punnoor)
Date: Sat, 31 Dec 2011 14:51:39 +0100
Subject: [flashrom] Difference of factory bios and dumped image
In-Reply-To: <CAPp9OrmPqww-OgF1TZs9HnOjyKPtyT4pKo_ha1SXYJg7mK77HQ@mail.gmail.com>
References: <6081648.skmm3Pho3G@graviton> <4EFEF742.1050001@arcor.de>
	<CAPp9OrmPqww-OgF1TZs9HnOjyKPtyT4pKo_ha1SXYJg7mK77HQ@mail.gmail.com>
Message-ID: <1739265.bj9J1XWvUg@graviton>

On Saturday 31 December 2011 13:55:45 Idwer Vollering wrote:
> 2011/12/31 Prakash Punnoor <prakashp at arcor.de>:
> > On 31.12.2011 11:39, Paul Menzel wrote:
> >> Am Samstag, den 31.12.2011, 10:55 +0100 schrieb Prakash Punnoor:

> >>> flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with
> >>> libpci 3.1.7, GCC 4.5.2, little endian
> >>> flashrom is free software, get the source code at
> >>> http://www.flashrom.org
> >>> 
> >>> Calibrating delay loop... OK.
> >>> Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write...
> >>> OK. This chipset supports the following protocols: LPC, FWH, SPI.
> >>> Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical
> >>> address 0xfff00000.
> >>> No operations were specified.
> >> 
> >> Unfortunately this question seems not be listed in the FAQ. Most of
> >> the
> >> time some areas differ because the MAC address and other configuration
> >> data of the downloaded images differs [2]. I hope you mean the
> >> downloaded image by factory/vendor image.
> > 
> > To clarify:
> > - Image I got from vendor web page: Flashed with flashrom won't work
> > (machine doesn't POST). Flashed with awdflash works.
> 
> Is the bootblock in the downloaded image intact/present? You can use
> bios_extract: http://cgit.freedesktop.org/~libv/bios_extract

I don't know how to find that out. This is the output:

Found Award BIOS.
0x30000 ( 75940 bytes)    ->    8a660a1a.BIN    (131072 bytes)
0x428A6 ( 37836 bytes)    ->    awardext.rom    ( 53520 bytes)
0x4BC73 ( 13651 bytes)    ->    ACPITBL.BIN     ( 30519 bytes)
0x4F1C7 ( 25463 bytes)    ->    awardeyt.rom    ( 50864 bytes)
0x5553F ( 11719 bytes)    ->    _EN_CODE.BIN    ( 26512 bytes)
0x58307 (  3989 bytes)    ->    _ITEM.BIN       (  9600 bytes)
0x5929D (  5657 bytes)    ->    _DMI.BIN        (  9456 bytes)
0x5A8B7 (  3396 bytes)    ->    SPIFLASH.BIN    (  9184 bytes)
0x5B5FC (   581 bytes)    ->    SMI32COD.BIN    (   736 bytes)
0x5B842 (  1105 bytes)    ->    SMIAPCOD.BIN    ( 34784 bytes)
0x5BC94 ( 38294 bytes)    ->    ROMs\VBIOS\13B27721.019         ( 60416 bytes)
0x6522B ( 33303 bytes)    ->    ROMs\SRAID_33.BIN       ( 52224 bytes)
0x6D443 (  9230 bytes)    ->    HFSROM.BIN      ( 13824 bytes)
0x6F852 ( 34171 bytes)    ->    ROMs\8056.LOM   ( 55808 bytes)
0x77DCE ( 75010 bytes)    ->    HFSXROM.DLL     (135168 bytes)
0x8A2D1 ( 26405 bytes)    ->    AHCI.BIN        ( 27648 bytes)
0x909F7 ( 11355 bytes)    ->    AGESACPU.ROM    ( 34424 bytes)
0xA6E69 (  5511 bytes)    ->    ROMs\AMD940.BMP         (307980 bytes)

The output from the dumped file looks the same, btw.

> What happens when you reset the CMOS/ESCD data after flashing with
> flashrom? awdflash does that with the /cp parameter, see
> http://www.plasma-online.de/textual/howto/flash_award.html

I will try that, if you can confirm that the image contains a boot block.

> Do you have a POST card? You can get one off dealextreme..
> http://www.dealextreme.com/p/pc-motherboard-repair-troubleshoot-boot-failure
> -diagnostic-pci-card-21997

Good idea. I ordered one (from a different place, as i live in Germany).

Thanks,

Prakash
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From prakash at punnoor.de  Sat Dec 31 12:47:25 2011
From: prakash at punnoor.de (Prakash Punnoor)
Date: Sat, 31 Dec 2011 12:47:25 +0100
Subject: [flashrom] Difference of factory bios and dumped image
In-Reply-To: <1325327947.3742.72.camel@mattotaupa>
References: <6081648.skmm3Pho3G@graviton> <1325327947.3742.72.camel@mattotaupa>
Message-ID: <4EFEF64D.60607@punnoor.de>

On 31.12.2011 11:39, Paul Menzel wrote:
> Am Samstag, den 31.12.2011, 10:55 +0100 schrieb Prakash Punnoor:
>
>> flashrom kind of works on my system, but not with the factory images. If I 
>> read it out with flashrom and write it back with flashrom (also to a different 
>> chip) it works. The sizes of factory and dumped image are same but they are 
>> somewhat binary different. Any idea? The motherboard is Abit A-S78H. As I am 
>> playing around with coreboot - so far unsuccessfully - I want to know whether 
>> flashrom is writing the generated image correctly... I can upload both images 
>> somewhere if interested. This is flashrom output on my system:
>>
>>
>> flashrom v0.9.4-r1395 on Linux 3.2.0-rc7+ (x86_64), built with libpci 3.1.7, 
>> GCC 4.5.2, little endian
>> flashrom is free software, get the source code at http://www.flashrom.org
>>
>> Calibrating delay loop... OK.
>> Found chipset "AMD SB700/SB710/SB750/SB850". Enabling flash write... OK.
>> This chipset supports the following protocols: LPC, FWH, SPI.
>> Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address 
>> 0xfff00000.
>> No operations were specified.
> Unfortunately this question seems not be listed in the FAQ. Most of the
> time some areas differ because the MAC address and other configuration
> data of the downloaded images differs [2]. I hope you mean the
> downloaded image by factory/vendor image.

To clarify:
- Image I got from vendor web page: Flashed with flashrom won't work
(machine doesn't POST). Flashed with awdflash works.
- Image flashed with awdflash, dumped from bios chip using flashrom and
writing back using flashrom (to an empty chip also) works (machine does
POST and I can boot my OS)
- I haven't tried writing flashrom dumped image using awdflash.
- If I write a dumped image using flashrom and later do a flashrom -v it
will complain about some difference. But flashrom -w verify pass was OK.

This makes my head scratch and I wonder whether flashrom is working 100%
correctly - especially using the generated coreboot rom.

Regards,

Prakash

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From ajftonner at gmail.com  Sat Dec 31 19:43:49 2011
From: ajftonner at gmail.com (Alistair Tonner)
Date: Sat, 31 Dec 2011 13:43:49 -0500
Subject: [flashrom] MSI K9N2 SLI Platinum - MCP SPI flashrom information
	dumps
Message-ID: <1325357029.3911.5.camel@ajftl1>


   One zip file containing 3 output files from :
./flashrom -V
lspci -nnvvvxxx
superiotool -deV
   commands.   - 
  in dmidecode this board is shown as:
  MS-7374
  The bios update can be found at:
  http://www.msi.com/service/download/bios-14652.html
  
  I'm looking to see if I can setup some sort of backup on this -- If I
can I will try the flash and report results.
  
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From c-d.hailfinger.devel.2006 at gmx.net  Sat Dec 31 21:54:24 2011
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 31 Dec 2011 21:54:24 +0100
Subject: [flashrom] [PATCH 1/2] revert flashctx to flashchip in
 block_eraser helper functions
In-Reply-To: <1325033822-9515-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1325033822-9515-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1325033822-9515-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4EFF7680.9040506@gmx.net>

Am 28.12.2011 01:57 schrieb Stefan Tauner:
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Sorry, Nack.

Quoting from your other mail:
> it is easier to "upcast" some flashctx
> "objects" to flashchip (which is safe)

AFAICS this violates the C standard.
http://stackoverflow.com/questions/98650/what-is-the-strict-aliasing-rule

The offending hunks are below:

> diff --git a/flashrom.c b/flashrom.c
> index f1a6165..68b6d97 100644
> --- a/flashrom.c
> +++ b/flashrom.c
> @@ -1313,7 +1313,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
>  	int k, ret = 1;
>  	uint8_t *curcontents;
>  	unsigned long size = flash->total_size * 1024;
> -	unsigned int usable_erasefunctions = count_usable_erasers(flash);
> +	unsigned int usable_erasefunctions = count_usable_erasers((struct flashchip*) flash);
>  
>  	msg_cinfo("Erasing and writing flash chip... ");
>  	curcontents = malloc(size);
> @@ -1332,7 +1332,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
>  			break;
>  		}
>  		msg_cdbg("Trying erase function %i... ", k);
> -		if (check_block_eraser(flash, k, 1))
> +		if (check_block_eraser((struct flashchip*) flash, k, 1))
>  			continue;
>  		usable_erasefunctions--;
>  		ret = walk_eraseregions(flash, k, &erase_and_write_block_helper,
> @@ -1680,7 +1680,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
>  	int ret = 0;
>  	unsigned long size = flash->total_size * 1024;
>  
> -	if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) {
> +	if (chip_safety_check((struct flashchip*) flash, force, read_it, write_it, erase_it, verify_it)) {
>  		msg_cerr("Aborting.\n");
>  		ret = 1;
>  		goto out_nofree;

-- 
http://www.hailfinger.org/