From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb  1 00:03:34 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 01 Feb 2012 00:03:34 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F287346.4000909@gmx.net>

Am 31.01.2012 06:59 schrieb Stefan Tauner:
> Similar to modules using the opaque programmer framework (e.g. ICH Hardware
> Sequencing) this uses a template struct flashchip element in flashchips.c with
> a special probe function that fills the obtained values into that struct.
>
> This allows yet unknown SPI chips to be supported (read, erase, write) almost
> as if it was already added to flashchips.c.
>
> Documentation used:
> http://www.jedec.org/standards-documents/docs/jesd216 (2011-04)
> W25Q32BV data sheet Revision F (2011-04-01)
> EN25QH16 data sheet Revision F (2011-06-01)
>
> todo:
>  - handle programmers which have a problem with the dummy bytes needed

AMD SB[678]x0 SPI has a way to specify sending one dummy byte between
write and read, IIRC it is called DropOneClkOnRead or somthing like
that. Quite a few other SPI masters have the one-dummy-byte
functionality as well. This needs to be implemented in a generic way (I
have a totally bitrotted patch for it), but it should not hold back this
patch.


>  - move sfdp_add_uniform_eraser to spi25.c for further use like
>    spi_get_erasefn_from_opcode?
>  - is setting the generic SPI unlock method safe?
>  - what page_size should be set?
>
> Tested-by: David Hendricks <dhendrix at google.com>
> on W25Q64CV
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
>  Makefile      |    2 +-
>  chipdrivers.h |    4 +
>  flash.h       |    2 +
>  flashchips.c  |   23 ++++
>  flashchips.h  |    1 +
>  flashrom.c    |   28 +++++-
>  sfdp.c        |  355 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  spi.h         |    5 +
>  spi25.c       |   31 +++++
>  9 files changed, 449 insertions(+), 2 deletions(-)
>  create mode 100644 sfdp.c
>
> diff --git a/Makefile b/Makefile
> index 83aa038..b890d8a 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -252,7 +252,7 @@ endif
>  CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \
>  	sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \
>  	sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \
> -	a25.o at25.o opaque.o
> +	a25.o at25.o opaque.o sfdp.o
>  
>  LIB_OBJS = layout.o
>  
> diff --git a/chipdrivers.h b/chipdrivers.h
> index a1d0cd9..bd81098 100644
> --- a/chipdrivers.h
> +++ b/chipdrivers.h
> @@ -41,6 +41,7 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int b
>  int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
>  int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
>  int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
> +erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode);
>  int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
>  int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
>  int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
> @@ -58,6 +59,9 @@ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, u
>  int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
>  int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
>  
> +/* sfdp.c */
> +int probe_spi_sfdp(struct flashctx *flash);
> +
>  /* opaque.c */
>  int probe_opaque(struct flashctx *flash);
>  int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
> diff --git a/flash.h b/flash.h
> index e51b6d4..6bcae71 100644
> --- a/flash.h
> +++ b/flash.h
> @@ -174,6 +174,8 @@ struct flashctx {
>  	struct registered_programmer *pgm;
>  };
>  
> +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);

I believe that typedef to be pretty unreadable, but I see that avoiding
the typedef would probably be even worse.


> +
>  #define TEST_UNTESTED	0
>  
>  #define TEST_OK_PROBE	(1 << 0)
> diff --git a/flashchips.c b/flashchips.c
> index 0c8257b..b22e709 100644
> --- a/flashchips.c
> +++ b/flashchips.c
> @@ -8872,6 +8872,29 @@ const struct flashchip flashchips[] = {
>  		.read		= read_memmapped,
>  		.voltage	= {3000, 3600}, /* Also has 12V fast program */
>  	},
> +	
> +	{
> +		.vendor		= "Unknown",
> +		.name		= "SFDP device",
> +		.bustype	= BUS_SPI,
> +		.manufacture_id	= GENERIC_MANUF_ID,
> +		.model_id	= SFDP_DEVICE_ID,
> +		/* We present our own "report this" text hence we do not
> +		 * want the default "This flash part has status UNTESTED..."
> +		 * text to be printed. */
> +		.tested		= TEST_OK_PREW,
> +		.probe		= probe_spi_sfdp,
> +		.unlock		= spi_disable_blockprotect, /* is this safe? */

Should be safe AFAICS, but that's not a hard statement, it's a gut feeling.


> +		.read		= spi_chip_read,
> +		.page_size	= 256, /* ? */

Argh, page_size comes to bite us again. Did I already send my "kill most
uses of page_size" patch?


> +		/* FIXME: some vendor extensions define this */
> +		.voltage	= {},
> +		 /* Everything below will be set by the probing function. */
> +		.write		= NULL,
> +		.total_size	= 0,
> +		.feature_bits	= 0,
> +		.block_erasers	= {},
> +	},
>  
>  	{
>  		.vendor		= "Unknown",
> diff --git a/flashchips.h b/flashchips.h
> index 03efb86..1f2a8ca 100644
> --- a/flashchips.h
> +++ b/flashchips.h
> @@ -36,6 +36,7 @@
>  
>  #define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
>  #define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
> +#define SFDP_DEVICE_ID		0xfffe

Side note: Should we move PROGMANUF_ID and its companion from the bottom
of the file to this location to have generic match IDs in one place?


>  
>  #define ALLIANCE_ID		0x52	/* Alliance Semiconductor */
>  #define ALLIANCE_AS29F002B	0x34
> diff --git a/flashrom.c b/flashrom.c
> index ee68344..84fb3fc 100644
> --- a/flashrom.c
> +++ b/flashrom.c
> @@ -986,7 +986,33 @@ int probe_flash(struct registered_programmer *pgm, int startchip,
>  		 * probe_flash() is the first one and thus no chip has been
>  		 * found before.

The comment above is not really valid anymore. Can you include the
following snippet in your patch?

@@ -980,11 +980,10 @@
 
 		/* If this is the first chip found, accept it.
 		 * If this is not the first chip found, accept it only if it is
-		 * a non-generic match.
-		 * We could either make chipcount global or provide it as
-		 * parameter, or we assume that startchip==0 means this call to
-		 * probe_flash() is the first one and thus no chip has been
-		 * found before.
+		 * a non-generic match. SFDP and CFI are generic matches.
+		 * startchip==0 means this call to probe_flash() is the first
+		 * one for this programmer interface and thus no other chip has
+		 * been found on this interface.
 		 */
 		if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID)
 			break;



>  		 */
> -		if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID)
> +		if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) {
> +			msg_cinfo("===\n"
> +				  "SFDP has autodetected a flash chip which is "
> +				  "not natively supported by flashrom yet.\n");
> +			if (count_usable_erasers(fill_flash) == 0)
> +				msg_cinfo("The standard operations read and "
> +					  "verify should work, but to support "
> +					  "erase, write and all other "
> +					  "possible features");
> +			else
> +				msg_cinfo("All standard operations (read, "
> +					  "verify, erase and write) should "
> +					  "work, but to support all possible "
> +					  "features");
> +
> +			msg_cinfo(" we need to add them manually.\nYou "
> +				  "can help us by mailing us the output of "
> +				  "the following command to flashrom at flashrom."
> +				  "org: \n'flashrom -VV [plus the "
> +				  "-p/--programmer parameter (if needed)]"
> +				  "'\nThanks for your help!\n"
> +				  "===\n");
> +		}
> +
> +		if (startchip == 0 ||
> +		    ((fill_flash->model_id != GENERIC_DEVICE_ID) &&
> +		     (fill_flash->model_id != SFDP_DEVICE_ID)))
>  			break;
>  
>  notfound:
> diff --git a/sfdp.c b/sfdp.c
> new file mode 100644
> index 0000000..7c00ff5
> --- /dev/null
> +++ b/sfdp.c
> @@ -0,0 +1,355 @@
> +/*
> + * This file is part of the flashrom project.
> + *
> + * Copyright (C) 2011-2012 Stefan Tauner
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; version 2 of the License.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
> + */
> +
> +#include <stdint.h>
> +#include <stdlib.h>
> +#include "flash.h"
> +#include "spi.h"
> +#include "chipdrivers.h"
> +
> +static int spi_sfdp_wrapper(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
> +{
> +	int i, ret;
> +	const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = {
> +		JEDEC_SFDP,
> +		(address >> 16) & 0xff,
> +		(address >> 8) & 0xff,
> +		(address >> 0) & 0xff,
> +		0
> +	};
> +	msg_cspew("spi_sfdp_wrapper: addr=0x%x, len=%d, data:\n", address, len);
> +	ret = spi_send_command(flash, sizeof(cmd), len, cmd, buf);
> +	for (i = 0; i < len; i++)
> +		msg_cspew(" 0x%02x", buf[i]);
> +	msg_cspew("\n");
> +	return ret;
> +}
> +
> +/* FIXME: eventually something similar like this but more generic should be
> + * available to split up spi commands. use that then instead */
> +static int spi_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
> +{
> +	/* FIXME: this is wrong. */
> +	int maxstep = 8;

Yes, maxstep should be a programmer-specific setting. However, with our
current infrastructure there is no way to fix this easily.


> +	int ret = 0;
> +	while (len > 0) {
> +		int step = min(len, maxstep);
> +		ret = spi_sfdp_wrapper(flash, address, buf, step);
> +		if (ret)

Actually, there is probably a way to determine optimal size for those
SFDP requests: Check if ret indicates a "command too long" error and
reduce maxstep by one in that case, then retry. Such code is not exactly
pretty and I'm not sure if all SPI masters have such a differentiated
error code reporting.


> +			return ret;
> +		address += step;
> +		buf += step;
> +		len -= step;
> +	}
> +	return ret;
> +}
> +
> +struct sfdp_tbl_hdr {
> +	uint8_t id;
> +	uint8_t v_minor;
> +	uint8_t v_major;
> +	uint8_t len;
> +	uint32_t ptp; /* 24b pointer */
> +};
> +
> +static int sfdp_add_uniform_eraser(struct flashctx *f, uint8_t opcode, uint32_t bsize)

struct flashctx *flash
Just "f" is too short, and if you try to search for it, you'll get
thousands of matches you don't want.

bsize or blocksize? I prefer the latter for consistency and readability
reasons.


> +{
> +	uint32_t total_size = f->total_size * 1024;
> +	int i;
> +	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
> +	if (erasefn == NULL)
> +		return 1;
> +	for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
> +		struct block_eraser *eraser = &f->block_erasers[i];
> +		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase)
> +			continue;
> +		eraser->block_erase = erasefn;
> +		eraser->eraseblocks[0].size = bsize;
> +		eraser->eraseblocks[0].count = total_size/bsize;
> +		msg_cdbg2("  Block eraser %d: %d x %d B with opcode "
> +			  "0x%02x\n", i, total_size/bsize, bsize,
> +			  opcode);
> +		return 0;
> +	}
> +	msg_cinfo("%s: Not enough space to store another eraser (i=%d)."

msg_cerr?


> +		  " Please report this at flashrom at flashrom.org\n",
> +		  __func__, i);
> +	return 1;
> +}
> +


Rest of review follows later.


> +static int sfdp_fill_flash(struct flashctx *f, uint8_t *buf, uint16_t len)
> +{
> +	uint32_t tmp32;
> +	uint8_t tmp8;
> +	uint32_t total_size; /* in bytes */
> +	uint32_t bsize;
> +	uint8_t opcode_4k = 0xFF;
> +	int dw, j;
> +
> +	msg_cdbg("Parsing JEDEC SFDP parameter table... ");
> +	if (len != 9 * 4 && len != 4 * 4) {
> +		msg_cerr("%s: len out of spec\n", __func__);
> +		return 1;
> +	}
> +	msg_cdbg2("\n");
> +	
> +	/* 1. double word */
> +	dw = 0;
> +	tmp32 = buf[(4 * dw) + 0];
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
> +
> +	tmp8 = (tmp32 >> 17) & 0x3;
> +	switch (tmp8) {
> +	case 0x0:
> +		msg_cdbg2("  3-Byte only addressing.\n");
> +		break;
> +	case 0x1:
> +		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
> +		break;
> +	case 0x2:
> +		msg_cdbg("  4-Byte only addressing not supported.\n");
> +		return 1;
> +	default:
> +		msg_cdbg("  Required addressing mode (0x%x) not supported.\n",
> +			 tmp8);
> +		return 1;
> +	}
> +
> +	msg_cdbg2("  Writes to the status register have ");
> +	if (tmp32 & (1 << 3)) {
> +		msg_cdbg2("to be enabled with ");
> +		if (tmp32 & (1 << 4)) {
> +			f->feature_bits = FEATURE_WRSR_WREN;
> +			msg_cdbg2("WREN (0x06).\n");
> +		} else {
> +			f->feature_bits = FEATURE_WRSR_EWSR;
> +			msg_cdbg2("EWSR (0x50).\n");
> +		}
> +	} else
> +		msg_cdbg2("not to be especially enabled.\n");
> +
> +	msg_cdbg2("  Write granularity is ");
> +	if (tmp32 & (1 << 2)) {
> +		msg_cdbg2("at least 64 B.\n");
> +		f->write = spi_chip_write_256;
> +	} else {
> +		msg_cdbg2("1 B only.\n");
> +		f->write = spi_chip_write_1;
> +	}
> +
> +	if ((tmp32 & 0x3) == 0x1) {
> +		opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
> +	}
> +
> +	/* 2. double word */
> +	dw = 1;
> +	tmp32 = buf[(4 * dw) + 0];
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
> +
> +	if (tmp32 & (1 << 31)) {
> +		msg_cerr("Flash chip size >= 4 Gb/512 MB not supported.\n");
> +		return 1;
> +	}
> +	total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
> +	f->total_size = total_size / 1024;
> +	msg_cdbg2("  Flash chip size is %d kB.\n", f->total_size);
> +
> +	/* FIXME: double words 3-7 contain unused fast read information */
> +
> +	if (len == 4 * 4) {
> +		msg_cdbg("It seems like this chip supports the preliminary "
> +			 "Intel version of SFDP, skipping processing of double "
> +			 "words 3-9.\n");
> +		goto proc_4k;
> +	}
> +
> +	dw = 8;
> +	for (j = 0; j < 4; j++) {
> +		/* 8 double words from the start + 2 words for every eraser */
> +		tmp32 = buf[(4 * dw) + (2 * j)];
> +		if (tmp32 == 0) {
> +			msg_cdbg2("  Block eraser %d is unused.\n", j);
> +			continue;
> +		}
> +		if (tmp32 >= 31) {
> +			msg_cdbg2("  Block size of eraser %d (2^%d) is too big."
> +				  "\n", j, tmp32);
> +			continue;
> +		}
> +		bsize = 1 << (tmp32); /* bsize = 2 ^ field */
> +
> +		tmp8 = buf[(4 * dw) + (2 * j) + 1];
> +		if(sfdp_add_uniform_eraser(f, tmp8, bsize))
> +			continue;
> +		/* If there is a valid 4k value in the last double words,
> +		 * we want to override the value from double word 1, hence force
> +		 * skipping its processing: */
> +		if (bsize == 4 * 1024)
> +			opcode_4k = 0xFF;
> +	}
> +
> +proc_4k:
> +	if (opcode_4k != 0xFF) {
> +		sfdp_add_uniform_eraser(f, opcode_4k, 4 * 1024);
> +	}
> +	msg_cdbg("done.\n");
> +	return 0;
> +}
> +
> +static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len)
> +{
> +	uint16_t i;
> +	if (spi_sfdp(flash, addr, buf, len)) {
> +		msg_cerr("Receiving SFDP parameter table failed.\n");
> +		return 1;
> +	}
> +	msg_cspew("  Parameter table contents:\n");
> +	for(i = 0; i < len; i++) {
> +		if ((i % 8) == 0) {
> +			msg_cspew("    0x%03x: ", i);
> +		}
> +		msg_cspew(" 0x%02x", buf[i]);
> +		if ((i % 8) == 7) {
> +			msg_cspew("\n");
> +			continue;
> +		}
> +		if ((i % 8) == 3) {
> +			msg_cspew(" ");
> +			continue;
> +		}
> +	}
> +	msg_cspew("\n");
> +	return 0;
> +}
> +
> +int probe_spi_sfdp(struct flashctx *flash)
> +{
> +	int ret = 0;
> +	uint8_t buf[8];
> +	uint32_t tmp32;
> +	uint8_t nph;
> +	/* need to limit the table loop by comparing i to uint8_t nph hence: */
> +	uint16_t i;
> +	struct sfdp_tbl_hdr *hdrs;
> +	uint8_t *hbuf;
> +	uint8_t *tbuf;
> +
> +	if (spi_sfdp(flash, 0x00, buf, 4)) {
> +		msg_cerr("Receiving SFDP signature failed.\n");
> +		return 0;
> +	}
> +	tmp32 = buf[0];
> +	tmp32 |= ((unsigned int)buf[1]) << 8;
> +	tmp32 |= ((unsigned int)buf[2]) << 16;
> +	tmp32 |= ((unsigned int)buf[3]) << 24;
> +
> +	msg_cdbg2("SFDP signature = 0x%08x (should be 0x50444653)\n", tmp32);
> +	if (tmp32 != 0x50444653) {
> +		msg_cdbg("No SFDP signature found.\n");
> +		return 0;
> +	}
> +	if (spi_sfdp(flash, 0x04, buf, 3)) {
> +		msg_cerr("Receiving SFDP revision and number of parameter "
> +			 "headers (NPH) failed. ");
> +		return 0;
> +	}
> +	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
> +	nph = buf[2];
> +	msg_cdbg2("SFDP number of parameter headers (NPH) = %d (+ 1 mandatory)"
> +		  "\n", nph);
> +
> +	/* Fetch all parameter headers, even if we don't use them all (yet). */
> +	hbuf = malloc(sizeof(struct sfdp_tbl_hdr) * (nph + 1));
> +	hdrs = malloc((nph + 1) * 8);
> +	if (hbuf == NULL || hdrs == NULL ) {
> +		msg_gerr("Out of memory!\n");
> +		exit(1); /* FIXME: shutdown gracefully */
> +	}
> +	if (spi_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) {
> +		msg_cerr("Receiving SFDP parameter table headers failed.\n");
> +		goto cleanup_hdrs;
> +	}
> +
> +	i = 0;
> +	do {
> +		uint16_t len;
> +		hdrs[i].id = hbuf[(8 * i) + 0];
> +		hdrs[i].v_minor = hbuf[(8 * i) + 1];
> +		hdrs[i].v_major = hbuf[(8 * i) + 2];
> +		hdrs[i].len = hbuf[(8 * i) + 3];
> +		hdrs[i].ptp = hbuf[(8 * i) + 4];
> +		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8;
> +		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16;
> +		msg_cdbg2("SFDP parameter table header %d/%d:\n", i, nph);
> +		msg_cdbg2("  ID 0x%02x, version %d.%d\n", hdrs[i].id,
> +			  hdrs[i].v_major, hdrs[i].v_minor);
> +		len = hdrs[i].len * 4;
> +		tmp32 = hdrs[i].ptp;
> +		msg_cdbg2("  Length %d B, Parameter Table Pointer 0x%06x\n",
> +			  len, tmp32);
> +
> +		if (len + tmp32 > UINT16_MAX) {
> +			msg_cerr("SFDP Parameter Table %d supposedly "
> +				  "overflows addressable SFDP area. This most\n"
> +				  "probably indicates a corrupt SFDP parameter "
> +				  "table header. Aborting SFDP probe!\n", i);
> +			ret = 0;
> +			goto cleanup_hdrs;
> +		}
> +
> +		tbuf = malloc(len);
> +		if (tbuf == NULL) {
> +			msg_gerr("Out of memory!\n");
> +			exit(1); /* FIXME: shutdown gracefully */
> +		}
> +		if (sfdp_fetch_pt(flash, tmp32, tbuf, len)){
> +			msg_cerr("Fetching SFDP parameter table %d failed.\n",
> +				 i);
> +			free(tbuf);
> +			break;
> +		}
> +		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
> +			if (hdrs[i].id != 0)
> +				msg_cdbg("ID of the mandatory JEDEC SFDP "
> +					 "parameter table is not 0 as demanded "
> +					 "by JESD216 (warning only).\n");
> +
> +			if (len != 9 * 4 && len != 4 * 4) {
> +				msg_cdbg("Length of the mandatory JEDEC SFDP "
> +					 "parameter table is %d B instead of "
> +					 "36 B (i.e. 9 double words) as "
> +					 "demanded by JESD216, skipping "
> +					 "parsing.\n", len);
> +			} else if (sfdp_fill_flash(flash, tbuf, len) == 0)
> +				ret = 1;
> +		}
> +		
> +		free(tbuf);
> +		i++;
> +	} while(i <= nph);
> +
> +cleanup_hdrs:
> +	free(hdrs);
> +	free(hbuf);
> +	return ret;
> +}

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb  1 23:46:02 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 01 Feb 2012 23:46:02 +0100
Subject: [flashrom] Board identification patch for the MSC Q7 Tunnel
 Creek board
In-Reply-To: <201201310657.q0V6veAa002376@mail2.student.tuwien.ac.at>
References: <EB7199538A96CB47AAA7C0D1083C454D038AF237@msc-ex03.msc-ge.mscnet>
	<201201310657.q0V6veAa002376@mail2.student.tuwien.ac.at>
Message-ID: <4F29C0AA.8080901@gmx.net>

Am 31.01.2012 07:57 schrieb Stefan Tauner:
> On Mon, 30 Jan 2012 09:38:52 +0100
> "Feldschmid, Ingo" <ifel at msc-ge.com> wrote:
>
>> The detection mechanism should now work for all boards with Tunnel Creek
>> CPU with EG20T southbridge from vendor "MSC Vertriebs GmbH". I tried to
>> narrow it down with the CPU/chipset/DMI combination, since we don't have
>> any company-specific pci devices on this board. 
>>
>> Signed-off-by: Ingo Feldschmid <ifel at msc-ge.com>
> thanks for the rework!
>
> Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Glad to see this merged. It's a good way to demonstrate how phase 2 in
board matching should be used.


> i have changed a few things additionally: most noteworthy i have
> changed the board enable to return 0 instead of 1. this is not checked
> atm, but if it ever will, then 0 will be the right choice.
> I have also added a debug print so that "DMI chassis-type is not
> specific enough." is followed by "Laptop detection overridden by P2
> board enable." in verbose output.

Yes, that makes sense. Thanks for reworking and fine-tuning this patch!

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From Raghuramchary.Jallipalli at lntinfotech.com  Thu Feb  2 09:42:26 2012
From: Raghuramchary.Jallipalli at lntinfotech.com (Raghuramchary Jallipalli)
Date: Thu, 2 Feb 2012 14:12:26 +0530
Subject: [flashrom] Help: unable to upgrade bios
In-Reply-To: <CAKOoyUdpsDiA47ghrmFA7kt2xTmkxCm2F8AE84+TaYaN7GQX9Q@mail.gmail.com>
References: <F7A627F10F4B9E4F833E292AA04A4BE63C84CD2F@CHNINMSMBX01.chennaiodc.lntinfotech.com>
	<201112291221.pBTCLKR7030043@mail2.student.tuwien.ac.at>
	<F7A627F10F4B9E4F833E292AA04A4BE63C9281A8@CHNINMSMBX01.chennaiodc.lntinfotech.com>
	<201201040008.q0408l9V025178@mail2.student.tuwien.ac.at>
	<E966B27C9416D646A551A479507C7EB0355B736C1C@CHNINMSMBX01.chennaiodc.lntinfotech.com>
	<CAKOoyUeBuyT=wEjuWaGpOJyiddOYBDTbRGe_HQHoum5uoy4fdA@mail.gmail.com>
	<E966B27C9416D646A551A479507C7EB0355B737226@CHNINMSMBX01.chennaiodc.lntinfotech.com>
	<CAKOoyUdpsDiA47ghrmFA7kt2xTmkxCm2F8AE84+TaYaN7GQX9Q@mail.gmail.com>
Message-ID: <E966B27C9416D646A551A479507C7EB0355C26F4AE@CHNINMSMBX01.chennaiodc.lntinfotech.com>

Hi David,
Sorry for the late reply.
I have done the changes as suggested and don?t see either 1 or 2 for op.atomic after issuing the ?flashrom ?V ?p internal:this_is_not_a_laptop ?r foo.bin? command. Please see attached log.

Will this now confirm that the flashrom utility cannot be used for BIOS upgrade on my board?

NOTE: The log is collected for AT25DF641A(8MB) flash as opposed to AT25DF321A(4MB) flash before.

Thanks for the help,
Raghu

From: David Hendricks [mailto:dhendrix at google.com]
Sent: Wednesday, January 11, 2012 3:32 AM
To: Raghuramchary Jallipalli
Cc: flashrom at flashrom.org; V Balaji; Vishnuvardhan Reddy
Subject: Re: [flashrom] Help: unable to upgrade bios

On Mon, Jan 9, 2012 at 3:20 AM, Raghuramchary Jallipalli <Raghuramchary.Jallipalli at lntinfotech.com<mailto:Raghuramchary.Jallipalli at lntinfotech.com>> wrote:
Thanks David.
As you said, the reason for not programming is due to wrong op.atomic configuration. Is there any way to set these properly?

It should be set automatically.

Carl-Daniel clarified on IRC that the "atomic" cycle flag will always be 0 at the stage they are printed. Sorry for the confusion!

I recommend adding a debug print to ich9_run_opcode() to see what the "atomic" flag ends up being:

Index: ichspi.c
===================================================================
--- ichspi.c    (revision 1483)
+++ ichspi.c    (working copy)
@@ -908,6 +908,7 @@
           This means the timeout must be sufficient for chip erase
           of slow high-capacity chips.
         */
+       msg_pdbg("opcode: 0x%02x, spi_type: %u, atomic: %u\n", op.opcode, op.spi_type, op.atomic);
        switch (op.atomic) {
        case 2:
                /* Select second preop. */

Then run "flashrom -V -p internal:this_is_not_a_laptop -r foo.bin" and make sure that the sector erase opcode (0x20) and byte program opcode (0x02) show either "1" or "2" for op.atomic.

This will help us to prove whether or not this is the problem you are encountering.

Yes jumper selects the ROM at a time.

Okay. I do not think Flashrom is confused about the flash part, then.

--
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.

________________________________
The contents of this e-mail and any attachment(s) may contain confidential or privileged information for the intended recipient(s). Unintended recipients are prohibited from taking action on the basis of information in this e-mail and using or disseminating the information, and must notify the sender and delete it from their system. L&T Infotech will not accept responsibility or liability for the accuracy or completeness of, or the presence of any virus or disabling code in this e-mail"
*************************************************************************
 This email and attachments have been scanned for
 potential proprietary or sensitive information leakage.
 Websense Data Security, Protecting Your Information from the Inside Out.
 www.websense.com
 *************************************************************************
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120202/57142b84/attachment-0001.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: log_641A.rar
Type: application/octet-stream
Size: 6218 bytes
Desc: log_641A.rar
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120202/57142b84/attachment-0001.obj>

From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb  3 02:13:56 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 03 Feb 2012 02:13:56 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F2B34D4.7000501@gmx.net>

And here's the rest of the review, as promised.
Please note that I do not have the stgandard at hand, so this is not a
correctness review, but a code review.

Am 31.01.2012 06:59 schrieb Stefan Tauner:
> --- /dev/null
> +++ b/sfdp.c
> @@ -0,0 +1,355 @@
[...]
> +static int sfdp_fill_flash(struct flashctx *f, uint8_t *buf, uint16_t len)

*flash instead of *f, please.


> +{
> +	uint32_t tmp32;
> +	uint8_t tmp8;
> +	uint32_t total_size; /* in bytes */
> +	uint32_t bsize;
> +	uint8_t opcode_4k = 0xFF;
> +	int dw, j;
> +
> +	msg_cdbg("Parsing JEDEC SFDP parameter table... ");

... JEDEC flash parameter table...


> +	if (len != 9 * 4 && len != 4 * 4) {
> +		msg_cerr("%s: len out of spec\n", __func__);
> +		return 1;
> +	}
> +	msg_cdbg2("\n");
> +	
> +	/* 1. double word */
> +	dw = 0;
> +	tmp32 = buf[(4 * dw) + 0];
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
> +
> +	tmp8 = (tmp32 >> 17) & 0x3;
> +	switch (tmp8) {
> +	case 0x0:
> +		msg_cdbg2("  3-Byte only addressing.\n");
> +		break;
> +	case 0x1:
> +		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
> +		break;
> +	case 0x2:
> +		msg_cdbg("  4-Byte only addressing not supported.\n");
> +		return 1;
> +	default:
> +		msg_cdbg("  Required addressing mode (0x%x) not supported.\n",
> +			 tmp8);
> +		return 1;
> +	}
> +
> +	msg_cdbg2("  Writes to the status register have ");
> +	if (tmp32 & (1 << 3)) {
> +		msg_cdbg2("to be enabled with ");
> +		if (tmp32 & (1 << 4)) {
> +			f->feature_bits = FEATURE_WRSR_WREN;
> +			msg_cdbg2("WREN (0x06).\n");
> +		} else {
> +			f->feature_bits = FEATURE_WRSR_EWSR;
> +			msg_cdbg2("EWSR (0x50).\n");
> +		}
> +	} else
> +		msg_cdbg2("not to be especially enabled.\n");

The "Writing to Volatile Status Register" part of JESD216 is one of the
most confusing wordings I ever saw in a standard. I expect some flash
chip vendors to conform to the letter of the spec which will cause
pretty explosions: If the status register is nonvolatile and needs EWSR
or WREN for writes, the standard explicitly requires the vendor to set
bits 3+4 to 0 (EWSR/WREN not needed). I don't think JEDEC understood the
implications of that wording.

Suggestion for a standards-conforming code flow:
msg_cdbg2("  Status register is ");
if (tmp32 & (1 << 3)) {
  msg_cdbg2("volatile and writes to the status register have to be
enabled with ");
[your bit 4 code]
} else
  msg_cdbg2("nonvolatile and the standard does not allow vendors to tell
us whether EWSR/WREN is needed for status register writes");


> +
> +	msg_cdbg2("  Write granularity is ");

I know they call it write granularity, but flashrom calls it writechunk
size. Please use our terminology here even if the standard calls it
differently. You can add a comment if you think that clarifies the code
for future developers.


> +	if (tmp32 & (1 << 2)) {
> +		msg_cdbg2("at least 64 B.\n");
> +		f->write = spi_chip_write_256;

Please insert
flash->page_size = 64;


> +	} else {
> +		msg_cdbg2("1 B only.\n");
> +		f->write = spi_chip_write_1;

flash->page_size = 256;
(I know that page_size needs to die, but right now we use it.)


> +	}
> +
> +	if ((tmp32 & 0x3) == 0x1) {
> +		opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
> +	}

What about this instead?

switch (tmp32 & 0x03) {
case 0x0:
case 0x2:
  msg_cerr("4k erase is reserved... should not happen");
  return 1;
  break;
case 0x1:
  opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
  break;
case 0x3:
  if (((tmp32 >> 8) & 0xFF) != 0xFF) {
    msg_cdbg("wtf inconsistent 4k erase settings?!?");
    return 1;
  }
}
Admittedly, the wording could be better.


> +
> +	/* 2. double word */
> +	dw = 1;
> +	tmp32 = buf[(4 * dw) + 0];
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
> +
> +	if (tmp32 & (1 << 31)) {
> +		msg_cerr("Flash chip size >= 4 Gb/512 MB not supported.\n");
> +		return 1;
> +	}
> +	total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
> +	f->total_size = total_size / 1024;
> +	msg_cdbg2("  Flash chip size is %d kB.\n", f->total_size);
> +
> +	/* FIXME: double words 3-7 contain unused fast read information */
> +
> +	if (len == 4 * 4) {
> +		msg_cdbg("It seems like this chip supports the preliminary "
> +			 "Intel version of SFDP, skipping processing of double "
> +			 "words 3-9.\n");
> +		goto proc_4k;
> +	}
> +
> +	dw = 8;
> +	for (j = 0; j < 4; j++) {
> +		/* 8 double words from the start + 2 words for every eraser */
> +		tmp32 = buf[(4 * dw) + (2 * j)];

use tmp8 instead?


> +		if (tmp32 == 0) {
> +			msg_cdbg2("  Block eraser %d is unused.\n", j);
> +			continue;
> +		}
> +		if (tmp32 >= 31) {
> +			msg_cdbg2("  Block size of eraser %d (2^%d) is too big."

"... too big for flashrom."


> +				  "\n", j, tmp32);
> +			continue;
> +		}
> +		bsize = 1 << (tmp32); /* bsize = 2 ^ field */
> +
> +		tmp8 = buf[(4 * dw) + (2 * j) + 1];
> +		if(sfdp_add_uniform_eraser(f, tmp8, bsize))
> +			continue;
> +		/* If there is a valid 4k value in the last double words,
> +		 * we want to override the value from double word 1, hence force
> +		 * skipping its processing: */
> +		if (bsize == 4 * 1024)
> +			opcode_4k = 0xFF;

Not really. What happens if there are multiple valid opcodes for 4k
erase? Such chips do exist IIRC. What about
if (bsize == 4 * 1024) {
  if (tmp8 == opcode_4k)
    opcode_4k == 0xFF;
  else
    msg_cdbg("More than one 4kB eraser opcode found: 0x%02x and
0x%02x.", tmp8, opcode_4k);
}


> +	}
> +
> +proc_4k:
> +	if (opcode_4k != 0xFF) {
> +		sfdp_add_uniform_eraser(f, opcode_4k, 4 * 1024);
> +	}
> +	msg_cdbg("done.\n");
> +	return 0;
> +}
> +
> +static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len)
> +{
> +	uint16_t i;
> +	if (spi_sfdp(flash, addr, buf, len)) {
> +		msg_cerr("Receiving SFDP parameter table failed.\n");
> +		return 1;
> +	}
> +	msg_cspew("  Parameter table contents:\n");
> +	for(i = 0; i < len; i++) {
> +		if ((i % 8) == 0) {
> +			msg_cspew("    0x%03x: ", i);
> +		}
> +		msg_cspew(" 0x%02x", buf[i]);
> +		if ((i % 8) == 7) {
> +			msg_cspew("\n");
> +			continue;
> +		}
> +		if ((i % 8) == 3) {
> +			msg_cspew(" ");
> +			continue;
> +		}
> +	}
> +	msg_cspew("\n");

Do we have some generic hexdump() function? I agree that dumping the
parameter table contents may make sense, but open-coding your own
hexdump is probably not the best idea. Do we want this hexdump
functionality at all, and if yes, should it be factored out?


> +	return 0;
> +}
> +
> +int probe_spi_sfdp(struct flashctx *flash)
> +{
> +	int ret = 0;
> +	uint8_t buf[8];
> +	uint32_t tmp32;
> +	uint8_t nph;
> +	/* need to limit the table loop by comparing i to uint8_t nph hence: */
> +	uint16_t i;
> +	struct sfdp_tbl_hdr *hdrs;
> +	uint8_t *hbuf;
> +	uint8_t *tbuf;
> +
> +	if (spi_sfdp(flash, 0x00, buf, 4)) {
> +		msg_cerr("Receiving SFDP signature failed.\n");

Hmmm... should all boards with IT87/ICH SPI and unknown flash chips see
an error message? While I'm often for upgrading error messages to
msg_*err, I believe that this case should be rather mag_*dbg.



> +		return 0;
> +	}
> +	tmp32 = buf[0];
> +	tmp32 |= ((unsigned int)buf[1]) << 8;
> +	tmp32 |= ((unsigned int)buf[2]) << 16;
> +	tmp32 |= ((unsigned int)buf[3]) << 24;
> +
> +	msg_cdbg2("SFDP signature = 0x%08x (should be 0x50444653)\n", tmp32);
> +	if (tmp32 != 0x50444653) {
> +		msg_cdbg("No SFDP signature found.\n");
> +		return 0;
> +	}
> +	if (spi_sfdp(flash, 0x04, buf, 3)) {
> +		msg_cerr("Receiving SFDP revision and number of parameter "
> +			 "headers (NPH) failed. ");
> +		return 0;
> +	}
> +	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);

return 0 if major revision is unknown (i.e. not 0x01). A new major
revision may change the meaning of any field and that's why we should abort.


> +	nph = buf[2];
> +	msg_cdbg2("SFDP number of parameter headers (NPH) = %d (+ 1 mandatory)"
> +		  "\n", nph);
> +
> +	/* Fetch all parameter headers, even if we don't use them all (yet). */
> +	hbuf = malloc(sizeof(struct sfdp_tbl_hdr) * (nph + 1));
> +	hdrs = malloc((nph + 1) * 8);

Why is 8 a magic unexplained constant for hdrs allocation, but sizeof
struct sfdp_tbl_hdr (which is 8 as well) is used for hbuf allocation?
Did you mix up the two by accident? And why is (nph+1) the first factor
in the second malloc and the second factor in the first malloc?


> +	if (hbuf == NULL || hdrs == NULL ) {
> +		msg_gerr("Out of memory!\n");

insert the following code:
ret = 0;
goto cleanup_hdrs;


> +		exit(1); /* FIXME: shutdown gracefully */

and kill the exit(1). It would be nice to change the probe interface to
return 0 on success... that would allow us to return detailed errors.
OTOH, we might want to use the probe interface to return match accuracy,
in which case 0 would be nomatch. Comments appreciated.


> +	}
> +	if (spi_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) {
> +		msg_cerr("Receiving SFDP parameter table headers failed.\n");
> +		goto cleanup_hdrs;
> +	}
> +
> +	i = 0;
> +	do {

for (i=0; i <=nph; i++) {

> +		uint16_t len;
> +		hdrs[i].id = hbuf[(8 * i) + 0];
> +		hdrs[i].v_minor = hbuf[(8 * i) + 1];
> +		hdrs[i].v_major = hbuf[(8 * i) + 2];
> +		hdrs[i].len = hbuf[(8 * i) + 3];
> +		hdrs[i].ptp = hbuf[(8 * i) + 4];
> +		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8;
> +		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16;
> +		msg_cdbg2("SFDP parameter table header %d/%d:\n", i, nph);
> +		msg_cdbg2("  ID 0x%02x, version %d.%d\n", hdrs[i].id,
> +			  hdrs[i].v_major, hdrs[i].v_minor);
> +		len = hdrs[i].len * 4;
> +		tmp32 = hdrs[i].ptp;
> +		msg_cdbg2("  Length %d B, Parameter Table Pointer 0x%06x\n",
> +			  len, tmp32);
> +
> +		if (len + tmp32 > UINT16_MAX) {
> +			msg_cerr("SFDP Parameter Table %d supposedly "
> +				  "overflows addressable SFDP area. This most\n"
> +				  "probably indicates a corrupt SFDP parameter "
> +				  "table header. Aborting SFDP probe!\n", i);
> +			ret = 0;
> +			goto cleanup_hdrs;
> +		}
> +
> +		tbuf = malloc(len);
> +		if (tbuf == NULL) {
> +			msg_gerr("Out of memory!\n");

insert the following code:
ret = 0;
goto cleanup_hdrs;


> +			exit(1); /* FIXME: shutdown gracefully */

and kill the exit(1)


> +		}
> +		if (sfdp_fetch_pt(flash, tmp32, tbuf, len)){
> +			msg_cerr("Fetching SFDP parameter table %d failed.\n",
> +				 i);
> +			free(tbuf);
> +			break;
> +		}
> +		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
> +			if (hdrs[i].id != 0)
> +				msg_cdbg("ID of the mandatory JEDEC SFDP "

msg_cerr, then cleanup and return 0. Maybe even ask user to report?


> +					 "parameter table is not 0 as demanded "
> +					 "by JESD216 (warning only).\n");

Check hdrs[i].v_major here and do the error dance for unexpected values.


> +
> +			if (len != 9 * 4 && len != 4 * 4) {
> +				msg_cdbg("Length of the mandatory JEDEC SFDP "

msg_cerr, then cleanup and return 0. Maybe even ask user to report?


> +					 "parameter table is %d B instead of "
> +					 "36 B (i.e. 9 double words) as "
> +					 "demanded by JESD216, skipping "
> +					 "parsing.\n", len);
> +			} else if (sfdp_fill_flash(flash, tbuf, len) == 0)
> +				ret = 1;
> +		}
> +		
> +		free(tbuf);
> +		i++;
> +	} while(i <= nph);
> +
> +cleanup_hdrs:
> +	free(hdrs);
> +	free(hbuf);
> +	return ret;
> +}

Cross-checked against the standard, looks pretty good.

Next round will be acked.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From lprpro at gmail.com  Fri Feb  3 06:58:24 2012
From: lprpro at gmail.com (Donnie Lee)
Date: Fri, 3 Feb 2012 09:58:24 +0400
Subject: [flashrom] NetBSD ARM static version
Message-ID: <CAL9QuBTQyurYjmRrwsF22A_RCk7g9xna2TqPKyX8h2D8EWzJiw@mail.gmail.com>

Hello!

I have Marvell ARM SoC board with NetBSD 4 inside. I can't compile
flashrom natively on it, can only copy binaries. Please help with
instruction how to cross-compile it from NetBSD 4 i386 or Mac OS
x86_64. Or, if someone can upload static flashrom binary for NetBSD4
ARM, it will be even better. Thanks in advance.

Donnie.


From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb  3 12:01:23 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 03 Feb 2012 12:01:23 +0100
Subject: [flashrom] [PATCH] dummyflasher: Add a status register to SPI
 chips.
In-Reply-To: <1327989061-15494-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1327989061-15494-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F2BBE83.8040200@gmx.net>

Am 31.01.2012 06:51 schrieb Stefan Tauner:
> This is just a quick hack, that could be expanded. What do you think?
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Very good idea!

> --- a/dummyflasher.c
> +++ b/dummyflasher.c
> @@ -55,6 +55,7 @@ static unsigned int emu_jedec_be_52_size = 0;
>  static unsigned int emu_jedec_be_d8_size = 0;
>  static unsigned int emu_jedec_ce_60_size = 0;
>  static unsigned int emu_jedec_ce_c7_size = 0;
> +static uint8_t emu_status = 0;
>  #endif
>  #endif
>  
> @@ -126,6 +127,9 @@ int dummy_init(void)
>  {
>  	char *bustext = NULL;
>  	char *tmp = NULL;
> +#if EMULATE_SPI_CHIP
> +	char *status = NULL;
> +#endif
>  #if EMULATE_CHIP
>  	struct stat image_stat;
>  #endif
> @@ -178,6 +182,14 @@ int dummy_init(void)
>  		goto dummy_init_out;
>  	}
>  #if EMULATE_SPI_CHIP
> +	status = extract_programmer_param("status");
> +	if (status) {
> +		emu_status = atoi(status);
> +		msg_pdbg("Initial status register is set to 0x%02x.\n",
> +			 emu_status);
> +		free(status);
> +	}
> +
>  	if (!strcmp(tmp, "M25P10.RES")) {
>  		emu_chip = EMULATE_ST_M25P10_RES;
>  		emu_chip_size = 128 * 1024;
> @@ -385,10 +397,26 @@ static int emulate_spi_chip_response(unsigned int writecnt,
>  		if (readcnt > 2)
>  			readarr[2] = 0x4a;
>  		break;
> -	case JEDEC_RDSR:
> -		memset(readarr, 0, readcnt);
> +	case JEDEC_RDSR: {
> +		uint8_t tmp_status = emu_status;
>  		if (aai_active)
> -			memset(readarr, 1 << 6, readcnt);
> +			tmp_status |= 1 << 6;

The WIP (write in progress) / WEL (write enable latch) /AIP (AAI in
progress) logic should be moved to the respective commands so RDSR just does
memset(readarr, emu_status, readcnt);

> +		memset(readarr, tmp_status, readcnt);
> +		break;
> +	}
> +	case JEDEC_WREN:
> +		emu_status |= (1 << 1);
> +		break;
> +	case JEDEC_WRSR:
> +		if (!(emu_status & (1 << 1))) {
> +			msg_perr("WRSR attempted, but WEL is 0!\n");
> +			return 1;

Don't return 1 because a real chip wouldn't return an error either, it
would just ignore the command.

> +		}
> +		if (aai_active) {
> +			msg_perr("WRSR attempted during AAI sequence!\n");
> +			return 1;

dito.


> +		}
> +		emu_status = writearr[1] & 0xFC; /* resets WEL and WIP */
>  		break;
>  	case JEDEC_READ:
>  		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];

After the end of the switch statement we should clear WEL if the command
was not WREN/EWSR.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb  3 12:04:14 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 03 Feb 2012 12:04:14 +0100
Subject: [flashrom] [PATCH] print*.c: Refine the do not count nor print
 generic flash chip entries.
In-Reply-To: <1327989061-15494-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1327989061-15494-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F2BBF2E.9000405@gmx.net>

Am 31.01.2012 06:51 schrieb Stefan Tauner:
> Previously only the generic "unknown XXXX SPI chips" were ignored (because their
> name started with "unknown".
> This patch adds also all chips whose vendor starts with "Unknown" (none so far).
> Change the vendor of the entry for the opaque programmer framework to
> "Unknown" to ignore it.

Could you undo the "Programmer"->"unknown" conversion and just ignore
chips with vendor name "Programmer" as well? "Unknown" conveys some
insecurity, but for opaque programmers that insecurity is not what we want.


> Another patch will add the SFDP chip template also with an "Unknown" vendor field.
>
> Rationale: these entries do not contain any useful information when shown in -L
> or wiki output. It would be better to add them to a general feature section or similar.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>


> diff --git a/flashchips.c b/flashchips.c
> index ca1c57f..0c8257b 100644
> --- a/flashchips.c
> +++ b/flashchips.c
> @@ -8874,7 +8874,7 @@ const struct flashchip flashchips[] = {
>  	},
>  
>  	{
> -		.vendor		= "Programmer",
> +		.vendor		= "Unknown",
>  		.name		= "Opaque flash chip",
>  		.bustype	= BUS_PROG,
>  		.manufacture_id	= PROGMANUF_ID,
> diff --git a/print.c b/print.c
> index 0e152a6..ba86ebb 100644
> --- a/print.c
> +++ b/print.c
> @@ -74,8 +74,9 @@ static void print_supported_chips(void)
>  
>  	/* calculate maximum column widths and by iterating over all chips */
>  	for (f = flashchips; f->name != NULL; f++) {
> -		/* Ignore "unknown XXXX SPI chip" entries. */
> -		if (!strncmp(f->name, "unknown", 7))
> +		/* Ignore generic entries. */
> +		if (!strncmp(f->vendor, "Unknown", 7) ||
> +		    !strncmp(f->name, "unknown", 7))
>  			continue;
>  		chipcount++;
>  
> @@ -161,8 +162,9 @@ static void print_supported_chips(void)
>  	msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n");
>  
>  	for (f = flashchips; f->name != NULL; f++) {
> -		/* Don't print "unknown XXXX SPI chip" entries. */
> -		if (!strncmp(f->name, "unknown", 7))
> +		/* Don't print generic entries. */
> +		if (!strncmp(f->vendor, "Unknown", 7) ||
> +		    !strncmp(f->name, "unknown", 7))
>  			continue;
>  
>  		/* support for multiline vendor names:
> diff --git a/print_wiki.c b/print_wiki.c
> index 1c9241e..70f4427 100644
> --- a/print_wiki.c
> +++ b/print_wiki.c
> @@ -216,9 +216,9 @@ static void print_supported_chips_wiki(int cols)
>  	char vmin[6];
>  
>  	for (f = flashchips; f->name != NULL; f++) {
> -		/* Don't count "unknown XXXX SPI chip" entries. */
> -		if (!strncmp(f->name, "unknown", 7))
> -			continue;
> +		/* Don't count generic entries. */
> +		if (!strncmp(f->vendor, "Unknown", 7) ||
> +		    !strncmp(f->name, "unknown", 7))
>  		chipcount++;
>  	}
>  
> @@ -227,8 +227,9 @@ static void print_supported_chips_wiki(int cols)
>  		"| valign=\"top\"|\n\n%s", chipcount, chip_th);
>  
>  	for (f = flashchips; f->name != NULL; f++, i++) {
> -		/* Don't print "unknown XXXX SPI chip" entries. */
> -		if (!strncmp(f->name, "unknown", 7))
> +		/* Don't print generic entries. */
> +		if (!strncmp(f->vendor, "Unknown", 7) ||
> +		    !strncmp(f->name, "unknown", 7))
>  			continue;
>  
>  		/* Alternate colors if the vendor changes. */

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From jzaw at dzki.co.uk  Fri Feb  3 10:47:24 2012
From: jzaw at dzki.co.uk (=?UTF-8?B?SmVyZW1pIFBhxYJrYSBaYXdhZHpraQ==?=)
Date: Fri, 03 Feb 2012 09:47:24 +0000
Subject: [flashrom] successful flashing of a bios rom HP Microserver N40L
Message-ID: <4F2BAD2C.2000206@dzki.co.uk>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1




as requested by stefanct on the #flashrom irc channel

and with many thanks for your work!


debian wheezy (fully updated)
flashrom from svn Checked out revision 1487.

#############################

root at microserver:/usr/src/flashrom/romstore/# flashrom -Vw O41072911.ROM
flashrom v0.9.4-r1487 on Linux 3.1.0-1-686-pae (i686), built with libpci
3.1.8, GCC 4.6.2, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 746M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1021 us, 10000
myus = 10024 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "HP"
DMI string system-product-name: "ProLiant MicroServer"
DMI string system-version: "   "
DMI string baseboard-manufacturer: ""
DMI string baseboard-product-name: ""
DMI string baseboard-version: ""
DMI string chassis-type: "Tower"
Found chipset "AMD SB700/SB710/SB750/SB850" with PCI ID 1002:439d.
Enabling flash write... SPI base address is at 0xfec10000
AltSpiCSEnable=0, SpiRomEnable=1, AbortEnable=0
PrefetchEnSPIFromIMC=0, PrefetchEnSPIFromHost=1, SpiOpEnInLpcMode=1
SpiArbEnable=1, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1,
ArbWaitCount=7, SpiBridgeDisable=1, DropOneClkOnRd=0
NormSpeed is 33 MHz
GPIO11 used for SPI_DO
GPIO12 used for SPI_DI
GPIO31 used for SPI_HOLD
GPIO32 used for SPI_CS
GPIO47 used for SPI_CLK
SB700 IMC is not active.
ROM strap override is not active
OK.
The following protocols are supported: LPC, FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0xbf, id2 0x41
Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0xbf, id2 0x41
Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xbf, id2 0x41
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Chip status register is 00
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Resulting block protection : none
Found SST flash chip "SST25VF016B" (2048 kB, SPI) at physical address
0xffe00000.
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xbf, id2 0x41
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xbf, id2 0x41
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2
0x2541
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xbf,
id2 0x2541
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xbf, id2 0x2541
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xbf, id2 0x2541
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xbf, id2 0x2541
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic:
id1 0xbf, id2 0x2541
Probing for Generic unknown SPI chip (RDID), 0 kB:
probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xbf, id2 0x41
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x0c, id2 0xe4,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xe0, id2 0x94,
id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x20, id2 0x20,
id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x0c, id2
0xe4, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x20, id2 0x20,
id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x0c, id2
0xe4, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x24, id2
0x41, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xe0, id2 0x94,
id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x20, id2
0x20, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x20, id2 0x20,
id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x0c, id2
0xe4, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x0c, id2
0xe4, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0x20, id2
0x20, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xe0, id2 0x94,
id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xe0, id2 0x94,
id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x20, id2 0x20,
id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x20, id2 0x20,
id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x0c, id2 0xe4, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xe0, id2 0x94, id1
is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x20, id2 0x20, id1
is normal flash content, id2 is normal flash content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xe0, id2
0x94, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0x20, id2
0x20, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x0c, id2
0xe4, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x0c, id2
0xe4, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x20,
id2 0x20, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common:
id1 0xe0, id2 0x94, id1 is normal flash content, id2 is normal flash content
Found SST flash chip "SST25VF016B" (2048 kB, SPI).
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0...
0x000000-0x000fff:S, 0x001000-0x001fff:S, 0x002000-0x002fff:S,
0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S,
0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S,
0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S,
0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S,
0x00f000-0x00ffff:S, 0x010000-0x010fff:S, 0x011000-0x011fff:S,
0x012000-0x012fff:S, 0x013000-0x013fff:S, 0x014000-0x014fff:S,
0x015000-0x015fff:S, 0x016000-0x016fff:S, 0x017000-0x017fff:S,
0x018000-0x018fff:S, 0x019000-0x019fff:S, 0x01a000-0x01afff:S,
0x01b000-0x01bfff:S, 0x01c000-0x01cfff:S, 0x01d000-0x01dfff:S,
0x01e000-0x01efff:S, 0x01f000-0x01ffff:S, 0x020000-0x020fff:S,
0x021000-0x021fff:S, 0x022000-0x022fff:S, 0x023000-0x023fff:S,
0x024000-0x024fff:S, 0x025000-0x025fff:S, 0x026000-0x026fff:S,
0x027000-0x027fff:S, 0x028000-0x028fff:S, 0x029000-0x029fff:S,
0x02a000-0x02afff:S, 0x02b000-0x02bfff:S, 0x02c000-0x02cfff:S,
0x02d000-0x02dfff:S, 0x02e000-0x02efff:S, 0x02f000-0x02ffff:S,
0x030000-0x030fff:S, 0x031000-0x031fff:S, 0x032000-0x032fff:S,
0x033000-0x033fff:S, 0x034000-0x034fff:S, 0x035000-0x035fff:S,
0x036000-0x036fff:S, 0x037000-0x037fff:S, 0x038000-0x038fff:S,
0x039000-0x039fff:S, 0x03a000-0x03afff:S, 0x03b000-0x03bfff:S,
0x03c000-0x03cfff:S, 0x03d000-0x03dfff:S, 0x03e000-0x03efff:S,
0x03f000-0x03ffff:S, 0x040000-0x040fff:S, 0x041000-0x041fff:S,
0x042000-0x042fff:S, 0x043000-0x043fff:S, 0x044000-0x044fff:S,
0x045000-0x045fff:S, 0x046000-0x046fff:S, 0x047000-0x047fff:S,
0x048000-0x048fff:S, 0x049000-0x049fff:S, 0x04a000-0x04afff:S,
0x04b000-0x04bfff:S, 0x04c000-0x04cfff:S, 0x04d000-0x04dfff:S,
0x04e000-0x04efff:S, 0x04f000-0x04ffff:S, 0x050000-0x050fff:S,
0x051000-0x051fff:S, 0x052000-0x052fff:S, 0x053000-0x053fff:S,
0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x056000-0x056fff:S,
0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S,
0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S,
0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S,
0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S,
0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S,
0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S,
0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S,
0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S,
0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S,
0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S,
0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S,
0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S,
0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S,
0x07e000-0x07efff:S, 0x07f000-0x07ffff:S, 0x080000-0x080fff:S,
0x081000-0x081fff:S, 0x082000-0x082fff:S, 0x083000-0x083fff:S,
0x084000-0x084fff:S, 0x085000-0x085fff:S, 0x086000-0x086fff:S,
0x087000-0x087fff:S, 0x088000-0x088fff:S, 0x089000-0x089fff:S,
0x08a000-0x08afff:S, 0x08b000-0x08bfff:S, 0x08c000-0x08cfff:S,
0x08d000-0x08dfff:S, 0x08e000-0x08efff:S, 0x08f000-0x08ffff:S,
0x090000-0x090fff:S, 0x091000-0x091fff:S, 0x092000-0x092fff:S,
0x093000-0x093fff:S, 0x094000-0x094fff:S, 0x095000-0x095fff:S,
0x096000-0x096fff:S, 0x097000-0x097fff:S, 0x098000-0x098fff:S,
0x099000-0x099fff:S, 0x09a000-0x09afff:S, 0x09b000-0x09bfff:S,
0x09c000-0x09cfff:S, 0x09d000-0x09dfff:S, 0x09e000-0x09efff:S,
0x09f000-0x09ffff:S, 0x0a0000-0x0a0fff:S, 0x0a1000-0x0a1fff:S,
0x0a2000-0x0a2fff:S, 0x0a3000-0x0a3fff:S, 0x0a4000-0x0a4fff:S,
0x0a5000-0x0a5fff:S, 0x0a6000-0x0a6fff:S, 0x0a7000-0x0a7fff:S,
0x0a8000-0x0a8fff:S, 0x0a9000-0x0a9fff:S, 0x0aa000-0x0aafff:S,
0x0ab000-0x0abfff:S, 0x0ac000-0x0acfff:S, 0x0ad000-0x0adfff:S,
0x0ae000-0x0aefff:S, 0x0af000-0x0affff:S, 0x0b0000-0x0b0fff:S,
0x0b1000-0x0b1fff:S, 0x0b2000-0x0b2fff:S, 0x0b3000-0x0b3fff:S,
0x0b4000-0x0b4fff:S, 0x0b5000-0x0b5fff:S, 0x0b6000-0x0b6fff:S,
0x0b7000-0x0b7fff:S, 0x0b8000-0x0b8fff:S, 0x0b9000-0x0b9fff:S,
0x0ba000-0x0bafff:S, 0x0bb000-0x0bbfff:S, 0x0bc000-0x0bcfff:S,
0x0bd000-0x0bdfff:S, 0x0be000-0x0befff:S, 0x0bf000-0x0bffff:S,
0x0c0000-0x0c0fff:S, 0x0c1000-0x0c1fff:S, 0x0c2000-0x0c2fff:S,
0x0c3000-0x0c3fff:S, 0x0c4000-0x0c4fff:S, 0x0c5000-0x0c5fff:S,
0x0c6000-0x0c6fff:S, 0x0c7000-0x0c7fff:S, 0x0c8000-0x0c8fff:S,
0x0c9000-0x0c9fff:S, 0x0ca000-0x0cafff:S, 0x0cb000-0x0cbfff:S,
0x0cc000-0x0ccfff:S, 0x0cd000-0x0cdfff:S, 0x0ce000-0x0cefff:S,
0x0cf000-0x0cffff:S, 0x0d0000-0x0d0fff:S, 0x0d1000-0x0d1fff:S,
0x0d2000-0x0d2fff:S, 0x0d3000-0x0d3fff:S, 0x0d4000-0x0d4fff:S,
0x0d5000-0x0d5fff:S, 0x0d6000-0x0d6fff:S, 0x0d7000-0x0d7fff:S,
0x0d8000-0x0d8fff:S, 0x0d9000-0x0d9fff:S, 0x0da000-0x0dafff:S,
0x0db000-0x0dbfff:S, 0x0dc000-0x0dcfff:S, 0x0dd000-0x0ddfff:S,
0x0de000-0x0defff:S, 0x0df000-0x0dffff:S, 0x0e0000-0x0e0fff:S,
0x0e1000-0x0e1fff:S, 0x0e2000-0x0e2fff:S, 0x0e3000-0x0e3fff:S,
0x0e4000-0x0e4fff:S, 0x0e5000-0x0e5fff:S, 0x0e6000-0x0e6fff:S,
0x0e7000-0x0e7fff:S, 0x0e8000-0x0e8fff:S, 0x0e9000-0x0e9fff:S,
0x0ea000-0x0eafff:S, 0x0eb000-0x0ebfff:S, 0x0ec000-0x0ecfff:S,
0x0ed000-0x0edfff:S, 0x0ee000-0x0eefff:S, 0x0ef000-0x0effff:S,
0x0f0000-0x0f0fff:S, 0x0f1000-0x0f1fff:S, 0x0f2000-0x0f2fff:S,
0x0f3000-0x0f3fff:S, 0x0f4000-0x0f4fff:S, 0x0f5000-0x0f5fff:S,
0x0f6000-0x0f6fff:S, 0x0f7000-0x0f7fff:S, 0x0f8000-0x0f8fff:S,
0x0f9000-0x0f9fff:S, 0x0fa000-0x0fafff:S, 0x0fb000-0x0fbfff:S,
0x0fc000-0x0fcfff:S, 0x0fd000-0x0fdfff:S, 0x0fe000-0x0fefff:S,
0x0ff000-0x0fffff:S, 0x100000-0x100fff:S, 0x101000-0x101fff:S,
0x102000-0x102fff:S, 0x103000-0x103fff:S, 0x104000-0x104fff:S,
0x105000-0x105fff:S, 0x106000-0x106fff:S, 0x107000-0x107fff:S,
0x108000-0x108fff:S, 0x109000-0x109fff:S, 0x10a000-0x10afff:S,
0x10b000-0x10bfff:S, 0x10c000-0x10cfff:S, 0x10d000-0x10dfff:S,
0x10e000-0x10efff:S, 0x10f000-0x10ffff:S, 0x110000-0x110fff:S,
0x111000-0x111fff:S, 0x112000-0x112fff:S, 0x113000-0x113fff:S,
0x114000-0x114fff:S, 0x115000-0x115fff:S, 0x116000-0x116fff:S,
0x117000-0x117fff:S, 0x118000-0x118fff:S, 0x119000-0x119fff:S,
0x11a000-0x11afff:S, 0x11b000-0x11bfff:S, 0x11c000-0x11cfff:S,
0x11d000-0x11dfff:S, 0x11e000-0x11efff:S, 0x11f000-0x11ffff:S,
0x120000-0x120fff:S, 0x121000-0x121fff:S, 0x122000-0x122fff:S,
0x123000-0x123fff:S, 0x124000-0x124fff:S, 0x125000-0x125fff:S,
0x126000-0x126fff:S, 0x127000-0x127fff:S, 0x128000-0x128fff:S,
0x129000-0x129fff:S, 0x12a000-0x12afff:S, 0x12b000-0x12bfff:S,
0x12c000-0x12cfff:S, 0x12d000-0x12dfff:S, 0x12e000-0x12efff:S,
0x12f000-0x12ffff:S, 0x130000-0x130fff:S, 0x131000-0x131fff:S,
0x132000-0x132fff:S, 0x133000-0x133fff:S, 0x134000-0x134fff:S,
0x135000-0x135fff:S, 0x136000-0x136fff:S, 0x137000-0x137fff:S,
0x138000-0x138fff:S, 0x139000-0x139fff:S, 0x13a000-0x13afff:S,
0x13b000-0x13bfff:S, 0x13c000-0x13cfff:S, 0x13d000-0x13dfff:S,
0x13e000-0x13efff:S, 0x13f000-0x13ffff:S, 0x140000-0x140fff:S,
0x141000-0x141fff:S, 0x142000-0x142fff:S, 0x143000-0x143fff:S,
0x144000-0x144fff:S, 0x145000-0x145fff:S, 0x146000-0x146fff:S,
0x147000-0x147fff:S, 0x148000-0x148fff:S, 0x149000-0x149fff:S,
0x14a000-0x14afff:S, 0x14b000-0x14bfff:S, 0x14c000-0x14cfff:S,
0x14d000-0x14dfff:S, 0x14e000-0x14efff:S, 0x14f000-0x14ffff:S,
0x150000-0x150fff:S, 0x151000-0x151fff:S, 0x152000-0x152fff:S,
0x153000-0x153fff:S, 0x154000-0x154fff:S, 0x155000-0x155fff:S,
0x156000-0x156fff:S, 0x157000-0x157fff:S, 0x158000-0x158fff:S,
0x159000-0x159fff:S, 0x15a000-0x15afff:S, 0x15b000-0x15bfff:S,
0x15c000-0x15cfff:S, 0x15d000-0x15dfff:S, 0x15e000-0x15efff:S,
0x15f000-0x15ffff:S, 0x160000-0x160fff:S, 0x161000-0x161fff:S,
0x162000-0x162fff:S, 0x163000-0x163fff:S, 0x164000-0x164fff:S,
0x165000-0x165fff:S, 0x166000-0x166fff:S, 0x167000-0x167fff:S,
0x168000-0x168fff:S, 0x169000-0x169fff:S, 0x16a000-0x16afff:S,
0x16b000-0x16bfff:S, 0x16c000-0x16cfff:S, 0x16d000-0x16dfff:S,
0x16e000-0x16efff:S, 0x16f000-0x16ffff:S, 0x170000-0x170fff:S,
0x171000-0x171fff:S, 0x172000-0x172fff:S, 0x173000-0x173fff:S,
0x174000-0x174fff:S, 0x175000-0x175fff:S, 0x176000-0x176fff:S,
0x177000-0x177fff:S, 0x178000-0x178fff:S, 0x179000-0x179fff:S,
0x17a000-0x17afff:S, 0x17b000-0x17bfff:S, 0x17c000-0x17cfff:S,
0x17d000-0x17dfff:S, 0x17e000-0x17efff:S, 0x17f000-0x17ffff:S,
0x180000-0x180fff:S, 0x181000-0x181fff:S, 0x182000-0x182fff:S,
0x183000-0x183fff:S, 0x184000-0x184fff:S, 0x185000-0x185fff:S,
0x186000-0x186fff:S, 0x187000-0x187fff:S, 0x188000-0x188fff:S,
0x189000-0x189fff:S, 0x18a000-0x18afff:S, 0x18b000-0x18bfff:S,
0x18c000-0x18cfff:S, 0x18d000-0x18dfff:S, 0x18e000-0x18efff:S,
0x18f000-0x18ffff:S, 0x190000-0x190fff:S, 0x191000-0x191fff:S,
0x192000-0x192fff:S, 0x193000-0x193fff:S, 0x194000-0x194fff:S,
0x195000-0x195fff:S, 0x196000-0x196fff:S, 0x197000-0x197fff:S,
0x198000-0x198fff:S, 0x199000-0x199fff:S, 0x19a000-0x19afff:S,
0x19b000-0x19bfff:S, 0x19c000-0x19cfff:S, 0x19d000-0x19dfff:S,
0x19e000-0x19efff:S, 0x19f000-0x19ffff:S, 0x1a0000-0x1a0fff:S,
0x1a1000-0x1a1fff:S, 0x1a2000-0x1a2fff:S, 0x1a3000-0x1a3fff:S,
0x1a4000-0x1a4fff:S, 0x1a5000-0x1a5fff:S, 0x1a6000-0x1a6fff:S,
0x1a7000-0x1a7fff:S, 0x1a8000-0x1a8fff:S, 0x1a9000-0x1a9fff:S,
0x1aa000-0x1aafff:S, 0x1ab000-0x1abfff:S, 0x1ac000-0x1acfff:S,
0x1ad000-0x1adfff:S, 0x1ae000-0x1aefff:S, 0x1af000-0x1affff:S,
0x1b0000-0x1b0fff:S, 0x1b1000-0x1b1fff:S, 0x1b2000-0x1b2fff:S,
0x1b3000-0x1b3fff:S, 0x1b4000-0x1b4fff:S, 0x1b5000-0x1b5fff:S,
0x1b6000-0x1b6fff:S, 0x1b7000-0x1b7fff:S, 0x1b8000-0x1b8fff:S,
0x1b9000-0x1b9fff:S, 0x1ba000-0x1bafff:S, 0x1bb000-0x1bbfff:S,
0x1bc000-0x1bcfff:S, 0x1bd000-0x1bdfff:S, 0x1be000-0x1befff:S,
0x1bf000-0x1bffff:S, 0x1c0000-0x1c0fff:S, 0x1c1000-0x1c1fff:S,
0x1c2000-0x1c2fff:S, 0x1c3000-0x1c3fff:S, 0x1c4000-0x1c4fff:S,
0x1c5000-0x1c5fff:S, 0x1c6000-0x1c6fff:S, 0x1c7000-0x1c7fff:S,
0x1c8000-0x1c8fff:S, 0x1c9000-0x1c9fff:S, 0x1ca000-0x1cafff:S,
0x1cb000-0x1cbfff:S, 0x1cc000-0x1ccfff:S, 0x1cd000-0x1cdfff:S,
0x1ce000-0x1cefff:S, 0x1cf000-0x1cffff:S, 0x1d0000-0x1d0fff:S,
0x1d1000-0x1d1fff:S, 0x1d2000-0x1d2fff:S, 0x1d3000-0x1d3fff:S,
0x1d4000-0x1d4fff:S, 0x1d5000-0x1d5fff:S, 0x1d6000-0x1d6fff:S,
0x1d7000-0x1d7fff:S, 0x1d8000-0x1d8fff:S, 0x1d9000-0x1d9fff:S,
0x1da000-0x1dafff:S, 0x1db000-0x1dbfff:S, 0x1dc000-0x1dcfff:S,
0x1dd000-0x1ddfff:S, 0x1de000-0x1defff:S, 0x1df000-0x1dffff:S,
0x1e0000-0x1e0fff:S, 0x1e1000-0x1e1fff:S, 0x1e2000-0x1e2fff:S,
0x1e3000-0x1e3fff:S, 0x1e4000-0x1e4fff:S, 0x1e5000-0x1e5fff:S,
0x1e6000-0x1e6fff:S, 0x1e7000-0x1e7fff:S, 0x1e8000-0x1e8fff:S,
0x1e9000-0x1e9fff:S, 0x1ea000-0x1eafff:S, 0x1eb000-0x1ebfff:S,
0x1ec000-0x1ecfff:E, 0x1ed000-0x1edfff:E, 0x1ee000-0x1eefff:S,
0x1ef000-0x1effff:S, 0x1f0000-0x1f0fff:S, 0x1f1000-0x1f1fff:S,
0x1f2000-0x1f2fff:S, 0x1f3000-0x1f3fff:S, 0x1f4000-0x1f4fff:S,
0x1f5000-0x1f5fff:S, 0x1f6000-0x1f6fff:S, 0x1f7000-0x1f7fff:S,
0x1f8000-0x1f8fff:S, 0x1f9000-0x1f9fff:S, 0x1fa000-0x1fafff:S,
0x1fb000-0x1fbfff:S, 0x1fc000-0x1fcfff:S, 0x1fd000-0x1fdfff:S,
0x1fe000-0x1fefff:S, 0x1ff000-0x1fffff:S
Erase/write done.
Verifying flash... VERIFIED.




- -- 


Jeremi Pa?ka Zawadzki
OpenPGP Key ID: 0x5ED74710

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (Darwin)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/

iEYEARECAAYFAk8rrSYACgkQeowHhV7XRxC1TwCgh+70Dvqvl/GQIlHA1qMwfRbi
cUcAn0SMKD/paofhCyVMiQqBDgKkGMk5
=JT7H
-----END PGP SIGNATURE-----


From raffaele.maietta at tmesrl.net  Fri Feb  3 16:23:22 2012
From: raffaele.maietta at tmesrl.net (Raffaele Maietta)
Date: Fri, 03 Feb 2012 16:23:22 +0100
Subject: [flashrom] M95128 compatibility
Message-ID: <4F2BFBEA.1040804@tmesrl.net>

Hi, I need to program an EEPROM M95128, but flashrom reports that the 
software is not compatible with my device. Is there a way to proceed 
with a read / write EEPROM from this?

Thanks

-- 
Raffaele Maietta
Cell 3289547251
Software Developer
TME s.r.l.



From stefan.tauner at student.tuwien.ac.at  Fri Feb  3 23:14:43 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri,  3 Feb 2012 23:14:43 +0100
Subject: [flashrom] [PATCH] serprog: Add support for setting the SPI
	frequency.
In-Reply-To: <201109152052.p8FKqCbS010218@mail2.student.tuwien.ac.at>
References: <201109152052.p8FKqCbS010218@mail2.student.tuwien.ac.at>
Message-ID: <1328307283-13394-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

Introduce a new opcode (0x14) that sends the requested frequency as a 32b
long value in Hertz to the programmer and receives the frequency eventually
chosen by the programmer. The user can specify this with the programmer
parameter "spispeed" (named after the similar parameter for the buspirate)
including an optional suffix of 'M' or 'k' for specifying megahertz or kilohertz
respectively (lowercase suffixes are also accepted).

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 Documentation/serprog-protocol.txt |   10 +++++++
 flashrom.8                         |   12 +++++++-
 serprog.c                          |   53 ++++++++++++++++++++++++++++++++++++
 3 files changed, 74 insertions(+), 1 deletions(-)

Hopefully this "Hz" version will get approval of the community ;)
I have also tweaked the input parsing and edited the manpage.

diff --git a/Documentation/serprog-protocol.txt b/Documentation/serprog-protocol.txt
index a3a4863..74ec36b 100644
--- a/Documentation/serprog-protocol.txt
+++ b/Documentation/serprog-protocol.txt
@@ -33,6 +33,7 @@ COMMAND	Description			Parameters			Return Value
 0x12	Set used bustype		8-bit flags (as with 0x05)	ACK / NAK
 0x13	Perform SPI operation		24-bit slen + 24-bit rlen	ACK + rlen bytes of data / NAK
 					 + slen bytes of data
+0x14	Set SPI clock frequency		32-bit requested frequency	ACK + 32-bit set frequency / NAK
 0x??	unimplemented command - invalid.
 
 
@@ -73,6 +74,14 @@ Additional information of the above commands:
 		Maximum slen is Q_WRNMAXLEN in case Q_BUSTYPE returns SPI only or S_BUSTYPE was used
 		to set SPI exclusively before. Same for rlen and Q_RDNMAXLEN.
 		This operation is immediate, meaning it doesnt use the operation buffer.
+	0x14 (S_SPI_FREQ):
+		Set the SPI clock frequency. The 32-bit value indicates the
+		requested frequency in Hertz. Value 0 is reserved and should
+		be NAKed by the programmer. The requested frequency should be
+		mapped by the programmer software to a supported frequency
+		lower than the one requested. If there is no lower frequency
+		available the lowest possible should be used. The value
+		chosen is sent back in the reply with an ACK.
 	About mandatory commands:
 		The only truly mandatory commands for any device are 0x00, 0x01, 0x02 and 0x10,
 		but one can't really do anything with these commands.
@@ -107,3 +116,4 @@ This define listing should help C coders - (it's here to be the single source fo
 #define S_CMD_Q_RDNMAXLEN	0x11		/* Query read-n maximum length			*/
 #define S_CMD_S_BUSTYPE		0x12		/* Set used bustype(s).				*/
 #define S_CMD_O_SPIOP		0x13		/* Perform SPI operation.			*/
+#define S_CMD_S_SPI_FREQ	0x14		/* Set SPI clock frequency */
diff --git a/flashrom.8 b/flashrom.8
index 6b25b43..eabc3ea 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -477,7 +477,17 @@ syntax and for IP, you have to use
 .sp
 .B "  flashrom \-p serprog:ip=ipaddr:port"
 .sp
-instead. More information about serprog is available in
+instead. In case the device supports it, you can set the SPI clock frequency
+with the optional
+.B spispeed
+parameter. The frequency is parsed as Hertz, unless an
+.BR M ", or " k
+suffix is given, then megahertz or kilohertz are used respectively.
+Example that sets the frequency to 2 MHz:
+.sp
+.B "flashrom \-p serprog:dev=/dev/device:baud,spispeed=2M"
+.sp
+More information about serprog is available in
 .B serprog-protocol.txt
 in the source distribution.
 .TP
diff --git a/serprog.c b/serprog.c
index 65539a1..d783e51 100644
--- a/serprog.c
+++ b/serprog.c
@@ -69,6 +69,7 @@ static int serprog_shutdown(void *data);
 #define S_CMD_Q_RDNMAXLEN	0x11	/* Query read-n maximum length			*/
 #define S_CMD_S_BUSTYPE		0x12	/* Set used bustype(s).				*/
 #define S_CMD_O_SPIOP		0x13	/* Perform SPI operation.			*/
+#define S_CMD_S_SPI_FREQ	0x14	/* Set SPI clock frequency			*/
 
 static uint16_t sp_device_serbuf_size = 16;
 static uint16_t sp_device_opbuf_size = 300;
@@ -460,6 +461,7 @@ int serprog_init(void)
 	/* Check for the minimum operational set of commands. */
 	if (serprog_buses_supported & BUS_SPI) {
 		uint8_t bt = BUS_SPI;
+		char *spispeed;
 		if (sp_check_commandavail(S_CMD_O_SPIOP) == 0) {
 			msg_perr("Error: SPI operation not supported while the "
 				 "bustype is SPI\n");
@@ -490,6 +492,57 @@ int serprog_init(void)
 			spi_programmer_serprog.max_data_read = v;
 			msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", v);
 		}
+		spispeed = extract_programmer_param("spispeed");
+		if (spispeed && strlen(spispeed)) {
+			uint32_t f_spi_req, f_spi;
+			uint8_t buf[4];
+			char *f_spi_suffix;
+
+			errno = 0;
+			f_spi_req = strtol(spispeed, &f_spi_suffix, 0);
+			if (errno != 0 || spispeed == f_spi_suffix) {
+				msg_perr("Error: Could not convert "
+					 "'spispeed'.\n");
+				return 1;
+			}
+			if (strlen(f_spi_suffix) == 1) {
+				if (!strcasecmp(f_spi_suffix, "M"))
+					f_spi_req *= 1000000;
+				else if (!strcasecmp(f_spi_suffix, "k"))
+					f_spi_req *= 1000;
+				else {
+					msg_perr("Error: Garbage following "
+						 "'spispeed' value.\n");
+					return 1;
+				}
+			} else if (strlen(f_spi_suffix) > 1) {
+				msg_perr("Error: Garbage following "
+					 "'spispeed' value.\n");
+				return 1;
+			}
+
+			buf[0] = (f_spi_req >> (0 * 8)) & 0xFF;
+			buf[1] = (f_spi_req >> (1 * 8)) & 0xFF;
+			buf[2] = (f_spi_req >> (2 * 8)) & 0xFF;
+			buf[3] = (f_spi_req >> (3 * 8)) & 0xFF;
+
+			if (sp_check_commandavail(S_CMD_S_SPI_FREQ) == 0)
+				msg_pdbg(MSGHEADER "Setting the SPI clock rate "
+					 "is not supported!\n");
+			else if (sp_docommand(S_CMD_S_SPI_FREQ, 4, buf, 4, buf)
+				 == 0) {
+				f_spi = buf[0];
+				f_spi |= buf[1] << (1 * 8);
+				f_spi |= buf[2] << (2 * 8);
+				f_spi |= buf[3] << (3 * 8);
+				msg_pdbg(MSGHEADER "Requested to set SPI clock "
+					 "frequency to %u Hz. It was actually "
+					 "set to %u Hz\n", f_spi_req, f_spi);
+			} else
+				msg_pdbg(MSGHEADER "Setting SPI clock rate to "
+					 "%u Hz failed!\n", f_spi_req);
+		}
+		free(spispeed);
 		bt = serprog_buses_supported;
 		sp_docommand(S_CMD_S_BUSTYPE, 1, &bt, 0, NULL);
 	}
-- 
1.7.1



From svn at flashrom.org  Fri Feb  3 23:32:10 2012
From: svn at flashrom.org (repository service)
Date: Fri, 03 Feb 2012 23:32:10 +0100
Subject: [flashrom] [commit] r1488 - trunk
Message-ID: <E1RtRfu-0001Nv-6j@ra.coresystems.de>

Author: stefanct
Date: Fri Feb  3 23:32:09 2012
New Revision: 1488
URL: http://flashrom.org/trac/flashrom/changeset/1488

Log:
print*.c: Refine the do not count nor print generic flash chip entries conditions.

Previously only the generic "unknown XXXX SPI chips" were ignored (because their
name started with "unknown".
This patch adds also all chips whose vendor starts with "Unknown" (none so far)
and "Programmer" (currently used by the opaque flash chip framework) .
A patch will add the SFDP chip template with an "Unknown" vendor field later.

Rationale: these entries do not contain any useful information when shown in -L
or wiki output. It would be better to add them to a general feature section or similar.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/print.c
   trunk/print_wiki.c

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Tue Jan 31 07:51:56 2012	(r1487)
+++ trunk/print.c	Fri Feb  3 23:32:09 2012	(r1488)
@@ -74,8 +74,10 @@
 
 	/* calculate maximum column widths and by iterating over all chips */
 	for (f = flashchips; f->name != NULL; f++) {
-		/* Ignore "unknown XXXX SPI chip" entries. */
-		if (!strncmp(f->name, "unknown", 7))
+		/* Ignore generic entries. */
+		if (!strncmp(f->vendor, "Unknown", 7) ||
+		    !strncmp(f->vendor, "Programmer", 10) ||
+		    !strncmp(f->name, "unknown", 7))
 			continue;
 		chipcount++;
 
@@ -161,8 +163,10 @@
 	msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n");
 
 	for (f = flashchips; f->name != NULL; f++) {
-		/* Don't print "unknown XXXX SPI chip" entries. */
-		if (!strncmp(f->name, "unknown", 7))
+		/* Don't print generic entries. */
+		if (!strncmp(f->vendor, "Unknown", 7) ||
+		    !strncmp(f->vendor, "Programmer", 10) ||
+		    !strncmp(f->name, "unknown", 7))
 			continue;
 
 		/* support for multiline vendor names:

Modified: trunk/print_wiki.c
==============================================================================
--- trunk/print_wiki.c	Tue Jan 31 07:51:56 2012	(r1487)
+++ trunk/print_wiki.c	Fri Feb  3 23:32:09 2012	(r1488)
@@ -216,9 +216,10 @@
 	char vmin[6];
 
 	for (f = flashchips; f->name != NULL; f++) {
-		/* Don't count "unknown XXXX SPI chip" entries. */
-		if (!strncmp(f->name, "unknown", 7))
-			continue;
+		/* Don't count generic entries. */
+		if (!strncmp(f->vendor, "Unknown", 7) ||
+		    !strncmp(f->vendor, "Programmer", 10) ||
+		    !strncmp(f->name, "unknown", 7))
 		chipcount++;
 	}
 
@@ -227,8 +228,10 @@
 		"| valign=\"top\"|\n\n%s", chipcount, chip_th);
 
 	for (f = flashchips; f->name != NULL; f++, i++) {
-		/* Don't print "unknown XXXX SPI chip" entries. */
-		if (!strncmp(f->name, "unknown", 7))
+		/* Don't print generic entries. */
+		if (!strncmp(f->vendor, "Unknown", 7) ||
+		    !strncmp(f->vendor, "Programmer", 10) ||
+		    !strncmp(f->name, "unknown", 7))
 			continue;
 
 		/* Alternate colors if the vendor changes. */


From stefan.tauner at student.tuwien.ac.at  Fri Feb  3 23:33:24 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 3 Feb 2012 23:33:24 +0100
Subject: [flashrom] [PATCH] print*.c: Refine the do not count nor print
 generic flash chip entries.
In-Reply-To: <4F2BBF2E.9000405@gmx.net>
References: <1327989061-15494-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F2BBF2E.9000405@gmx.net>
Message-ID: <201202032233.q13MX3Xi022793@mail2.student.tuwien.ac.at>

On Fri, 03 Feb 2012 12:04:14 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 31.01.2012 06:51 schrieb Stefan Tauner:
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> 
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

thanks, committed (with the requested changes) in r1488.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Fri Feb  3 23:36:54 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 3 Feb 2012 23:36:54 +0100
Subject: [flashrom] M95128 compatibility
In-Reply-To: <4F2BFBEA.1040804@tmesrl.net>
References: <4F2BFBEA.1040804@tmesrl.net>
Message-ID: <201202032236.q13MaXTI024883@mail2.student.tuwien.ac.at>

On Fri, 03 Feb 2012 16:23:22 +0100
Raffaele Maietta <raffaele.maietta at tmesrl.net> wrote:

> Hi, I need to program an EEPROM M95128, but flashrom reports that the 
> software is not compatible with my device. Is there a way to proceed 
> with a read / write EEPROM from this?
> 
> Thanks
> 

Hello Raffaele,

indeed flashrom does not support EEPROMs at all at the moment and there
are neither patches nor plans to add support for them. Your question
comes up from time to time, but no one has tried to make flashrom cope
with them yet. Patches are welcome!

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Fri Feb  3 23:46:03 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 3 Feb 2012 23:46:03 +0100
Subject: [flashrom] successful flashing of a bios rom HP Microserver N40L
In-Reply-To: <4F2BAD2C.2000206@dzki.co.uk>
References: <4F2BAD2C.2000206@dzki.co.uk>
Message-ID: <201202032245.q13MjhLn029625@mail2.student.tuwien.ac.at>

On Fri, 03 Feb 2012 09:47:24 +0000
Jeremi Pa?ka Zawadzki <jzaw at dzki.co.uk> wrote:

> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
> 
> 
> 
> 
> as requested by stefanct on the #flashrom irc channel
> 

Hello Jeremi,

thanks for your report!
I have marked the system/board as supported and will commit that later
together with other small changes.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From jakllsch at kollasch.net  Sun Feb  5 18:04:16 2012
From: jakllsch at kollasch.net (Jonathan A. Kollasch)
Date: Sun, 5 Feb 2012 11:04:16 -0600
Subject: [flashrom] NetBSD ARM static version
In-Reply-To: <CAL9QuBTQyurYjmRrwsF22A_RCk7g9xna2TqPKyX8h2D8EWzJiw@mail.gmail.com>
References: <CAL9QuBTQyurYjmRrwsF22A_RCk7g9xna2TqPKyX8h2D8EWzJiw@mail.gmail.com>
Message-ID: <20120205170416.GD13857@tazenda.kollasch.net>

On Fri, Feb 03, 2012 at 09:58:24AM +0400, Donnie Lee wrote:
> Hello!
> 
> I have Marvell ARM SoC board with NetBSD 4 inside. I can't compile
> flashrom natively on it, can only copy binaries. Please help with
> instruction how to cross-compile it from NetBSD 4 i386 or Mac OS
> x86_64. Or, if someone can upload static flashrom binary for NetBSD4
> ARM, it will be even better. Thanks in advance.

Flashrom's ARM support isn't there yet.  I compiled a NetBSD-4 flashrom
binary, but I had to rip various parts out to make it compile, and once
it did compile, I was unable to mmap /dev/mem properly (on
NetBSD-current on Marvell Orion w/ NOR flash).

I'd recommend using UBoot's built-in flash commands at this point.

	Jonathan Kollasch


From elena.gusanu at gmail.com  Mon Feb  6 23:54:48 2012
From: elena.gusanu at gmail.com (Elena Gusanu)
Date: Tue, 7 Feb 2012 00:54:48 +0200
Subject: [flashrom] Hello, flashrom problem
Message-ID: <CAC5EzarbT+YDRfkB4Y_=iuFqbPkN5yK1G1nFwaWG53ZRAkixKg@mail.gmail.com>

Good morning,
 My name is Elena Gusanu and i have a big problem with my laptop. I
flashrom my laptop and I didn't know what was this and i turned off,
unfortunately. Is there a solution to solve my problem and to get back bios?
                       Thank you
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120207/e8316794/attachment.html>

From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb  7 01:39:01 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 07 Feb 2012 01:39:01 +0100
Subject: [flashrom] Hello, flashrom problem
In-Reply-To: <CAC5EzarbT+YDRfkB4Y_=iuFqbPkN5yK1G1nFwaWG53ZRAkixKg@mail.gmail.com>
References: <CAC5EzarbT+YDRfkB4Y_=iuFqbPkN5yK1G1nFwaWG53ZRAkixKg@mail.gmail.com>
Message-ID: <4F3072A5.60100@gmx.net>

Hi Elena,

Am 06.02.2012 23:54 schrieb Elena Gusanu:
> Good morning,
>  My name is Elena Gusanu and i have a big problem with my laptop. I
> flashrom my laptop and I didn't know what was this and i turned off,
> unfortunately. Is there a solution to solve my problem and to get back bios?

Please remove the power cable and battery from your laptop, wait 1 hour,
then plug in battery and power cable and switch on your laptop again.
That should work.

Regards,
Carl-Daniel


From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb  7 03:46:40 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 07 Feb 2012 03:46:40 +0100
Subject: [flashrom] [PATCH] dummy programmer: blacklist SPI commands
In-Reply-To: <AANLkTimNskrC0O1NxudXPWkvXw0nMEdi8Sv_KJPyHO-A@mail.gmail.com>
References: <4CD24D4B.5020108@gmx.net> <4D3625F7.2050003@gmx.net>
	<20110121013628.GI2484@debshine>
	<AANLkTimNskrC0O1NxudXPWkvXw0nMEdi8Sv_KJPyHO-A@mail.gmail.com>
Message-ID: <4F309090.9010704@gmx.net>

Repost... code cleaned, man page fixed.

Add optional SPI command blacklisting and ingorelisting to the flash
chip emulator in the dummy programmer.

Usage:
flashrom -p dummy:spi_blacklist=commandlist
flashrom -p dummy:spi_ignorelist=commandlist

If commandlist is 0302, flashrom will refuse (blacklist) or ignore
(ignorelist) command 0x03 (READ) and command 0x02 (WRITE). The
commandlist can be up to 512 bytes (256 commands) long.
Specifying flash chip emulation is a good idea to get useful results.

Very useful for testing corner cases if you don't own a locked down
Intel chipset and want to simulate such a thing.

Example usage:
dd if=/dev/zeros bs=1024k count=4 of=dummy_simulator.rom
dd if=/dev/urandom bs=1024k count=4 of=randomimage.rom
flashrom -p dummy:emulate=SST25VF032B,image=dummy_simulator.rom,spi_blacklist=20,spi_ignorelist=52 -w randomimage.rom -V

The example output looks like this:
flashrom v0.9.4-r1488 on Linux 2.6.34.10-0.6-default (i686), built with libpci 3.1.7, GCC 4.5.0 20100604 [gcc-4_5-branch revision 160292], little endian
[...]
Initializing dummy programmer
Requested buses are: default
Enabling support for parallel flash.
Enabling support for LPC flash.
Enabling support for FWH flash.
Enabling support for SPI flash.
SPI blacklist is 20 , size 1
SPI ignorelist is 52 , size 1
Emulating SST SST25VF032B SPI flash chip (RDID, AAI write)
Filling fake flash chip with 0xff, size 4194304
Found persistent image dummy_simulator.rom, size 4194304 matches.
Reading dummy_simulator.rom
The following protocols are supported: Parallel, LPC, FWH, SPI.
[...]
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
Chip status register is 00
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found SST flash chip "SST25VF032B" (4096 kB, SPI) on dummy.
[...]
Found SST flash chip "SST25VF032B" (4096 kB, SPI).
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:ERefusing blacklisted SPI command 0x20
Invalid command sent to flash chip!
spi_block_erase_20 failed during command execution at address 0x0
Reading current flash chip contents... done. Looking for another erase function.
Trying erase function 1... 0x000000-0x007fff:EIgnoring ignorelisted SPI command 0x52
ERASE FAILED at 0x00000000! Expected=0xff, Read=0x00, failed byte count from 0x00000000-0x00007fff: 0x8000
ERASE FAILED!
Reading current flash chip contents... done. Looking for another erase function.
Trying erase function 2... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:EW, 0x020000-0x02ffff:EW, 0x030000-0x03ffff:EW, 0x040000-0x04ffff:EW, 0x050000-0x05ffff:EW, 0x060000-0x06ffff:EW, 0x070000-0x07ffff:EW, 0x080000-0x08ffff:EW, 0x090000-0x09ffff:EW, 0x0a0000-0x0affff:EW, 0x0b0000-0x0bffff:EW, 0x0c0000-0x0cffff:EW, 0x0d0000-0x0dffff:EW, 0x0e0000-0x0effff:EW, 0x0f0000-0x0fffff:EW, 0x100000-0x10ffff:EW, 0x110000-0x11ffff:EW, 0x120000-0x12ffff:EW, 0x130000-0x13ffff:EW, 0x140000-0x14ffff:EW, 0x150000-0x15ffff:EW, 0x160000-0x16ffff:EW, 0x170000-0x17ffff:EW, 0x180000-0x18ffff:EW, 0x190000-0x19ffff:EW, 0x1a0000-0x1affff:EW, 0x1b0000-0x1bffff:EW, 0x1c0000-0x1cffff:EW, 0x1d0000-0x1dffff:EW, 0x1e0000-0x1effff:EW, 0x1f0000-0x1fffff:EW, 0x200000-0x20ffff:EW, 0x210000-0x21ffff:EW, 0x220000-0x22ffff:EW, 0x230000-0x23ffff:EW, 0x240000-0x24ffff:EW, 0x250000-0x25ffff:EW, 0x260000-0x26ffff:EW, 0x270000-0x27ffff:EW, 0x280000-0x28ffff:EW, 0x290000-0x29ffff:EW, 0x2a0000-0x2affff:EW, 0x2b0000-0x2bffff:EW, 0x2c0000-0x2cffff:EW, 0x2d0000-0x2dffff:EW, 0x2e0000-0x2effff:EW, 0x2f0000-0x2fffff:EW, 0x300000-0x30ffff:EW, 0x310000-0x31ffff:EW, 0x320000-0x32ffff:EW, 0x330000-0x33ffff:EW, 0x340000-0x34ffff:EW, 0x350000-0x35ffff:EW, 0x360000-0x36ffff:EW, 0x370000-0x37ffff:EW, 0x380000-0x38ffff:EW, 0x390000-0x39ffff:EW, 0x3a0000-0x3affff:EW, 0x3b0000-0x3bffff:EW, 0x3c0000-0x3cffff:EW, 0x3d0000-0x3dffff:EW, 0x3e0000-0x3effff:EW, 0x3f0000-0x3fffff:EW
Erase/write done.
Verifying flash... VERIFIED.          
Writing dummy_simulator.rom

 
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

An earlier version of this patch (wthout ignorelisting) got the
following response:

Am 04.02.2011 01:42 schrieb David Hendricks:
> Overall looks good to me. I tested it out by blacklisting read, rdid, write,
> wren, and the chip erase commands in various combinations and it seems to
> work reasonably well. SPI opcode parsing seemed to work fine as well.
>
> For others interested in giving this a try, here is another example of
> syntax (courtesy of Carl-Danial on IRC) for us laymen: flashrom -p
> dummy:emulate=SST25VF032B,image=dummy_simulator.rom,spi_blacklist=0x03
>
> I don't know man page formatting well, so I didn't review that part. As far
> as the code, I say:
> Acked-by: David Hendricks <dhendrix at google.com>

David: Given that your review was based on a pretty different version of
the code, I'm not including your ack unless you're OK with the new code
as well.

Index: flashrom-emulate_spi_flashchip_command_blacklist/dummyflasher.c
===================================================================
--- flashrom-emulate_spi_flashchip_command_blacklist/dummyflasher.c	(Revision 1488)
+++ flashrom-emulate_spi_flashchip_command_blacklist/dummyflasher.c	(Arbeitskopie)
@@ -19,6 +19,8 @@
 
 #include <string.h>
 #include <stdlib.h>
+#include <stdio.h>
+#include <ctype.h>
 #include "flash.h"
 #include "chipdrivers.h"
 #include "programmer.h"
@@ -55,6 +57,10 @@
 static unsigned int emu_jedec_be_d8_size = 0;
 static unsigned int emu_jedec_ce_60_size = 0;
 static unsigned int emu_jedec_ce_c7_size = 0;
+unsigned char spi_blacklist[256];
+unsigned char spi_ignorelist[256];
+int spi_blacklist_size = 0;
+int spi_ignorelist_size = 0;
 #endif
 #endif
 
@@ -126,6 +132,7 @@
 {
 	char *bustext = NULL;
 	char *tmp = NULL;
+	int i;
 #if EMULATE_CHIP
 	struct stat image_stat;
 #endif
@@ -170,6 +177,68 @@
 		}
 	}
 
+	tmp = extract_programmer_param("spi_blacklist");
+	if (tmp) {
+		i = strlen(tmp);
+		if (!strncmp(tmp, "0x", 2)) {
+			i -= 2;
+			memmove(tmp, tmp + 2, i + 1);
+		}
+		if ((i > 512) || (i % 2)) {
+			msg_perr("Invalid SPI command blacklist length\n");
+			free(tmp);
+			return 1;
+		}
+		spi_blacklist_size = i / 2;
+		for (i = 0; i < spi_blacklist_size * 2; i++) {
+			if (!isxdigit((unsigned char)tmp[i])) {
+				msg_perr("Invalid char \"%c\" in SPI command "
+					 "blacklist\n", tmp[i]);
+				free(tmp);
+				return 1;
+			}
+		}
+		for (i = 0; i < spi_blacklist_size; i++) {
+			sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);
+		}
+		msg_pdbg("SPI blacklist is ");
+		for (i = 0; i < spi_blacklist_size; i++)
+			msg_pdbg("%02x ", spi_blacklist[i]);
+		msg_pdbg(", size %i\n", spi_blacklist_size);
+	}
+	free(tmp);
+
+	tmp = extract_programmer_param("spi_ignorelist");
+	if (tmp) {
+		i = strlen(tmp);
+		if (!strncmp(tmp, "0x", 2)) {
+			i -= 2;
+			memmove(tmp, tmp + 2, i + 1);
+		}
+		if ((i > 512) || (i % 2)) {
+			msg_perr("Invalid SPI command ignorelist length\n");
+			free(tmp);
+			return 1;
+		}
+		spi_ignorelist_size = i / 2;
+		for (i = 0; i < spi_ignorelist_size * 2; i++) {
+			if (!isxdigit((unsigned char)tmp[i])) {
+				msg_perr("Invalid char \"%c\" in SPI command "
+					 "ignorelist\n", tmp[i]);
+				free(tmp);
+				return 1;
+			}
+		}
+		for (i = 0; i < spi_ignorelist_size; i++) {
+			sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);
+		}
+		msg_pdbg("SPI ignorelist is ");
+		for (i = 0; i < spi_ignorelist_size; i++)
+			msg_pdbg("%02x ", spi_ignorelist[i]);
+		msg_pdbg(", size %i\n", spi_ignorelist_size);
+	}
+	free(tmp);
+
 #if EMULATE_CHIP
 	tmp = extract_programmer_param("emulate");
 	if (!tmp) {
@@ -348,7 +417,7 @@
 				     const unsigned char *writearr,
 				     unsigned char *readarr)
 {
-	unsigned int offs;
+	unsigned int offs, i;
 	static int unsigned aai_offs;
 	static int aai_active = 0;
 
@@ -356,7 +425,24 @@
 		msg_perr("No command sent to the chip!\n");
 		return 1;
 	}
-	/* TODO: Implement command blacklists here. */
+	/* spi_blacklist has precedence before spi_ignorelist. */
+	for (i = 0; i < spi_blacklist_size; i++) {
+		if (writearr[0] == spi_blacklist[i]) {
+			msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",
+				 spi_blacklist[i]);
+			return SPI_INVALID_OPCODE;
+		}
+	}
+	for (i = 0; i < spi_ignorelist_size; i++) {
+		if (writearr[0] == spi_ignorelist[i]) {
+			msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
+				 spi_ignorelist[i]);
+			/* Return success because the command does not fail,
+			 * it is simply ignored.
+			 */
+			return 0;
+		}
+	}
 	switch (writearr[0]) {
 	case JEDEC_RES:
 		if (emu_chip != EMULATE_ST_M25P10_RES)
@@ -563,7 +649,7 @@
 	case EMULATE_SST_SST25VF032B:
 		if (emulate_spi_chip_response(writecnt, readcnt, writearr,
 					      readarr)) {
-			msg_perr("Invalid command sent to flash chip!\n");
+			msg_pdbg("Invalid command sent to flash chip!\n");
 			return 1;
 		}
 		break;
Index: flashrom-emulate_spi_flashchip_command_blacklist/flashrom.8
===================================================================
--- flashrom-emulate_spi_flashchip_command_blacklist/flashrom.8	(Revision 1488)
+++ flashrom-emulate_spi_flashchip_command_blacklist/flashrom.8	(Arbeitskopie)
@@ -421,6 +421,28 @@
 Example:
 .sp
 .B "  flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
+.sp
+To simulate a programmer which refuses to send certain SPI commands to the
+flash chip, you can specify a blacklist of SPI commands with the
+.sp
+.B "  flashrom -p dummy:spi_blacklist=commandlist"
+.sp
+syntax where commandlist is a list of two-digit hexadecimal representations of
+SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the SPI
+controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
+commandlist may be up to 512 characters (256 commands) long.
+Implementation note: flashrom will detect an error during command execution.
+.sp
+To simulate a flash chip which ignores (doesn't support) certain SPI commands,
+you can specify an ignorelist of SPI commands with the
+.sp
+.B "  flashrom -p dummy:spi_ignorelist=commandlist"
+.sp
+syntax where commandlist is a list of two-digit hexadecimal representations of
+SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
+command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to 512
+characters (256 commands) long.
+Implementation note: flashrom won't detect an error during command execution.
 .TP
 .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
 " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\


-- 
http://www.hailfinger.org/




From danstoner at gmail.com  Tue Feb  7 03:42:56 2012
From: danstoner at gmail.com (Dan Stoner)
Date: Mon, 6 Feb 2012 21:42:56 -0500
Subject: [flashrom] Shuttle SN78S flash info
Message-ID: <CADKwgJfSc+T6Sd03k1Ap5Dk=C-QFQ0jtGFTjXj46k6_fGP3dTw@mail.gmail.com>

from flashrom -V output
-------------- next part --------------
flashrom v0.9.1-r946
No coreboot table found.
DMI string system-manufacturer: "Shuttle Inc"
DMI string system-product-name: "SN78S"
DMI string system-version: "V10"
DMI string baseboard-manufacturer: "Shuttle Inc"
DMI string baseboard-product-name: "FN78S"
DMI string baseboard-version: "V10"
DMI string chassis-type: "Desktop"
Found ITE Super I/O, id 8716
Found chipset "NVIDIA MCP78S", enabling flash write... This chipset is not really supported yet. Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Guessed flash bus type is SPI
Found SMBus device 10de:0752 at 00:01:1
SPI BAR is at 0xfdf80000, after clearing low bits BAR is at 0xfdf80000
SPI control is 0xc01a, enable=0, idle=0
Please send the output of "flashrom -V" to flashrom at flashrom.org to help us finish support for your chipset. Thanks.
SPI on this chipset is not supported yet.
OK.
This chipset supports the following protocols: None.
Calibrating delay loop... 757M loops per second, 100 myus = 202 us. OK.
Probing for AMD Am29F010A/B, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMD Am29F002(N)BB, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMD Am29F002(N)BT, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMD Am29F016D, 2048 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMD Am29F040B, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMD Am29F080B, 1024 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMD Am29LV040B, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMD Am29LV081B, 1024 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ASD AE49F2008, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT26F004, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT29C512, 64 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Atmel AT29C010A, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Atmel AT29C020, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Atmel AT29C040A, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Atmel AT49BV512, 64 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Atmel AT49F002(N), 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Atmel AT49F002(N)T, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMIC A25L40PT, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for AMIC A25L40PU, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for AMIC A29002B, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMIC A29002T, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMIC A29040B, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for AMIC A49LF040A, 512 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for EMST F49B002UA, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Eon EN25B05, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B05T, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B10, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B10T, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B20, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B20T, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B40, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B40T, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B80, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B80T, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B16, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B16T, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B32, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B32T, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B64, 8192 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25B64T, 8192 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25D16, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25F05, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25F10, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25F20, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25F40, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25F80, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25F16, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN25F32, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Eon EN29F010, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Intel 28F001BX-B, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Intel 28F001BX-T, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Intel 28F004S5, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Intel 82802AB, 512 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for Intel 82802AC, 1024 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for Macronix MX25L512, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix MX29F001B, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Macronix MX29F001T, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Macronix MX29F002B, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Macronix MX29F002T, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Macronix MX29LV040, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Numonyx M25PE40, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC Pm29F002T, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for PMC Pm29F002B, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for PMC Pm39LV010, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for PMC Pm49FL002, 256 KB: skipped. Host bus type None and chip bus type LPC,FWH are incompatible.
Probing for PMC Pm49FL004, 512 KB: skipped. Host bus type None and chip bus type LPC,FWH are incompatible.
Probing for Sanyo LF25FW203A, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Sharp LHF00L04, 1024 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for Spansion S25FL008A, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST SST25VF040B, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST SST28SF040A, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST29EE010, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST29LE010, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST29EE020A, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST29LE020, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39SF512, 64 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39SF010A, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39SF020A, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39SF040, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39VF512, 64 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39VF010, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39VF020, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39VF040, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST39VF080, 1024 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SST SST49LF002A/B, 256 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for SST SST49LF003A/B, 384 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for SST SST49LF004A/B, 512 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for SST SST49LF004C, 512 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for SST SST49LF008A, 1024 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for SST SST49LF008C, 1024 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for SST SST49LF016C, 2048 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for SST SST49LF020, 256 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for SST SST49LF020A, 256 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for SST SST49LF040, 512 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for SST SST49LF040B, 512 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for SST SST49LF080A, 1024 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for SST SST49LF160C, 2048 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for ST M25P05-A, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P05.RES, 64 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P10-A, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P10.RES, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P20, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P40, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P40-old, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P80, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P16, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P32, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P64, 8192 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M25P128, 16384 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST M29F002B, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ST M29F002T/NT, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ST M29F040B, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ST M29F400BT, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ST M29W010B, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ST M29W040B, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ST M29W512B, 64 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for ST M50FLW040A, 512 KB: skipped. Host bus type None and chip bus type LPC,FWH are incompatible.
Probing for ST M50FLW040B, 512 KB: skipped. Host bus type None and chip bus type LPC,FWH are incompatible.
Probing for ST M50FLW080A, 1024 KB: skipped. Host bus type None and chip bus type LPC,FWH are incompatible.
Probing for ST M50FLW080B, 1024 KB: skipped. Host bus type None and chip bus type LPC,FWH are incompatible.
Probing for ST M50FW002, 256 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for ST M50FW016, 2048 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for ST M50FW040, 512 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for ST M50FW080, 1024 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for ST M50LPW116, 2048 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for SyncMOS S29C31004T, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SyncMOS S29C51001T, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SyncMOS S29C51002T, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for SyncMOS S29C51004T, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for TI TMS29F002RB, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for TI TMS29F002RT, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Winbond W25x10, 128 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Winbond W25x20, 256 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Winbond W25x40, 512 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Winbond W25x80, 1024 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Winbond W25x16, 2048 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Winbond W25x32, 4096 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Winbond W25x64, 8192 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Winbond W29C011, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Winbond W29C020C, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Winbond W29C040P, 512 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Winbond W29EE011, 128 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Winbond W39V040A, 512 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for Winbond W39V040B, 512 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for Winbond W39V040C, 512 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for Winbond W39V040FA, 512 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for Winbond W39V080A, 1024 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for Winbond W49F002U, 256 KB: skipped. Host bus type None and chip bus type Parallel are incompatible.
Probing for Winbond W49V002A, 256 KB: skipped. Host bus type None and chip bus type LPC are incompatible.
Probing for Winbond W49V002FA, 256 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for Winbond W39V080FA, 1024 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Host bus type None and chip bus type FWH are incompatible.
Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. Host bus type None and chip bus type SPI are incompatible.
No EEPROM/flash device found.
If you know which flash chip you have, and if this version of flashrom
supports a similar flash chip, you can try to force read your chip. Run:
flashrom -f -r -c similar_supported_flash_chip filename

Note: flashrom can never write when the flash chip isn't found automatically.

From stefan.tauner at student.tuwien.ac.at  Tue Feb  7 09:35:27 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 7 Feb 2012 09:35:27 +0100
Subject: [flashrom] Shuttle SN78S flash info
In-Reply-To: <CADKwgJfSc+T6Sd03k1Ap5Dk=C-QFQ0jtGFTjXj46k6_fGP3dTw@mail.gmail.com>
References: <CADKwgJfSc+T6Sd03k1Ap5Dk=C-QFQ0jtGFTjXj46k6_fGP3dTw@mail.gmail.com>
Message-ID: <201202070835.q178Z5J7024831@mail2.student.tuwien.ac.at>

On Mon, 6 Feb 2012 21:42:56 -0500
Dan Stoner <danstoner at gmail.com> wrote:

> flashrom v0.9.1-r946

Hi Dan!

Please upgrade! Your version of flashrom is 2,5 years old.
Nvidia support is still not complete, but it should work way better
than with 0.9.1.
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From elena.gusanu at gmail.com  Tue Feb  7 09:43:51 2012
From: elena.gusanu at gmail.com (Elena Gusanu)
Date: Tue, 7 Feb 2012 10:43:51 +0200
Subject: [flashrom] Hello, flashrom problem
In-Reply-To: <4F3072A5.60100@gmx.net>
References: <CAC5EzarbT+YDRfkB4Y_=iuFqbPkN5yK1G1nFwaWG53ZRAkixKg@mail.gmail.com>
	<4F3072A5.60100@gmx.net>
Message-ID: <CAC5Ezaoyw91j8aS0+rmaHn_f+GBTNwB6yhQZzLeRbwKJaDFmSQ@mail.gmail.com>

I  tried but it doesn't work.

2012/2/7 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

> Hi Elena,
>
> Am 06.02.2012 23:54 schrieb Elena Gusanu:
> > Good morning,
> >  My name is Elena Gusanu and i have a big problem with my laptop. I
> > flashrom my laptop and I didn't know what was this and i turned off,
> > unfortunately. Is there a solution to solve my problem and to get back
> bios?
>
> Please remove the power cable and battery from your laptop, wait 1 hour,
> then plug in battery and power cable and switch on your laptop again.
> That should work.
>
> Regards,
> Carl-Daniel
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120207/f70dd068/attachment.html>

From danstoner at gmail.com  Tue Feb  7 12:37:30 2012
From: danstoner at gmail.com (Dan Stoner)
Date: Tue, 7 Feb 2012 06:37:30 -0500
Subject: [flashrom] Shuttle SN78S flash info
In-Reply-To: <201202070835.q178Z5J7024831@mail2.student.tuwien.ac.at>
References: <CADKwgJfSc+T6Sd03k1Ap5Dk=C-QFQ0jtGFTjXj46k6_fGP3dTw@mail.gmail.com>
	<201202070835.q178Z5J7024831@mail2.student.tuwien.ac.at>
Message-ID: <CADKwgJdHh8tM7D2Fc4bY6Ki1W3jjr4KcR_=RfDabvyhG5UctWQ@mail.gmail.com>

Duh!  The old version is what's bundled in the Ubuntu I am using (one of
the LTS releases).  I just blindly followed the submit instructions without
thinking.

Thanks for the response!

Dan Stoner
 On Feb 7, 2012 3:35 AM, "Stefan Tauner" <stefan.tauner at student.tuwien.ac.at>
wrote:

> On Mon, 6 Feb 2012 21:42:56 -0500
> Dan Stoner <danstoner at gmail.com> wrote:
>
> > flashrom v0.9.1-r946
>
> Hi Dan!
>
> Please upgrade! Your version of flashrom is 2,5 years old.
> Nvidia support is still not complete, but it should work way better
> than with 0.9.1.
> --
> Kind regards/Mit freundlichen Gr??en, Stefan Tauner
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120207/db29b93c/attachment.html>

From stefan.tauner at student.tuwien.ac.at  Tue Feb  7 13:41:28 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 7 Feb 2012 13:41:28 +0100
Subject: [flashrom] Hello, flashrom problem
In-Reply-To: <CAC5Ezaoyw91j8aS0+rmaHn_f+GBTNwB6yhQZzLeRbwKJaDFmSQ@mail.gmail.com>
References: <CAC5EzarbT+YDRfkB4Y_=iuFqbPkN5yK1G1nFwaWG53ZRAkixKg@mail.gmail.com>
	<4F3072A5.60100@gmx.net>
	<CAC5Ezaoyw91j8aS0+rmaHn_f+GBTNwB6yhQZzLeRbwKJaDFmSQ@mail.gmail.com>
Message-ID: <201202071241.q17Cf3nR012785@mail2.student.tuwien.ac.at>

On Tue, 7 Feb 2012 10:43:51 +0200
Elena Gusanu <elena.gusanu at gmail.com> wrote:

> I  tried but it doesn't work.

Hello Elena,

Carl-Daniel had the impression that you did just a non-writing run
with flashrom (i.e. calling flashrom without any of the -w and -E
parameters). It seems that you have done more permanent harm and we
need to know more details to be able to help (if at all).
What hardware/laptop are we talking about?
Which version of flashrom did you use (which distribution?
Which command line arguments did you use?
Can you remember any error messages it showed when you ran it?

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From ralbright at insiderscore.com  Tue Feb  7 15:09:34 2012
From: ralbright at insiderscore.com (Richard Albright)
Date: Tue, 07 Feb 2012 09:09:34 -0500
Subject: [flashrom] MS-7548 mainboard works
Message-ID: <4F31309E.7040807@insiderscore.com>

flashed a hp pavilion a6750f successfully
-- 
*Rick Albright*
Senior Quantitative Analyst
Web: www.insiderscore.com <https://www.insiderscore.com/>
Email: ralbright at insiderscore.com <mailto:ralbright at insiderscore.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120207/38b8f703/attachment.html>

From stefan.tauner at student.tuwien.ac.at  Tue Feb  7 16:38:23 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 7 Feb 2012 16:38:23 +0100
Subject: [flashrom] MS-7548 mainboard works
In-Reply-To: <4F31309E.7040807@insiderscore.com>
References: <4F31309E.7040807@insiderscore.com>
Message-ID: <201202071537.q17FbttO013194@mail2.student.tuwien.ac.at>

On Tue, 07 Feb 2012 09:09:34 -0500
Richard Albright <ralbright at insiderscore.com> wrote:

> flashed a hp pavilion a6750f successfully


Hello Richard,

thanks for your report! I have marked the mainboard as supported and
will commit that later together with other small changes.

If possible please always send the (verbose) flashrom output with such
reports.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From r.marek at assembler.cz  Tue Feb  7 16:41:47 2012
From: r.marek at assembler.cz (Rudolf Marek)
Date: Tue, 07 Feb 2012 16:41:47 +0100
Subject: [flashrom] [PATCH] Add RDC R6030 chipset
In-Reply-To: <201201291411.q0TEBg1k000592@mail2.student.tuwien.ac.at>
References: <4F2481E7.1050509@assembler.cz>
	<201201290900.q0T90ZpS007776@mail2.student.tuwien.ac.at>
	<4F254AD9.9010502@assembler.cz>
	<201201291411.q0TEBg1k000592@mail2.student.tuwien.ac.at>
Message-ID: <4F31463B.5050507@assembler.cz>

Hi

Here is the updated version. I tested that on FOSDEM.

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Thanks
Rudolf
-------------- next part --------------
A non-text attachment was scrubbed...
Name: rdc.patch
Type: text/x-diff
Size: 1277 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120207/06083c51/attachment.bin>

From r.marek at assembler.cz  Tue Feb  7 16:46:01 2012
From: r.marek at assembler.cz (Rudolf Marek)
Date: Tue, 07 Feb 2012 16:46:01 +0100
Subject: [flashrom] [PATCH] Add en29lv640b
Message-ID: <4F314739.3040808@assembler.cz>

Hi

Following patch adds the en29lv640b which needs special command sequences in 8 
bit mode. Also, 8 bit programming needs actually 16bit double byte program.

The chip is found on bifferboard.

Please check the patch and let me know.

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Thanks
Rudolf
-------------- next part --------------
A non-text attachment was scrubbed...
Name: a.patch
Type: text/x-diff
Size: 6695 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120207/c8e0971e/attachment-0001.bin>

From svn at flashrom.org  Tue Feb  7 22:29:49 2012
From: svn at flashrom.org (repository service)
Date: Tue, 07 Feb 2012 22:29:49 +0100
Subject: [flashrom] [commit] r1489 - trunk
Message-ID: <E1Rusbl-0000du-4V@ra.coresystems.de>

Author: stefanct
Date: Tue Feb  7 22:29:48 2012
New Revision: 1489
URL: http://flashrom.org/trac/flashrom/changeset/1489

Log:
Add support for RDC R6030 chipset

Tested on Bifferboard.

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/chipset_enable.c
   trunk/print.c

Modified: trunk/chipset_enable.c
==============================================================================
--- trunk/chipset_enable.c	Fri Feb  3 23:32:09 2012	(r1488)
+++ trunk/chipset_enable.c	Tue Feb  7 22:29:48 2012	(r1489)
@@ -54,6 +54,32 @@
 	return 0;
 }
 
+static int enable_flash_rdc_r8610(struct pci_dev *dev, const char *name)
+{
+	uint8_t tmp;
+
+	/* enable ROMCS for writes */
+	tmp = pci_read_byte(dev, 0x43);
+	tmp |= 0x80;
+	pci_write_byte(dev, 0x43, tmp);
+
+	/* read the bootstrapping register */
+	tmp = pci_read_byte(dev, 0x40) & 0x3;
+	switch (tmp) {
+	case 3:
+		internal_buses_supported = BUS_FWH;
+		break;
+	case 2:
+		internal_buses_supported = BUS_LPC;
+		break;
+	default:
+		internal_buses_supported = BUS_PARALLEL;
+		break;
+	}
+
+	return 0;
+}
+
 static int enable_flash_sis85c496(struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
@@ -1235,6 +1261,7 @@
 	{0x1106, 0x8409, OK, "VIA", "VX855/VX875",	enable_flash_vt823x},
 	{0x1166, 0x0200, OK, "Broadcom", "OSB4",	enable_flash_osb4},
 	{0x1166, 0x0205, OK, "Broadcom", "HT-1000",	enable_flash_ht1000},
+	{0x17f3, 0x6030, OK, "RDC", "R8610/R3210",	enable_flash_rdc_r8610},
 	{0x8086, 0x122e, OK, "Intel", "PIIX",		enable_flash_piix4},
 	{0x8086, 0x1234, NT, "Intel", "MPIIX",		enable_flash_piix4},
 	{0x8086, 0x1c44, OK, "Intel", "Z68",		enable_flash_pch6},

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Fri Feb  3 23:32:09 2012	(r1488)
+++ trunk/print.c	Tue Feb  7 22:29:48 2012	(r1489)
@@ -692,6 +692,7 @@
 	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
 	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
 	B("BCOM",	"WinNET100",		1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
+	B("Bifferos",	"Bifferboard",		1, "http://bifferos.co.uk/", NULL),
 	B("Biostar",	"N68S3+",		1, NULL, NULL),
 	B("Biostar",	"M6TBA",		0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
 	B("Biostar",	"M7NCD Pro",		1, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),


From stefan.tauner at student.tuwien.ac.at  Tue Feb  7 22:31:36 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 7 Feb 2012 22:31:36 +0100
Subject: [flashrom] [PATCH] Add RDC R6030 chipset
In-Reply-To: <4F31463B.5050507@assembler.cz>
References: <4F2481E7.1050509@assembler.cz>
	<201201290900.q0T90ZpS007776@mail2.student.tuwien.ac.at>
	<4F254AD9.9010502@assembler.cz>
	<201201291411.q0TEBg1k000592@mail2.student.tuwien.ac.at>
	<4F31463B.5050507@assembler.cz>
Message-ID: <201202072131.q17LV5vX032386@mail2.student.tuwien.ac.at>

On Tue, 07 Feb 2012 16:41:47 +0100
Rudolf Marek <r.marek at assembler.cz> wrote:

> Hi
> 
> Here is the updated version. I tested that on FOSDEM.
> 
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>
> 

Thanks!
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
and committed in r1489 with minor changes (also added the bifferboard
to print.c).
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Tue Feb  7 23:23:18 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 7 Feb 2012 23:23:18 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <4F287346.4000909@gmx.net>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F287346.4000909@gmx.net>
Message-ID: <201202072222.q17MMmZl018680@mail2.student.tuwien.ac.at>

On Wed, 01 Feb 2012 00:03:34 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 31.01.2012 06:59 schrieb Stefan Tauner:
> > [?]
> > todo:
> >  - handle programmers which have a problem with the dummy bytes needed
> 
> AMD SB[678]x0 SPI has a way to specify sending one dummy byte between
> write and read, IIRC it is called DropOneClkOnRead or somthing like
> that. Quite a few other SPI masters have the one-dummy-byte
> functionality as well. This needs to be implemented in a generic way (I
> have a totally bitrotted patch for it), but it should not hold back this
> patch.

what about simulating the dummy byte by reading one additional byte in
the beginning instead of writing one? due to SPI's underlying principle
of shifting bits in and out of master and slave simultaneously this
should give us the same effect, but eases working around programmer
limitations.

> > [?]
> > +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
> 
> I believe that typedef to be pretty unreadable, but I see that avoiding
> the typedef would probably be even worse.

yes :) see http://patchwork.coreboot.org/patch/3492/ ... *shiver*

> > [?]
> > +		.read		= spi_chip_read,
> > +		.page_size	= 256, /* ? */
> 
> Argh, page_size comes to bite us again. Did I already send my "kill most
> uses of page_size" patch?

afaics no

> > +		/* FIXME: some vendor extensions define this */
> > +		.voltage	= {},
> > +		 /* Everything below will be set by the probing function. */
> > +		.write		= NULL,
> > +		.total_size	= 0,
> > +		.feature_bits	= 0,
> > +		.block_erasers	= {},
> > +	},
> >  
> >  	{
> >  		.vendor		= "Unknown",
> > diff --git a/flashchips.h b/flashchips.h
> > index 03efb86..1f2a8ca 100644
> > --- a/flashchips.h
> > +++ b/flashchips.h
> > @@ -36,6 +36,7 @@
> >  
> >  #define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
> >  #define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
> > +#define SFDP_DEVICE_ID		0xfffe
> 
> Side note: Should we move PROGMANUF_ID and its companion from the bottom
> of the file to this location to have generic match IDs in one place?

yes and i took the opportunity to do that right away, chunks now looks
like this (i also changed the hex characters to upper case like in the
rest of the file):

-#define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
-#define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
-#define SFDP_DEVICE_ID		0xfffe
+#define GENERIC_MANUF_ID	0xFFFF	/* Check if there is a vendor ID */
+#define GENERIC_DEVICE_ID	0xFFFF	/* Only match the vendor ID */
+#define SFDP_DEVICE_ID		0xFFFE
+#define PROGMANUF_ID		0xFFFE	/* dummy ID for opaque chips behind a programmer */
+#define PROGDEV_ID		0x01	/* dummy ID for opaque chips behind a programmer */

> >  
> >  #define ALLIANCE_ID		0x52	/* Alliance Semiconductor */
> >  #define ALLIANCE_AS29F002B	0x34
> > diff --git a/flashrom.c b/flashrom.c
> > index ee68344..84fb3fc 100644
> > --- a/flashrom.c
> > +++ b/flashrom.c
> > @@ -986,7 +986,33 @@ int probe_flash(struct registered_programmer *pgm, int startchip,
> >  		 * probe_flash() is the first one and thus no chip has been
> >  		 * found before.
> 
> The comment above is not really valid anymore. Can you include the
> following snippet in your patch?
> 
> @@ -980,11 +980,10 @@
>  
>  		/* If this is the first chip found, accept it.
>  		 * If this is not the first chip found, accept it only if it is
> -		 * a non-generic match.
> -		 * We could either make chipcount global or provide it as
> -		 * parameter, or we assume that startchip==0 means this call to
> -		 * probe_flash() is the first one and thus no chip has been
> -		 * found before.
> +		 * a non-generic match. SFDP and CFI are generic matches.
> +		 * startchip==0 means this call to probe_flash() is the first
> +		 * one for this programmer interface and thus no other chip has
> +		 * been found on this interface.
>  		 */
>  		if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID)
>  			break;

done


> > [?]
> > +/* FIXME: eventually something similar like this but more generic should be
> > + * available to split up spi commands. use that then instead */
> > +static int spi_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
> > +{
> > +	/* FIXME: this is wrong. */
> > +	int maxstep = 8;
> 
> Yes, maxstep should be a programmer-specific setting. However, with our
> current infrastructure there is no way to fix this easily.
> 
> 
> > +	int ret = 0;
> > +	while (len > 0) {
> > +		int step = min(len, maxstep);
> > +		ret = spi_sfdp_wrapper(flash, address, buf, step);
> > +		if (ret)
> 
> Actually, there is probably a way to determine optimal size for those
> SFDP requests: Check if ret indicates a "command too long" error and
> reduce maxstep by one in that case, then retry. Such code is not exactly
> pretty and I'm not sure if all SPI masters have such a differentiated
> error code reporting.

i have made this table from a code review:
https://docs.google.com/spreadsheet/ccc?key=0Ag1Kfbw63vWfdGFYWk5qSG4xYXhwQktDUzdmNmc0WVE&hl=en_US#gid=0

the only SPI programmer that has a small upper bound on the number of
bytes to send/receive and that does not report SPI_INVALID_LENGTH is
dediprog. it has the checks in place but just returns 1, so this is
easily fixable.

The code would probably be quite complex for little gain in speed
(if at all), so i would say that just using a small packet size
(readcnt = 8) is the best solution until we support the more
restrictive programmers/for now.

> > [?]
> > +
> > +static int sfdp_add_uniform_eraser(struct flashctx *f, uint8_t opcode, uint32_t bsize)
> 
> struct flashctx *flash
> Just "f" is too short, and if you try to search for it, you'll get
> thousands of matches you don't want.
> 
> bsize or blocksize? I prefer the latter for consistency and readability
> reasons.

both done (here in sfdp_add_uniform_eraser and sfdp_fill_flash too).

> 
> > +{
> > +	uint32_t total_size = f->total_size * 1024;
> > +	int i;
> > +	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
> > +	if (erasefn == NULL)
> > +		return 1;
> > +	for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
> > +		struct block_eraser *eraser = &f->block_erasers[i];
> > +		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase)
> > +			continue;
> > +		eraser->block_erase = erasefn;
> > +		eraser->eraseblocks[0].size = bsize;
> > +		eraser->eraseblocks[0].count = total_size/bsize;
> > +		msg_cdbg2("  Block eraser %d: %d x %d B with opcode "
> > +			  "0x%02x\n", i, total_size/bsize, bsize,
> > +			  opcode);
> > +		return 0;
> > +	}
> > +	msg_cinfo("%s: Not enough space to store another eraser (i=%d)."
> 
> msg_cerr?

that's the question :)
my rationale is: if there are already MAX erasers, we can continue
without a problem but it would be nice to increase the limit if someone
reports it. msg_cinfo will guarantee that normal users will see this,
so no need for msg_cerr.
there are good arguments for msg_cerr too... if we move this function
to spi25.c i'd vote for err, if it stays in sfdp.c i dont really care.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb  7 23:31:50 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 07 Feb 2012 23:31:50 +0100
Subject: [flashrom] [PATCH] spi25.c: Refactor spi_write_status_register
 helpers.
In-Reply-To: <1327989061-15494-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1327989061-15494-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F31A656.9090009@gmx.net>

Am 31.01.2012 06:50 schrieb Stefan Tauner:
> In r1115 "Write protection handling for Atmel AT25*" the old spi_write_status_register
> function was duplicated to send WREN and EWSR commands respectively controlled
> by a new common wrapper function spi_write_status_register without a reason.
> Both functions' resulting code is  equal apart from the opcode used. The code
> itself does also differ in the macros used, but their value (apart from the opcode)
> is equal. This patch adds a new parameter for the opcode to the helper function
> which allows removal of the other one. This relies on the fact that EWSR and WREN
> have the same INSIZE and OUTSIZE though. If that is really seen as an issue, the
> sizes could be made parameters too.
>
> This patch also changes the wrapper so that it no longer sets the feature bits
> of the struct flash(ctx) argument. This may result in changed output, because it
> no longer implicitly disables the debug message in following executions.

Ahem. Once we do the per-region unlock dance, this will be extremely
painful. We have three choices:
- Keep that part of the code as is. Not good.
- Spit out that message for every status register write. Not good.
- Fix all flash chip definitions. Good, but separate patch.
How do we proceed?

I'd like to keep the feature bit setting until the flash chip
definitions have been fixed, but this is not a veto-style decision.

 
> Also, spi_write_status_enable has been dead code since r658 or so. Remove it.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Once the feature bit setting is decided upon, this is
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
with one small comment below.

> ---
>  spi25.c |   90 ++++++++++-----------------------------------------------------
>  1 files changed, 14 insertions(+), 76 deletions(-)
>
> diff --git a/spi25.c b/spi25.c
> index 3ce7f08..d81616c 100644
> --- a/spi25.c
> +++ b/spi25.c
> @@ -720,81 +720,19 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
>  	return spi_chip_erase_c7(flash);
>  }
>  
> -int spi_write_status_enable(struct flashctx *flash)
> -{
> -	static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
> -	int result;
> -
> -	/* Send EWSR (Enable Write Status Register). */
> -	result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
> -
> -	if (result)
> -		msg_cerr("%s failed\n", __func__);
> -
> -	return result;
> -}
> -
> -/*
> - * This is according the SST25VF016 datasheet, who knows it is more
> - * generic that this...
> - */
> -static int spi_write_status_register_ewsr(struct flashctx *flash, int status)
> +static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char opcode)

enable_opcode instead of opcode.


>  {
>  	int result;
>  	int i = 0;
> -	struct spi_command cmds[] = {
> -	{
> -	/* WRSR requires either EWSR or WREN depending on chip type. */
> -		.writecnt	= JEDEC_EWSR_OUTSIZE,
> -		.writearr	= (const unsigned char[]){ JEDEC_EWSR },
> -		.readcnt	= 0,
> -		.readarr	= NULL,
> -	}, {
> -		.writecnt	= JEDEC_WRSR_OUTSIZE,
> -		.writearr	= (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status },
> -		.readcnt	= 0,
> -		.readarr	= NULL,
> -	}, {
> -		.writecnt	= 0,
> -		.writearr	= NULL,
> -		.readcnt	= 0,
> -		.readarr	= NULL,
> -	}};
> -
> -	result = spi_send_multicommand(flash, cmds);
> -	if (result) {
> -		msg_cerr("%s failed during command execution\n",
> -			__func__);
> -		/* No point in waiting for the command to complete if execution
> -		 * failed.
> -		 */
> -		return result;
> -	}
> -	/* WRSR performs a self-timed erase before the changes take effect.
> -	 * This may take 50-85 ms in most cases, and some chips apparently
> -	 * allow running RDSR only once. Therefore pick an initial delay of
> -	 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
> +	/*
> +	 * WRSR requires either EWSR or WREN depending on chip type.
> +	 * The code below relies on the fact hat EWSR and WREN have the same
> +	 * INSIZE and OUTSIZE.
>  	 */
> -	programmer_delay(100 * 1000);
> -	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) {
> -		if (++i > 490) {
> -			msg_cerr("Error: WIP bit after WRSR never cleared\n");
> -			return TIMEOUT_ERROR;
> -		}
> -		programmer_delay(10 * 1000);
> -	}
> -	return 0;
> -}
> -
> -static int spi_write_status_register_wren(struct flashctx *flash, int status)
> -{
> -	int result;
> -	int i = 0;
>  	struct spi_command cmds[] = {
>  	{
> -	/* WRSR requires either EWSR or WREN depending on chip type. */
>  		.writecnt	= JEDEC_WREN_OUTSIZE,
> -		.writearr	= (const unsigned char[]){ JEDEC_WREN },
> +		.writearr	= (const unsigned char[]){ opcode },
>  		.readcnt	= 0,
>  		.readarr	= NULL,
>  	}, {
> @@ -811,8 +749,7 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status)
>  
>  	result = spi_send_multicommand(flash, cmds);
>  	if (result) {
> -		msg_cerr("%s failed during command execution\n",
> -			__func__);
> +		msg_cerr("%s failed during command execution\n", __func__);
>  		/* No point in waiting for the command to complete if execution
>  		 * failed.
>  		 */
> @@ -836,17 +773,18 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status)
>  
>  int spi_write_status_register(struct flashctx *flash, int status)
>  {
> +	int feature_bits = flash->feature_bits;
>  	int ret = 1;
>  
> -	if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
> +	if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
>  		msg_cdbg("Missing status register write definition, assuming "
>  			 "EWSR is needed\n");
> -		flash->feature_bits |= FEATURE_WRSR_EWSR;
> +		feature_bits |= FEATURE_WRSR_EWSR;
>  	}
> -	if (flash->feature_bits & FEATURE_WRSR_WREN)
> -		ret = spi_write_status_register_wren(flash, status);
> -	if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR))
> -		ret = spi_write_status_register_ewsr(flash, status);
> +	if (feature_bits & FEATURE_WRSR_WREN)
> +		ret = spi_write_status_register_flag(flash, status, JEDEC_WREN);
> +	if (ret && (feature_bits & FEATURE_WRSR_EWSR))
> +		ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR);
>  	return ret;
>  }
>  

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Wed Feb  8 00:38:58 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 8 Feb 2012 00:38:58 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <4F2B34D4.7000501@gmx.net>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F2B34D4.7000501@gmx.net>
Message-ID: <201202072338.q17NcPj4003038@mail2.student.tuwien.ac.at>

On Fri, 03 Feb 2012 02:13:56 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 31.01.2012 06:59 schrieb Stefan Tauner:
> > --- /dev/null
> > +++ b/sfdp.c
> > @@ -0,0 +1,355 @@
> [...]
> > +static int sfdp_fill_flash(struct flashctx *f, uint8_t *buf, uint16_t len)
> 
> *flash instead of *f, please.

done

> 
> > +{
> > +	uint32_t tmp32;
> > +	uint8_t tmp8;
> > +	uint32_t total_size; /* in bytes */
> > +	uint32_t bsize;
> > +	uint8_t opcode_4k = 0xFF;
> > +	int dw, j;
> > +
> > +	msg_cdbg("Parsing JEDEC SFDP parameter table... ");
> 
> ... JEDEC flash parameter table...

done
 
> > +	if (len != 9 * 4 && len != 4 * 4) {
> > +		msg_cerr("%s: len out of spec\n", __func__);
> > +		return 1;
> > +	}
> > +	msg_cdbg2("\n");
> > +	
> > +	/* 1. double word */
> > +	dw = 0;
> > +	tmp32 = buf[(4 * dw) + 0];
> > +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
> > +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
> > +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
> > +
> > +	tmp8 = (tmp32 >> 17) & 0x3;
> > +	switch (tmp8) {
> > +	case 0x0:
> > +		msg_cdbg2("  3-Byte only addressing.\n");
> > +		break;
> > +	case 0x1:
> > +		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
> > +		break;
> > +	case 0x2:
> > +		msg_cdbg("  4-Byte only addressing not supported.\n");
> > +		return 1;
> > +	default:
> > +		msg_cdbg("  Required addressing mode (0x%x) not supported.\n",
> > +			 tmp8);
> > +		return 1;
> > +	}
> > +
> > +	msg_cdbg2("  Writes to the status register have ");
> > +	if (tmp32 & (1 << 3)) {
> > +		msg_cdbg2("to be enabled with ");
> > +		if (tmp32 & (1 << 4)) {
> > +			f->feature_bits = FEATURE_WRSR_WREN;
> > +			msg_cdbg2("WREN (0x06).\n");
> > +		} else {
> > +			f->feature_bits = FEATURE_WRSR_EWSR;
> > +			msg_cdbg2("EWSR (0x50).\n");
> > +		}
> > +	} else
> > +		msg_cdbg2("not to be especially enabled.\n");
> 
> The "Writing to Volatile Status Register" part of JESD216 is one of the
> most confusing wordings I ever saw in a standard. I expect some flash
> chip vendors to conform to the letter of the spec which will cause
> pretty explosions: If the status register is nonvolatile and needs EWSR
> or WREN for writes, the standard explicitly requires the vendor to set
> bits 3+4 to 0 (EWSR/WREN not needed). I don't think JEDEC understood the
> implications of that wording.
>
> Suggestion for a standards-conforming code flow:
> msg_cdbg2("  Status register is ");
> if (tmp32 & (1 << 3)) {
>   msg_cdbg2("volatile and writes to the status register have to be
> enabled with ");
> [your bit 4 code]
> } else
>   msg_cdbg2("nonvolatile and the standard does not allow vendors to tell
> us whether EWSR/WREN is needed for status register writes");

as discussed on IRC...

> > +
> > +	msg_cdbg2("  Write granularity is ");
> 
> I know they call it write granularity, but flashrom calls it writechunk
> size. Please use our terminology here even if the standard calls it
> differently. You can add a comment if you think that clarifies the code
> for future developers.

done.
 
> > +	if (tmp32 & (1 << 2)) {
> > +		msg_cdbg2("at least 64 B.\n");
> > +		f->write = spi_chip_write_256;
> 
> Please insert
> flash->page_size = 64;

done.

> > +	} else {
> > +		msg_cdbg2("1 B only.\n");
> > +		f->write = spi_chip_write_1;
> 
> flash->page_size = 256;
> (I know that page_size needs to die, but right now we use it.)

done.

> > +	}
> > +
> > +	if ((tmp32 & 0x3) == 0x1) {
> > +		opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
> > +	}
> 
> What about this instead?
> 
> switch (tmp32 & 0x03) {
> case 0x0:
> case 0x2:
>   msg_cerr("4k erase is reserved... should not happen");
>   return 1;
>   break;
> case 0x1:
>   opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
>   break;
> case 0x3:
>   if (((tmp32 >> 8) & 0xFF) != 0xFF) {
>     msg_cdbg("wtf inconsistent 4k erase settings?!?");
>     return 1;
>   }
> }
> Admittedly, the wording could be better.
> 
> 
> > +
> > +	/* 2. double word */
> > +	dw = 1;
> > +	tmp32 = buf[(4 * dw) + 0];
> > +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
> > +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
> > +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
> > +
> > +	if (tmp32 & (1 << 31)) {
> > +		msg_cerr("Flash chip size >= 4 Gb/512 MB not supported.\n");
> > +		return 1;
> > +	}
> > +	total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
> > +	f->total_size = total_size / 1024;
> > +	msg_cdbg2("  Flash chip size is %d kB.\n", f->total_size);
> > +
> > +	/* FIXME: double words 3-7 contain unused fast read information */
> > +
> > +	if (len == 4 * 4) {
> > +		msg_cdbg("It seems like this chip supports the preliminary "
> > +			 "Intel version of SFDP, skipping processing of double "
> > +			 "words 3-9.\n");
> > +		goto proc_4k;
> > +	}
> > +
> > +	dw = 8;
> > +	for (j = 0; j < 4; j++) {
> > +		/* 8 double words from the start + 2 words for every eraser */
> > +		tmp32 = buf[(4 * dw) + (2 * j)];
> 
> use tmp8 instead?

done.

> > +		if (tmp32 == 0) {
> > +			msg_cdbg2("  Block eraser %d is unused.\n", j);
> > +			continue;
> > +		}
> > +		if (tmp32 >= 31) {
> > +			msg_cdbg2("  Block size of eraser %d (2^%d) is too big."
> 
> "... too big for flashrom."

done.

> > +				  "\n", j, tmp32);
> > +			continue;
> > +		}
> > +		bsize = 1 << (tmp32); /* bsize = 2 ^ field */
> > +
> > +		tmp8 = buf[(4 * dw) + (2 * j) + 1];
> > +		if(sfdp_add_uniform_eraser(f, tmp8, bsize))
> > +			continue;
> > +		/* If there is a valid 4k value in the last double words,
> > +		 * we want to override the value from double word 1, hence force
> > +		 * skipping its processing: */
> > +		if (bsize == 4 * 1024)
> > +			opcode_4k = 0xFF;
> 
> Not really. What happens if there are multiple valid opcodes for 4k
> erase? Such chips do exist IIRC.
hm... the standard with its wording "the 4k opcode" and my previous
experience led to this...

> What about
> if (bsize == 4 * 1024) {
>   if (tmp8 == opcode_4k)
>     opcode_4k == 0xFF;
>   else
>     msg_cdbg("More than one 4kB eraser opcode found: 0x%02x and
> 0x%02x.", tmp8, opcode_4k);
> }

if multiple (different) 4k eraser opcodes are ok why should we log it
explicitly then?

hm. and it would probably be better to enhance sfdp_add_uniform_eraser
to check for duplicates before adding a new one, and maybe even
introducing a distinct return value for this. if the sfdp table
specifies duplicates it would be justified to abort imo.
it would of course also make the 4k opcode handling of the first double
word easier because we could just add it immediately.

> > +	}
> > +
> > +proc_4k:
> > +	if (opcode_4k != 0xFF) {
> > +		sfdp_add_uniform_eraser(f, opcode_4k, 4 * 1024);
> > +	}
> > +	msg_cdbg("done.\n");
> > +	return 0;
> > +}
> > +
> > +static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len)
> > +{
> > +	uint16_t i;
> > +	if (spi_sfdp(flash, addr, buf, len)) {
> > +		msg_cerr("Receiving SFDP parameter table failed.\n");
> > +		return 1;
> > +	}
> > +	msg_cspew("  Parameter table contents:\n");
> > +	for(i = 0; i < len; i++) {
> > +		if ((i % 8) == 0) {
> > +			msg_cspew("    0x%03x: ", i);
> > +		}
> > +		msg_cspew(" 0x%02x", buf[i]);
> > +		if ((i % 8) == 7) {
> > +			msg_cspew("\n");
> > +			continue;
> > +		}
> > +		if ((i % 8) == 3) {
> > +			msg_cspew(" ");
> > +			continue;
> > +		}
> > +	}
> > +	msg_cspew("\n");
> 
> Do we have some generic hexdump() function? I agree that dumping the
> parameter table contents may make sense, but open-coding your own
> hexdump is probably not the best idea. Do we want this hexdump
> functionality at all, and if yes, should it be factored out?

not that i know of... OTOH it is just a few lines. if we generalize the
function the way i imagine it right now, every call would also need a
few lines due to the number of parameter to customize the output ;)

> 
> > +	return 0;
> > +}
> > +
> > +int probe_spi_sfdp(struct flashctx *flash)
> > +{
> > +	int ret = 0;
> > +	uint8_t buf[8];
> > +	uint32_t tmp32;
> > +	uint8_t nph;
> > +	/* need to limit the table loop by comparing i to uint8_t nph hence: */
> > +	uint16_t i;
> > +	struct sfdp_tbl_hdr *hdrs;
> > +	uint8_t *hbuf;
> > +	uint8_t *tbuf;
> > +
> > +	if (spi_sfdp(flash, 0x00, buf, 4)) {
> > +		msg_cerr("Receiving SFDP signature failed.\n");
> 
> Hmmm... should all boards with IT87/ICH SPI and unknown flash chips see
> an error message? While I'm often for upgrading error messages to
> msg_*err, I believe that this case should be rather mag_*dbg.

right. i had planned this already due to the same reason but forgot
about it.

> > +		return 0;
> > +	}
> > +	tmp32 = buf[0];
> > +	tmp32 |= ((unsigned int)buf[1]) << 8;
> > +	tmp32 |= ((unsigned int)buf[2]) << 16;
> > +	tmp32 |= ((unsigned int)buf[3]) << 24;
> > +
> > +	msg_cdbg2("SFDP signature = 0x%08x (should be 0x50444653)\n", tmp32);
> > +	if (tmp32 != 0x50444653) {
> > +		msg_cdbg("No SFDP signature found.\n");
> > +		return 0;
> > +	}
> > +	if (spi_sfdp(flash, 0x04, buf, 3)) {
> > +		msg_cerr("Receiving SFDP revision and number of parameter "
> > +			 "headers (NPH) failed. ");
> > +		return 0;
> > +	}
> > +	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
> 
> return 0 if major revision is unknown (i.e. not 0x01). A new major
> revision may change the meaning of any field and that's why we should abort.

right. message verbosity?
current code:
	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
	if (buf[1] != 0x01) {
		msg_cinfo("The chip supports an unkown version of SFDP. "
			  "Aborting SFDP probe!\n");
		return 0;
	}

rest will follow...
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb  8 01:17:04 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 08 Feb 2012 01:17:04 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <201202072222.q17MMmZl018680@mail2.student.tuwien.ac.at>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F287346.4000909@gmx.net>
	<201202072222.q17MMmZl018680@mail2.student.tuwien.ac.at>
Message-ID: <4F31BF00.6010508@gmx.net>

Am 07.02.2012 23:23 schrieb Stefan Tauner:
> On Wed, 01 Feb 2012 00:03:34 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> Am 31.01.2012 06:59 schrieb Stefan Tauner:
>>> [?]
>>> todo:
>>>  - handle programmers which have a problem with the dummy bytes needed
>> AMD SB[678]x0 SPI has a way to specify sending one dummy byte between
>> write and read, IIRC it is called DropOneClkOnRead or somthing like
>> that. Quite a few other SPI masters have the one-dummy-byte
>> functionality as well. This needs to be implemented in a generic way (I
>> have a totally bitrotted patch for it), but it should not hold back this
>> patch.
> what about simulating the dummy byte by reading one additional byte in
> the beginning instead of writing one? due to SPI's underlying principle
> of shifting bits in and out of master and slave simultaneously this
> should give us the same effect, but eases working around programmer
> limitations.

Right. The direction is a don't-care thing for dummy bytes. Maybe just
add a FIXME comment that we should handle dummy bytes explicitly later.


>>> [?]
>>> +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
>> I believe that typedef to be pretty unreadable, but I see that avoiding
>> the typedef would probably be even worse.
> yes :) see http://patchwork.coreboot.org/patch/3492/ ... *shiver*

Now that you point me to the alternative, I have to say that I think the
typedef is less readable (at least the typedef definition itself).


>>> [?]
>>> +		.read		= spi_chip_read,
>>> +		.page_size	= 256, /* ? */
>> Argh, page_size comes to bite us again. Did I already send my "kill most
>> uses of page_size" patch?
> afaics no

Yes, it's still in beta. But I can send it anyway so people can review
it mercilessly.


>>> +		/* FIXME: some vendor extensions define this */
>>> +		.voltage	= {},
>>> +		 /* Everything below will be set by the probing function. */
>>> +		.write		= NULL,
>>> +		.total_size	= 0,
>>> +		.feature_bits	= 0,
>>> +		.block_erasers	= {},
>>> +	},
>>>  
>>>  	{
>>>  		.vendor		= "Unknown",
>>> diff --git a/flashchips.h b/flashchips.h
>>> index 03efb86..1f2a8ca 100644
>>> --- a/flashchips.h
>>> +++ b/flashchips.h
>>> @@ -36,6 +36,7 @@
>>>  
>>>  #define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
>>>  #define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
>>> +#define SFDP_DEVICE_ID		0xfffe
>> Side note: Should we move PROGMANUF_ID and its companion from the bottom
>> of the file to this location to have generic match IDs in one place?
> yes and i took the opportunity to do that right away, chunks now looks
> like this (i also changed the hex characters to upper case like in the
> rest of the file):
>
> -#define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
> -#define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
> -#define SFDP_DEVICE_ID		0xfffe
> +#define GENERIC_MANUF_ID	0xFFFF	/* Check if there is a vendor ID */
> +#define GENERIC_DEVICE_ID	0xFFFF	/* Only match the vendor ID */
> +#define SFDP_DEVICE_ID		0xFFFE
> +#define PROGMANUF_ID		0xFFFE	/* dummy ID for opaque chips behind a programmer */
> +#define PROGDEV_ID		0x01	/* dummy ID for opaque chips behind a programmer */

Thanks!


>>>  
>>>  #define ALLIANCE_ID		0x52	/* Alliance Semiconductor */
>>>  #define ALLIANCE_AS29F002B	0x34
>>> diff --git a/flashrom.c b/flashrom.c
>>> index ee68344..84fb3fc 100644
>>> --- a/flashrom.c
>>> +++ b/flashrom.c
>>>
>>> [?]
>>> +/* FIXME: eventually something similar like this but more generic should be
>>> + * available to split up spi commands. use that then instead */
>>> +static int spi_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
>>> +{
>>> +	/* FIXME: this is wrong. */
>>> +	int maxstep = 8;
>> Yes, maxstep should be a programmer-specific setting. However, with our
>> current infrastructure there is no way to fix this easily.
>>
>>
>>> +	int ret = 0;
>>> +	while (len > 0) {
>>> +		int step = min(len, maxstep);
>>> +		ret = spi_sfdp_wrapper(flash, address, buf, step);
>>> +		if (ret)
>> Actually, there is probably a way to determine optimal size for those
>> SFDP requests: Check if ret indicates a "command too long" error and
>> reduce maxstep by one in that case, then retry. Such code is not exactly
>> pretty and I'm not sure if all SPI masters have such a differentiated
>> error code reporting.
> i have made this table from a code review:
> https://docs.google.com/spreadsheet/ccc?key=0Ag1Kfbw63vWfdGFYWk5qSG4xYXhwQktDUzdmNmc0WVE&hl=en_US#gid=0

Thanks.


> the only SPI programmer that has a small upper bound on the number of
> bytes to send/receive and that does not report SPI_INVALID_LENGTH is
> dediprog. it has the checks in place but just returns 1, so this is
> easily fixable.
>
> The code would probably be quite complex for little gain in speed
> (if at all), so i would say that just using a small packet size
> (readcnt = 8) is the best solution until we support the more
> restrictive programmers/for now.

Hm OK. Not really happy, but we can always do this with a followup
patch. Just add a FIXME comment.


>>> +{
>>> +	uint32_t total_size = f->total_size * 1024;
>>> +	int i;
>>> +	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
>>> +	if (erasefn == NULL)
>>> +		return 1;
>>> +	for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
>>> +		struct block_eraser *eraser = &f->block_erasers[i];
>>> +		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase)
>>> +			continue;
>>> +		eraser->block_erase = erasefn;
>>> +		eraser->eraseblocks[0].size = bsize;
>>> +		eraser->eraseblocks[0].count = total_size/bsize;
>>> +		msg_cdbg2("  Block eraser %d: %d x %d B with opcode "
>>> +			  "0x%02x\n", i, total_size/bsize, bsize,
>>> +			  opcode);
>>> +		return 0;
>>> +	}
>>> +	msg_cinfo("%s: Not enough space to store another eraser (i=%d)."
>> msg_cerr?
> that's the question :)
> my rationale is: if there are already MAX erasers, we can continue
> without a problem but it would be nice to increase the limit if someone
> reports it. msg_cinfo will guarantee that normal users will see this,
> so no need for msg_cerr.
> there are good arguments for msg_cerr too... if we move this function
> to spi25.c i'd vote for err, if it stays in sfdp.c i dont really care.

msg_cinfo it is, then.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Wed Feb  8 01:25:27 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 8 Feb 2012 01:25:27 +0100
Subject: [flashrom] Tagging all EWSR chips correctly (was: [PATCH] spi25.c:
 Refactor spi_write_status_register helpers.)
In-Reply-To: <4F31A656.9090009@gmx.net>
References: <1327989061-15494-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F31A656.9090009@gmx.net>
Message-ID: <201202080024.q180OrPg023657@mail2.student.tuwien.ac.at>

On Tue, 07 Feb 2012 23:31:50 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Ahem. Once we do the per-region unlock dance, this will be extremely
> painful. We have three choices:
> - Keep that part of the code as is. Not good.
> - Spit out that message for every status register write. Not good.
> - Fix all flash chip definitions. Good, but separate patch.
> How do we proceed?

fixing the stuff that needs fixing, of course.

steve said he might look into it, so this is what has to be done:
i have attached a file containing what seems to be the spi chips
without correctly set feature_bits fields. we need to check the
datasheets for the opcodes needed to enable writing to the status
register. normally this is either WREN (write enable) or EWSR (enable
write status register), or both.
currently we are only interested in the non-volatile bits of the status
register, but there are chips that require another write enable command
for the volatile bits. if anyone creates a spreadsheet, he should
probably note those too if feasible or maybe even add a comment in the
patch.

the field should be added after page_size and either set to:
		.feature_bits	= FEATURE_WRSR_EWSR
or
		.feature_bits	= FEATURE_WRSR_EITHER
if EWSR and WREN are allowed (all other SPI chips are already set
to FEATURE_WRSR_WREN). in the case we encounter a chip that does use
something else a comment should suffice for the time being.

we could also split the work up, if it takes too long otherwise...
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner
-------------- next part --------------
A non-text attachment was scrubbed...
Name: EWSR_chips.c
Type: text/x-csrc
Size: 3872 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120208/5c7dabf2/attachment.c>

From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb  8 01:28:20 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 08 Feb 2012 01:28:20 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <201202072338.q17NcPj4003038@mail2.student.tuwien.ac.at>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F2B34D4.7000501@gmx.net>
	<201202072338.q17NcPj4003038@mail2.student.tuwien.ac.at>
Message-ID: <4F31C1A4.1070402@gmx.net>

Am 08.02.2012 00:38 schrieb Stefan Tauner:
> On Fri, 03 Feb 2012 02:13:56 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> Am 31.01.2012 06:59 schrieb Stefan Tauner:
>>> --- /dev/null
>>> +++ b/sfdp.c
>>> @@ -0,0 +1,355 @@
>> [...]
>>> +static int sfdp_fill_flash(struct flashctx *f, uint8_t *buf, uint16_t len)
>> *flash instead of *f, please.
> done
>
>>> +{
>>> +	uint32_t tmp32;
>>> +	uint8_t tmp8;
>>> +	uint32_t total_size; /* in bytes */
>>> +	uint32_t bsize;
>>> +	uint8_t opcode_4k = 0xFF;
>>> +	int dw, j;
>>> +
>>> +	msg_cdbg("Parsing JEDEC SFDP parameter table... ");
>> ... JEDEC flash parameter table...
> done
>  
>>> +	if (len != 9 * 4 && len != 4 * 4) {
>>> +		msg_cerr("%s: len out of spec\n", __func__);
>>> +		return 1;
>>> +	}
>>> +	msg_cdbg2("\n");
>>> +	
>>> +	/* 1. double word */
>>> +	dw = 0;
>>> +	tmp32 = buf[(4 * dw) + 0];
>>> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
>>> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
>>> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
>>> +
>>> +	tmp8 = (tmp32 >> 17) & 0x3;
>>> +	switch (tmp8) {
>>> +	case 0x0:
>>> +		msg_cdbg2("  3-Byte only addressing.\n");
>>> +		break;
>>> +	case 0x1:
>>> +		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
>>> +		break;
>>> +	case 0x2:
>>> +		msg_cdbg("  4-Byte only addressing not supported.\n");
>>> +		return 1;
>>> +	default:
>>> +		msg_cdbg("  Required addressing mode (0x%x) not supported.\n",
>>> +			 tmp8);
>>> +		return 1;
>>> +	}
>>> +
>>> +	msg_cdbg2("  Writes to the status register have ");
>>> +	if (tmp32 & (1 << 3)) {
>>> +		msg_cdbg2("to be enabled with ");
>>> +		if (tmp32 & (1 << 4)) {
>>> +			f->feature_bits = FEATURE_WRSR_WREN;
>>> +			msg_cdbg2("WREN (0x06).\n");
>>> +		} else {
>>> +			f->feature_bits = FEATURE_WRSR_EWSR;
>>> +			msg_cdbg2("EWSR (0x50).\n");
>>> +		}
>>> +	} else
>>> +		msg_cdbg2("not to be especially enabled.\n");
>> The "Writing to Volatile Status Register" part of JESD216 is one of the
>> most confusing wordings I ever saw in a standard. I expect some flash
>> chip vendors to conform to the letter of the spec which will cause
>> pretty explosions: If the status register is nonvolatile and needs EWSR
>> or WREN for writes, the standard explicitly requires the vendor to set
>> bits 3+4 to 0 (EWSR/WREN not needed). I don't think JEDEC understood the
>> implications of that wording.
>>
>> Suggestion for a standards-conforming code flow:
>> msg_cdbg2("  Status register is ");
>> if (tmp32 & (1 << 3)) {
>>   msg_cdbg2("volatile and writes to the status register have to be
>> enabled with ");
>> [your bit 4 code]
>> } else
>>   msg_cdbg2("nonvolatile and the standard does not allow vendors to tell
>> us whether EWSR/WREN is needed for status register writes");
> as discussed on IRC...
>
>>> +
>>> +	msg_cdbg2("  Write granularity is ");
>> I know they call it write granularity, but flashrom calls it writechunk
>> size. Please use our terminology here even if the standard calls it
>> differently. You can add a comment if you think that clarifies the code
>> for future developers.
> done.
>  
>>> +	if (tmp32 & (1 << 2)) {
>>> +		msg_cdbg2("at least 64 B.\n");
>>> +		f->write = spi_chip_write_256;
>> Please insert
>> flash->page_size = 64;
> done.
>
>>> +	} else {
>>> +		msg_cdbg2("1 B only.\n");
>>> +		f->write = spi_chip_write_1;
>> flash->page_size = 256;
>> (I know that page_size needs to die, but right now we use it.)
> done.
>
>>> +	}
>>> +
>>> +	if ((tmp32 & 0x3) == 0x1) {
>>> +		opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
>>> +	}
>> What about this instead?
>>
>> switch (tmp32 & 0x03) {
>> case 0x0:
>> case 0x2:
>>   msg_cerr("4k erase is reserved... should not happen");
>>   return 1;
>>   break;
>> case 0x1:
>>   opcode_4k = (tmp32 >> 8) & 0xFF; /* will be dealt with later */
>>   break;
>> case 0x3:
>>   if (((tmp32 >> 8) & 0xFF) != 0xFF) {
>>     msg_cdbg("wtf inconsistent 4k erase settings?!?");
>>     return 1;
>>   }
>> }
>> Admittedly, the wording could be better.
>>
>>
>>> +
>>> +	/* 2. double word */
>>> +	dw = 1;
>>> +	tmp32 = buf[(4 * dw) + 0];
>>> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
>>> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
>>> +	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
>>> +
>>> +	if (tmp32 & (1 << 31)) {
>>> +		msg_cerr("Flash chip size >= 4 Gb/512 MB not supported.\n");
>>> +		return 1;
>>> +	}
>>> +	total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
>>> +	f->total_size = total_size / 1024;
>>> +	msg_cdbg2("  Flash chip size is %d kB.\n", f->total_size);
>>> +
>>> +	/* FIXME: double words 3-7 contain unused fast read information */
>>> +
>>> +	if (len == 4 * 4) {
>>> +		msg_cdbg("It seems like this chip supports the preliminary "
>>> +			 "Intel version of SFDP, skipping processing of double "
>>> +			 "words 3-9.\n");
>>> +		goto proc_4k;
>>> +	}
>>> +
>>> +	dw = 8;
>>> +	for (j = 0; j < 4; j++) {
>>> +		/* 8 double words from the start + 2 words for every eraser */
>>> +		tmp32 = buf[(4 * dw) + (2 * j)];
>> use tmp8 instead?
> done.
>
>>> +		if (tmp32 == 0) {
>>> +			msg_cdbg2("  Block eraser %d is unused.\n", j);
>>> +			continue;
>>> +		}
>>> +		if (tmp32 >= 31) {
>>> +			msg_cdbg2("  Block size of eraser %d (2^%d) is too big."
>> "... too big for flashrom."
> done.
>
>>> +				  "\n", j, tmp32);
>>> +			continue;
>>> +		}
>>> +		bsize = 1 << (tmp32); /* bsize = 2 ^ field */
>>> +
>>> +		tmp8 = buf[(4 * dw) + (2 * j) + 1];
>>> +		if(sfdp_add_uniform_eraser(f, tmp8, bsize))
>>> +			continue;
>>> +		/* If there is a valid 4k value in the last double words,
>>> +		 * we want to override the value from double word 1, hence force
>>> +		 * skipping its processing: */
>>> +		if (bsize == 4 * 1024)
>>> +			opcode_4k = 0xFF;
>> Not really. What happens if there are multiple valid opcodes for 4k
>> erase? Such chips do exist IIRC.
> hm... the standard with its wording "the 4k opcode" and my previous
> experience led to this...
>
>> What about
>> if (bsize == 4 * 1024) {
>>   if (tmp8 == opcode_4k)
>>     opcode_4k == 0xFF;
>>   else
>>     msg_cdbg("More than one 4kB eraser opcode found: 0x%02x and
>> 0x%02x.", tmp8, opcode_4k);
>> }
> if multiple (different) 4k eraser opcodes are ok why should we log it
> explicitly then?

Because it contradicts your reading of the standard and your experience?


> hm. and it would probably be better to enhance sfdp_add_uniform_eraser
> to check for duplicates before adding a new one, and maybe even
> introducing a distinct return value for this. if the sfdp table
> specifies duplicates it would be justified to abort imo.
> it would of course also make the 4k opcode handling of the first double
> word easier because we could just add it immediately.

It would just move the 4k special case handling to a different function,
though.

 
>>> +	}
>>> +
>>> +proc_4k:
>>> +	if (opcode_4k != 0xFF) {
>>> +		sfdp_add_uniform_eraser(f, opcode_4k, 4 * 1024);
>>> +	}
>>> +	msg_cdbg("done.\n");
>>> +	return 0;
>>> +}
>>> +
>>> +static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len)
>>> +{
>>> +	uint16_t i;
>>> +	if (spi_sfdp(flash, addr, buf, len)) {
>>> +		msg_cerr("Receiving SFDP parameter table failed.\n");
>>> +		return 1;
>>> +	}
>>> +	msg_cspew("  Parameter table contents:\n");
>>> +	for(i = 0; i < len; i++) {
>>> +		if ((i % 8) == 0) {
>>> +			msg_cspew("    0x%03x: ", i);
>>> +		}
>>> +		msg_cspew(" 0x%02x", buf[i]);
>>> +		if ((i % 8) == 7) {
>>> +			msg_cspew("\n");
>>> +			continue;
>>> +		}
>>> +		if ((i % 8) == 3) {
>>> +			msg_cspew(" ");
>>> +			continue;
>>> +		}
>>> +	}
>>> +	msg_cspew("\n");
>> Do we have some generic hexdump() function? I agree that dumping the
>> parameter table contents may make sense, but open-coding your own
>> hexdump is probably not the best idea. Do we want this hexdump
>> functionality at all, and if yes, should it be factored out?
> not that i know of... OTOH it is just a few lines. if we generalize the
> function the way i imagine it right now, every call would also need a
> few lines due to the number of parameter to customize the output ;)

Point taken. But please don't prefix 0x for individual values. That is
really superfluous.

 
>>> +	return 0;
>>> +}
>>> +
>>> +int probe_spi_sfdp(struct flashctx *flash)
>>> +{
>>> +	int ret = 0;
>>> +	uint8_t buf[8];
>>> +	uint32_t tmp32;
>>> +	uint8_t nph;
>>> +	/* need to limit the table loop by comparing i to uint8_t nph hence: */
>>> +	uint16_t i;
>>> +	struct sfdp_tbl_hdr *hdrs;
>>> +	uint8_t *hbuf;
>>> +	uint8_t *tbuf;
>>> +
>>> +	if (spi_sfdp(flash, 0x00, buf, 4)) {
>>> +		msg_cerr("Receiving SFDP signature failed.\n");
>> Hmmm... should all boards with IT87/ICH SPI and unknown flash chips see
>> an error message? While I'm often for upgrading error messages to
>> msg_*err, I believe that this case should be rather mag_*dbg.
> right. i had planned this already due to the same reason but forgot
> about it.
>
>>> +		return 0;
>>> +	}
>>> +	tmp32 = buf[0];
>>> +	tmp32 |= ((unsigned int)buf[1]) << 8;
>>> +	tmp32 |= ((unsigned int)buf[2]) << 16;
>>> +	tmp32 |= ((unsigned int)buf[3]) << 24;
>>> +
>>> +	msg_cdbg2("SFDP signature = 0x%08x (should be 0x50444653)\n", tmp32);
>>> +	if (tmp32 != 0x50444653) {
>>> +		msg_cdbg("No SFDP signature found.\n");
>>> +		return 0;
>>> +	}
>>> +	if (spi_sfdp(flash, 0x04, buf, 3)) {
>>> +		msg_cerr("Receiving SFDP revision and number of parameter "
>>> +			 "headers (NPH) failed. ");
>>> +		return 0;
>>> +	}
>>> +	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
>> return 0 if major revision is unknown (i.e. not 0x01). A new major
>> revision may change the meaning of any field and that's why we should abort.
> right. message verbosity?
> current code:
> 	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
> 	if (buf[1] != 0x01) {
> 		msg_cinfo("The chip supports an unkown version of SFDP. "
> 			  "Aborting SFDP probe!\n");
> 		return 0;
> 	}
>
> rest will follow...

msg_cinfo or msg_cerr.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From dhendrix at google.com  Wed Feb  8 01:49:10 2012
From: dhendrix at google.com (David Hendricks)
Date: Tue, 7 Feb 2012 16:49:10 -0800
Subject: [flashrom] [PATCH] dummy programmer: blacklist SPI commands
In-Reply-To: <4F309090.9010704@gmx.net>
References: <4CD24D4B.5020108@gmx.net> <4D3625F7.2050003@gmx.net>
	<20110121013628.GI2484@debshine>
	<AANLkTimNskrC0O1NxudXPWkvXw0nMEdi8Sv_KJPyHO-A@mail.gmail.com>
	<4F309090.9010704@gmx.net>
Message-ID: <CAKOoyUej8fsxG8kbOE+_iE8ndG8gK46w5GA5USnJN2Eik1EA8Q@mail.gmail.com>

On Mon, Feb 6, 2012 at 6:46 PM, Carl-Daniel Hailfinger <
c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Repost... code cleaned, man page fixed.
>
> Add optional SPI command blacklisting and ingorelisting to the flash
> chip emulator in the dummy programmer.
>
> Usage:
> flashrom -p dummy:spi_blacklist=commandlist
> flashrom -p dummy:spi_ignorelist=commandlist
>
> If commandlist is 0302, flashrom will refuse (blacklist) or ignore
> (ignorelist) command 0x03 (READ) and command 0x02 (WRITE). The
> commandlist can be up to 512 bytes (256 commands) long.
> Specifying flash chip emulation is a good idea to get useful results.
>
> Very useful for testing corner cases if you don't own a locked down
> Intel chipset and want to simulate such a thing.
>
> Example usage:
> dd if=/dev/zeros bs=1024k count=4 of=dummy_simulator.rom
> dd if=/dev/urandom bs=1024k count=4 of=randomimage.rom
> flashrom -p
> dummy:emulate=SST25VF032B,image=dummy_simulator.rom,spi_blacklist=20,spi_ignorelist=52
> -w randomimage.rom -V
>
> The example output looks like this:
> flashrom v0.9.4-r1488 on Linux 2.6.34.10-0.6-default (i686), built with
> libpci 3.1.7, GCC 4.5.0 20100604 [gcc-4_5-branch revision 160292], little
> endian
> [...]
> Initializing dummy programmer
> Requested buses are: default
> Enabling support for parallel flash.
> Enabling support for LPC flash.
> Enabling support for FWH flash.
> Enabling support for SPI flash.
> SPI blacklist is 20 , size 1
> SPI ignorelist is 52 , size 1
> Emulating SST SST25VF032B SPI flash chip (RDID, AAI write)
> Filling fake flash chip with 0xff, size 4194304
> Found persistent image dummy_simulator.rom, size 4194304 matches.
> Reading dummy_simulator.rom
> The following protocols are supported: Parallel, LPC, FWH, SPI.
> [...]
> Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf,
> id2 0x254a
> Chip status register is 00
> Chip status register: Block Protect Write Disable (BPL) is not set
> Chip status register: Auto Address Increment Programming (AAI) is not set
> Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
> Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
> Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
> Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> Found SST flash chip "SST25VF032B" (4096 kB, SPI) on dummy.
> [...]
> Found SST flash chip "SST25VF032B" (4096 kB, SPI).
> Reading old flash chip contents... done.
> Erasing and writing flash chip... Trying erase function 0...
> 0x000000-0x000fff:ERefusing blacklisted SPI command 0x20
> Invalid command sent to flash chip!
> spi_block_erase_20 failed during command execution at address 0x0
> Reading current flash chip contents... done. Looking for another erase
> function.
> Trying erase function 1... 0x000000-0x007fff:EIgnoring ignorelisted SPI
> command 0x52
> ERASE FAILED at 0x00000000! Expected=0xff, Read=0x00, failed byte count
> from 0x00000000-0x00007fff: 0x8000
> ERASE FAILED!
> Reading current flash chip contents... done. Looking for another erase
> function.
> Trying erase function 2... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:EW,
> 0x020000-0x02ffff:EW, 0x030000-0x03ffff:EW, 0x040000-0x04ffff:EW,
> 0x050000-0x05ffff:EW, 0x060000-0x06ffff:EW, 0x070000-0x07ffff:EW,
> 0x080000-0x08ffff:EW, 0x090000-0x09ffff:EW, 0x0a0000-0x0affff:EW,
> 0x0b0000-0x0bffff:EW, 0x0c0000-0x0cffff:EW, 0x0d0000-0x0dffff:EW,
> 0x0e0000-0x0effff:EW, 0x0f0000-0x0fffff:EW, 0x100000-0x10ffff:EW,
> 0x110000-0x11ffff:EW, 0x120000-0x12ffff:EW, 0x130000-0x13ffff:EW,
> 0x140000-0x14ffff:EW, 0x150000-0x15ffff:EW, 0x160000-0x16ffff:EW,
> 0x170000-0x17ffff:EW, 0x180000-0x18ffff:EW, 0x190000-0x19ffff:EW,
> 0x1a0000-0x1affff:EW, 0x1b0000-0x1bffff:EW, 0x1c0000-0x1cffff:EW,
> 0x1d0000-0x1dffff:EW, 0x1e0000-0x1effff:EW, 0x1f0000-0x1fffff:EW,
> 0x200000-0x20ffff:EW, 0x210000-0x21ffff:EW, 0x220000-0x22ffff:EW,
> 0x230000-0x23ffff:EW, 0x240000-0x24ffff:EW, 0x250000-0x25ffff:EW,
> 0x260000-0x26ffff:EW, 0x270000-0x27ffff:EW, 0x280000-0x28ffff:EW,
> 0x290000-0x29ffff:EW, 0x2a0000-0x2affff:EW, 0x2b0000-0x2bffff:EW,
> 0x2c0000-0x2cffff:EW, 0x2d0000-0x2dffff:EW, 0x2e0000-0x2effff:EW,
> 0x2f0000-0x2fffff:EW, 0x300000-0x30ffff:EW, 0x310000-0x31ffff:EW,
> 0x320000-0x32ffff:EW, 0x330000-0x33ffff:EW, 0x340000-0x34ffff:EW,
> 0x350000-0x35ffff:EW, 0x360000-0x36ffff:EW, 0x370000-0x37ffff:EW,
> 0x380000-0x38ffff:EW, 0x390000-0x39ffff:EW, 0x3a0000-0x3affff:EW,
> 0x3b0000-0x3bffff:EW, 0x3c0000-0x3cffff:EW, 0x3d0000-0x3dffff:EW,
> 0x3e0000-0x3effff:EW, 0x3f0000-0x3fffff:EW
> Erase/write done.
> Verifying flash... VERIFIED.
> Writing dummy_simulator.rom
>
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
>
> An earlier version of this patch (wthout ignorelisting) got the
> following response:
>
> Am 04.02.2011 01:42 schrieb David Hendricks:
> > Overall looks good to me. I tested it out by blacklisting read, rdid,
> write,
> > wren, and the chip erase commands in various combinations and it seems to
> > work reasonably well. SPI opcode parsing seemed to work fine as well.
> >
> > For others interested in giving this a try, here is another example of
> > syntax (courtesy of Carl-Danial on IRC) for us laymen: flashrom -p
> > dummy:emulate=SST25VF032B,image=dummy_simulator.rom,spi_blacklist=0x03
> >
> > I don't know man page formatting well, so I didn't review that part. As
> far
> > as the code, I say:
> > Acked-by: David Hendricks <dhendrix at google.com>
>
> David: Given that your review was based on a pretty different version of
> the code, I'm not including your ack unless you're OK with the new code
> as well.
>
> Index: flashrom-emulate_spi_flashchip_command_blacklist/dummyflasher.c
> ===================================================================
> --- flashrom-emulate_spi_flashchip_command_blacklist/dummyflasher.c
> (Revision 1488)
> +++ flashrom-emulate_spi_flashchip_command_blacklist/dummyflasher.c
> (Arbeitskopie)
> @@ -19,6 +19,8 @@
>
>  #include <string.h>
>  #include <stdlib.h>
> +#include <stdio.h>
> +#include <ctype.h>
>  #include "flash.h"
>  #include "chipdrivers.h"
>  #include "programmer.h"
> @@ -55,6 +57,10 @@
>  static unsigned int emu_jedec_be_d8_size = 0;
>  static unsigned int emu_jedec_ce_60_size = 0;
>  static unsigned int emu_jedec_ce_c7_size = 0;
> +unsigned char spi_blacklist[256];
> +unsigned char spi_ignorelist[256];
> +int spi_blacklist_size = 0;
> +int spi_ignorelist_size = 0;
>  #endif
>  #endif
>
> @@ -126,6 +132,7 @@
>  {
>        char *bustext = NULL;
>        char *tmp = NULL;
> +       int i;
>  #if EMULATE_CHIP
>        struct stat image_stat;
>  #endif
> @@ -170,6 +177,68 @@
>                 }
>        }
>
> +       tmp = extract_programmer_param("spi_blacklist");
> +       if (tmp) {
> +               i = strlen(tmp);
> +               if (!strncmp(tmp, "0x", 2)) {
> +                       i -= 2;
> +                       memmove(tmp, tmp + 2, i + 1);
> +               }
> +               if ((i > 512) || (i % 2)) {
> +                       msg_perr("Invalid SPI command blacklist length\n");
> +                       free(tmp);
> +                       return 1;
> +               }
> +               spi_blacklist_size = i / 2;
> +               for (i = 0; i < spi_blacklist_size * 2; i++) {
> +                       if (!isxdigit((unsigned char)tmp[i])) {
> +                               msg_perr("Invalid char \"%c\" in SPI
> command "
> +                                        "blacklist\n", tmp[i]);
> +                               free(tmp);
> +                               return 1;
> +                       }
> +               }
> +               for (i = 0; i < spi_blacklist_size; i++) {
> +                       sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);
> +               }
> +               msg_pdbg("SPI blacklist is ");
> +               for (i = 0; i < spi_blacklist_size; i++)
> +                       msg_pdbg("%02x ", spi_blacklist[i]);
> +               msg_pdbg(", size %i\n", spi_blacklist_size);
> +       }
> +       free(tmp);
> +
> +       tmp = extract_programmer_param("spi_ignorelist");
> +       if (tmp) {
> +               i = strlen(tmp);
> +               if (!strncmp(tmp, "0x", 2)) {
> +                       i -= 2;
> +                       memmove(tmp, tmp + 2, i + 1);
> +               }
> +               if ((i > 512) || (i % 2)) {
> +                       msg_perr("Invalid SPI command ignorelist
> length\n");
> +                       free(tmp);
> +                       return 1;
> +               }
> +               spi_ignorelist_size = i / 2;
> +               for (i = 0; i < spi_ignorelist_size * 2; i++) {
> +                       if (!isxdigit((unsigned char)tmp[i])) {
> +                               msg_perr("Invalid char \"%c\" in SPI
> command "
> +                                        "ignorelist\n", tmp[i]);
> +                               free(tmp);
> +                               return 1;
> +                       }
> +               }
> +               for (i = 0; i < spi_ignorelist_size; i++) {
> +                       sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);
> +               }
> +               msg_pdbg("SPI ignorelist is ");
> +               for (i = 0; i < spi_ignorelist_size; i++)
> +                       msg_pdbg("%02x ", spi_ignorelist[i]);
> +               msg_pdbg(", size %i\n", spi_ignorelist_size);
> +       }
> +       free(tmp);
> +
>  #if EMULATE_CHIP
>        tmp = extract_programmer_param("emulate");
>        if (!tmp) {
> @@ -348,7 +417,7 @@
>                                      const unsigned char *writearr,
>                                     unsigned char *readarr)
>  {
> -       unsigned int offs;
> +       unsigned int offs, i;
>        static int unsigned aai_offs;
>         static int aai_active = 0;
>
> @@ -356,7 +425,24 @@
>                msg_perr("No command sent to the chip!\n");
>                return 1;
>        }
> -       /* TODO: Implement command blacklists here. */
> +       /* spi_blacklist has precedence before spi_ignorelist. */
> +       for (i = 0; i < spi_blacklist_size; i++) {
> +               if (writearr[0] == spi_blacklist[i]) {
> +                       msg_pdbg("Refusing blacklisted SPI command
> 0x%02x\n",
> +                                spi_blacklist[i]);
> +                       return SPI_INVALID_OPCODE;
> +               }
> +       }
> +       for (i = 0; i < spi_ignorelist_size; i++) {
> +               if (writearr[0] == spi_ignorelist[i]) {
> +                       msg_cdbg("Ignoring ignorelisted SPI command
> 0x%02x\n",
> +                                spi_ignorelist[i]);
> +                       /* Return success because the command does not
> fail,
> +                        * it is simply ignored.
> +                        */
> +                       return 0;
> +               }
> +       }
>        switch (writearr[0]) {
>        case JEDEC_RES:
>                if (emu_chip != EMULATE_ST_M25P10_RES)
> @@ -563,7 +649,7 @@
>        case EMULATE_SST_SST25VF032B:
>                if (emulate_spi_chip_response(writecnt, readcnt, writearr,
>                                              readarr)) {
> -                       msg_perr("Invalid command sent to flash chip!\n");
> +                       msg_pdbg("Invalid command sent to flash chip!\n");
>                        return 1;
>                }
>                break;
> Index: flashrom-emulate_spi_flashchip_command_blacklist/flashrom.8
> ===================================================================
> --- flashrom-emulate_spi_flashchip_command_blacklist/flashrom.8 (Revision
> 1488)
> +++ flashrom-emulate_spi_flashchip_command_blacklist/flashrom.8
> (Arbeitskopie)
> @@ -421,6 +421,28 @@
>  Example:
>  .sp
>  .B "  flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
> +.sp
> +To simulate a programmer which refuses to send certain SPI commands to the
> +flash chip, you can specify a blacklist of SPI commands with the
> +.sp
> +.B "  flashrom -p dummy:spi_blacklist=commandlist"
> +.sp
> +syntax where commandlist is a list of two-digit hexadecimal
> representations of
> +SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the
> SPI
> +controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
> +commandlist may be up to 512 characters (256 commands) long.
> +Implementation note: flashrom will detect an error during command
> execution.
> +.sp
> +To simulate a flash chip which ignores (doesn't support) certain SPI
> commands,
> +you can specify an ignorelist of SPI commands with the
> +.sp
> +.B "  flashrom -p dummy:spi_ignorelist=commandlist"
> +.sp
> +syntax where commandlist is a list of two-digit hexadecimal
> representations of
> +SPI commands. If commandlist is e.g. 0302, the emulated flash chip will
> ignore
> +command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to
> 512
> +characters (256 commands) long.
> +Implementation note: flashrom won't detect an error during command
> execution.
>  .TP
>  .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , "
> nicintel\
>  " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\
>
>
> --
> http://www.hailfinger.org/
>
>
>
Looks good to me.

Acked-by: David Hendricks <dhendrix at google.com>



-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120207/2cc47022/attachment-0001.html>

From vince06fr at gmail.com  Wed Feb  8 20:47:13 2012
From: vince06fr at gmail.com (Vince S)
Date: Wed, 8 Feb 2012 20:47:13 +0100
Subject: [flashrom] FAILED : mcp61sm -am
Message-ID: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>

can i restore my bios from my linux session or do i have to reboot (i have
another bios with i can reboot) to flash it from a freedos live usb?
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120208/083864fd/attachment.html>

From stefan.tauner at student.tuwien.ac.at  Wed Feb  8 21:23:23 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 8 Feb 2012 21:23:23 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
Message-ID: <201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>

On Wed, 8 Feb 2012 20:47:13 +0100
Vince S <vince06fr at gmail.com> wrote:

> can i restore my bios from my linux session or do i have to reboot (i have
> another bios with i can reboot) to flash it from a freedos live usb?

*if* you are talking about the acer you reported last month and *if* i
understood your question correctly, *then* you should be able to write
the flash chip with flashrom in your linux session. your previous log
confirmed at least that erasing works. writing will almost always work
if erase works. if you read out the good contents with -r, install the
bad chip, write the previously read good content with -w, the two chips
should be identical. please ask further questions if something is not
clear.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From roysjosh at gmail.com  Wed Feb  8 20:55:54 2012
From: roysjosh at gmail.com (Joshua Roys)
Date: Wed, 08 Feb 2012 14:55:54 -0500
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
Message-ID: <4F32D34A.6030204@gmail.com>

On 02/08/2012 02:47 PM, Vince S wrote:
> can i restore my bios from my linux session or do i have to reboot (i
> have another bios with i can reboot) to flash it from a freedos live usb?
>
>

Hello,

Please do NOT reboot.  Can you provide the log of when flashrom failed? 
  Also, if you made a backup, you can see if your BIOS is still intact 
by running `flashrom -v /path/to/backup.foo`

Thanks,

Josh



From stefan.tauner at student.tuwien.ac.at  Wed Feb  8 21:45:51 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 8 Feb 2012 21:45:51 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <4F31BF00.6010508@gmx.net>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F287346.4000909@gmx.net>
	<201202072222.q17MMmZl018680@mail2.student.tuwien.ac.at>
	<4F31BF00.6010508@gmx.net>
Message-ID: <201202082045.q18KjGsh015655@mail2.student.tuwien.ac.at>

On Wed, 08 Feb 2012 01:17:04 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 07.02.2012 23:23 schrieb Stefan Tauner:
> > On Wed, 01 Feb 2012 00:03:34 +0100
> > Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
> >
> >> Am 31.01.2012 06:59 schrieb Stefan Tauner:
> >>> [?]
> >>> todo:
> >>>  - handle programmers which have a problem with the dummy bytes needed
> >> AMD SB[678]x0 SPI has a way to specify sending one dummy byte between
> >> write and read, IIRC it is called DropOneClkOnRead or somthing like
> >> that. Quite a few other SPI masters have the one-dummy-byte
> >> functionality as well. This needs to be implemented in a generic way (I
> >> have a totally bitrotted patch for it), but it should not hold back this
> >> patch.
> > what about simulating the dummy byte by reading one additional byte in
> > the beginning instead of writing one? due to SPI's underlying principle
> > of shifting bits in and out of master and slave simultaneously this
> > should give us the same effect, but eases working around programmer
> > limitations.
> 
> Right. The direction is a don't-care thing for dummy bytes. Maybe just
> add a FIXME comment that we should handle dummy bytes explicitly later.

		/* FIXME: the following dummy byte explodes on some programmers.
		 * One possible workaround would be to read the dummy byte
		 * instead and discard its value.
		 */
will post the whole reworked patch later, so it is probably better if
you would comment to that then.

> >>> [?]
> >>> +typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
> >> I believe that typedef to be pretty unreadable, but I see that avoiding
> >> the typedef would probably be even worse.
> > yes :) see http://patchwork.coreboot.org/patch/3492/ ... *shiver*
> 
> Now that you point me to the alternative, I have to say that I think the
> typedef is less readable (at least the typedef definition itself).

a few lines above that line is the definition of struct flash(ctx)
which defines the different function pointers almost identically...
this stuff is just not made to be read i think :) if you compare the
two versions of get_erasefn_from_opcode you will notice the
obvious benefit:

int (*get_erasefn_from_opcode(uint8_t opcode)) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
vs.
erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)

yes, this is really equivalent and the first one is not intentionally
obfuscated. :)

> >>> [?]
> >>> +		.read		= spi_chip_read,
> >>> +		.page_size	= 256, /* ? */
> >> Argh, page_size comes to bite us again. Did I already send my "kill most
> >> uses of page_size" patch?
> > afaics no
> 
> Yes, it's still in beta. But I can send it anyway so people can review
> it mercilessly.

cant hurt to post it... we are not that ruthless usually ;)

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Wed Feb  8 22:37:08 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 8 Feb 2012 22:37:08 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <4F31C1A4.1070402@gmx.net>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F2B34D4.7000501@gmx.net>
	<201202072338.q17NcPj4003038@mail2.student.tuwien.ac.at>
	<4F31C1A4.1070402@gmx.net>
Message-ID: <201202082136.q18LaX47029662@mail2.student.tuwien.ac.at>

On Wed, 08 Feb 2012 01:28:20 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 08.02.2012 00:38 schrieb Stefan Tauner:
> > On Fri, 03 Feb 2012 02:13:56 +0100
> > Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
> >
> >> Am 31.01.2012 06:59 schrieb Stefan Tauner:
> >>> +		/* If there is a valid 4k value in the last double words,
> >>> +		 * we want to override the value from double word 1, hence force
> >>> +		 * skipping its processing: */
> >>> +		if (bsize == 4 * 1024)
> >>> +			opcode_4k = 0xFF;
> >> Not really. What happens if there are multiple valid opcodes for 4k
> >> erase? Such chips do exist IIRC.
> > hm... the standard with its wording "the 4k opcode" and my previous
> > experience led to this...
> >
> >> What about
> >> if (bsize == 4 * 1024) {
> >>   if (tmp8 == opcode_4k)
> >>     opcode_4k == 0xFF;
> >>   else
> >>     msg_cdbg("More than one 4kB eraser opcode found: 0x%02x and
> >> 0x%02x.", tmp8, opcode_4k);
> >> }
> > if multiple (different) 4k eraser opcodes are ok why should we log it
> > explicitly then?
> 
> Because it contradicts your reading of the standard and your experience?

contradicting my previous (and now falsified) reading and my apparently
lacking experience... ;)

> 
> > hm. and it would probably be better to enhance sfdp_add_uniform_eraser
> > to check for duplicates before adding a new one, and maybe even
> > introducing a distinct return value for this. if the sfdp table
> > specifies duplicates it would be justified to abort imo.
> > it would of course also make the 4k opcode handling of the first double
> > word easier because we could just add it immediately.
> 
> It would just move the 4k special case handling to a different function,
> though.

there were two reasons why i implemented the 4k opcode of dw#1 in such
a manner:
1.: because the data structure is different, hence it needs to be
different to the loop for dw#8+.
2.: because i never thought of two *different* 4k opcodes to be both
valid and possibly useful.

1. can not be circumvented entirely of course, but checking for
duplicate erasers would limit the speciality to the different SFDP
address.
2.: was just wrong as you convinced me...

so... i no longer see a reason to handle it that differently. how did
we end up on reversed sides in this discussion? :)

> >>> +static int sfdp_fetch_pt(struct flashctx *flash, uint32_t addr, uint8_t *buf, uint16_t len)
> >>> +{
> >>> +	uint16_t i;
> >>> +	if (spi_sfdp(flash, addr, buf, len)) {
> >>> +		msg_cerr("Receiving SFDP parameter table failed.\n");
> >>> +		return 1;
> >>> +	}
> >>> +	msg_cspew("  Parameter table contents:\n");
> >>> +	for(i = 0; i < len; i++) {
> >>> +		if ((i % 8) == 0) {
> >>> +			msg_cspew("    0x%03x: ", i);
> >>> +		}
> >>> +		msg_cspew(" 0x%02x", buf[i]);
> >>> +		if ((i % 8) == 7) {
> >>> +			msg_cspew("\n");
> >>> +			continue;
> >>> +		}
> >>> +		if ((i % 8) == 3) {
> >>> +			msg_cspew(" ");
> >>> +			continue;
> >>> +		}
> >>> +	}
> >>> +	msg_cspew("\n");
> >> Do we have some generic hexdump() function? I agree that dumping the
> >> parameter table contents may make sense, but open-coding your own
> >> hexdump is probably not the best idea. Do we want this hexdump
> >> functionality at all, and if yes, should it be factored out?
> > not that i know of... OTOH it is just a few lines. if we generalize the
> > function the way i imagine it right now, every call would also need a
> > few lines due to the number of parameter to customize the output ;)
> 
> Point taken. But please don't prefix 0x for individual values. That is
> really superfluous.

gone.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From vince06fr at gmail.com  Thu Feb  9 00:24:49 2012
From: vince06fr at gmail.com (Vince S)
Date: Thu, 9 Feb 2012 00:24:49 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
Message-ID: <CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>

Yes i am talking about the acer i reported last month..
so if i understand,  i must before flashing make a backup with the
good chip installed with the command :
[sudo flashrom -r fichier.ROM]

"The filename and his extension is it important? and is it sure there
are no risk for the good chip?"

and after i had to install the bad chip and flash it with the command

[sudo flashrom -w fichier.ROM]

But i had try to flash the bad chip with the bios that i have saved
last month and it make error to write(the command i try was [sudo
flashrom -w 61AO615.BIN],
 Erase the chip with the command [sudo flashrom -E] is ok
This night i'm at work and i have no access at my pc so i send you the
log of my attempt tomorow

Thanks for your work and your answers and  excuse me for my english (i'm french)
Good night

2012/2/8, Stefan Tauner <stefan.tauner at student.tuwien.ac.at>:
> On Wed, 8 Feb 2012 20:47:13 +0100
> Vince S <vince06fr at gmail.com> wrote:
>
>> can i restore my bios from my linux session or do i have to reboot (i have
>> another bios with i can reboot) to flash it from a freedos live usb?
>
> *if* you are talking about the acer you reported last month and *if* i
> understood your question correctly, *then* you should be able to write
> the flash chip with flashrom in your linux session. your previous log
> confirmed at least that erasing works. writing will almost always work
> if erase works. if you read out the good contents with -r, install the
> bad chip, write the previously read good content with -w, the two chips
> should be identical. please ask further questions if something is not
> clear.
>
> --
> Kind regards/Mit freundlichen Gr??en, Stefan Tauner
>


From svn at flashrom.org  Thu Feb  9 00:28:54 2012
From: svn at flashrom.org (repository service)
Date: Thu, 09 Feb 2012 00:28:54 +0100
Subject: [flashrom] [commit] r1490 - trunk
Message-ID: <E1RvGwY-000079-Sy@ra.coresystems.de>

Author: hailfinger
Date: Thu Feb  9 00:28:54 2012
New Revision: 1490
URL: http://flashrom.org/trac/flashrom/changeset/1490

Log:
SPI command black-/ignorelisting for the flash chip emulator in the dummy programmer

Usage:
flashrom -p dummy:spi_blacklist=commandlist
flashrom -p dummy:spi_ignorelist=commandlist

If commandlist is 0302, flashrom will refuse (blacklist) or ignore
(ignorelist) command 0x03 (READ) and command 0x02 (WRITE). The
commandlist can be up to 512 bytes (256 commands) long.
Specifying flash chip emulation is a good idea to get useful results.

Very useful for testing corner cases if you don't own a locked down
Intel chipset and want to simulate such a thing.

Example usage:
dd if=/dev/zeros bs=1024k count=4 of=dummy_simulator.rom
dd if=/dev/urandom bs=1024k count=4 of=randomimage.rom
flashrom -p dummy:emulate=SST25VF032B,image=dummy_simulator.rom,\
spi_blacklist=20,spi_ignorelist=52 -w randomimage.rom -V

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: David Hendricks <dhendrix at google.com>

Modified:
   trunk/dummyflasher.c
   trunk/flashrom.8

Modified: trunk/dummyflasher.c
==============================================================================
--- trunk/dummyflasher.c	Tue Feb  7 22:29:48 2012	(r1489)
+++ trunk/dummyflasher.c	Thu Feb  9 00:28:54 2012	(r1490)
@@ -19,6 +19,8 @@
 
 #include <string.h>
 #include <stdlib.h>
+#include <stdio.h>
+#include <ctype.h>
 #include "flash.h"
 #include "chipdrivers.h"
 #include "programmer.h"
@@ -55,6 +57,10 @@
 static unsigned int emu_jedec_be_d8_size = 0;
 static unsigned int emu_jedec_ce_60_size = 0;
 static unsigned int emu_jedec_ce_c7_size = 0;
+unsigned char spi_blacklist[256];
+unsigned char spi_ignorelist[256];
+int spi_blacklist_size = 0;
+int spi_ignorelist_size = 0;
 #endif
 #endif
 
@@ -126,6 +132,7 @@
 {
 	char *bustext = NULL;
 	char *tmp = NULL;
+	int i;
 #if EMULATE_CHIP
 	struct stat image_stat;
 #endif
@@ -170,6 +177,68 @@
 		}
 	}
 
+	tmp = extract_programmer_param("spi_blacklist");
+	if (tmp) {
+		i = strlen(tmp);
+		if (!strncmp(tmp, "0x", 2)) {
+			i -= 2;
+			memmove(tmp, tmp + 2, i + 1);
+		}
+		if ((i > 512) || (i % 2)) {
+			msg_perr("Invalid SPI command blacklist length\n");
+			free(tmp);
+			return 1;
+		}
+		spi_blacklist_size = i / 2;
+		for (i = 0; i < spi_blacklist_size * 2; i++) {
+			if (!isxdigit((unsigned char)tmp[i])) {
+				msg_perr("Invalid char \"%c\" in SPI command "
+					 "blacklist\n", tmp[i]);
+				free(tmp);
+				return 1;
+			}
+		}
+		for (i = 0; i < spi_blacklist_size; i++) {
+			sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);
+		}
+		msg_pdbg("SPI blacklist is ");
+		for (i = 0; i < spi_blacklist_size; i++)
+			msg_pdbg("%02x ", spi_blacklist[i]);
+		msg_pdbg(", size %i\n", spi_blacklist_size);
+	}
+	free(tmp);
+
+	tmp = extract_programmer_param("spi_ignorelist");
+	if (tmp) {
+		i = strlen(tmp);
+		if (!strncmp(tmp, "0x", 2)) {
+			i -= 2;
+			memmove(tmp, tmp + 2, i + 1);
+		}
+		if ((i > 512) || (i % 2)) {
+			msg_perr("Invalid SPI command ignorelist length\n");
+			free(tmp);
+			return 1;
+		}
+		spi_ignorelist_size = i / 2;
+		for (i = 0; i < spi_ignorelist_size * 2; i++) {
+			if (!isxdigit((unsigned char)tmp[i])) {
+				msg_perr("Invalid char \"%c\" in SPI command "
+					 "ignorelist\n", tmp[i]);
+				free(tmp);
+				return 1;
+			}
+		}
+		for (i = 0; i < spi_ignorelist_size; i++) {
+			sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);
+		}
+		msg_pdbg("SPI ignorelist is ");
+		for (i = 0; i < spi_ignorelist_size; i++)
+			msg_pdbg("%02x ", spi_ignorelist[i]);
+		msg_pdbg(", size %i\n", spi_ignorelist_size);
+	}
+	free(tmp);
+
 #if EMULATE_CHIP
 	tmp = extract_programmer_param("emulate");
 	if (!tmp) {
@@ -348,7 +417,7 @@
 				     const unsigned char *writearr,
 				     unsigned char *readarr)
 {
-	unsigned int offs;
+	unsigned int offs, i;
 	static int unsigned aai_offs;
 	static int aai_active = 0;
 
@@ -356,7 +425,24 @@
 		msg_perr("No command sent to the chip!\n");
 		return 1;
 	}
-	/* TODO: Implement command blacklists here. */
+	/* spi_blacklist has precedence before spi_ignorelist. */
+	for (i = 0; i < spi_blacklist_size; i++) {
+		if (writearr[0] == spi_blacklist[i]) {
+			msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",
+				 spi_blacklist[i]);
+			return SPI_INVALID_OPCODE;
+		}
+	}
+	for (i = 0; i < spi_ignorelist_size; i++) {
+		if (writearr[0] == spi_ignorelist[i]) {
+			msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
+				 spi_ignorelist[i]);
+			/* Return success because the command does not fail,
+			 * it is simply ignored.
+			 */
+			return 0;
+		}
+	}
 	switch (writearr[0]) {
 	case JEDEC_RES:
 		if (emu_chip != EMULATE_ST_M25P10_RES)
@@ -563,7 +649,7 @@
 	case EMULATE_SST_SST25VF032B:
 		if (emulate_spi_chip_response(writecnt, readcnt, writearr,
 					      readarr)) {
-			msg_perr("Invalid command sent to flash chip!\n");
+			msg_pdbg("Invalid command sent to flash chip!\n");
 			return 1;
 		}
 		break;

Modified: trunk/flashrom.8
==============================================================================
--- trunk/flashrom.8	Tue Feb  7 22:29:48 2012	(r1489)
+++ trunk/flashrom.8	Thu Feb  9 00:28:54 2012	(r1490)
@@ -421,6 +421,28 @@
 Example:
 .sp
 .B "  flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
+.sp
+To simulate a programmer which refuses to send certain SPI commands to the
+flash chip, you can specify a blacklist of SPI commands with the
+.sp
+.B "  flashrom -p dummy:spi_blacklist=commandlist"
+.sp
+syntax where commandlist is a list of two-digit hexadecimal representations of
+SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the SPI
+controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
+commandlist may be up to 512 characters (256 commands) long.
+Implementation note: flashrom will detect an error during command execution.
+.sp
+To simulate a flash chip which ignores (doesn't support) certain SPI commands,
+you can specify an ignorelist of SPI commands with the
+.sp
+.B "  flashrom -p dummy:spi_ignorelist=commandlist"
+.sp
+syntax where commandlist is a list of two-digit hexadecimal representations of
+SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
+command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to 512
+characters (256 commands) long.
+Implementation note: flashrom won't detect an error during command execution.
 .TP
 .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
 " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\


From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb  9 00:32:58 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 09 Feb 2012 00:32:58 +0100
Subject: [flashrom] [PATCH] dummy programmer: blacklist SPI commands
In-Reply-To: <CAKOoyUej8fsxG8kbOE+_iE8ndG8gK46w5GA5USnJN2Eik1EA8Q@mail.gmail.com>
References: <4CD24D4B.5020108@gmx.net> <4D3625F7.2050003@gmx.net>
	<20110121013628.GI2484@debshine>
	<AANLkTimNskrC0O1NxudXPWkvXw0nMEdi8Sv_KJPyHO-A@mail.gmail.com>
	<4F309090.9010704@gmx.net>
	<CAKOoyUej8fsxG8kbOE+_iE8ndG8gK46w5GA5USnJN2Eik1EA8Q@mail.gmail.com>
Message-ID: <4F33062A.5050109@gmx.net>

Am 08.02.2012 01:49 schrieb David Hendricks:
> Acked-by: David Hendricks <dhendrix at google.com>

Thanks, committed in r1490.

Do we want to add a selftest script or "make selftest" target in the
Makefile which compares known good output of a complicated write (maybe
even including layout) to a reference output shipped with flashrom?
That might be useful for distributors and/or as pre-checkin test of
invasive changes.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Thu Feb  9 01:06:52 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 9 Feb 2012 01:06:52 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <4F2B34D4.7000501@gmx.net>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F2B34D4.7000501@gmx.net>
Message-ID: <201202090006.q1906G4I030920@mail2.student.tuwien.ac.at>

On Fri, 03 Feb 2012 02:13:56 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> > +	nph = buf[2];
> > +	msg_cdbg2("SFDP number of parameter headers (NPH) = %d (+ 1 mandatory)"
> > +		  "\n", nph);
> > +
> > +	/* Fetch all parameter headers, even if we don't use them all (yet). */
> > +	hbuf = malloc(sizeof(struct sfdp_tbl_hdr) * (nph + 1));
> > +	hdrs = malloc((nph + 1) * 8);  
> 
> Why is 8 a magic unexplained constant for hdrs allocation, but sizeof
> struct sfdp_tbl_hdr (which is 8 as well) is used for hbuf allocation?
> Did you mix up the two by accident?

ooops. actually it should be the other way around.

rationale: we know exactly how big hbuf should be. it is filled by
spi_sfdp_read and read by index. actually we would only need 7 bytes
because the last byte of each header is unused, but this would
complicate the call(s) to spi_sfdp_read.

hdrs OTOH is accessed by the struct members only and we dont know the
size of the struct beforehand.

> And why is (nph+1) the first factor
> in the second malloc and the second factor in the first malloc?

just to test the reviewer of course.

> > +		tbuf = malloc(len);
> > +		if (tbuf == NULL) {
> > +			msg_gerr("Out of memory!\n");  
> 
> insert the following code:
> ret = 0;
^ this is not needed because ret is only changed in the loop later.
i have now refined the whole error handling inside the loop anyway, see
end of mail.

> goto cleanup_hdrs;

> 
> > +		exit(1); /* FIXME: shutdown gracefully */  
> 
> and kill the exit(1). It would be nice to change the probe interface to
> return 0 on success... that would allow us to return detailed errors.
> OTOH, we might want to use the probe interface to return match accuracy,
> in which case 0 would be nomatch. Comments appreciated.

the only thing i can think about at the moment regarding this: this
thread is already complicated enough :)

we could do both... returning a struct is always an option, if it is
really needed.
is the accuracy really needed? the only use of it would be to order the
matches for the user, or define limits of "accuracy amount" where we
decide on our own...? i think we have more important problems to solve,
but if you want to discuss this further, please start another RFC
thread with more details.

> > +		}
> > +		if (sfdp_fetch_pt(flash, tmp32, tbuf, len)){
> > +			msg_cerr("Fetching SFDP parameter table %d failed.\n",
> > +				 i);
> > +			free(tbuf);
> > +			break;
> > +		}
> > +		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
> > +			if (hdrs[i].id != 0)
> > +				msg_cdbg("ID of the mandatory JEDEC SFDP "  
> 
> msg_cerr, then cleanup and return 0. Maybe even ask user to report?

the question is if this would ever safe anyone from bricking something.
if not, it is much better to ignore it due to how well *cough* vendors
have implemented the standard so far (david's winbond chip works
flawlessly but has the ID set to 0xe5 - does that ring a bell btw?).
we only have the two samples from winbond and macronix, but it is
quite evident that vendors rather understood "first table is the jedec
flash parameter table" than the scheme of parameter table IDs.
At this point i think it might even be a good idea to introduce a
"yes_i_have_verified_the_SFDP_parameters_to_be_reasonable" option. No
ID check (especially not against 0) will make the whole thing much
safer imo.

> > +
> > +			if (len != 9 * 4 && len != 4 * 4) {
> > +				msg_cdbg("Length of the mandatory JEDEC SFDP "  
> 
> msg_cerr, then cleanup and return 0. Maybe even ask user to report?

see end of mail

> > +					 "parameter table is %d B instead of "
> > +					 "36 B (i.e. 9 double words) as "
> > +					 "demanded by JESD216, skipping "
> > +					 "parsing.\n", len);
> > +			} else if (sfdp_fill_flash(flash, tbuf, len) == 0)
> > +				ret = 1;

the main idea of the loop is to iterate over the various sfdp parameter
headers and contents. while doing that we want to extract and print any
information we can derive from it and eventually use it to fill a
struct flash. the error handling now guarantees that we will look at
all tables except in the case of OOM. since the tables are all
independent in theory we should not abort the probing by enforcing ret
= 0 if other tables are bogus or we cant retrieve them. this also
allows us to dump as much information as possible without adding other
code (i have done that previously to debug the macronix chips and it was
awful.

attached patch is untested. i will do that tomorrow, but wanted to give
you the chance to reply early.
one thing i remember to be missing is the 4k handling. apart from that
and the loop error handling i hope we are quite finished. \o/
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-Add-support-for-SFDP-JESD216.patch
Type: text/x-patch
Size: 19509 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/5a5cf023/attachment.patch>

From oneingray at gmail.com  Thu Feb  9 06:14:30 2012
From: oneingray at gmail.com (Ivan Shmakov)
Date: Thu, 09 Feb 2012 12:14:30 +0700
Subject: [flashrom] flashrom(8): HTML preview using ManPageRenderer failed
Message-ID: <86sjikbnbd.fsf@gray.siamics.net>

	The flashrom(8) revision currently in trunk fails HTML
	conversion:

--cut: http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8 --
    Warning: HTML preview using ManPageRenderer failed (Exception:
    Running (/usr/bin/groff -Thtml -P -r -P -l -mandoc ) failed: 0,
    <standard input>:566: warning [p 1, 86.8i]: cannot adjust line .)
--cut: http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8 --

	It seems that the regression is due to r1437 [1], as r1412 [2]
	renders without an error.

[1] http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8?rev=1437
[2] http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8?rev=1412

-- 
FSF associate member #7257



From vince06fr at gmail.com  Thu Feb  9 08:25:51 2012
From: vince06fr at gmail.com (Vince S)
Date: Thu, 9 Feb 2012 08:25:51 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
Message-ID: <CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>

Hi so the output of my attempt to flash is

sudo flashrom -V -w '/home/vince/T?l?chargements/BIOS_R01-C0/61AO615.BIN'

flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (x86_64), built with libpci
3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 736M loops per
second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1007 us, 10000 myus
= 10003 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "Acer"
DMI string system-product-name: "Aspire E380"
DMI string system-version: "R01-A2"
DMI string baseboard-manufacturer: "Acer"
DMI string baseboard-product-name: "EM61SM/EM61PM         "
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8726 on port 0x2e
Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
Flash bus type is LPC
Found SMBus device 10de:03eb at 00:01:1
MCP SPI BAR is at 0xfec80000
Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI
enabled.
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for
your
chipset. Thanks.
OK.
This chipset supports the following protocols: LPC.
Super I/O ID 0x8726 is not on the list of flash capable controllers.
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Found SST flash chip "SST49LF040B" (512 kB, LPC) at physical address
0xfff80000.
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
===
This flash part has status UNTESTED for operations: WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above
operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0...
0x000000-0x000fff:W, 0x001000-0x001fff:S, 0x002000-0x002fff:S,
0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S,
0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S,
0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S,
0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S,
0x00f000-0x00ffff:S, 0x010000-0x010fff:W, 0x011000-0x011fff:W,
0x012000-0x012fff:W, 0x013000-0x013fff:W, 0x014000-0x014fff:W,
0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:W,
0x018000-0x018fff:W, 0x019000-0x019fff:W, 0x01a000-0x01afff:W,
0x01b000-0x01bfff:W, 0x01c000-0x01cfff:W, 0x01d000-0x01dfff:W,
0x01e000-0x01efff:W, 0x01f000-0x01ffff:W, 0x020000-0x020fff:W,
0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W,
0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W,
0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W,
0x02a000-0x02afff:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W,
0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W,
0x030000-0x030fff:W, 0x031000-0x031fff:W, 0x032000-0x032fff:W,
0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W,
0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W,
0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W,
0x03c000-0x03cfff:W, 0x03d000-0x03dfff:W, 0x03e000-0x03efff:W,
0x03f000-0x03ffff:W, 0x040000-0x040fff:W, 0x041000-0x041fff:W,
0x042000-0x042fff:W, 0x043000-0x043fff:W, 0x044000-0x044fff:W,
0x045000-0x045fff:W, 0x046000-0x046fff:W, 0x047000-0x047fff:W,
0x048000-0x048fff:W, 0x049000-0x049fff:W, 0x04a000-0x04afff:W,
0x04b000-0x04bfff:W, 0x04c000-0x04cfff:W, 0x04d000-0x04dfff:W,
0x04e000-0x04efff:W, 0x04f000-0x04ffff:W, 0x050000-0x050fff:W,
0x051000-0x051fff:W, 0x052000-0x052fff:W, 0x053000-0x053fff:W,
0x054000-0x054fff:W, 0x055000-0x055fff:W, 0x056000-0x056fff:S,
0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S,
0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S,
0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S,
0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S,
0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S,
0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S,
0x069000-0x069fff:S, 0x06a000-0x06afff:W, 0x06b000-0x06bfff:W,
0x06c000-0x06cfff:W, 0x06d000-0x06dfff:W, 0x06e000-0x06efff:W,
0x06f000-0x06ffff:W, 0x070000-0x070fff:W writing sector at 0x7f28ed976000
failed!
Reading current flash chip contents... done. Looking for another erase
function.
Trying erase function 1... 0x000000-0x00ffff:S, 0x010000-0x01ffff:S,
0x020000-0x02ffff:S, 0x030000-0x03ffff:S, 0x040000-0x04ffff:S,
0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:W writing
sector at 0x7f28ed976000 failed!
Looking for another erase function.
No usable erase functions left.
FAILED!
Uh oh. Erase/write failed. Checking if anything changed.
Your flash chip is in an unknown state.
Get help on IRC at irc.freenode.net (channel #flashrom) or
mail flashrom at flashrom.org with FAILED: your board name in the subject line!
-------------------------------------------------------------------------------
DO NOT REBOOT OR POWEROFF!
Restoring PCI config space for 00:01:0 reg 0x6d
Restoring PCI config space for 00:01:0 reg 0x90
Restoring PCI config space for 00:01:0 reg 0x8c
Restoring PCI config space for 00:01:0 reg 0x88

what can i do??
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/543616cd/attachment.html>

From oneingray at gmail.com  Thu Feb  9 08:43:34 2012
From: oneingray at gmail.com (Ivan Shmakov)
Date: Thu, 09 Feb 2012 14:43:34 +0700
Subject: [flashrom] flashrom@ mailing list at Gmane
	(news:gmane.linux.bios.flashrom)
Message-ID: <86ty30a1uh.fsf@gray.siamics.net>

	Apparently, the flashrom@ mailing list traffic isn't properly
	forwarded to Gmane [1].  Indeed, it seems that all the messages
	archived there were propagated through one or more of the other
	Gmane-ized lists instead.

	Could the forwarding please be fixed?

	Also, it'd make sense to import the whole mailing list archive
	to Gmane (check, e. g., [2].)  For this, however, one needs
	access to the Mailman's internal archives, as the downloadable
	mbox'es at [3] are stripped of much of the relevant information,
	including, in particular, MIME headers (effectively rendering
	anything non-ASCII there unreadable) and MIME parts.

	TIA.

[1] http://dir.gmane.org/gmane.linux.bios.flashrom
[2] http://gmane.org/import.php
[3] http://www.flashrom.org/pipermail/flashrom/

-- 
FSF associate member #7257


From stefan.tauner at student.tuwien.ac.at  Thu Feb  9 11:13:11 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 9 Feb 2012 11:13:11 +0100
Subject: [flashrom] flashrom(8): HTML preview using ManPageRenderer
 failed
In-Reply-To: <86sjikbnbd.fsf@gray.siamics.net>
References: <86sjikbnbd.fsf@gray.siamics.net>
Message-ID: <201202091012.q19ACa6J018371@mail2.student.tuwien.ac.at>

On Thu, 09 Feb 2012 12:14:30 +0700
Ivan Shmakov <oneingray at gmail.com> wrote:

> 	The flashrom(8) revision currently in trunk fails HTML
> 	conversion:
> 
> --cut: http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8 --
>     Warning: HTML preview using ManPageRenderer failed (Exception:
>     Running (/usr/bin/groff -Thtml -P -r -P -l -mandoc ) failed: 0,
>     <standard input>:566: warning [p 1, 86.8i]: cannot adjust line .)
> --cut: http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8 --
> 
> 	It seems that the regression is due to r1437 [1], as r1412 [2]
> 	renders without an error.
> 
> [1] http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8?rev=1437
> [2] http://www.flashrom.org/trac/flashrom/browser/trunk/flashrom.8?rev=1412
> 

hello ivan and thanks for the detailed analysis.
afaics this is a bug in the groff version used. it seems it cant cope
with this line:
.BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
although a very similar one is working correctly just 2 lines above it
and the version of groff on my desktop works too.
i dont have access to the server so i cant investigate further than
you. from flashrom's point of view this is a WONTFIX imo, but i have
CCed stefan reinauer, which administers the server and might be able to
look into it. stefan: can groff be updated on that machine? i guess
that would be the easiest solution...
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Thu Feb  9 11:37:17 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 9 Feb 2012 11:37:17 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
	<CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
Message-ID: <201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>

On Thu, 9 Feb 2012 08:25:51 +0100
Vince S <vince06fr at gmail.com> wrote:

> Hi so the output of my attempt to flash is
> 
> sudo flashrom -V -w '/home/vince/T?l?chargements/BIOS_R01-C0/61AO615.BIN'
> 
> flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (x86_64), built with libpci
> 3.1.7, GCC 4.6.1, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
> 
> Calibrating delay loop... OS timer resolution is 1 usecs, 736M loops per
> second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1007 us, 10000 myus
> = 10003 us, 4 myus = 5 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "Acer"
> DMI string system-product-name: "Aspire E380"
> DMI string system-version: "R01-A2"
> DMI string baseboard-manufacturer: "Acer"
> DMI string baseboard-product-name: "EM61SM/EM61PM         "
> DMI string baseboard-version: " "
> DMI string chassis-type: "Desktop"
> Found ITE Super I/O, ID 0x8726 on port 0x2e
> Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0.
> This chipset is marked as untested. If you are using an up-to-date version
> of flashrom please email a report to flashrom at flashrom.org including a
> verbose (-V) log. Thank you!
> Enabling flash write... This chipset is not really supported yet.
> Guesswork...
> ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
> Flash bus type is LPC
> Found SMBus device 10de:03eb at 00:01:1
> MCP SPI BAR is at 0xfec80000
> Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI
> enabled.
> Please send the output of "flashrom -V" to flashrom at flashrom.org with
> your board name: flashrom -V as the subject to help us finish support for
> your
> chipset. Thanks.
> OK.
> This chipset supports the following protocols: LPC.
> Super I/O ID 0x8726 is not on the list of flash capable controllers.
> Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
> Found SST flash chip "SST49LF040B" (512 kB, LPC) at physical address
> 0xfff80000.
> [?]
> ===
> This flash part has status UNTESTED for operations: WRITE
> The test status of this chip may have been updated in the latest development
> version of flashrom. If you are running the latest development version,
> please email a report to flashrom at flashrom.org if any of the above
> operations
> work correctly for you with this flash part. Please include the flashrom
> output with the additional -V option for all operations you tested (-V, -Vr,
> -Vw, -VE), and mention which mainboard or programmer you tested.
> Please mention your board in the subject line. Thanks for your help!
> Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
> Reading old flash chip contents... done.
> Erasing and writing flash chip... Trying erase function 0...
> 0x000000-0x000fff:W, 0x001000-0x001fff:S, 0x002000-0x002fff:S,
> 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S,
> 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S,
> 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S,
> 0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S,
> 0x00f000-0x00ffff:S, 0x010000-0x010fff:W, 0x011000-0x011fff:W,
> 0x012000-0x012fff:W, 0x013000-0x013fff:W, 0x014000-0x014fff:W,
> 0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:W,
> 0x018000-0x018fff:W, 0x019000-0x019fff:W, 0x01a000-0x01afff:W,
> 0x01b000-0x01bfff:W, 0x01c000-0x01cfff:W, 0x01d000-0x01dfff:W,
> 0x01e000-0x01efff:W, 0x01f000-0x01ffff:W, 0x020000-0x020fff:W,
> 0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W,
> 0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W,
> 0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W,
> 0x02a000-0x02afff:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W,
> 0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W,
> 0x030000-0x030fff:W, 0x031000-0x031fff:W, 0x032000-0x032fff:W,
> 0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W,
> 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W,
> 0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W,
> 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:W, 0x03e000-0x03efff:W,
> 0x03f000-0x03ffff:W, 0x040000-0x040fff:W, 0x041000-0x041fff:W,
> 0x042000-0x042fff:W, 0x043000-0x043fff:W, 0x044000-0x044fff:W,
> 0x045000-0x045fff:W, 0x046000-0x046fff:W, 0x047000-0x047fff:W,
> 0x048000-0x048fff:W, 0x049000-0x049fff:W, 0x04a000-0x04afff:W,
> 0x04b000-0x04bfff:W, 0x04c000-0x04cfff:W, 0x04d000-0x04dfff:W,
> 0x04e000-0x04efff:W, 0x04f000-0x04ffff:W, 0x050000-0x050fff:W,
> 0x051000-0x051fff:W, 0x052000-0x052fff:W, 0x053000-0x053fff:W,
> 0x054000-0x054fff:W, 0x055000-0x055fff:W, 0x056000-0x056fff:S,
> 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S,
> 0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S,
> 0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S,
> 0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:S,
> 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S,
> 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S,
> 0x069000-0x069fff:S, 0x06a000-0x06afff:W, 0x06b000-0x06bfff:W,
> 0x06c000-0x06cfff:W, 0x06d000-0x06dfff:W, 0x06e000-0x06efff:W,
> 0x06f000-0x06ffff:W, 0x070000-0x070fff:W writing sector at 0x7f28ed976000
> failed!
> Reading current flash chip contents... done. Looking for another erase
> function.
> Trying erase function 1... 0x000000-0x00ffff:S, 0x010000-0x01ffff:S,
> 0x020000-0x02ffff:S, 0x030000-0x03ffff:S, 0x040000-0x04ffff:S,
> 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:W writing
> sector at 0x7f28ed976000 failed!
> Looking for another erase function.
> No usable erase functions left.
> FAILED!
> Uh oh. Erase/write failed. Checking if anything changed.
> Your flash chip is in an unknown state.
> Get help on IRC at irc.freenode.net (channel #flashrom) or
> mail flashrom at flashrom.org with FAILED: your board name in the subject line!
> -------------------------------------------------------------------------------
> DO NOT REBOOT OR POWEROFF!
> Restoring PCI config space for 00:01:0 reg 0x6d
> Restoring PCI config space for 00:01:0 reg 0x90
> Restoring PCI config space for 00:01:0 reg 0x8c
> Restoring PCI config space for 00:01:0 reg 0x88

that's interesting. it always fails at the same address (0x070000).
this is where the boot block protection of that chip begins. the boot
block protection is enabled by setting a pin to low and can not be
disabled directly by software. usually the pin is connected to a
general output pin of the southbridge (or another chip) on the mainboard
and can be controlled by that. adding support for this requires some
reverse engineering of various difficulty.

the interesting question is something different: why were we able to
erase that block a month ago...
can you confirm that the two chips you are using are the same model?

> 
> what can i do??

since you have a replacement chip, you could just throw the old one
away... i would really like to know what happened though. maybe my
colleagues can shed some light onto this...

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From vince06fr at gmail.com  Thu Feb  9 14:03:01 2012
From: vince06fr at gmail.com (Vince S)
Date: Thu, 9 Feb 2012 14:03:01 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
	<CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
	<201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>
Message-ID: <CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>

This is curious because it is always possible to clear the bios :

vince at Bob:~$ sudo flashrom -VE
flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (x86_64), built with libpci
3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 730M loops per
second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 992 us, 10000 myus
= 10064 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "Acer"
DMI string system-product-name: "Aspire E380"
DMI string system-version: "R01-A2"
DMI string baseboard-manufacturer: "Acer"
DMI string baseboard-product-name: "EM61SM/EM61PM         "
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8726 on port 0x2e
Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
Flash bus type is LPC
Found SMBus device 10de:03eb at 00:01:1
MCP SPI BAR is at 0xfec80000
Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI
enabled.
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for
your
chipset. Thanks.
OK.
This chipset supports the following protocols: LPC.
Super I/O ID 0x8726 is not on the list of flash capable controllers.
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50,
id1 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50,
id1 is normal flash content
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2
0x50, id1 is normal flash content
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Found SST flash chip "SST49LF040B" (512 kB, LPC) at physical address
0xfff80000.
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xa4, id2 0x63, id1
is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xa4, id2 0x63, id1
is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xbf, id2
0x50, id1 is normal flash content
===
This flash part has status UNTESTED for operations: WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above
operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Erasing and writing flash chip... Trying erase function 0...
0x000000-0x000fff:E, 0x001000-0x001fff:E, 0x002000-0x002fff:E,
0x003000-0x003fff:E, 0x004000-0x004fff:E, 0x005000-0x005fff:E,
0x006000-0x006fff:E, 0x007000-0x007fff:E, 0x008000-0x008fff:E,
0x009000-0x009fff:E, 0x00a000-0x00afff:E, 0x00b000-0x00bfff:E,
0x00c000-0x00cfff:E, 0x00d000-0x00dfff:E, 0x00e000-0x00efff:E,
0x00f000-0x00ffff:E, 0x010000-0x010fff:E, 0x011000-0x011fff:E,
0x012000-0x012fff:E, 0x013000-0x013fff:E, 0x014000-0x014fff:E,
0x015000-0x015fff:E, 0x016000-0x016fff:E, 0x017000-0x017fff:E,
0x018000-0x018fff:E, 0x019000-0x019fff:E, 0x01a000-0x01afff:E,
0x01b000-0x01bfff:E, 0x01c000-0x01cfff:E, 0x01d000-0x01dfff:E,
0x01e000-0x01efff:E, 0x01f000-0x01ffff:E, 0x020000-0x020fff:E,
0x021000-0x021fff:E, 0x022000-0x022fff:E, 0x023000-0x023fff:E,
0x024000-0x024fff:E, 0x025000-0x025fff:E, 0x026000-0x026fff:E,
0x027000-0x027fff:E, 0x028000-0x028fff:E, 0x029000-0x029fff:E,
0x02a000-0x02afff:E, 0x02b000-0x02bfff:E, 0x02c000-0x02cfff:E,
0x02d000-0x02dfff:E, 0x02e000-0x02efff:E, 0x02f000-0x02ffff:E,
0x030000-0x030fff:E, 0x031000-0x031fff:E, 0x032000-0x032fff:E,
0x033000-0x033fff:E, 0x034000-0x034fff:E, 0x035000-0x035fff:E,
0x036000-0x036fff:E, 0x037000-0x037fff:E, 0x038000-0x038fff:E,
0x039000-0x039fff:E, 0x03a000-0x03afff:E, 0x03b000-0x03bfff:E,
0x03c000-0x03cfff:E, 0x03d000-0x03dfff:E, 0x03e000-0x03efff:E,
0x03f000-0x03ffff:E, 0x040000-0x040fff:E, 0x041000-0x041fff:E,
0x042000-0x042fff:E, 0x043000-0x043fff:E, 0x044000-0x044fff:E,
0x045000-0x045fff:E, 0x046000-0x046fff:E, 0x047000-0x047fff:E,
0x048000-0x048fff:E, 0x049000-0x049fff:E, 0x04a000-0x04afff:E,
0x04b000-0x04bfff:E, 0x04c000-0x04cfff:E, 0x04d000-0x04dfff:E,
0x04e000-0x04efff:E, 0x04f000-0x04ffff:E, 0x050000-0x050fff:E,
0x051000-0x051fff:E, 0x052000-0x052fff:E, 0x053000-0x053fff:E,
0x054000-0x054fff:E, 0x055000-0x055fff:E, 0x056000-0x056fff:E,
0x057000-0x057fff:E, 0x058000-0x058fff:E, 0x059000-0x059fff:E,
0x05a000-0x05afff:E, 0x05b000-0x05bfff:E, 0x05c000-0x05cfff:E,
0x05d000-0x05dfff:E, 0x05e000-0x05efff:E, 0x05f000-0x05ffff:E,
0x060000-0x060fff:E, 0x061000-0x061fff:E, 0x062000-0x062fff:E,
0x063000-0x063fff:E, 0x064000-0x064fff:E, 0x065000-0x065fff:E,
0x066000-0x066fff:E, 0x067000-0x067fff:E, 0x068000-0x068fff:E,
0x069000-0x069fff:E, 0x06a000-0x06afff:E, 0x06b000-0x06bfff:E,
0x06c000-0x06cfff:E, 0x06d000-0x06dfff:E, 0x06e000-0x06efff:E,
0x06f000-0x06ffff:E, 0x070000-0x070fff:E, 0x071000-0x071fff:E,
0x072000-0x072fff:E, 0x073000-0x073fff:E, 0x074000-0x074fff:E,
0x075000-0x075fff:E, 0x076000-0x076fff:E, 0x077000-0x077fff:E,
0x078000-0x078fff:E, 0x079000-0x079fff:E, 0x07a000-0x07afff:E,
0x07b000-0x07bfff:E, 0x07c000-0x07cfff:E, 0x07d000-0x07dfff:E,
0x07e000-0x07efff:E, 0x07f000-0x07ffff:E
Erase/write done.
Restoring PCI config space for 00:01:0 reg 0x6d
Restoring PCI config space for 00:01:0 reg 0x90
Restoring PCI config space for 00:01:0 reg 0x8c
Restoring PCI config space for 00:01:0 reg 0x88

My problem is the other bios is'nt mine and i must give back it saturday

what is curious is that last month I managed to flash the bios without any
manual manipulation of mainboard with the acer software from a windows live
cd
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/36713984/attachment.html>

From paulepanter at users.sourceforge.net  Thu Feb  9 14:22:48 2012
From: paulepanter at users.sourceforge.net (Paul Menzel)
Date: Thu, 09 Feb 2012 14:22:48 +0100
Subject: [flashrom] r1394: Acer Aspire E380: FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
	<CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
	<201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>
	<CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>
Message-ID: <1328793768.5379.18.camel@mattotaupa>

Dear Vince,


Am Donnerstag, den 09.02.2012, 14:03 +0100 schrieb Vince S:
> This is curious because it is always possible to clear the bios :
> 
> vince at Bob:~$ sudo flashrom -VE
> flashrom v0.9.4-r1394 on Linux 3.0.0-15-generic (x86_64), built with libpci
> 3.1.7, GCC 4.6.1, little endian
> flashrom is free software, get the source code at http://www.flashrom.org

I did not follow the thread closely, but is that version not too old?
Maybe try the latest revision from the Subversion repository?

[?]


Thanks,

Paul
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 198 bytes
Desc: This is a digitally signed message part
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/37e9a745/attachment.sig>

From stefan.tauner at student.tuwien.ac.at  Thu Feb  9 14:33:45 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 9 Feb 2012 14:33:45 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
	<CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
	<201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>
	<CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>
Message-ID: <201202091333.q19DX93f027415@mail2.student.tuwien.ac.at>

On Thu, 9 Feb 2012 14:03:01 +0100
Vince S <vince06fr at gmail.com> wrote:

> 0x07f000-0x07ffff:E

hm.
this last log was with the old, already erased (and partially
reprogrammed) chip, right?

this is even more astonishing, because the E indicates that flashrom
has read that sector and found not yet erased data (i.e. bytes !=
0xff), else it would just have skipped it afaics.
something is really fishy here, the other guys need to look into it.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From vince06fr at gmail.com  Thu Feb  9 17:10:26 2012
From: vince06fr at gmail.com (Vince S)
Date: Thu, 9 Feb 2012 17:10:26 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <201202091333.q19DX93f027415@mail2.student.tuwien.ac.at>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
	<CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
	<201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>
	<CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>
	<201202091333.q19DX93f027415@mail2.student.tuwien.ac.at>
Message-ID: <CAJo8Ow325n_iVj+R_kNf++DDyu4PnV5fz5HoGF2VC1ifQhY4-A@mail.gmail.com>

maybe it can help
when i reboot with the good bios i have a bios alert :
cmos checksum error - Defaults loaded
Warning! Now System is in Safe Mode.
Please re-setting CPU Frequency in the CMOS setup

I have not found any pin for the bloc protection, only a jumper that i have
manipulate with no-effect
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/950e18c1/attachment.html>

From stefan.tauner at student.tuwien.ac.at  Thu Feb  9 18:40:18 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 9 Feb 2012 18:40:18 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <201202090006.q1906G4I030920@mail2.student.tuwien.ac.at>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F2B34D4.7000501@gmx.net>
	<201202090006.q1906G4I030920@mail2.student.tuwien.ac.at>
Message-ID: <201202091739.q19Hdf9o014330@mail2.student.tuwien.ac.at>

On Thu, 9 Feb 2012 01:06:52 +0100
Stefan Tauner <stefan.tauner at student.tuwien.ac.at> wrote:

> 
> attached patch is untested. i will do that tomorrow, but wanted to give
> you the chance to reply early.
> one thing i remember to be missing is the 4k handling. apart from that
> and the loop error handling i hope we are quite finished. \o/

this one now is somewhat tested and not THAT broken as the one from
last night... :)

i have (at least)...
 - removed the sfdp_fetch_pt function and integrated the hexdump-like
   code into the loop. it fits there better imo.
 - corrected the overflow check to use a 24b boundary instead of 16b
   because SFDP has 24b-addressing just like normal SPI flash space.
 - refined the output verbosity of probe_spi_sfdp (again).
 - renamed the struct flash's model from "SFDP device" to "SFDP-capable
   chip".

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-Add-support-for-SFDP-JESD216.patch
Type: text/x-patch
Size: 19462 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/cf20add3/attachment-0001.patch>

From info at recovery.se  Thu Feb  9 16:51:13 2012
From: info at recovery.se (Recovery.se)
Date: Thu, 9 Feb 2012 16:51:13 +0100
Subject: [flashrom] FAILED: AXIOMTEK PICO821 REV:A2-RC
Message-ID: <CACoR2_fBW2=1pa7MszpctK7FFdUGEYcbK0ZyXnm8GJGf2D7ujQ@mail.gmail.com>

Hello

I'm very pleased with flashrom! Hovever we have a problem erasing.
I can work around it by running erase (flashrom -E) sevral times and
then flash with (flashrom -w <rom>).

When I run errase the falure posision moves forward

..
"ERASE FAILED at 0x00030000!"
"ERASE FAILED at 0x00040000!"
"ERASE FAILED at 0x000ef000!"
...

Regards
Eric Eriksson
Recovery.se
-------------- next part --------------
flashrom v0.9.4-runknown on Linux 2.6.31-19-generic-pae (i686), built with libpci 3.0.0, GCC 4.4.3, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 2 usecs, 365M loops per second, 10 myus = 10 us, 100 myus = 101 us, 1000 myus = 1024 us, 10000 myus = 10005 us, 8 myus = 9 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: " "
DMI string system-product-name: " "
DMI string system-version: " "
DMI string baseboard-manufacturer: " "
DMI string baseboard-product-name: "POULSBO"
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found chipset "Intel SCH Poulsbo" with PCI ID 8086:8119. Enabling flash write... 
BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1
BIOS Prefetch Enable: disabled, OK.
The following protocols are supported: FWH.
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Found SST flash chip "SST49LF008A" (1024 kB, FWH) at physical address 0xfff00000.
Lock status for 0x000000 (size 0x010000) is 00, full access
Lock status for 0x010000 (size 0x010000) is 00, full access
Lock status for 0x020000 (size 0x010000) is 00, full access
Lock status for 0x030000 (size 0x010000) is 00, full access
Lock status for 0x040000 (size 0x010000) is 00, full access
Lock status for 0x050000 (size 0x010000) is 00, full access
Lock status for 0x060000 (size 0x010000) is 00, full access
Lock status for 0x070000 (size 0x010000) is 00, full access
Lock status for 0x080000 (size 0x010000) is 00, full access
Lock status for 0x090000 (size 0x010000) is 00, full access
Lock status for 0x0a0000 (size 0x010000) is 00, full access
Lock status for 0x0b0000 (size 0x010000) is 00, full access
Lock status for 0x0c0000 (size 0x010000) is 00, full access
Lock status for 0x0d0000 (size 0x010000) is 00, full access
Lock status for 0x0e0000 (size 0x010000) is 00, full access
Lock status for 0x0f0000 (size 0x010000) is 00, full access
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xbf, id2 0x5a
Found SST flash chip "SST49LF008A" (1024 kB, FWH).
Lock status for 0x000000 (size 0x010000) is 00, full access
Lock status for 0x010000 (size 0x010000) is 00, full access
Lock status for 0x020000 (size 0x010000) is 00, full access
Lock status for 0x030000 (size 0x010000) is 00, full access
Lock status for 0x040000 (size 0x010000) is 00, full access
Lock status for 0x050000 (size 0x010000) is 00, full access
Lock status for 0x060000 (size 0x010000) is 00, full access
Lock status for 0x070000 (size 0x010000) is 00, full access
Lock status for 0x080000 (size 0x010000) is 00, full access
Lock status for 0x090000 (size 0x010000) is 00, full access
Lock status for 0x0a0000 (size 0x010000) is 00, full access
Lock status for 0x0b0000 (size 0x010000) is 00, full access
Lock status for 0x0c0000 (size 0x010000) is 00, full access
Lock status for 0x0d0000 (size 0x010000) is 00, full access
Lock status for 0x0e0000 (size 0x010000) is 00, full access
Lock status for 0x0f0000 (size 0x010000) is 00, full access
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:EERASE FAILED at 0x00000000! Expected=0xff, Read=0x40, failed byte count from 0x00000000-0x00000fff: 0x94f
ERASE FAILED!
Reading current flash chip contents... done. Looking for another erase function.
Trying erase function 1... 0x000000-0x00ffff:S, 0x010000-0x01ffff:S, 0x020000-0x02ffff:S, 0x030000-0x03ffff:S, 0x040000-0x04ffff:S, 0x050000-0x05ffff:S, 0x060000-0x06ffff:S, 0x070000-0x07ffff:S, 0x080000-0x08ffff:S, 0x090000-0x09ffff:S, 0x0a0000-0x0affff:S, 0x0b0000-0x0bffff:S, 0x0c0000-0x0cffff:S, 0x0d0000-0x0dffff:EERASE FAILED at 0x000d0000! Expected=0xff, Read=0x40, failed byte count from 0x000d0000-0x000dffff: 0x90b
ERASE FAILED!
Looking for another erase function.
No usable erase functions left.
FAILED!
Your flash chip is in an unknown state.
Get help on IRC at irc.freenode.net (channel #flashrom) or
mail flashrom at flashrom.org with FAILED: your board name in the subject line!
-------------------------------------------------------------------------------
DO NOT REBOOT OR POWEROFF!
-------------- next part --------------
flashrom v0.9.4-runknown on Linux 2.6.31-19-generic-pae (i686), built with libpci 3.0.0, GCC 4.4.3, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
Found chipset "Intel SCH Poulsbo". Enabling flash write... OK.
Found SST flash chip "SST49LF008A" (1024 kB, FWH) at physical address 0xfff00000.
No operations were specified.
-------------- next part --------------
00:00.0 Host bridge: Intel Corporation System Controller Hub (SCH Poulsbo) (rev 07)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0

00:02.0 VGA compatible controller: Intel Corporation System Controller Hub (SCH Poulsbo) Graphics Controller (rev 07)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0, IRQ 11
	Memory at fdf00000 (32-bit, non-prefetchable) [size=512K]
	I/O ports at ff00 [size=8]
	Memory at d0000000 (32-bit, non-prefetchable) [size=256M]
	Memory at fdf80000 (32-bit, non-prefetchable) [size=256K]
	Capabilities: [d0] Power Management version 2
	Capabilities: [b0] Vendor Specific Information <?>
	Capabilities: [90] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable-

00:1a.0 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB Client Controller (rev 07) (prog-if 80)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0, IRQ 11
	Memory at fdfff000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: [50] Power Management version 2

00:1b.0 Audio device: Intel Corporation System Controller Hub (SCH Poulsbo) HD Audio Controller (rev 07)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0, IRQ 16
	Memory at fdff8000 (64-bit, non-prefetchable) [size=16K]
	Capabilities: [50] Power Management version 2
	Capabilities: [70] Express Root Complex Integrated Endpoint, MSI 00
	Capabilities: [100] Virtual Channel <?>
	Capabilities: [130] Root Complex Link <?>
	Kernel driver in use: HDA Intel
	Kernel modules: snd-hda-intel

00:1c.0 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 1 (rev 07)
	Flags: bus master, fast devsel, latency 0
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
	I/O behind bridge: 0000e000-0000efff
	Memory behind bridge: fdb00000-fdbfffff
	Prefetchable memory behind bridge: fde00000-fdefffff
	Capabilities: [40] Express Root Port (Slot-), MSI 00
	Capabilities: [90] Subsystem: Device 8100:8086
	Capabilities: [a0] Power Management version 2
	Kernel driver in use: pcieport-driver
	Kernel modules: shpchp

00:1d.0 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #1 (rev 07)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0, IRQ 16
	I/O ports at fe00 [size=32]
	Kernel driver in use: uhci_hcd

00:1d.1 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #2 (rev 07)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0, IRQ 17
	I/O ports at fd00 [size=32]
	Kernel driver in use: uhci_hcd

00:1d.2 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #3 (rev 07)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0, IRQ 18
	I/O ports at fc00 [size=32]
	Kernel driver in use: uhci_hcd

00:1d.7 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB EHCI #1 (rev 07) (prog-if 20)
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0, IRQ 19
	Memory at fdffe000 (32-bit, non-prefetchable) [size=1K]
	Capabilities: [50] Power Management version 2
	Capabilities: [58] Debug port: BAR=1 offset=00a0
	Kernel driver in use: ehci_hcd

00:1f.0 ISA bridge: Intel Corporation System Controller Hub (SCH Poulsbo) LPC Bridge (rev 07)
	Subsystem: Device 8100:8086
	Flags: fast devsel
	Kernel driver in use: isch_smbus
	Kernel modules: i2c-isch

00:1f.1 IDE interface: Intel Corporation System Controller Hub (SCH Poulsbo) IDE Controller (rev 07) (prog-if 80 [Master])
	Subsystem: Device 8100:8086
	Flags: bus master, fast devsel, latency 0
	[virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8]
	[virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1]
	[virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8]
	[virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1]
	I/O ports at fb00 [size=16]
	Kernel driver in use: pata_sch

01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 01)
	Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller
	Flags: bus master, fast devsel, latency 0, IRQ 24
	I/O ports at ee00 [size=256]
	Memory at fdbff000 (64-bit, non-prefetchable) [size=4K]
	[virtual] Expansion ROM at fde00000 [disabled] [size=128K]
	Capabilities: [40] Power Management version 2
	Capabilities: [48] Vital Product Data <?>
	Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+
	Capabilities: [60] Express Endpoint, MSI 00
	Capabilities: [84] Vendor Specific Information <?>
	Capabilities: [100] Advanced Error Reporting <?>
	Capabilities: [12c] Virtual Channel <?>
	Capabilities: [148] Device Serial Number 68-81-ec-10-00-00-00-c4
	Capabilities: [154] Power Budgeting <?>
	Kernel driver in use: r8169
	Kernel modules: r8169
-------------- next part --------------
00:00.0 Host bridge: Intel Corporation System Controller Hub (SCH Poulsbo) (rev 07)
00:02.0 VGA compatible controller: Intel Corporation System Controller Hub (SCH Poulsbo) Graphics Controller (rev 07)
00:1a.0 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB Client Controller (rev 07)
00:1b.0 Audio device: Intel Corporation System Controller Hub (SCH Poulsbo) HD Audio Controller (rev 07)
00:1c.0 PCI bridge: Intel Corporation System Controller Hub (SCH Poulsbo) PCI Express Port 1 (rev 07)
00:1d.0 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #1 (rev 07)
00:1d.1 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #2 (rev 07)
00:1d.2 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB UHCI #3 (rev 07)
00:1d.7 USB Controller: Intel Corporation System Controller Hub (SCH Poulsbo) USB EHCI #1 (rev 07)
00:1f.0 ISA bridge: Intel Corporation System Controller Hub (SCH Poulsbo) LPC Bridge (rev 07)
00:1f.1 IDE interface: Intel Corporation System Controller Hub (SCH Poulsbo) IDE Controller (rev 07)
01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 01)

From mike.t.spangler at boeing.com  Thu Feb  9 20:13:53 2012
From: mike.t.spangler at boeing.com (Spangler, Mike T)
Date: Thu, 9 Feb 2012 11:13:53 -0800
Subject: [flashrom] Trial of ARIMA:HDAMA Motherboard
In-Reply-To: <4B83BEDD.1000009@gmx.net>
References: <ABDB7E50C02B3A468E74119BAFC1129B38CF30AA@XCH-SW-08V.sw.nos.boei
	ng.com>
	<ABDB7E50C02B3A468E74119BAFC1129B38CF30AB@XCH-SW-08V.sw.nos.boeing	.com>
	<4AB25294.2010400@gmx.net>	 <ABDB7E50C02B3A468E74119BAFC1129B3B8C6BF1@
	XCH-SW-08V.sw.nos.boeing.com>	 		<4AB3734B.9070807@gmx.net>
	<ABDB7E50C02B3A468E74119BAFC1129B3B8C6BF4@XCH-SW-08V.sw.nos.boeing.com>
	<4AB4072D.5090507@gmx.net>
	<ABDB7E50C02B3A468E74119BAFC1129B3B8C6BF8@XCH-SW-08V.sw.nos.boeing.com>
	<ABDB7E50C02B3A468E74119BAFC1129B3C191967@XCH-SW-08V.sw.nos.boeing.com>
	<4B7D9C18.8090809@gmx.net>  <1266532815.5629.78.camel@aquila>
	<1266534739.5629.89.camel@aquila> <4B7DD18F.7070801@gmx.net>
	<2E71F38AD84BDD4AA45BEF3FA7D2EDAE01AB8EFA3F@XCH-SW-08V.sw.nos.boeing.com>
	<4B83BEDD.1000009@gmx.net>
Message-ID: <2E71F38AD84BDD4AA45BEF3FA7D2EDAE16A8555125@XCH-SW-08V.sw.nos.boeing.com>

Carl-Daniel -

   I found the board enable instructions for this motherboard/chipset.  Can we get this into flashrom?

See below:

#lspci -n | grep '07.0'
0000:00:07.0 Class 0601: 1022:7468 (rev 05)

Then you need to run:
lspci -d 1022:7468 -xxxx   
1022:7468 is in the output of the 'lspci -n...' command, right before (rev 05)

Please substitute the ven:device with the one from your system.

After you run that you will get something like this...

lspci -d 1022:7468 -xxxx
0000:00:07.0 ISA bridge: Advanced Micro Devices [AMD] AMD-8111 LPC (rev 05)
00: 22 10 68 74 0f 00 20 02 05 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 1f 16 16 30
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 00 30 07 b1 01 00 00 80 0f 71 00 01 00 00 00 c0
50: 00 00 00 00 8d 71 00 00 43 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 1f 16 16 30 00 11 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

As you can see bit 43 is b1, you need to look on your system for the same line.  It has a 40 and then the 4th column to the right of the 40.  If it is not c1 then please run the following.

rmmod amd76xrom
setpci -d 1022:7468 43.b=c1
modprobe amd76xrom

then reflash...

-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net] 
Sent: Tuesday, February 23, 2010 3:41 AM
To: Spangler, Mike T
Cc: Michael Karcher; flashrom
Subject: Re: [flashrom] Trial of ARIMA:HDAMA Motherboard

Hi Mike,

On 23.02.2010 05:45, Spangler, Mike T wrote:
> I can probe with a continuity tester, but would need to know specific
> pin locations to try. Do you have any generic info on doing this?

Yes (well, I'd have to write up something), but the solution mentioned
by Michael is way easier, so I'll wait until Michael has diagnosed the
GPIO settings from the flashrom run on factory BIOS.

Regards,
Carl-Daniel

-- 
"I do consider assignment statements and pointer variables to be among
computer science's most valuable treasures."
-- Donald E. Knuth



From stefan.tauner at student.tuwien.ac.at  Thu Feb  9 20:44:34 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 9 Feb 2012 20:44:34 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <201202091739.q19Hdf9o014330@mail2.student.tuwien.ac.at>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F2B34D4.7000501@gmx.net>
	<201202090006.q1906G4I030920@mail2.student.tuwien.ac.at>
	<201202091739.q19Hdf9o014330@mail2.student.tuwien.ac.at>
Message-ID: <201202091943.q19Jhto7005483@mail2.student.tuwien.ac.at>

On Thu, 9 Feb 2012 18:40:18 +0100
Stefan Tauner <stefan.tauner at student.tuwien.ac.at> wrote:

> this one now is somewhat tested and not THAT broken as the one from
> last night... :)
> 
> i have (at least)...
>  - removed the sfdp_fetch_pt function and integrated the hexdump-like
>    code into the loop. it fits there better imo.
>  - corrected the overflow check to use a 24b boundary instead of 16b
>    because SFDP has 24b-addressing just like normal SPI flash space.
>  - refined the output verbosity of probe_spi_sfdp (again).
>  - renamed the struct flash's model from "SFDP device" to "SFDP-capable
>    chip".
> 

two addon patches... 
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-fixup-Add-support-for-SFDP-JESD216.patch
Type: text/x-patch
Size: 3348 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/08a0a2b8/attachment-0002.patch>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0002-fixup-Add-support-for-SFDP-JESD216.patch
Type: text/x-patch
Size: 1932 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/08a0a2b8/attachment-0003.patch>

From stefan.tauner at student.tuwien.ac.at  Thu Feb  9 21:13:54 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 9 Feb 2012 21:13:54 +0100
Subject: [flashrom] [PATCH] Add logfile support to flashrom
In-Reply-To: <4F03A676.1040006@gmx.net>
References: <4DF12DDE.9000401@gmx.net> <20110611142151.GE6443@greenwood>
	<4DF38206.20903@home.nl> <4DF53AAF.6000700@gmx.net>
	<4DF53D2B.7090006@home.nl> <4DF69FA1.6070705@gmx.net>
	<201106171328.p5HDSU4l017284@mail2.student.tuwien.ac.at>
	<201106191244.p5JCiSbM005768@mail2.student.tuwien.ac.at>
	<4E3092B5.9020307@gmx.net> <4F03A676.1040006@gmx.net>
Message-ID: <201202092013.q19KDFpe031614@mail2.student.tuwien.ac.at>

On Wed, 04 Jan 2012 02:08:06 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Oh well... new iteration, with some of the suggestions merged.
> This still is not final, but it should be a bit closer.
> 
> @@ -510,9 +541,13 @@
>  	 * Give the chip time to settle.
>  	 */
>  	programmer_delay(100000);
> -	return doit(fill_flash, force, filename, read_it, write_it, erase_it, verify_it);
> +	ret |= doit(fill_flash, force, filename, read_it, write_it, erase_it, verify_it);
>  
>  out_shutdown:
>  	programmer_shutdown();
> +out:

^ unused (hence breaking compilation)

> +#ifndef STANDALONE
> +	ret |= close_logfile();
> +#endif
>  	return ret;

also i see a little problem with this... ;)
./flashrom 
flashrom v0.9.4-r1483 on Linux 2.6.35-32-generic (x86_64)
flashrom is free software. Get the source code at http://www.flashrom.org

No filename specified.

attached is your patch rebased to r1490 without "out:"
maybe we can get this into 0.9.5 after some rework? do you have a todo
for it?
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner
-------------- next part --------------
A non-text attachment was scrubbed...
Name: 0001-Add-logfile-support-to-flashrom.patch
Type: text/x-patch
Size: 16748 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/6c8755f0/attachment.patch>

From vince06fr at gmail.com  Thu Feb  9 21:22:20 2012
From: vince06fr at gmail.com (Vince S)
Date: Thu, 9 Feb 2012 21:22:20 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow325n_iVj+R_kNf++DDyu4PnV5fz5HoGF2VC1ifQhY4-A@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
	<CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
	<201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>
	<CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>
	<201202091333.q19DX93f027415@mail2.student.tuwien.ac.at>
	<CAJo8Ow325n_iVj+R_kNf++DDyu4PnV5fz5HoGF2VC1ifQhY4-A@mail.gmail.com>
Message-ID: <CAJo8Ow1V3Tgfk0CmO+8sKwTg_3oAz1Hz_PuZTw7X0_mM_R_dyw@mail.gmail.com>

good evening
Good news I realized what was happening and managed to flash my bios.

The bios I was cleanliness was set to "boot block protection"

there is no pin on the mainboard but the parameter is adjustable from the
interface of the bios, so I changed this parameter in the bios, boot from my
linux session, then I share them with the bios mine I flashed with flashrom and
that's ok

Thanks for your work
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120209/cbb23dd4/attachment-0001.html>
-------------- next part --------------
vince at Bob:~$ sudo flashrom -V -w '/home/vince/T?l?chargements/BIOS_R01-C0/61AO615.BIN' 
[sudo] password for vince: 
flashrom v0.9.4-r1394 on Linux 3.0.0-16-generic (x86_64), built with libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 728M loops per second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 989 us, 10000 myus = 9945 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "Acer"
DMI string system-product-name: "Aspire E380"
DMI string system-version: "R01-A2"
DMI string baseboard-manufacturer: "Acer"
DMI string baseboard-product-name: "EM61SM/EM61PM         "
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8726 on port 0x2e
Found chipset "NVIDIA MCP61" with PCI ID 10de:03e0. 
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet. Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
Flash bus type is LPC
Found SMBus device 10de:03eb at 00:01:1
MCP SPI BAR is at 0x00000000
MCP SPI is not used.
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for your
chipset. Thanks.
OK.
This chipset supports the following protocols: LPC.
Super I/O ID 0x8726 is not on the list of flash capable controllers.
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Found SST flash chip "SST49LF040B" (512 kB, LPC) at physical address 0xfff80000.
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xa4, id2 0x63, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xa4, id2 0x63, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xbf, id2 0x50
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xbf, id2 0x50
===
This flash part has status UNTESTED for operations: WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:S, 0x001000-0x001fff:S, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S, 0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff:S, 0x010000-0x010fff:EW, 0x011000-0x011fff:W, 0x012000-0x012fff:W, 0x013000-0x013fff:W, 0x014000-0x014fff:W, 0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:W, 0x018000-0x018fff:W, 0x019000-0x019fff:W, 0x01a000-0x01afff:W, 0x01b000-0x01bfff:W, 0x01c000-0x01cfff:W, 0x01d000-0x01dfff:W, 0x01e000-0x01efff:W, 0x01f000-0x01ffff:W, 0x020000-0x020fff:EW, 0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W, 0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W, 0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W, 0x02a000-0x02afff:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W, 0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W, 0x030000-0x030fff:EW, 0x031000-0x031fff:W, 0x032000-0x032fff:W, 0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W, 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W, 0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W, 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:W, 0x03e000-0x03efff:W, 0x03f000-0x03ffff:W, 0x040000-0x040fff:EW, 0x041000-0x041fff:W, 0x042000-0x042fff:W, 0x043000-0x043fff:W, 0x044000-0x044fff:W, 0x045000-0x045fff:W, 0x046000-0x046fff:W, 0x047000-0x047fff:W, 0x048000-0x048fff:W, 0x049000-0x049fff:W, 0x04a000-0x04afff:W, 0x04b000-0x04bfff:W, 0x04c000-0x04cfff:W, 0x04d000-0x04dfff:W, 0x04e000-0x04efff:W, 0x04f000-0x04ffff:W, 0x050000-0x050fff:EW, 0x051000-0x051fff:W, 0x052000-0x052fff:W, 0x053000-0x053fff:W, 0x054000-0x054fff:W, 0x055000-0x055fff:W, 0x056000-0x056fff:S, 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S, 0x05a000-0x05afff:S, 0x05b000-0x05bfff:S, 0x05c000-0x05cfff:S, 0x05d000-0x05dfff:S, 0x05e000-0x05efff:S, 0x05f000-0x05ffff:S, 0x060000-0x060fff:E, 0x061000-0x061fff:S, 0x062000-0x062fff:S, 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S, 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S, 0x069000-0x069fff:S, 0x06a000-0x06afff:W, 0x06b000-0x06bfff:W, 0x06c000-0x06cfff:W, 0x06d000-0x06dfff:W, 0x06e000-0x06efff:W, 0x06f000-0x06ffff:W, 0x070000-0x070fff:W, 0x071000-0x071fff:W, 0x072000-0x072fff:W, 0x073000-0x073fff:W, 0x074000-0x074fff:W, 0x075000-0x075fff:W, 0x076000-0x076fff:W, 0x077000-0x077fff:W, 0x078000-0x078fff:W, 0x079000-0x079fff:W, 0x07a000-0x07afff:W, 0x07b000-0x07bfff:W, 0x07c000-0x07cfff:W, 0x07d000-0x07dfff:W, 0x07e000-0x07efff:W, 0x07f000-0x07ffff:W
Erase/write done.
Verifying flash... VERIFIED.          
Restoring PCI config space for 00:01:0 reg 0x6d
Restoring PCI config space for 00:01:0 reg 0x90
Restoring PCI config space for 00:01:0 reg 0x8c
Restoring PCI config space for 00:01:0 reg 0x88
vince at Bob:~$ 

From vidwer at gmail.com  Thu Feb  9 21:36:45 2012
From: vidwer at gmail.com (Idwer Vollering)
Date: Thu, 9 Feb 2012 21:36:45 +0100
Subject: [flashrom] FAILED : mcp61sm -am
In-Reply-To: <CAJo8Ow1V3Tgfk0CmO+8sKwTg_3oAz1Hz_PuZTw7X0_mM_R_dyw@mail.gmail.com>
References: <CAJo8Ow13TQPC4AhjpvLrsUu1Lq4D_idbNAdqHjikkxvjmMRKKQ@mail.gmail.com>
	<201202082022.q18KMm1A026796@mail2.student.tuwien.ac.at>
	<CAJo8Ow1sFzHAywB+bQroJo3NrR1OaOG7RrD+wo6AAs6y3bCnsQ@mail.gmail.com>
	<CAJo8Ow24_jEMO2b0UK44jJ-b4C8mXMyC1RQfcVRWAFjcHGNmLA@mail.gmail.com>
	<201202091036.q19Aagb3008841@mail2.student.tuwien.ac.at>
	<CAJo8Ow0NffNL+u0xFXZFzcOR2gOwOFPzM-_8nZdvjdtk9jkzHA@mail.gmail.com>
	<201202091333.q19DX93f027415@mail2.student.tuwien.ac.at>
	<CAJo8Ow325n_iVj+R_kNf++DDyu4PnV5fz5HoGF2VC1ifQhY4-A@mail.gmail.com>
	<CAJo8Ow1V3Tgfk0CmO+8sKwTg_3oAz1Hz_PuZTw7X0_mM_R_dyw@mail.gmail.com>
Message-ID: <CAPp9Ork1z-ZYy7aP5PiyptLcsEvwjcg4CLotEdMgzk_xwmqJiQ@mail.gmail.com>

2012/2/9 Vince S <vince06fr at gmail.com>:
> good evening
> Good news I realized what was happening and managed to flash my bios.
>
> The bios I was cleanliness was set to "boot block protection"
>
> there is no pin on the mainboard but the parameter is adjustable from the
> interface of the bios, so I changed this parameter in the bios, boot from my
> linux session, then I share them with the bios mine I flashed with flashrom
> and that's ok

I would like to see the output of "lspci -nnvvvxxx" and "superiotool
-deV" (run both commands as root) before and after changing this
parameter, so we can look into adding board enabling code.

>
> Thanks for your work
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom


From stefan.reinauer at coreboot.org  Fri Feb 10 18:24:14 2012
From: stefan.reinauer at coreboot.org (Stefan Reinauer)
Date: Fri, 10 Feb 2012 18:24:14 +0100
Subject: [flashrom] flashrom(8): HTML preview using ManPageRenderer
	failed
In-Reply-To: <201202091012.q19ACa6J018371@mail2.student.tuwien.ac.at>
References: <86sjikbnbd.fsf@gray.siamics.net>
	<201202091012.q19ACa6J018371@mail2.student.tuwien.ac.at>
Message-ID: <20120210172412.GA15323@coreboot.org>

* Stefan Tauner <stefan.tauner at student.tuwien.ac.at> [120209 11:13]:
> afaics this is a bug in the groff version used. it seems it cant cope
> with this line:
> .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
> although a very similar one is working correctly just 2 lines above it
> and the version of groff on my desktop works too.
> i dont have access to the server so i cant investigate further than
> you. from flashrom's point of view this is a WONTFIX imo, but i have
> CCed stefan reinauer, which administers the server and might be able to
> look into it. stefan: can groff be updated on that machine? i guess
> that would be the easiest solution...

I updated groff to 1.21

Stefan




From flashrom at mkarcher.dialup.fu-berlin.de  Sat Feb 11 21:14:33 2012
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Sat, 11 Feb 2012 21:14:33 +0100
Subject: [flashrom] [PATCH] Board enable for TriGem Anaheim-3
Message-ID: <1328991273-9850-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>

Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
---
 board_enable.c |    2 ++
 print.c        |    1 +
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/board_enable.c b/board_enable.c
index 06bbd70..2b682ea 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1540,6 +1540,7 @@ static int intel_ich_gpio21_raise(void)
  *  - ASUS P4B266: socket478 + Intel 845D + ICH2
  *  - ASUS P4B533-E: socket478 + 845E + ICH4
  *  - ASUS P4B-MX variant in HP Vectra VL420 SFF: socket478 + 845D + ICH2
+ *  - TriGem Anaheim-3: socket370 + Intel 810 + ICH
  */
 static int intel_ich_gpio22_raise(void)
 {
@@ -2230,6 +2231,7 @@ const struct board_match board_matches[] = {
 	{0x10de, 0x0364, 0x108e, 0x6676,  0x10de, 0x0369, 0x108e, 0x6676, "^Sun Ultra 40 M2", NULL, NULL,     P3, "Sun",         "Ultra 40 M2",           0,   OK, board_sun_ultra_40_m2},
 	{0x1106, 0x3038, 0x0925, 0x1234,  0x1106, 0x0596, 0x1106,      0, NULL,         NULL, NULL,           P3, "Tekram",      "P6Pro-A5",              256, OK, NULL},
 	{0x1106, 0x3123, 0x1106, 0x3123,  0x1106, 0x3059, 0x1106, 0x4161, NULL,         NULL, NULL,           P3, "Termtek",     "TK-3370 (Rev:2.5B)",    0,   OK, w836xx_memw_enable_4e},
+	{0x8086, 0x7120, 0x109f, 0x3157,  0x8086, 0x7121, 0x109f, 0x3157, NULL,         NULL, NULL,           P3, "TriGem",      "Anaheim-3",             0,   OK, intel_ich_gpio22_raise},
 	{0x8086, 0x1076, 0x8086, 0x1176,  0x1106, 0x3059, 0x10f1, 0x2498, NULL,         NULL, NULL,           P3, "Tyan",        "S2498 (Tomcat K7M)",    0,   OK, w836xx_memw_enable_2e},
 	{0x1106, 0x0259, 0x1106, 0xAA07,  0x1106, 0x3227, 0x1106, 0xAA07, NULL,         NULL, NULL,           P3, "VIA",         "EPIA EK",               0,   NT, via_vt823x_gpio9_raise},
 	{0x1106, 0x3177, 0x1106, 0xAA01,  0x1106, 0x3123, 0x1106, 0xAA01, NULL,         NULL, NULL,           P3, "VIA",         "EPIA M/MII/...",        0,   OK, via_vt823x_gpio15_raise},
diff --git a/print.c b/print.c
index f4957b1..b4900c3 100644
--- a/print.c
+++ b/print.c
@@ -886,6 +886,7 @@ const struct board_info boards_known[] = {
 	B("Tekram",	"P6Pro-A5",		1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
 	B("Termtek",	"TK-3370 (Rev:2.5B)",	1, NULL, NULL),
 	B("Thomson",	"IP1000",		1, "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
+	B("TriGem",	"Anaheim-3",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
 	B("TriGem",	"Lomita",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
 	B("Tyan",	"S5375-1U (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
 	B("Tyan",	"S1846 (Tsunami ATX)",	1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
-- 
1.7.7.3



From svn at flashrom.org  Sun Feb 12 01:13:14 2012
From: svn at flashrom.org (repository service)
Date: Sun, 12 Feb 2012 01:13:14 +0100
Subject: [flashrom] [commit] r1491 - trunk
Message-ID: <E1RwN46-0002ZR-GF@ra.coresystems.de>

Author: mkarcher
Date: Sun Feb 12 01:13:14 2012
New Revision: 1491
URL: http://flashrom.org/trac/flashrom/changeset/1491

Log:
Board enable for TriGem Anaheim-3

lspci: http://paste.flashrom.org/view.php?id=1069
flashrom -V: http://paste.flashrom.org/view.php?id=1072
flashrom -w: http://paste.flashrom.org/view.php?id=1073

Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
(ack via IRC Feb 11, 23:14 GMT)

Modified:
   trunk/board_enable.c
   trunk/print.c

Modified: trunk/board_enable.c
==============================================================================
--- trunk/board_enable.c	Thu Feb  9 00:28:54 2012	(r1490)
+++ trunk/board_enable.c	Sun Feb 12 01:13:14 2012	(r1491)
@@ -1540,6 +1540,7 @@
  *  - ASUS P4B266: socket478 + Intel 845D + ICH2
  *  - ASUS P4B533-E: socket478 + 845E + ICH4
  *  - ASUS P4B-MX variant in HP Vectra VL420 SFF: socket478 + 845D + ICH2
+ *  - TriGem Anaheim-3: socket370 + Intel 810 + ICH
  */
 static int intel_ich_gpio22_raise(void)
 {
@@ -2230,6 +2231,7 @@
 	{0x10de, 0x0364, 0x108e, 0x6676,  0x10de, 0x0369, 0x108e, 0x6676, "^Sun Ultra 40 M2", NULL, NULL,     P3, "Sun",         "Ultra 40 M2",           0,   OK, board_sun_ultra_40_m2},
 	{0x1106, 0x3038, 0x0925, 0x1234,  0x1106, 0x0596, 0x1106,      0, NULL,         NULL, NULL,           P3, "Tekram",      "P6Pro-A5",              256, OK, NULL},
 	{0x1106, 0x3123, 0x1106, 0x3123,  0x1106, 0x3059, 0x1106, 0x4161, NULL,         NULL, NULL,           P3, "Termtek",     "TK-3370 (Rev:2.5B)",    0,   OK, w836xx_memw_enable_4e},
+	{0x8086, 0x7120, 0x109f, 0x3157,  0x8086, 0x2410,      0,      0, NULL,         NULL, NULL,           P3, "TriGem",      "Anaheim-3",             0,   OK, intel_ich_gpio22_raise},
 	{0x8086, 0x1076, 0x8086, 0x1176,  0x1106, 0x3059, 0x10f1, 0x2498, NULL,         NULL, NULL,           P3, "Tyan",        "S2498 (Tomcat K7M)",    0,   OK, w836xx_memw_enable_2e},
 	{0x1106, 0x0259, 0x1106, 0xAA07,  0x1106, 0x3227, 0x1106, 0xAA07, NULL,         NULL, NULL,           P3, "VIA",         "EPIA EK",               0,   NT, via_vt823x_gpio9_raise},
 	{0x1106, 0x3177, 0x1106, 0xAA01,  0x1106, 0x3123, 0x1106, 0xAA01, NULL,         NULL, NULL,           P3, "VIA",         "EPIA M/MII/...",        0,   OK, via_vt823x_gpio15_raise},

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Thu Feb  9 00:28:54 2012	(r1490)
+++ trunk/print.c	Sun Feb 12 01:13:14 2012	(r1491)
@@ -886,6 +886,7 @@
 	B("Tekram",	"P6Pro-A5",		1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
 	B("Termtek",	"TK-3370 (Rev:2.5B)",	1, NULL, NULL),
 	B("Thomson",	"IP1000",		1, "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
+	B("TriGem",	"Anaheim-3",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
 	B("TriGem",	"Lomita",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
 	B("Tyan",	"S5375-1U (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
 	B("Tyan",	"S1846 (Tsunami ATX)",	1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),


From flashrom at mkarcher.dialup.fu-berlin.de  Sun Feb 12 01:20:00 2012
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Sun, 12 Feb 2012 01:20:00 +0100
Subject: [flashrom] [PATCH] Board enable for TriGem Anaheim-3
In-Reply-To: <1328991273-9850-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
References: <1328991273-9850-1-git-send-email-flashrom@mkarcher.dialup.fu-berlin.de>
Message-ID: <1329006000.14303.21.camel@localhost>

Am Samstag, den 11.02.2012, 21:14 +0100 schrieb Michael Karcher:
> Signed-off-by: Michael Karcher <flashrom at mkarcher.dialup.fu-berlin.de>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
    (ack via IRC Feb 11, 23:14 GMT)

Stefan: Thanks for the ack!

> +	{0x8086, 0x7120, 0x109f, 0x3157,  0x8086, 0x7121, 0x109f, 0x3157, NULL,         NULL, NULL,           P3, "TriGem",      "Anaheim-3",             0,   OK, intel_ich_gpio22_raise},
This is north bridge + GFX. Adjusted to north bridge + south bridge to
be independent of the internal graphics being used or not.

And committed in r1491

Regards,
  Michael Karcher



From c-d.hailfinger.devel.2006 at gmx.net  Sun Feb 12 06:02:38 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 12 Feb 2012 06:02:38 +0100
Subject: [flashrom]  [PATCH] ARM support
Message-ID: <4F3747EE.3090800@gmx.net>

Add the ability to compile for the ARM architecture.

Note: The internal programmer will abort during processor check. This is
intentional.
The other hardware drivers (except those using port I/O) should work,
though.
My hope is to get this in before 0.9.5 so we can get a release with at
least some ARM support.

Compile and run tests appreciated. If you're afraid, you can just run
dummy. That would at least prove that flashrom compiles and works somehow.

David: This is mostly your code (I only extracted it from the chromium
branch of flashrom), could you sign off on it?

Regards,
Carl-Daniel

Index: flashrom-arm/hwaccess.c
===================================================================
--- flashrom-arm/hwaccess.c	(Revision 1491)
+++ flashrom-arm/hwaccess.c	(Arbeitskopie)
@@ -116,6 +116,20 @@
 {
 }
 
+#elif defined (__arm__)
+
+static inline void sync_primitive(void)
+{
+}
+
+void get_io_perms(void)
+{
+}
+
+void release_io_perms(void)
+{
+}
+
 #else
 
 #error Unknown architecture
Index: flashrom-arm/hwaccess.h
===================================================================
--- flashrom-arm/hwaccess.h	(Revision 1491)
+++ flashrom-arm/hwaccess.h	(Arbeitskopie)
@@ -68,8 +68,15 @@
 #error Little-endian PowerPC #defines are unknown
 #endif
 
+#elif defined (__arm__)
+#if defined (__ARMEL__)
+#define __FLASHROM_LITTLE_ENDIAN__ 1
+#else
+#error Big-endian ARM #defines are unknown
 #endif
 
+#endif
+
 #if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
 /* Nonstandard libc-specific macros for determining endianness. */
 #if defined(__GLIBC__)
@@ -326,6 +333,10 @@
 
 /* PCI port I/O is not yet implemented on MIPS. */
 
+#elif defined(__arm__)
+
+/* Non memory mapped I/O is not supported on ARM. */
+
 #else
 
 #error Unknown architecture, please check if it supports PCI port IO.
Index: flashrom-arm/Makefile
===================================================================
--- flashrom-arm/Makefile	(Revision 1491)
+++ flashrom-arm/Makefile	(Arbeitskopie)
@@ -215,8 +215,9 @@
 # below uses CC itself.
 override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
 
-ifeq ($(ARCH), ppc)
-# There's no PCI port I/O support on PPC/PowerPC, yet.
+# PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM.
+# Right now this means the drivers below only work on x86.
+ifneq ($(ARCH), x86)
 ifeq ($(CONFIG_NIC3COM), yes)
 UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes
 else
Index: flashrom-arm/arch.h
===================================================================
--- flashrom-arm/arch.h	(Revision 1491)
+++ flashrom-arm/arch.h	(Arbeitskopie)
@@ -27,5 +27,7 @@
 #define __FLASHROM_ARCH__ "mips"
 #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)
 #define __FLASHROM_ARCH__ "ppc"
+#elif defined(__arm__)
+#define __FLASHROM_ARCH__ "arm"
 #endif
 __FLASHROM_ARCH__
Index: flashrom-arm/programmer.h
===================================================================
--- flashrom-arm/programmer.h	(Revision 1491)
+++ flashrom-arm/programmer.h	(Arbeitskopie)
@@ -527,6 +527,7 @@
 int register_spi_programmer(const struct spi_programmer *programmer);
 
 /* ichspi.c */
+#if CONFIG_INTERNAL == 1
 enum ich_chipset {
 	CHIPSET_ICH_UNKNOWN,
 	CHIPSET_ICH7 = 7,
@@ -538,7 +539,6 @@
 	CHIPSET_7_SERIES_PANTHER_POINT
 };
 
-#if CONFIG_INTERNAL == 1
 extern uint32_t ichspi_bbar;
 int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		 enum ich_chipset ich_generation);


-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Sun Feb 12 23:22:42 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 12 Feb 2012 23:22:42 +0100
Subject: [flashrom] [PATCH] ARM support
In-Reply-To: <4F3747EE.3090800@gmx.net>
References: <4F3747EE.3090800@gmx.net>
Message-ID: <4F383BB2.2050608@gmx.net>

Am 12.02.2012 06:02 schrieb Carl-Daniel Hailfinger:
> Add the ability to compile for the ARM architecture.
>
> Note: The internal programmer will abort during processor check. This is
> intentional.
> The other hardware drivers (except those using port I/O) should work,
> though.
> My hope is to get this in before 0.9.5 so we can get a release with at
> least some ARM support.
>
> Compile and run tests appreciated. If you're afraid, you can just run
> dummy. That would at least prove that flashrom compiles and works somehow.
>
> David: This is mostly your code (I only extracted it from the chromium
> branch of flashrom), could you sign off on it?

Thanks to Timo Juhani Lindfors for testing!

Tested-by: Timo Juhani Lindfors <timo.lindfors at iki.fi>
Test reports at:
http://paste.flashrom.org/view.php?id=1074
http://paste.flashrom.org/view.php?id=1075

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Mon Feb 13 00:33:21 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 13 Feb 2012 00:33:21 +0100
Subject: [flashrom] [PATCH] Add a bunch of new/tested stuff and various
	small changes 10
Message-ID: <1329089601-7810-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

Tested mainboards:
OK:
 - ABIT A-S78H
   http://www.flashrom.org/pipermail/flashrom/2012-January/008603.html
 - ASRock AM2NF6G-VSTA
   http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
 - ASUS M2A-VM (HDMI variant)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html
 - ASUS M4N78 PRO
   http://www.flashrom.org/pipermail/flashrom/2012-January/008598.html
 - ASUS P5N7A-VM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
 - ASUS P5KPL-CM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008522.html
 - ASUS P5QPL-AM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008557.html
 - ECS GF7100PVT-M3
   http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
 - ECS K7SEM
   http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
 - ECS P4M800PRO-M V2.0
   http://www.flashrom.org/pipermail/flashrom/2012-January/008478.html
 - Gigabyte GA-EP31-DS3L
   http://www.flashrom.org/pipermail/flashrom/2012-January/008601.html
 - Gigabyte GA-X58A-UDR3
   http://www.flashrom.org/pipermail/flashrom/2012-January/008572.html
 - Gigabyte GA-Z68XP-UD3
   http://paste.flashrom.org/view.php?id=1058
 - HP ProLiant N40L
   http://www.flashrom.org/pipermail/flashrom/2012-February/008650.html
 - MSI MS-7309 (K9N6PGM2-V2)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008441.html
 - MSI MS-7548 (Aspen-GL8E used in HP Pavilion a6750f)
   http://www.flashrom.org/pipermail/flashrom/2012-February/008666.html
 - MSI MS-7676 (H67MA-ED55(B3))
   http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html
 - PC Engines Alix.6f2
   Reported by Philip Prindeville on IRC
 - Shuttle AV18E2
   http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html
 - Supermicro X8DTE-F
   http://www.flashrom.org/pipermail/flashrom/2011-November/008304.html
 - Supermicro X8DTT-HIBQF
   http://www.flashrom.org/pipermail/flashrom/2012-January/008520.html
NOT OK:
 - ASUS P8H61-M LE/USB3
   http://www.flashrom.org/pipermail/flashrom/2012-January/008491.html
 - ASUS P8H67-M PRO
   http://www.flashrom.org/pipermail/flashrom/2011-December/008321.html
 - ASUS P8Z68-V PRO
   http://www.flashrom.org/pipermail/flashrom/2012-January/008469.html
 - Intel D425KT
   http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html
 - Supermicro X9SCA-F
   http://www.flashrom.org/pipermail/flashrom/2011-December/008313.html

Tested flash chips:
 - mark AT29C512 as TEST_OK_PREW
   http://paste.flashrom.org/view.php?id=977
 - mark M25P40 as TEST_OK_PREW
   http://www.flashrom.org/pipermail/flashrom/2011-December/008351.html
 - mark M25PE80 as TEST_OK_PREW
   http://paste.flashrom.org/view.php?id=1061
 - mark MX25L6405 as TEST_OK_PREW
   tested myself with an MX25L6436E variant on serprog
 - mark W39V080A as TEST_OK_PREW
   http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html

Tested chipsets:
 - SiS 730 (:0730)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
 - NVIDIA MCP61 (:03e0)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
 - NVIDIA MCP73 (:07d7)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
 - NVIDIA MCP79 (:0aac)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
 - VIA VT82C69x (0691) and VT82C686A/B (:0686)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html

 - AMD's SB950 (and presumably also SB920) have the same PCI ID as previous
   generations, hence change the chipset enable device string. Thanks to
   Christian Ruppert for the suggestion.
 - Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard
   graphics card in its pattern. Change this to the LPC controller.
 - Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable
   wrapper of it (enable_flash_pch6).
 - Fix two paranoid checks for address < 0 in ichspi.c which became futile (and
   generate clang warnings) with the unsignify patch committed in r1470.
 - Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could
   be distinguished by an extended RDID probe (Atmel's patented EDI procedure),
   which we do not support yet, hence handle them as one model for now.
 - Remove trac reference from man page
 - Source format fixes and typos

the addition of the ASRock AM2NF6G-VSTA to print.c is
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
everything else is
Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 board_enable.c   |    4 ++--
 chipset_enable.c |   18 +++++++++---------
 dediprog.c       |    2 +-
 flashchips.c     |   14 +++++++-------
 flashchips.h     |    2 +-
 flashrom.8       |    8 +++-----
 ichspi.c         |    4 ++--
 print.c          |   32 ++++++++++++++++++++++++++++----
 8 files changed, 53 insertions(+), 31 deletions(-)

diff --git a/board_enable.c b/board_enable.c
index 1c5024f..d4f14bb 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1562,7 +1562,7 @@ static int intel_ich_gpio34_raise(void)
 /*
  * Suited for:
  *  - AOpen i945GMx-VFX: Intel 945GM + ICH7-M used in ...
- *    - FCS ESPRIMO Q5010 (SMBIOS: D2544-B1)
+ *    - FSC ESPRIMO Q5010 (SMBIOS: D2544-B1)
  */
 static int intel_ich_gpio38_raise(void)
 {
@@ -2114,7 +2114,7 @@ const struct board_match board_matches[] = {
 	{0x8086, 0x2930, 0x147b, 0x1083,  0x10ec, 0x8167, 0x147b, 0x1083, NULL,         NULL, NULL,           P3, "abit",        "IP35 Pro",              0,   OK, intel_ich_gpio16_raise},
 	{0x10de, 0x0050, 0x147b, 0x1c1a,       0,      0,      0,      0, NULL,         NULL, NULL,           P3, "abit",        "KN8 Ultra",             0,   NT, nvidia_mcp_gpio2_lower},
 	{0x10de, 0x01e0, 0x147b, 0x1c00,  0x10de, 0x0060, 0x147B, 0x1c00, NULL,         NULL, NULL,           P3, "abit",        "NF7-S",                 0,   OK, nvidia_mcp_gpio8_raise},
-	{0x10de, 0x02f0, 0x147b, 0x1c26,  0x10de, 0x0240, 0x10de, 0x0222, NULL,         NULL, NULL,           P3, "abit",        "NF-M2 nView",           0,   OK, nvidia_mcp_gpio4_lower},
+	{0x10de, 0x02f0, 0x147b, 0x1c26,  0x10de, 0x0260, 0x147b, 0x1c26, NULL,         NULL, NULL,           P3, "abit",        "NF-M2 nView",           0,   OK, nvidia_mcp_gpio4_lower},
 	{0x1106, 0x0691,      0,      0,  0x1106, 0x3057,      0,      0, "(VA6)$",     NULL, NULL,           P3, "abit",        "VA6",                   0,   OK, via_apollo_gpo4_lower},
 	{0x1106, 0x0691,      0,      0,  0x1106, 0x3057,      0,      0, NULL,         "abit", "vt6x4",      P3, "abit",        "VT6X4",                 0,   OK, via_apollo_gpo4_lower},
 	{0x105a, 0x0d30, 0x105a, 0x4d33,  0x8086, 0x1130, 0x8086,      0, NULL,         NULL, NULL,           P3, "Acorp",       "6A815EPD",              0,   OK, board_acorp_6a815epd},
diff --git a/chipset_enable.c b/chipset_enable.c
index 33b32ef..0aba1e0 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1155,7 +1155,7 @@ const struct penable chipset_enables[] = {
 #if defined(__i386__) || defined(__x86_64__)
 	{0x1002, 0x4377, OK, "ATI", "SB400",		enable_flash_sb400},
 	{0x1002, 0x438d, OK, "AMD", "SB600",		enable_flash_sb600},
-	{0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600},
+	{0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600},
 	{0x100b, 0x0510, NT, "AMD", "SC1100",		enable_flash_sc1100},
 	{0x1022, 0x2080, OK, "AMD", "CS5536",		enable_flash_cs5536},
 	{0x1022, 0x2090, OK, "AMD", "CS5536",		enable_flash_cs5536},
@@ -1178,7 +1178,7 @@ const struct penable chipset_enables[] = {
 	{0x1039, 0x0651, OK, "SiS", "651",		enable_flash_sis540},
 	{0x1039, 0x0655, NT, "SiS", "655",		enable_flash_sis540},
 	{0x1039, 0x0661, OK, "SiS", "661",		enable_flash_sis540},
-	{0x1039, 0x0730, NT, "SiS", "730",		enable_flash_sis540},
+	{0x1039, 0x0730, OK, "SiS", "730",		enable_flash_sis540},
 	{0x1039, 0x0733, NT, "SiS", "733",		enable_flash_sis540},
 	{0x1039, 0x0735, OK, "SiS", "735",		enable_flash_sis540},
 	{0x1039, 0x0740, NT, "SiS", "740",		enable_flash_sis540},
@@ -1222,7 +1222,7 @@ const struct penable chipset_enables[] = {
 	{0x10de, 0x0365, OK, "NVIDIA", "MCP55",		enable_flash_mcp55}, /* LPC */
 	{0x10de, 0x0366, OK, "NVIDIA", "MCP55",		enable_flash_mcp55}, /* LPC */
 	{0x10de, 0x0367, OK, "NVIDIA", "MCP55",		enable_flash_mcp55}, /* Pro */
-	{0x10de, 0x03e0, NT, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
+	{0x10de, 0x03e0, OK, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
 	{0x10de, 0x03e1, OK, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
 	{0x10de, 0x03e2, NT, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
 	{0x10de, 0x03e3, NT, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
@@ -1233,8 +1233,8 @@ const struct penable chipset_enables[] = {
 	{0x10de, 0x0548, OK, "NVIDIA", "MCP67",		enable_flash_mcp6x_7x},
 	{0x10de, 0x075c, NT, "NVIDIA", "MCP78S",	enable_flash_mcp6x_7x},
 	{0x10de, 0x075d, OK, "NVIDIA", "MCP78S",	enable_flash_mcp6x_7x},
-	{0x10de, 0x07d7, NT, "NVIDIA", "MCP73",		enable_flash_mcp6x_7x},
-	{0x10de, 0x0aac, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
+	{0x10de, 0x07d7, OK, "NVIDIA", "MCP73",		enable_flash_mcp6x_7x},
+	{0x10de, 0x0aac, OK, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
 	{0x10de, 0x0aad, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
 	{0x10de, 0x0aae, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
 	{0x10de, 0x0aaf, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
@@ -1243,12 +1243,12 @@ const struct penable chipset_enables[] = {
 	{0x1106, 0x0595, NT, "VIA", "VT82C595",		via_no_byte_merge},
 	{0x1106, 0x0597, NT, "VIA", "VT82C597",		via_no_byte_merge},
 	{0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A",	via_no_byte_merge},
-	{0x1106, 0x0691, NT, "VIA", "VT82C69x",		via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */
+	{0x1106, 0x0691, OK, "VIA", "VT82C69x",		via_no_byte_merge},
 	{0x1106, 0x8601, NT, "VIA", "VT8601T",		via_no_byte_merge},
 	/* VIA southbridges */
 	{0x1106, 0x0586, OK, "VIA", "VT82C586A/B",	enable_flash_amd8111},
 	{0x1106, 0x0596, OK, "VIA", "VT82C596",		enable_flash_amd8111},
-	{0x1106, 0x0686, NT, "VIA", "VT82C686A/B",	enable_flash_amd8111},
+	{0x1106, 0x0686, OK, "VIA", "VT82C686A/B",	enable_flash_amd8111},
 	{0x1106, 0x3074, OK, "VIA", "VT8233",		enable_flash_vt823x},
 	{0x1106, 0x3147, OK, "VIA", "VT8233A",		enable_flash_vt823x},
 	{0x1106, 0x3177, OK, "VIA", "VT8235",		enable_flash_vt823x},
@@ -1279,8 +1279,8 @@ const struct penable chipset_enables[] = {
 	{0x8086, 0x1c54, NT, "Intel", "C204",		enable_flash_pch6},
 	{0x8086, 0x1c56, NT, "Intel", "C206",		enable_flash_pch6},
 	{0x8086, 0x1c5c, NT, "Intel", "H61",		enable_flash_pch6},
-	{0x8086, 0x1d40, OK, "Intel", "X79",		enable_flash_ich10}, /* FIXME: when datasheet is available */
-	{0x8086, 0x1d41, NT, "Intel", "X79",		enable_flash_ich10}, /* FIXME: when datasheet is available */
+	{0x8086, 0x1d40, OK, "Intel", "X79",		enable_flash_pch6},
+	{0x8086, 0x1d41, NT, "Intel", "X79",		enable_flash_pch6},
 	{0x8086, 0x2410, OK, "Intel", "ICH",		enable_flash_ich_4e},
 	{0x8086, 0x2420, OK, "Intel", "ICH0",		enable_flash_ich_4e},
 	{0x8086, 0x2440, OK, "Intel", "ICH2",		enable_flash_ich_4e},
diff --git a/dediprog.c b/dediprog.c
index f5d08ff..a730e4b 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -299,7 +299,7 @@ static int dediprog_spi_read(struct flashctx *flash, uint8_t *buf,
 	return 0;
 }
 
-/* Bulk write interface, will read multiple page_size byte chunks aligned to page_size bytes.
+/* Bulk write interface, will write multiple page_size byte chunks aligned to page_size bytes.
  * @start	start address
  * @len		length
  * @return	0 on success, 1 on failure
diff --git a/flashchips.c b/flashchips.c
index ca1c57f..6f5b6f4 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -1575,7 +1575,7 @@ const struct flashchip flashchips[] = {
 
 	{
 		.vendor		= "Atmel",
-		.name		= "AT25DF641",
+		.name		= "AT25DF641(A)",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= ATMEL_ID,
 		.model_id	= ATMEL_AT25DF641,
@@ -1961,7 +1961,7 @@ const struct flashchip flashchips[] = {
 		.total_size	= 64,
 		.page_size	= 128,
 		.feature_bits	= FEATURE_LONG_RESET,
-		.tested		= TEST_UNTESTED,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
 		.probe_timing	= 10000, /* 10mS, Enter=Exec */
 		.block_erasers	=
@@ -4421,7 +4421,7 @@ const struct flashchip flashchips[] = {
 		.total_size	= 8192,
 		.page_size	= 256,
 		.feature_bits	= FEATURE_WRSR_WREN,
-		.tested		= TEST_OK_PROBE,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
@@ -4951,7 +4951,7 @@ const struct flashchip flashchips[] = {
 		.model_id	= ST_M25PE80,
 		.total_size	= 1024,
 		.page_size	= 256,
-		.tested		= TEST_OK_PRE,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
@@ -6904,7 +6904,7 @@ const struct flashchip flashchips[] = {
 		.model_id	= ST_M25P40,
 		.total_size	= 512,
 		.page_size	= 256,
-		.tested		= TEST_OK_PR,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
@@ -8677,9 +8677,9 @@ const struct flashchip flashchips[] = {
 		.total_size	= 1024,
 		.page_size	= 64 * 1024,
 		.feature_bits	= FEATURE_EITHER_RESET,
-		.tested		= TEST_UNTESTED,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
-		.probe_timing	= 10, 
+		.probe_timing	= 10,
 		.block_erasers	=
 		{
 			{
diff --git a/flashchips.h b/flashchips.h
index 03efb86..8587ce9 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -364,7 +364,7 @@
 #define MACRONIX_MX25L8005	0x2014	/* Same as MX25V8005 */
 #define MACRONIX_MX25L1605	0x2015	/* MX25L1605{,A,D} */
 #define MACRONIX_MX25L3205	0x2016	/* MX25L3205{,A} */
-#define MACRONIX_MX25L6405	0x2017	/* MX25L3205{,D} */
+#define MACRONIX_MX25L6405	0x2017	/* MX25L6405{,D}, MX25L6406E, MX25L6436E */
 #define MACRONIX_MX25L12805	0x2018	/* MX25L12805 */
 #define MACRONIX_MX25L1635D	0x2415
 #define MACRONIX_MX25L1635E	0x2515	/* MX25L1635{E} */
diff --git a/flashrom.8 b/flashrom.8
index 2f23cb8..9ffd788 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -650,17 +650,15 @@ in
 .B "/etc/rc.securelevel"
 and rebooting, or rebooting into single user mode.
 .SH BUGS
-Please report any bugs at
-.sp
-.B "  http://www.flashrom.org/trac/flashrom/newticket"
-.sp
-or on the flashrom mailing list at
+Please report any bugs to the flashrom mailing list at
 .B "<flashrom at flashrom.org>"
 .sp
 We recommend to subscribe first at
 .sp
 .B "  http://www.flashrom.org/mailman/listinfo/flashrom"
 .sp
+Laptops
+.RS
 Using flashrom on laptops is dangerous and may easily make your hardware
 unusable unless you can desolder the flash chip and have a full flash chip
 backup. This is caused by the embedded controller (EC) present in many laptops,
diff --git a/ichspi.c b/ichspi.c
index 163ecf1..66b05a0 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1286,7 +1286,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
 	uint16_t timeout = 100 * 60;
 	uint8_t block_len;
 
-	if (addr < 0 || addr + len > flash->total_size * 1024) {
+	if (addr + len > flash->total_size * 1024) {
 		msg_perr("Request to read from an inaccessible memory address "
 			 "(addr=0x%x, len=%d).\n", addr, len);
 		return -1;
@@ -1324,7 +1324,7 @@ static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf,
 	uint16_t timeout = 100 * 60;
 	uint8_t block_len;
 
-	if (addr < 0 || addr + len > flash->total_size * 1024) {
+	if (addr + len > flash->total_size * 1024) {
 		msg_perr("Request to write to an inaccessible memory address "
 			 "(addr=0x%x, len=%d).\n", addr, len);
 		return -1;
diff --git a/print.c b/print.c
index b4900c3..2dece32 100644
--- a/print.c
+++ b/print.c
@@ -541,6 +541,7 @@ void print_supported(void)
 const struct board_info boards_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
 	B("A-Trend",	"ATC-6220",		1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
+	B("abit",	"A-S78H",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
 	B("abit",	"AN-M2",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
 	B("abit",	"AV8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
 	B("abit",	"AX8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
@@ -560,7 +561,7 @@ const struct board_info boards_known[] = {
 	B("Advantech",	"PCM-5820",		1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
 	B("agami",	"Aruma",		1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
 	B("Albatron",	"PM266A Pro",		1, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
-	B("AOpen",	"i945GMx-VFX",		1, NULL, "This is (also?) an OEM board from FCS (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
+	B("AOpen",	"i945GMx-VFX",		1, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
 	B("AOpen",	"vKM400Am-S",		1, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
 	B("Artec Group","DBE61",		1, "http://wiki.thincan.org/DBE61", NULL),
 	B("Artec Group","DBE62",		1, "http://wiki.thincan.org/DBE62", NULL),
@@ -571,6 +572,7 @@ const struct board_info boards_known[] = {
 	B("ASRock",	"A330GC",		1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
 	B("ASRock",	"A770CrossFire",	1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
 	B("ASRock",	"ALiveNF6G-DVI",	1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
+	B("ASRock",	"AM2NF6G-VSTA",		1, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
 	B("ASRock",	"ConRoeXFire-eSATA2",	1, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
 	B("ASRock",	"K7S41",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
 	B("ASRock",	"K7S41GX",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
@@ -610,7 +612,7 @@ const struct board_info boards_known[] = {
 	B("ASUS",	"K8V-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
 	B("ASUS",	"K8V-X SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
 	B("ASUS",	"M2A-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
-	B("ASUS",	"M2A-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html"),
+	B("ASUS",	"M2A-VM (HDMI)",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
 	B("ASUS",	"M2N32-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
 	B("ASUS",	"M2N-E",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
 	B("ASUS",	"M2N-E SLI",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
@@ -624,12 +626,13 @@ const struct board_info boards_known[] = {
 	B("ASUS",	"M3A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
 	B("ASUS",	"M3N78-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
 	B("ASUS",	"M4A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
-	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
 	B("ASUS",	"M4A785TD-M EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
+	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
 	B("ASUS",	"M4A78LT-M LE",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
 	B("ASUS",	"M4A79T Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
 	B("ASUS",	"M4A87TD/USB3",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
 	B("ASUS",	"M4A89GTD PRO",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
+	B("ASUS",	"M4N78 PRO",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
 	B("ASUS",	"M5A99X EVO",		1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
 	B("ASUS",	"MEW-AM",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
 	B("ASUS",	"MEW-VM",		0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
@@ -667,6 +670,7 @@ const struct board_info boards_known[] = {
 	B("ASUS",	"P5GD2/C variants",	0, NULL, "Untested board enable."),
 	B("ASUS",	"P5K-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
 	B("ASUS",	"P5KC",			1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
+	B("ASUS",	"P5KPL-CM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
 	B("ASUS",	"P5L-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
 	B("ASUS",	"P5L-VM 1394",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
 	B("ASUS",	"P5LD2",		0, NULL, "Untested board enable."),
@@ -677,8 +681,10 @@ const struct board_info boards_known[] = {
 	B("ASUS",	"P5N-D",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
 	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
 	B("ASUS",	"P5N32-E SLI",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
+	B("ASUS",	"P5N7A-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
 	B("ASUS",	"P5ND2-SLI Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
 	B("ASUS",	"P5PE-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
+	B("ASUS",	"P5QPL-AM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
 	B("ASUS",	"P5VD1-X",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
 	B("ASUS",	"P6T SE",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
 	B("ASUS",	"P6T Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
@@ -688,7 +694,10 @@ const struct board_info boards_known[] = {
 	B("ASUS",	"P8B-E/4L",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8B WS",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8H61 PRO",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H61-M LE/USB3",	0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H67-M PRO",		0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8P67 (rev. 3.1)",	0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8Z68-V PRO",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
 	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
 	B("BCOM",	"WinNET100",		1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
@@ -705,10 +714,12 @@ const struct board_info boards_known[] = {
 	B("DFI",	"855GME-MGF",		0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
 	B("DFI",	"Blood-Iron P35 T2RL",	1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
 	B("Elitegroup",	"GeForce6100SM-M ",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
+	B("Elitegroup", "GF7100PVT-M3 (V1.0)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
 	B("Elitegroup",	"K7S5A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
 	B("Elitegroup",	"K7S6A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
+	B("Elitegroup", "K7SEM (V1.0A)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
 	B("Elitegroup",	"K7VTA3",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
-	B("Elitegroup",	"P4M800PRO-M (V1.0A)",	1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
+	B("Elitegroup",	"P4M800PRO-M (V1.0A, V2.0)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
 	B("Elitegroup", "P4VXMS (V1.0A)",	1, NULL, NULL),
 	B("Elitegroup",	"P6IWP-Fe",		1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
 	B("Elitegroup",	"P6VAP-A+",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
@@ -746,6 +757,7 @@ const struct board_info boards_known[] = {
 	B("GIGABYTE",	"GA-945PL-S3P (rev. 6.6)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
 	B("GIGABYTE",	"GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
 	B("GIGABYTE",	"GA-965P-DS4",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
+	B("GIGABYTE",	"GA-EP31-DS3L (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
 	B("GIGABYTE",	"GA-EP35-DS3L",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
 	B("GIGABYTE",	"GA-EX58-UD4P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
 	B("GIGABYTE",	"GA-K8N-SLI",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
@@ -769,10 +781,13 @@ const struct board_info boards_known[] = {
 	B("GIGABYTE",	"GA-P55A-UD4 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
 	B("GIGABYTE",	"GA-P67A-UD3P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
 	B("GIGABYTE",	"GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL),
+	B("GIGABYTE",	"GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL),
 	B("GIGABYTE",	"GA-Z68MX-UD2H-B (rev. 1.3)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
+	B("GIGABYTE",	"GA-Z68XP-UD3 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
 	B("HP",		"e-Vectra P2706T",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
 	B("HP",		"ProLiant DL145 G3",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
 	B("HP",		"ProLiant DL165 G6",	1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
+	B("HP",		"ProLiant N40L",	1, NULL, NULL),
 	B("HP",		"Puffer2-UL8E",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
 	B("HP",		"Vectra VL400",		1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
 	B("HP",		"Vectra VL420 SFF",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
@@ -782,6 +797,7 @@ const struct board_info boards_known[] = {
 	B("IBM",	"x3455",		1, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
 	B("IEI",	"PICOe-9452",		1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
 	B("Intel",	"D201GLY",		1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
+	B("Intel",	"D425KT",		0, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
 	B("Intel",	"D865GLC",		0, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
 	B("Intel",	"DG45ID",		0, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
 	B("Intel",	"DH67CF",		0, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
@@ -825,6 +841,7 @@ const struct board_info boards_known[] = {
 	B("MSI",	"MS-7253 (K9VGM-V)",	1, "http://www.msi.com/product/mb/K9VGM-V.html", NULL),
 	B("MSI",	"MS-7255 (P4M890M)",	1, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
 	B("MSI",	"MS-7260 (K9N Neo PCB 1.0)", 0, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+	B("MSI",	"MS-7309 (K9N6PGM2-V2)", 1, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
 	B("MSI",	"MS-7312 (K9MM-V)",	1, "http://www.msi.com/product/mb/K9MM-V.html", NULL),
 	B("MSI",	"MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
 	B("MSI",	"MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
@@ -832,12 +849,14 @@ const struct board_info boards_known[] = {
 	B("MSI",	"MS-7376 (K9A2 Platinum V1)", 1, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
 	B("MSI",	"MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
 	B("MSI",	"MS-7529 (G31TM-P21)",  1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
+	B("MSI",	"MS-7548 (Aspen-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
 	B("MSI",	"MS-7596 (785GM-E51)",  1, "http://www.msi.com/product/mb/785GM-E51.html", NULL),
 	B("MSI",	"MS-7599 (870-C45)",	1, "http://www.msi.com/product/mb/870-C45.html", NULL),
 	B("MSI",	"MS-7613 (Iona-GL8E)",	0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("MSI",	"MS-7635 (H55M-ED55)",	0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("MSI",	"MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
 	B("MSI",	"MS-7642 (890GXM-G65)",	1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
+	B("MSI",	"MS-7676 (H67MA-ED55(B3))", 1, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
 	B("MSI",	"MS-7696 (A75MA-G55)",	1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
 	B("MSI",	"MS-7698 (E350IA-E45)",	1, "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
 	B("NEC",	"PowerMate 2000",	1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
@@ -850,6 +869,7 @@ const struct board_info boards_known[] = {
 	B("PC Engines",	"Alix.2d3",		1, "http://pcengines.ch/alix2d3.htm", NULL),
 	B("PC Engines",	"Alix.3c3",		1, "http://pcengines.ch/alix3c3.htm", NULL),
 	B("PC Engines",	"Alix.3d3",		1, "http://pcengines.ch/alix3d3.htm", NULL),
+	B("PC Engines",	"Alix.6f2",		1, "http://pcengines.ch/alix6f2.htm", NULL),
 	B("PC Engines",	"WRAP.2E",		1, "http://pcengines.ch/wrap2e1.htm", NULL),
 	B("Portwell",	"PEB-4700VLA",		1, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
 	B("RCA",	"RM4100",		1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
@@ -857,6 +877,7 @@ const struct board_info boards_known[] = {
 	B("Shuttle",	"AK31",			1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
 	B("Shuttle",	"AK38N",		1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
 	B("Shuttle",	"AV11V30",		1, NULL, NULL),
+	B("Shuttle",	"AV18E2",		1, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
 	B("Shuttle",	"FD37",			1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
 	B("Shuttle",	"FH67",			1, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
 	B("Shuttle",	"FN25",			1, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
@@ -875,12 +896,15 @@ const struct board_info boards_known[] = {
 	B("Supermicro", "X7DBT-INF",		1, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
 	B("Supermicro", "X7SPA-HF",		1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
 	B("Supermicro", "X8DT3",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
+	B("Supermicro", "X8DTE-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
 	B("Supermicro", "X8DTH-6F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
 	B("Supermicro",	"X8DTT-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
+	B("Supermicro",	"X8DTT-HIBQF",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
 	B("Supermicro",	"X8DTU-6TF+",		0, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Supermicro",	"X8DTU-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
 	B("Supermicro",	"X8SIE(-F)",		0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
 	B("Supermicro",	"X8STi",		1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
+	B("Supermicro",	"X9SCA-F",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Supermicro",	"X9SCL",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("T-Online",	"S-100",		1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
 	B("Tekram",	"P6Pro-A5",		1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
-- 
1.7.1



From dhendrix at google.com  Mon Feb 13 01:18:09 2012
From: dhendrix at google.com (David Hendricks)
Date: Sun, 12 Feb 2012 16:18:09 -0800
Subject: [flashrom] [PATCH] ARM support
In-Reply-To: <4F383BB2.2050608@gmx.net>
References: <4F3747EE.3090800@gmx.net> <4F383BB2.2050608@gmx.net>
Message-ID: <CAKOoyUcpzNe27i06G9BPJr9E2nW6=fwcn4bhwLfOLofGOs0h6A@mail.gmail.com>

It's a step in the right direction, and compiles for (and runs) on my
Tegra2 test platform, so:

Acked-by: David Hendricks <dhendrix at google.com>



> > David: This is mostly your code (I only extracted it from the chromium
> > branch of flashrom), could you sign off on it?
>

All code in this patch ported from chromium.org is:
Signed-off-by: David Hendricks <dhendrix at google.com>

-- 
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120212/50b69573/attachment.html>

From svn at flashrom.org  Mon Feb 13 01:35:35 2012
From: svn at flashrom.org (repository service)
Date: Mon, 13 Feb 2012 01:35:35 +0100
Subject: [flashrom] [commit] r1492 - trunk
Message-ID: <E1RwjtH-00018x-Mv@ra.coresystems.de>

Author: hailfinger
Date: Mon Feb 13 01:35:35 2012
New Revision: 1492
URL: http://flashrom.org/trac/flashrom/changeset/1492

Log:
Support compilation for the ARM architecture (little-endian only).

Note: The internal programmer will abort during processor check. This is
intentional.
The other hardware drivers (except those using port I/O) should work.

Signed-off-by: David Hendricks <dhendrix at google.com>
Acked-by: David Hendricks <dhendrix at google.com>
Tested-by: Timo Juhani Lindfors <timo.lindfors at iki.fi>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/Makefile
   trunk/arch.h
   trunk/hwaccess.c
   trunk/hwaccess.h
   trunk/programmer.h

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile	Sun Feb 12 01:13:14 2012	(r1491)
+++ trunk/Makefile	Mon Feb 13 01:35:35 2012	(r1492)
@@ -215,8 +215,9 @@
 # below uses CC itself.
 override ARCH := $(strip $(shell LC_ALL=C $(CC) $(CPPFLAGS) -E arch.h 2>/dev/null | grep -v '^\#' | grep '"' | cut -f 2 -d'"'))
 
-ifeq ($(ARCH), ppc)
-# There's no PCI port I/O support on PPC/PowerPC, yet.
+# PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM.
+# Right now this means the drivers below only work on x86.
+ifneq ($(ARCH), x86)
 ifeq ($(CONFIG_NIC3COM), yes)
 UNSUPPORTED_FEATURES += CONFIG_NIC3COM=yes
 else

Modified: trunk/arch.h
==============================================================================
--- trunk/arch.h	Sun Feb 12 01:13:14 2012	(r1491)
+++ trunk/arch.h	Mon Feb 13 01:35:35 2012	(r1492)
@@ -27,5 +27,7 @@
 #define __FLASHROM_ARCH__ "mips"
 #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)
 #define __FLASHROM_ARCH__ "ppc"
+#elif defined(__arm__)
+#define __FLASHROM_ARCH__ "arm"
 #endif
 __FLASHROM_ARCH__

Modified: trunk/hwaccess.c
==============================================================================
--- trunk/hwaccess.c	Sun Feb 12 01:13:14 2012	(r1491)
+++ trunk/hwaccess.c	Mon Feb 13 01:35:35 2012	(r1492)
@@ -116,6 +116,20 @@
 {
 }
 
+#elif defined (__arm__)
+
+static inline void sync_primitive(void)
+{
+}
+
+void get_io_perms(void)
+{
+}
+
+void release_io_perms(void)
+{
+}
+
 #else
 
 #error Unknown architecture

Modified: trunk/hwaccess.h
==============================================================================
--- trunk/hwaccess.h	Sun Feb 12 01:13:14 2012	(r1491)
+++ trunk/hwaccess.h	Mon Feb 13 01:35:35 2012	(r1492)
@@ -68,6 +68,13 @@
 #error Little-endian PowerPC #defines are unknown
 #endif
 
+#elif defined (__arm__)
+#if defined (__ARMEL__)
+#define __FLASHROM_LITTLE_ENDIAN__ 1
+#else
+#error Big-endian ARM #defines are unknown
+#endif
+
 #endif
 
 #if !defined (__FLASHROM_BIG_ENDIAN__) && !defined (__FLASHROM_LITTLE_ENDIAN__)
@@ -326,6 +333,10 @@
 
 /* PCI port I/O is not yet implemented on MIPS. */
 
+#elif defined(__arm__)
+
+/* Non memory mapped I/O is not supported on ARM. */
+
 #else
 
 #error Unknown architecture, please check if it supports PCI port IO.

Modified: trunk/programmer.h
==============================================================================
--- trunk/programmer.h	Sun Feb 12 01:13:14 2012	(r1491)
+++ trunk/programmer.h	Mon Feb 13 01:35:35 2012	(r1492)
@@ -527,6 +527,7 @@
 int register_spi_programmer(const struct spi_programmer *programmer);
 
 /* ichspi.c */
+#if CONFIG_INTERNAL == 1
 enum ich_chipset {
 	CHIPSET_ICH_UNKNOWN,
 	CHIPSET_ICH7 = 7,
@@ -538,7 +539,6 @@
 	CHIPSET_7_SERIES_PANTHER_POINT
 };
 
-#if CONFIG_INTERNAL == 1
 extern uint32_t ichspi_bbar;
 int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		 enum ich_chipset ich_generation);


From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb 13 01:41:10 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 13 Feb 2012 01:41:10 +0100
Subject: [flashrom] [PATCH] ARM support
In-Reply-To: <CAKOoyUcpzNe27i06G9BPJr9E2nW6=fwcn4bhwLfOLofGOs0h6A@mail.gmail.com>
References: <4F3747EE.3090800@gmx.net> <4F383BB2.2050608@gmx.net>
	<CAKOoyUcpzNe27i06G9BPJr9E2nW6=fwcn4bhwLfOLofGOs0h6A@mail.gmail.com>
Message-ID: <4F385C26.9090801@gmx.net>

Am 13.02.2012 01:18 schrieb David Hendricks:
> It's a step in the right direction, and compiles for (and runs) on my
> Tegra2 test platform, so:
>
> Acked-by: David Hendricks <dhendrix at google.com>

The other tests done by lindi- were reported on IRC in #debian-arm.


>>> David: This is mostly your code (I only extracted it from the chromium
>>> branch of flashrom), could you sign off on it?
> All code in this patch ported from chromium.org is:
> Signed-off-by: David Hendricks <dhendrix at google.com>

The other tests done by lindi- were reported on IRC in #debian-arm.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

A small (almost trivial) addition to the chromium patch in hwaccess.h
was done by me, for which I state
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Committed in r1492.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb 13 02:34:10 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 13 Feb 2012 02:34:10 +0100
Subject: [flashrom] [PATCH] selfcheck script using dummy programmer
Message-ID: <4F386892.7030609@gmx.net>

This script attempts to test basic flashrom functionality with the help
of the dummy programmer and builtin chip simulator.
It does not need any hardware access and is ideal for post-compilation
self checks, especially for package maintainers.

FIXMEs:
Should the path to flashrom be hardcoded as ./flashrom ?
Can we really assume the script will always be called from the main
flashrom directory?
How do we make sure that nobody packages the script since it's useless
for end users?
How do we handle addition of new chips gracefully?

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-dummy_selfcheck_script/util/flashrom_dummy.log
===================================================================
--- flashrom-dummy_selfcheck_script/util/flashrom_dummy.log	(revision 0)
+++ flashrom-dummy_selfcheck_script/util/flashrom_dummy.log	(revision 0)
@@ -0,0 +1,339 @@
+flashrom v0.9.4-r1492 on Linux 2.6.34.10-0.6-default (i686), built with LLVM Clang 3.0 (branches/release_30 145598), little endian
+flashrom is free software, get the source code at http://www.flashrom.org
+
+Calibrating delay loop... OS timer resolution is 1 usecs, 530M loops per second, 10 myus = 10 us, 100 myus = 101 us, 1000 myus = 995 us, 10000 myus = 9994 us, 4 myus = 5 us, OK.
+Initializing dummy programmer
+Requested buses are: default
+Enabling support for parallel flash.
+Enabling support for LPC flash.
+Enabling support for FWH flash.
+Enabling support for SPI flash.
+SPI blacklist is 20 , size 1
+SPI ignorelist is 52 , size 1
+Emulating SST SST25VF032B SPI flash chip (RDID, AAI write)
+Filling fake flash chip with 0xff, size 4194304
+Found persistent image dummy_simulator.tmp, size 4194304 matches.
+Reading dummy_simulator.tmp
+The following protocols are supported: Parallel, LPC, FWH, SPI.
+Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
+Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
+Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
+Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
+Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB: Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with such a chip.
+Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
+Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0xff, id2 0xff
+Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0xff, id2 0xff
+Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xff, id2 0xff
+Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Chip status register is 00
+Chip status register: Block Protect Write Disable (BPL) is not set
+Chip status register: Auto Address Increment Programming (AAI) is not set
+Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
+Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
+Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
+Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
+Chip status register: Write Enable Latch (WEL) is not set
+Chip status register: Write In Progress (WIP/BUSY) is not set
+Found SST flash chip "SST25VF032B" (4096 kB, SPI) on dummy.
+Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xff, id2 0xff
+Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff
+Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
+Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
+Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
+Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x254a
+Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xff, id2 0xff
+Found SST flash chip "SST25VF032B" (4096 kB, SPI).
+Reading old flash chip contents... done.
+Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:ERefusing blacklisted SPI command 0x20
+Invalid command sent to flash chip!
+spi_block_erase_20 failed during command execution at address 0x0
+Reading current flash chip contents... done. Looking for another erase function.
+Trying erase function 1... 0x000000-0x007fff:EIgnoring ignorelisted SPI command 0x52
+ERASE FAILED at 0x00000000! Expected=0xff, Read=0x00, failed byte count from 0x00000000-0x00007fff: 0x8000
+ERASE FAILED!
+Reading current flash chip contents... done. Looking for another erase function.
+Trying erase function 2... 0x000000-0x00ffff:EW, 0x010000-0x01ffff:EW, 0x020000-0x02ffff:EW, 0x030000-0x03ffff:EW, 0x040000-0x04ffff:EW, 0x050000-0x05ffff:EW, 0x060000-0x06ffff:EW, 0x070000-0x07ffff:EW, 0x080000-0x08ffff:EW, 0x090000-0x09ffff:EW, 0x0a0000-0x0affff:EW, 0x0b0000-0x0bffff:EW, 0x0c0000-0x0cffff:EW, 0x0d0000-0x0dffff:EW, 0x0e0000-0x0effff:EW, 0x0f0000-0x0fffff:EW, 0x100000-0x10ffff:EW, 0x110000-0x11ffff:EW, 0x120000-0x12ffff:EW, 0x130000-0x13ffff:EW, 0x140000-0x14ffff:EW, 0x150000-0x15ffff:EW, 0x160000-0x16ffff:EW, 0x170000-0x17ffff:EW, 0x180000-0x18ffff:EW, 0x190000-0x19ffff:EW, 0x1a0000-0x1affff:EW, 0x1b0000-0x1bffff:EW, 0x1c0000-0x1cffff:EW, 0x1d0000-0x1dffff:EW, 0x1e0000-0x1effff:EW, 0x1f0000-0x1fffff:EW, 0x200000-0x20ffff:EW, 0x210000-0x21ffff:EW, 0x220000-0x22ffff:EW, 0x230000-0x23ffff:EW, 0x240000-0x24ffff:EW, 0x250000-0x25ffff:EW, 0x260000-0x26ffff:EW, 0x270000-0x27ffff:EW, 0x280000-0x28ffff:EW, 0x290000-0x29ffff:EW, 0x2a0000-0x2affff:EW, 0x2b0000-0x2bffff:EW, 0x2c0000-0x2cffff:EW, 0x2d0000-0x2dffff:EW, 0x2e0000-0x2effff:EW, 0x2f0000-0x2fffff:EW, 0x300000-0x30ffff:EW, 0x310000-0x31ffff:EW, 0x320000-0x32ffff:EW, 0x330000-0x33ffff:EW, 0x340000-0x34ffff:EW, 0x350000-0x35ffff:EW, 0x360000-0x36ffff:EW, 0x370000-0x37ffff:EW, 0x380000-0x38ffff:EW, 0x390000-0x39ffff:EW, 0x3a0000-0x3affff:EW, 0x3b0000-0x3bffff:EW, 0x3c0000-0x3cffff:EW, 0x3d0000-0x3dffff:EW, 0x3e0000-0x3effff:EW, 0x3f0000-0x3fffff:EW
+Erase/write done.
+Verifying flash... VERIFIED.          
+Writing dummy_simulator.tmp
Index: flashrom-dummy_selfcheck_script/util/flashrom_dummy_selfcheck.sh
===================================================================
--- flashrom-dummy_selfcheck_script/util/flashrom_dummy_selfcheck.sh	(revision 0)
+++ flashrom-dummy_selfcheck_script/util/flashrom_dummy_selfcheck.sh	(revision 0)
@@ -0,0 +1,38 @@
+#!/bin/sh
+#
+# Copyright (C) 2012 Carl-Daniel Hailfinger
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+#
+# This script attempts to test basic flashrom functionality with the help of
+# the dummy programmer and builtin chip simulator.
+# It does not need any hardware access and is ideal for post-compilation
+# self checks, especially for package maintainers.
+
+LANG=C
+ret=0
+dd if=/dev/zero bs=1024k count=4 of=dummy_simulator.tmp 2>/dev/null || { echo "Image creation failed!" >&2 ; exit 1; }
+dd if=/dev/urandom bs=1024k count=4 of=randomimage.tmp 2>/dev/null || { echo "Image creation failed!" >&2 ; exit 1; }
+./flashrom -p dummy:emulate=SST25VF032B,image=dummy_simulator.tmp,spi_blacklist=20,spi_ignorelist=52 -w randomimage.tmp -V >flashrom_dummy.tmp 2>&1
+test $? -eq 0 || { ret=1; echo "flashrom returned an error!" >&2 ; }
+echo "Checking for output message differences..."
+diff flashrom_dummy.tmp util/flashrom_dummy.log
+# Filter out version/architecture string and delay loop calibration
+diff flashrom_dummy.tmp util/flashrom_dummy.log | grep "^[<>]" | grep -v "^[<>] flashrom v0\.9\.\|^[<>] Calibrating delay loop\.\.\..*OK.$" | wc -l | grep -q "^0$"
+test $? -eq 0 && { echo "No significant message differences found."; } || { ret=1; echo "Significant message differences found!" >&2 ; }
+cmp randomimage.tmp dummy_simulator.tmp
+test $? -eq 0 || { ret=1; echo "Written image has wrong contents!" >&2 ; }
+rm dummy_simulator.tmp randomimage.tmp flashrom_dummy.tmp
+exit $ret

Property changes on: flashrom-dummy_selfcheck_script/util/flashrom_dummy_selfcheck.sh
___________________________________________________________________
Added: svn:executable
   + *



-- 
http://www.hailfinger.org/




From mightyiampresence at gmail.com  Mon Feb 13 11:09:53 2012
From: mightyiampresence at gmail.com (Shahar Or)
Date: Mon, 13 Feb 2012 12:09:53 +0200
Subject: [flashrom] Verified working on Gigabyte 880GMA-USB3
Message-ID: <CAF3gKsyc4+=BjBFRkwMxW+zb+ObFZsYhtXQjC1zBMFOYoiodOg@mail.gmail.com>

Dear ones,

I'm not subscribed to the list so please reply directly.

I've tested read and write on Gigabyte GA-880GMA-USB3 (rev 3.1).

Thanks so much for enabling me to flash my BIOS ROM from Linux!

Here's the link to the mainboard's page in Gigabyte:
http://www.gigabyte.com/products/product-page.aspx?pid=3817

Blessings,
Shahar


From stefan.tauner at student.tuwien.ac.at  Mon Feb 13 14:54:10 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 13 Feb 2012 14:54:10 +0100
Subject: [flashrom] Verified working on Gigabyte 880GMA-USB3
In-Reply-To: <CAF3gKsyc4+=BjBFRkwMxW+zb+ObFZsYhtXQjC1zBMFOYoiodOg@mail.gmail.com>
References: <CAF3gKsyc4+=BjBFRkwMxW+zb+ObFZsYhtXQjC1zBMFOYoiodOg@mail.gmail.com>
Message-ID: <201202131353.q1DDrVrC018002@mail2.student.tuwien.ac.at>

On Mon, 13 Feb 2012 12:09:53 +0200
Shahar Or <mightyiampresence at gmail.com> wrote:

> Dear ones,
> 
> I'm not subscribed to the list so please reply directly.
> 
> I've tested read and write on Gigabyte GA-880GMA-USB3 (rev 3.1).
> 
> Thanks so much for enabling me to flash my BIOS ROM from Linux!
> 
> Here's the link to the mainboard's page in Gigabyte:
> http://www.gigabyte.com/products/product-page.aspx?pid=3817


Hello Shahar,

thanks for your report! I have marked the mainboard as tested and will
commit that later together with other small changes. It would be
appreciated if you could upload verbose logs of flashrom with such
reports (at least a verbose probing with flashrom -V).

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From elsifaka at gmail.com  Mon Feb 13 15:12:25 2012
From: elsifaka at gmail.com (Tosoa Bacca)
Date: Mon, 13 Feb 2012 17:12:25 +0300
Subject: [flashrom] HM65
Message-ID: <CANJZsBaz7t3SD4KDD9p0KUyWPcnK96ma3=i3Ub8k08+i0-7ALA@mail.gmail.com>

Hello,

as requested, here is a verbose output of flashrom on my P150HM.

And I would like to ask if I have got the EC
(http://www.pcw.fr/bios/BIOS_P150HM_EC_13.zip) from the retailer,
can't I use flashrom to update my BIOS ?

thank you,

-- 
Mandrantosoa 'Ndrianiaina
Project Manager
http://jojopil.com
+261 34 01 236 31 ? +261 33 37 705 04
-------------- next part --------------
A non-text attachment was scrubbed...
Name: flashrom.log
Type: text/x-log
Size: 21456 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120213/16cffac0/attachment-0001.log>

From stefan.tauner at student.tuwien.ac.at  Mon Feb 13 18:47:17 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 13 Feb 2012 18:47:17 +0100
Subject: [flashrom] HM65
In-Reply-To: <CANJZsBaz7t3SD4KDD9p0KUyWPcnK96ma3=i3Ub8k08+i0-7ALA@mail.gmail.com>
References: <CANJZsBaz7t3SD4KDD9p0KUyWPcnK96ma3=i3Ub8k08+i0-7ALA@mail.gmail.com>
Message-ID: <201202131746.q1DHkedp012943@mail2.student.tuwien.ac.at>

On Mon, 13 Feb 2012 17:12:25 +0300
Tosoa Bacca <elsifaka at gmail.com> wrote:

> Hello,
> 
> as requested, here is a verbose output of flashrom on my P150HM.
> 
> And I would like to ask if I have got the EC
> (http://www.pcw.fr/bios/BIOS_P150HM_EC_13.zip) from the retailer,
> can't I use flashrom to update my BIOS ?

> 0x5C: 0x01ff0001 (FREG2: Management Engine)
> 0x00001000-0x001fffff is locked

Hello Tosoa,

thanks for your report!

Flashrom is currently not able to write the full image. The problem is
the locked ME region as quoted above. We are working on unlocking it,
but intel does not provide us any documentation so please do not expect
a solution soon.

I have added the board to our list of (un)supported laptops (with an
appropriate note) and will commit that later together with other small
changes. Please use the vendor tools to update your firmware.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb 13 23:26:41 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 13 Feb 2012 23:26:41 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user when a protected region
 is detected
In-Reply-To: <201111272126.pARLQqhm027641@mail2.student.tuwien.ac.at>
References: <1319150349-24326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1322350543-6883-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<CAJ_ov55JJ1pMVtPGQmJJUq_P0fpT3byOsDC9d+mw_8MqKRZLYg@mail.gmail.com>
	<201111272126.pARLQqhm027641@mail2.student.tuwien.ac.at>
Message-ID: <4F398E21.3010404@gmx.net>

Am 27.11.2011 22:27 schrieb Stefan Tauner:
> On Sun, 27 Nov 2011 11:48:51 -0800
> David Hendricks <david.hendricks at gmail.com> wrote:
>
>> On Sat, Nov 26, 2011 at 3:35 PM, Stefan Tauner <
>> stefan.tauner at student.tuwien.ac.at> wrote:
>>
>>> This includes the notorious read-only flash descriptors and locked ME
>>> regions.
>>> ---
>>> non-verbose sample output from my laptop:
>>> [?]
>>> Found chipset "Intel QS57". Enabling flash write... WARNING: SPI
>>> Configuration Lockdown activated.
>>> WARNING: Flash Descriptor region is not fully accessible and flashrom can
>>> not deal with this correctly yet. Intel does not provide us the necessary
>>> documention to support this.
>>
>> To be fair, I think Intel documents it fine.
> That depends on what 'it' is. The limitations and the influence of
> FDOPSS on that limitation are well defined in public documentation. But
> the unlocking process is not documented at all publicly. We know from
> different leaked documents and also from the fact that vendor tools
> exist, that unlocking can be done by software only and without touching
> the FDOPSS pin by sending the "HMRFPO Enable" command via HECI/MEI to
> the ME. The details are documented in the BIOS writer guide(s) (which
> are "restricted secret" level(?))
>
>> I think what we've got to do
>> is checking the flash descriptor override pin strap status (FDOPSS). If it
>> is cleared then we can ignore the descriptor, otherwise if it is set then
>> we need to avoid locked regions.
> I would not call it 'ignoring'. We should be aware, that the limitation
> do not apply (we do print a message to the user already in that case),
> but we could and should use the regions where it makes sense
> (e.g. automatic creation of layout (file)s.
>
>> It's really just a pain in the ass and, as you pointed out, may leave the
>> BIOS/ME firmware blobs in an inconsistent or incompatible state. So the
>> onus is on the user to ensure a safe upgrade path if only part of the ROM
>> can be updated. It's probably worth displaying a warning and requiring
>> "--force" or something in that scenario.
> As a first step yes. IIRC i have sent a patch that does that when active
> PR protections are found(?), but i think it is not in/reviewed yet. I
> agree, we should set write_allowed = 0 (or whatever it was) and
> rephrase the warning to include that.

Do you want to keep the message as-is or do you want to make some
changes? I don't have a strong preference either way.

And do you want to set programmer_may_write=0 here?

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From itcygan at gmail.com  Tue Feb 14 09:58:08 2012
From: itcygan at gmail.com (Mariusz Cygan)
Date: Tue, 14 Feb 2012 09:58:08 +0100
Subject: [flashrom] FAILED: FR597AA-AKD m9360.pl (FR597AA#AKD)
Message-ID: <CALcBrbzZeY=wHs9SnRZTuW7+R=yoTjL72x=SJTTTA2Fbrhnh4Q@mail.gmail.com>

flashrom -c W25X80 -w NT35.bin
flashrom v0.9.4-r1394 on Linux 3.0.0-16-generic (x86_64), built with libpci
3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
Found chipset "NVIDIA MCP61".
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
SPI on this chipset is WIP. Please report any success or failure by mailing
us the verbose output to flashrom at flashrom.org, thanks!
Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544.
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for
your
chipset. Thanks.
OK.
This chipset supports the following protocols: SPI.
Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address
0xfff00000.
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Erase/write done.
Verifying flash... VERIFY FAILED at 0x00011a00! Expected=0x05, Read=0xff,
failed byte count from 0x00000000-0x000fffff: 0x1f8
Your flash chip is in an unknown state.
Get help on IRC at irc.freenode.net (channel #flashrom) or
mail flashrom at flashrom.org with FAILED: your board name in the subject line!
-------------------------------------------------------------------------------
DO NOT REBOOT OR POWEROFF!


-- 

Serdecznie pozdrawiam

Mariusz Cygan

Specjalista IT / Administrator / Help Desk
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120214/f7e96bbf/attachment.html>

From stefan.tauner at student.tuwien.ac.at  Tue Feb 14 11:35:11 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 14 Feb 2012 11:35:11 +0100
Subject: [flashrom] FAILED: FR597AA-AKD m9360.pl (FR597AA#AKD)
In-Reply-To: <CALcBrbzZeY=wHs9SnRZTuW7+R=yoTjL72x=SJTTTA2Fbrhnh4Q@mail.gmail.com>
References: <CALcBrbzZeY=wHs9SnRZTuW7+R=yoTjL72x=SJTTTA2Fbrhnh4Q@mail.gmail.com>
Message-ID: <201202141034.q1EAYbxA005921@mail2.student.tuwien.ac.at>

On Tue, 14 Feb 2012 09:58:08 +0100
Mariusz Cygan <itcygan at gmail.com> wrote:

> flashrom -c W25X80 -w NT35.bin
> flashrom v0.9.4-r1394 on Linux 3.0.0-16-generic (x86_64), built with libpci
> 3.1.7, GCC 4.6.1, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
> 
> Calibrating delay loop... OK.
> Found chipset "NVIDIA MCP61".
> This chipset is marked as untested. If you are using an up-to-date version
> of flashrom please email a report to flashrom at flashrom.org including a
> verbose (-V) log. Thank you!
> Enabling flash write... This chipset is not really supported yet.
> Guesswork...
> SPI on this chipset is WIP. Please report any success or failure by mailing
> us the verbose output to flashrom at flashrom.org, thanks!
> Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544.
> Please send the output of "flashrom -V" to flashrom at flashrom.org with
> your board name: flashrom -V as the subject to help us finish support for
> your
> chipset. Thanks.
> OK.
> This chipset supports the following protocols: SPI.
> Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address
> 0xfff00000.
> Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
> Reading old flash chip contents... done.
> Erasing and writing flash chip... Erase/write done.
> Verifying flash... VERIFY FAILED at 0x00011a00! Expected=0x05, Read=0xff,
> failed byte count from 0x00000000-0x000fffff: 0x1f8
> Your flash chip is in an unknown state.
> Get help on IRC at irc.freenode.net (channel #flashrom) or
> mail flashrom at flashrom.org with FAILED: your board name in the subject line!
> -------------------------------------------------------------------------------
> DO NOT REBOOT OR POWEROFF!
> 
> 

Hello Mariusz,

i am not very familiar with the chipset, so i cant really help by
fixing the problem. It seems that the addressing is somehow broken: I
know that because erase and write succeeds. It does only succeed, if it
can verify the contents of every block it wrote to be correct. After
the whole process it does read the whole chip again and checks if it
equals the image. Now if the addressing of the blocks wraps somewhere
then the erase/write code will overwrite some blocks without noticing
it (the block itself looks correct to it), but verification will fail
at the end. Someone will have to look at it later. They will probably
want to look at least at a verbose log, so please post the output of
flashrom -V (and additionally maybe even with -VVV). The output of lspci
-nnvvxxx (run as root) may also be useful.

To get your board back to a consistent state, you could try flashing
the backup you made with the -r/--read option (you DID make a backup,
right?). But i fear it may also fail... in that case or if you do not
have a backup please join IRC and most importantly: DO NOT REBOOT OR
POWER OFF! We really mean it.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From itcygan at gmail.com  Tue Feb 14 11:39:01 2012
From: itcygan at gmail.com (Mariusz Cygan)
Date: Tue, 14 Feb 2012 11:39:01 +0100
Subject: [flashrom] FAILED: FR597AA-AKD m9360.pl (FR597AA#AKD)
In-Reply-To: <201202141034.q1EAYbxA005921@mail2.student.tuwien.ac.at>
References: <CALcBrbzZeY=wHs9SnRZTuW7+R=yoTjL72x=SJTTTA2Fbrhnh4Q@mail.gmail.com>
	<201202141034.q1EAYbxA005921@mail2.student.tuwien.ac.at>
Message-ID: <CALcBrbzKz0WtiFG9xvYJ-BnLiVpZ-ePO=_tXF=pXhfhAWJoz2Q@mail.gmail.com>

:( and now I have to pay for the reprogramming of bone BIOS. Restored
back however,
and so does not work.


2012/2/14 Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

> On Tue, 14 Feb 2012 09:58:08 +0100
> Mariusz Cygan <itcygan at gmail.com> wrote:
>
> > flashrom -c W25X80 -w NT35.bin
> > flashrom v0.9.4-r1394 on Linux 3.0.0-16-generic (x86_64), built with
> libpci
> > 3.1.7, GCC 4.6.1, little endian
> > flashrom is free software, get the source code at
> http://www.flashrom.org
> >
> > Calibrating delay loop... OK.
> > Found chipset "NVIDIA MCP61".
> > This chipset is marked as untested. If you are using an up-to-date
> version
> > of flashrom please email a report to flashrom at flashrom.org including a
> > verbose (-V) log. Thank you!
> > Enabling flash write... This chipset is not really supported yet.
> > Guesswork...
> > SPI on this chipset is WIP. Please report any success or failure by
> mailing
> > us the verbose output to flashrom at flashrom.org, thanks!
> > Mapping NVIDIA MCP6x SPI at 0xfec80000, unaligned size 0x544.
> > Please send the output of "flashrom -V" to flashrom at flashrom.org with
> > your board name: flashrom -V as the subject to help us finish support for
> > your
> > chipset. Thanks.
> > OK.
> > This chipset supports the following protocols: SPI.
> > Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address
> > 0xfff00000.
> > Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
> > Reading old flash chip contents... done.
> > Erasing and writing flash chip... Erase/write done.
> > Verifying flash... VERIFY FAILED at 0x00011a00! Expected=0x05, Read=0xff,
> > failed byte count from 0x00000000-0x000fffff: 0x1f8
> > Your flash chip is in an unknown state.
> > Get help on IRC at irc.freenode.net (channel #flashrom) or
> > mail flashrom at flashrom.org with FAILED: your board name in the subject
> line!
> >
> -------------------------------------------------------------------------------
> > DO NOT REBOOT OR POWEROFF!
> >
> >
>
> Hello Mariusz,
>
> i am not very familiar with the chipset, so i cant really help by
> fixing the problem. It seems that the addressing is somehow broken: I
> know that because erase and write succeeds. It does only succeed, if it
> can verify the contents of every block it wrote to be correct. After
> the whole process it does read the whole chip again and checks if it
> equals the image. Now if the addressing of the blocks wraps somewhere
> then the erase/write code will overwrite some blocks without noticing
> it (the block itself looks correct to it), but verification will fail
> at the end. Someone will have to look at it later. They will probably
> want to look at least at a verbose log, so please post the output of
> flashrom -V (and additionally maybe even with -VVV). The output of lspci
> -nnvvxxx (run as root) may also be useful.
>
> To get your board back to a consistent state, you could try flashing
> the backup you made with the -r/--read option (you DID make a backup,
> right?). But i fear it may also fail... in that case or if you do not
> have a backup please join IRC and most importantly: DO NOT REBOOT OR
> POWER OFF! We really mean it.
>
> --
> Kind regards/Mit freundlichen Gr??en, Stefan Tauner
>



-- 

Serdecznie pozdrawiam

Mariusz Cygan

Specjalista IT / Administrator / Help Desk
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120214/1d7488df/attachment.html>

From stefan.tauner at student.tuwien.ac.at  Tue Feb 14 15:51:41 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 14 Feb 2012 15:51:41 +0100
Subject: [flashrom] [PATCH] Reformat the internal programmer section in the
	man page.
Message-ID: <1329231101-9384-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

The section describing the various options of the internal programmer has grown
out of proportions and it has become confusing. This patch adds some headlines
to devide the unrelated topics a bit.
---
I would also like to make the syntax examples non-bold so that the headlines
stick out more (TBH i don't see the point in making the examples stick out that
much by making them bold and reside on their own line at all).

The dummy programmer probably needs something similar rather
sooner than later.

Opinions and other format command suggestions are very welcome!

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.8 |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/flashrom.8 b/flashrom.8
index 9ffd788..367a0a9 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -225,6 +225,9 @@ programmers use a key/value interface in which the key and value is separated
 by an equal sign and different pairs are separated by a comma or a colon.
 .TP
 .BR "internal " programmer
+.sp
+.B * Board Enables
+.sp
 Some mainboards require to run mainboard specific code to enable flash erase
 and write support (and probe support on old systems with parallel flash).
 The mainboard brand and model (if it requires specific code) is usually
@@ -275,6 +278,8 @@ has been written because it is known that writing/erasing without the board
 enable is going to fail. In any case (success or failure), please report to
 the flashrom mailing list, see below.
 .sp
+.B * Coreboot
+.sp
 On systems running coreboot, flashrom checks whether the desired image matches
 your mainboard. This needs some special board ID to be present in the image.
 If flashrom detects that the image you want to write and the current board
@@ -282,6 +287,8 @@ do not match, it will refuse to write the image unless you specify
 .sp
 .B "  flashrom \-p internal:boardmismatch=force"
 .sp
+.B * ITE IT87 Super I/O
+.sp
 If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
 translation, flashrom should autodetect that configuration. If you want to
 set the I/O base port of the IT87 series SPI controller manually instead of
@@ -295,6 +302,8 @@ is the I/O port number (must be a multiple of 8). In the unlikely case
 flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
 report so we can diagnose the problem.
 .sp
+.B * Intel chipsets
+.sp
 If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
 attached, and if a valid descriptor was written to it (e.g. by the vendor), the
 chipset provides an alternative way to access the flash chip(s) named
@@ -332,6 +341,8 @@ settings. The default value for ICH7 is given in the example below.
 Example:
 .B "flashrom \-p internal:fwh_idsel=0x001122334567"
 .sp
+.B * Laptops
+.sp
 Using flashrom on laptops is dangerous and may easily make your hardware
 unusable (see also the
 .B BUGS
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Tue Feb 14 16:39:16 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 14 Feb 2012 16:39:16 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user and disable writes when a
	protected address range is detected.
In-Reply-To: <4F398E21.3010404@gmx.net>
References: <4F398E21.3010404@gmx.net>
Message-ID: <1329233956-12464-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

This includes not only the notorious read-only flash descriptors and locked ME
regions, but also the more rarely used PRs (Protected Ranges).
The user can enforce write support by specifying ich_spi_force=yes in the
programmer options, but we don't tell him the exact syntax interactively. He
has to read it up in the man page.
---
non-verbose sample output from my laptop (that contains both protection types):
[?]
Found chipset "Intel QS57". Enabling flash write... WARNING: SPI Configuration Lockdown activated.
WARNING: Flash Descriptor region is not fully accessible and flashrom can
not deal with this correctly yet.
Intel does not provide us the necessary documention to support this.
Please send a verbose log to flashrom at flashrom.org if this board is not listed on
http://flashrom.org/Supported_hardware#Supported_mainboards yet.
Writes have been disabled. You can enforce write support with the
ich_spi_force programmer option, but it will most likely harm your hardware!
If you force flashrom you will get no support if something breaks.
WARNING: Management Engine region is not fully accessible and flashrom can
not deal with this correctly yet.
WARNING: PR0: 0x007d0000-0x01ffffff is read-only.
OK.
[?]

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.8 |   15 ++++++++++
 ichspi.c   |   90 +++++++++++++++++++++++++++++++++++++++++++++++------------
 2 files changed, 86 insertions(+), 19 deletions(-)

diff --git a/flashrom.8 b/flashrom.8
index 2f23cb8..0ca4fdb 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash
 chip is attached). The other options (swseq, hwseq) select the respective mode
 (if possible).
 .sp
+ICH8 and later southbridges may also have locked address ranges of different
+kinds if a valid descriptor was written to it. The flash address space is then
+partitioned in multiple so called "Flash Regions" containing the host firmware,
+the ME firmware and so on respectively. The flash descriptor can also specify up
+to 5 so called "Protected Regions", which are freely chosen address ranges
+independent from the aforementioned "Flash Regions". All of them can be write
+and/or read protected individually. If flashrom detects such a lock it will
+disable write support unless the user forces it with the
+.sp
+.B "  flashrom \-p internal:ich_spi_force=yes"
+.sp
+syntax. If this leads to erase or write accesses to the flash it would most
+probably bring it into an inconsistent and unbootable state and we will not
+provide any support in such a case.
+.sp
 If you have an Intel chipset with an ICH6 or later southbridge and if you want
 to set specific IDSEL values for a non-default flash chip or an embedded
 controller (EC), you can use the
diff --git a/ichspi.c b/ichspi.c
index 163ecf1..f21bb35 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1416,12 +1416,36 @@ static int ich_spi_send_multicommand(struct flashctx *flash,
 	return ret;
 }
 
+static void ich9_disable_writes(int force, const char * const msg)
+{
+	/* Don't scare and spam the user even more if write support was already
+	 * disabled */
+	if (!programmer_may_write)
+		return;
+
+	msg_pinfo("%s", msg);
+	msg_pinfo("Please send a verbose log to flashrom at flashrom.org if this "
+		  "board is not listed on\n"
+		  "http://flashrom.org/Supported_hardware#Supported_mainboards "
+		  "yet.\n");
+	if (!force) {
+		programmer_may_write = 0;
+		msg_pinfo("Writes have been disabled. You can enforce write "
+			  "support with the\nich_spi_force programmer option, "
+			  "but it will most likely harm your hardware!\n");
+	}
+	msg_pinfo("If you force flashrom you will get no support if something "
+		  "breaks.\n");
+	if (force)
+		msg_pinfo("Continuing anyway because the user forced us to!\n");
+}
+
 #define ICH_BMWAG(x) ((x >> 24) & 0xff)
 #define ICH_BMRAG(x) ((x >> 16) & 0xff)
 #define ICH_BRWA(x)  ((x >>  8) & 0xff)
 #define ICH_BRRA(x)  ((x >>  0) & 0xff)
 
-static void do_ich9_spi_frap(uint32_t frap, int i)
+static void ich9_handle_frap(uint32_t frap, int i, int force)
 {
 	static const char *const access_names[4] = {
 		"locked", "read-only", "write-only", "read-write"
@@ -1447,8 +1471,15 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
 		return;
 	}
 
-	msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
+	msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff),
 		 access_names[rwperms]);
+	if (rwperms == 0x3)
+		return;
+
+	msg_pinfo("WARNING: %s region is not fully accessible and flashrom "
+		  "can\nnot deal with this correctly yet.\n", region_names[i]);
+	ich9_disable_writes(force, "Intel does not provide us the necessary "
+			    "documention to support this.\n");
 }
 
 	/* In contrast to FRAP and the master section of the descriptor the bits
@@ -1460,21 +1491,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
 #define ICH_PR_PERMS(pr)	(((~((pr) >> PR_RP_OFF) & 1) << 0) | \
 				 ((~((pr) >> PR_WP_OFF) & 1) << 1))
 
-static void prettyprint_ich9_reg_pr(int i)
+static void ich9_handle_pr(int i, int force)
 {
-	static const char *const access_names[4] = {
-		"locked", "read-only", "write-only", "read-write"
+	static const char *const access_names[3] = {
+		"locked", "read-only", "write-only"
 	};
 	uint8_t off = ICH9_REG_PR0 + (i * 4);
 	uint32_t pr = mmio_readl(ich_spibar + off);
-	int rwperms = ICH_PR_PERMS(pr);
+	unsigned int rwperms = ICH_PR_PERMS(pr);
 
-	msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i);
-	if (rwperms != 0x3)
-		msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr),
-			 ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
-	else
-		msg_pdbg2(", unused)\n");
+	if (rwperms >= 0x3) {
+		msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i);
+		return;
+	}
+
+	msg_pdbg("0x%02X: 0x%08x ", off, pr);
+	msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
+		  ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
+	ich9_disable_writes(force, "There is no way to change this from within "
+			    "the system.\n");
 }
 
 /* Set/Clear the read and write protection enable bits of PR register @i
@@ -1537,6 +1572,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 	uint16_t spibar_offset, tmp2;
 	uint32_t tmp;
 	char *arg;
+	int ich_spi_force = 0;
 	int desc_valid = 0;
 	struct ich_descriptors desc = {{ 0 }};
 	enum ich_spi_mode {
@@ -1631,6 +1667,22 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		}
 		free(arg);
 
+		arg = extract_programmer_param("ich_spi_force");
+		if (arg && !strcmp(arg, "yes")) {
+			ich_spi_force = 1;
+			msg_pspew("ich_spi_force enabled.\n");
+		} else if (arg && !strlen(arg)) {
+			msg_perr("Missing argument for ich_spi_force.\n");
+			free(arg);
+			return ERROR_FATAL;
+		} else if (arg) {
+			msg_perr("Unknown argument for ich_spi_force: \"%s\" "
+				 "(not \"yes\").\n", arg);
+			free(arg);
+			return ERROR_FATAL;
+		}
+		free(arg);
+
 		tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS);
 		msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
 		prettyprint_ich9_reg_hsfs(tmp2);
@@ -1665,17 +1717,17 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 			msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp));
 			msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp));
 
-			/* Decode and print FREGx and FRAP registers */
+			/* Handle FREGx and FRAP registers */
 			for (i = 0; i < 5; i++)
-				do_ich9_spi_frap(tmp, i);
+				ich9_handle_frap(tmp, i, ich_spi_force);
 		}
 
-		/* try to disable PR locks before printing them */
-		if (!ichspi_lock)
-			for (i = 0; i < 5; i++)
+		for (i = 0; i < 5; i++) {
+			/* if not locked down try to disable PR locks first */
+			if (!ichspi_lock)
 				ich9_set_pr(i, 0, 0);
-		for (i = 0; i < 5; i++)
-			prettyprint_ich9_reg_pr(i);
+			ich9_handle_pr(i, ich_spi_force);
+		}
 
 		tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS);
 		msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff);
-- 
1.7.1



From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 15 00:02:57 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 15 Feb 2012 00:02:57 +0100
Subject: [flashrom] [PATCH] Reformat the internal programmer section in
 the man page.
In-Reply-To: <1329231101-9384-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329231101-9384-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F3AE821.6000607@gmx.net>

Am 14.02.2012 15:51 schrieb Stefan Tauner:
> The section describing the various options of the internal programmer has grown
> out of proportions and it has become confusing. This patch adds some headlines
> to devide the unrelated topics a bit.
> ---
> I would also like to make the syntax examples non-bold so that the headlines
> stick out more (TBH i don't see the point in making the examples stick out that
> much by making them bold and reside on their own line at all).

I don't really care about whether we make examples bold or not, but they
must (in the RFC sense) be on their own line to avoid catastropical word
wrapping and automatic hyphenation as much as possible.

> The dummy programmer probably needs something similar rather
> sooner than later.
>
> Opinions and other format command suggestions are very welcome!
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From flashrom at mkarcher.dialup.fu-berlin.de  Wed Feb 15 00:15:58 2012
From: flashrom at mkarcher.dialup.fu-berlin.de (Michael Karcher)
Date: Wed, 15 Feb 2012 00:15:58 +0100
Subject: [flashrom] FAILED: FR597AA-AKD m9360.pl (FR597AA#AKD)
In-Reply-To: <CALcBrbzKz0WtiFG9xvYJ-BnLiVpZ-ePO=_tXF=pXhfhAWJoz2Q@mail.gmail.com>
References: <CALcBrbzZeY=wHs9SnRZTuW7+R=yoTjL72x=SJTTTA2Fbrhnh4Q@mail.gmail.com>
	<201202141034.q1EAYbxA005921@mail2.student.tuwien.ac.at>
	<CALcBrbzKz0WtiFG9xvYJ-BnLiVpZ-ePO=_tXF=pXhfhAWJoz2Q@mail.gmail.com>
Message-ID: <1329261358.14303.41.camel@localhost>

Am Dienstag, den 14.02.2012, 11:39 +0100 schrieb Mariusz Cygan:

>> Verifying flash... VERIFY FAILED at 0x00011a00! Expected=0x05, Read=0xff,
>> failed byte count from 0x00000000-0x000fffff: 0x1f8
>> Your flash chip is in an unknown state.
>> Get help on IRC at irc.freenode.net (channel #flashrom) or
>> mail flashrom at flashrom.org with FAILED: your board name in the subject line!

> :( and now I have to pay for the reprogramming of bone BIOS. Restored
> back however, and so does not work.

I don't completely understand what you mean by "restore back", if it
means "reboot", you are right, the chip likely needs to be reprogrammed
outside of that mainboard. In case of a desktop, the chip is likely
socketed (8-pin DIP) and easily replaceable. Also, as only a low amount
of bytes failed to get reprogrammed, chances are good that some flash
recovery mode (if supported by that BIOS) kicks in if you try to power
on the machine.

On the other hand, if "restore back" means restoring the old bios (a
backup you did with flashrom) and the thus the upgrade didn't work,
please give it a second try.

As I read the error message, writing the new image *nearly* worked, only
around 500 bytes mismatched, and at least the first byte mismatch is
likely explained by missing programming of a "page" of 256 bytes. Many
flash chips are quite picky on how the write instruction is issued, and
it might be that flashrom is slightly unreliable in getting it
completely right so the flash chip ignored the write instruction if
something looks fishy. I have to admit I don't know what exactly might
cause such a failure, though.

If that theory is indeed right, just retrying to write NT35.bin a second
time would likely have fixed the situation too, especially as flashrom
detects what areas really need to be reprogrammed and leaves the
correctly written areas alone.

If restoring the old BIOS worked as I guessed in the three steps above,
I would encourage you to try writing the new image again, please run
flashrom in verbose mode (add -V) and send the output to the mailing
list. If writing fails again, please retry with the same image, and
attach the log of the write process to the mail, too.

Regards,
  Michael Karcher



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 02:10:19 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 02:10:19 +0100
Subject: [flashrom] [PATCH 0/5] AT25F* 3.0
In-Reply-To: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329268224-26268-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

Rebased this old series... 2/5 is new.
The bunch of block protection disables may be valid target for refactoring
because they share lots of code, but have slightly different constants???

Stefan Tauner (5):
  Clean up a25.c, at25.c, spi25.c.
  Refine messages of SPI block protection disables.
  Rename AT25F512B-specific code.
  Add spi_block_erase_62.
  Add support for Atmel's AT25F series of SPI flash chips.

 a25.c         |    8 ++--
 at25.c        |  154 +++++++++++++++++++++++++++++++++++++++++++++-----------
 chipdrivers.h |    6 ++-
 flashchips.c  |   94 +++++++++++++++++++++++++++++++++++
 flashchips.h  |   10 ++--
 spi.h         |   14 ++++--
 spi25.c       |   67 ++++++++++++++++++++++---
 7 files changed, 299 insertions(+), 54 deletions(-)



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 02:10:22 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 02:10:22 +0100
Subject: [flashrom] [PATCH 3/5] Rename AT25F512B-specific code.
In-Reply-To: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329268224-26268-4-git-send-email-stefan.tauner@student.tuwien.ac.at>

The AT25F512B is quite different from the other (older and yet
unsupported) chips in the AT25F* familiy, hence rename 512B-specific
stuff to make room for the generic AT25F* code

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 at25.c        |    4 ++--
 chipdrivers.h |    4 ++--
 flashchips.c  |    5 +++--
 3 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/at25.c b/at25.c
index 817e769..803e7e4 100644
--- a/at25.c
+++ b/at25.c
@@ -86,7 +86,7 @@ int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash)
 	return spi_prettyprint_status_register_at25df(flash);
 }
 
-int spi_prettyprint_status_register_at25f(struct flashctx *flash)
+int spi_prettyprint_status_register_at25f512b(struct flashctx *flash)
 {
 	uint8_t status;
 
@@ -202,7 +202,7 @@ int spi_disable_blockprotect_at25df_sec(struct flashctx *flash)
 	return spi_disable_blockprotect_at25df(flash);
 }
 
-int spi_disable_blockprotect_at25f(struct flashctx *flash)
+int spi_disable_blockprotect_at25f512b(struct flashctx *flash)
 {
 	/* spi_disable_blockprotect_at25df is not really the right way to do
 	 * this, but the side effects of said function work here as well.
diff --git a/chipdrivers.h b/chipdrivers.h
index b20030b..420564d 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -73,13 +73,13 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash);
 /* at25.c */
 int spi_prettyprint_status_register_at25df(struct flashctx *flash);
 int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash);
-int spi_prettyprint_status_register_at25f(struct flashctx *flash);
+int spi_prettyprint_status_register_at25f512b(struct flashctx *flash);
 int spi_prettyprint_status_register_at25fs010(struct flashctx *flash);
 int spi_prettyprint_status_register_at25fs040(struct flashctx *flash);
 int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash);
 int spi_disable_blockprotect_at25df(struct flashctx *flash);
 int spi_disable_blockprotect_at25df_sec(struct flashctx *flash);
-int spi_disable_blockprotect_at25f(struct flashctx *flash);
+int spi_disable_blockprotect_at25f512b(struct flashctx *flash);
 int spi_disable_blockprotect_at25fs010(struct flashctx *flash);
 int spi_disable_blockprotect_at25fs040(struct flashctx *flash);
 
diff --git a/flashchips.c b/flashchips.c
index ca1c57f..3656794 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -1657,6 +1657,7 @@ const struct flashchip flashchips[] = {
 		.model_id	= ATMEL_AT25F512B,
 		.total_size	= 64,
 		.page_size	= 256,
+		/* TODO: chip features 128-byte one-time programmable region */
 		.feature_bits	= FEATURE_WRSR_WREN,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
@@ -1680,8 +1681,8 @@ const struct flashchip flashchips[] = {
 				.block_erase = spi_block_erase_c7,
 			}
 		},
-		.printlock	= spi_prettyprint_status_register_at25f,
-		.unlock		= spi_disable_blockprotect_at25f,
+		.printlock	= spi_prettyprint_status_register_at25f512b,
+		.unlock		= spi_disable_blockprotect_at25f512b,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 02:10:21 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 02:10:21 +0100
Subject: [flashrom] [PATCH 2/5] Refine messages of SPI block protection
	disables.
In-Reply-To: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329268224-26268-3-git-send-email-stefan.tauner@student.tuwien.ac.at>

Make them real progress indicators with a final "done" message on success.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 at25.c  |   21 ++++++++++++---------
 spi25.c |    5 +++--
 2 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/at25.c b/at25.c
index 8891e2b..817e769 100644
--- a/at25.c
+++ b/at25.c
@@ -164,7 +164,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash)
 	if ((status & (3 << 2)) == 0)
 		return 0;
 
-	msg_cdbg("Some block protection in effect, disabling\n");
+	msg_cdbg("Some block protection in effect, disabling... ");
 	if (status & (1 << 7)) {
 		msg_cdbg("Need to disable Sector Protection Register Lock\n");
 		if ((status & (1 << 4)) == 0) {
@@ -175,7 +175,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash)
 		/* All bits except bit 7 (SPRL) are readonly. */
 		result = spi_write_status_register(flash, status & ~(1 << 7));
 		if (result) {
-			msg_cerr("spi_write_status_register failed\n");
+			msg_cerr("spi_write_status_register failed.\n");
 			return result;
 		}
 		
@@ -183,7 +183,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash)
 	/* Global unprotect. Make sure to mask SPRL as well. */
 	result = spi_write_status_register(flash, status & ~0xbc);
 	if (result) {
-		msg_cerr("spi_write_status_register failed\n");
+		msg_cerr("spi_write_status_register failed.\n");
 		return result;
 	}
 	status = spi_read_status_register(flash);
@@ -191,6 +191,7 @@ int spi_disable_blockprotect_at25df(struct flashctx *flash)
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
 	}
+	msg_cdbg("done.\n");
 	return 0;
 }
 
@@ -219,20 +220,20 @@ int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
 	if ((status & 0x6c) == 0)
 		return 0;
 
-	msg_cdbg("Some block protection in effect, disabling\n");
+	msg_cdbg("Some block protection in effect, disabling... ");
 	if (status & (1 << 7)) {
 		msg_cdbg("Need to disable Status Register Write Protect\n");
 		/* Clear bit 7 (WPEN). */
 		result = spi_write_status_register(flash, status & ~(1 << 7));
 		if (result) {
-			msg_cerr("spi_write_status_register failed\n");
+			msg_cerr("spi_write_status_register failed.\n");
 			return result;
 		}
 	}
 	/* Global unprotect. Make sure to mask WPEN as well. */
 	result = spi_write_status_register(flash, status & ~0xec);
 	if (result) {
-		msg_cerr("spi_write_status_register failed\n");
+		msg_cerr("spi_write_status_register failed.\n");
 		return result;
 	}
 	status = spi_read_status_register(flash);
@@ -240,6 +241,7 @@ int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
 	}
+	msg_cdbg("done.\n");
 	return 0;
 }
 
@@ -253,20 +255,20 @@ int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
 	if ((status & 0x7c) == 0)
 		return 0;
 
-	msg_cdbg("Some block protection in effect, disabling\n");
+	msg_cdbg("Some block protection in effect, disabling... ");
 	if (status & (1 << 7)) {
 		msg_cdbg("Need to disable Status Register Write Protect\n");
 		/* Clear bit 7 (WPEN). */
 		result = spi_write_status_register(flash, status & ~(1 << 7));
 		if (result) {
-			msg_cerr("spi_write_status_register failed\n");
+			msg_cerr("spi_write_status_register failed.\n");
 			return result;
 		}
 	}
 	/* Global unprotect. Make sure to mask WPEN as well. */
 	result = spi_write_status_register(flash, status & ~0xfc);
 	if (result) {
-		msg_cerr("spi_write_status_register failed\n");
+		msg_cerr("spi_write_status_register failed.\n");
 		return result;
 	}
 	status = spi_read_status_register(flash);
@@ -274,5 +276,6 @@ int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
 	}
+	msg_cdbg("done.\n");
 	return 0;
 }
diff --git a/spi25.c b/spi25.c
index eaae204..5c5048d 100644
--- a/spi25.c
+++ b/spi25.c
@@ -951,10 +951,10 @@ int spi_disable_blockprotect(struct flashctx *flash)
 	if ((status & 0x3c) == 0)
 		return 0;
 
-	msg_cdbg("Some block protection in effect, disabling\n");
+	msg_cdbg("Some block protection in effect, disabling... ");
 	result = spi_write_status_register(flash, status & ~0x3c);
 	if (result) {
-		msg_cerr("spi_write_status_register failed\n");
+		msg_cerr("spi_write_status_register failed.\n");
 		return result;
 	}
 	status = spi_read_status_register(flash);
@@ -962,6 +962,7 @@ int spi_disable_blockprotect(struct flashctx *flash)
 		msg_cerr("Block protection could not be disabled!\n");
 		return 1;
 	}
+	msg_cdbg("done.\n");
 	return 0;
 }
 
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 02:10:20 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 02:10:20 +0100
Subject: [flashrom] [PATCH 1/5] Clean up a25.c, at25.c, spi25.c.
In-Reply-To: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329268224-26268-2-git-send-email-stefan.tauner@student.tuwien.ac.at>

- introduce spi_prettyprint_status_register_atmel_at25_wpen()
- use spi_prettyprint_status_register_bit() where possible
- generify spi_prettyprint_status_register_bp3210 and use it in at25.c too

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 a25.c         |    8 ++++----
 at25.c        |   31 +++++++++++--------------------
 chipdrivers.h |    2 +-
 spi25.c       |   15 +++++++++------
 4 files changed, 25 insertions(+), 31 deletions(-)

diff --git a/a25.c b/a25.c
index b0c6b90..8c38f87 100644
--- a/a25.c
+++ b/a25.c
@@ -40,7 +40,7 @@ int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash)
 	spi_prettyprint_status_register_bit(status, 6);
 	spi_prettyprint_status_register_bit(status, 5);
 	spi_prettyprint_status_register_bit(status, 4);
-	spi_prettyprint_status_register_bp3210(status, 1);
+	spi_prettyprint_status_register_bp(status, 1);
 	spi_prettyprint_status_register_welwip(status);
 	return 0;
 }
@@ -55,7 +55,7 @@ int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash)
 	spi_prettyprint_status_register_amic_a25_srwd(status);
 	spi_prettyprint_status_register_bit(status, 6);
 	spi_prettyprint_status_register_bit(status, 5);
-	spi_prettyprint_status_register_bp3210(status, 2);
+	spi_prettyprint_status_register_bp(status, 2);
 	spi_prettyprint_status_register_welwip(status);
 	return 0;
 }
@@ -72,7 +72,7 @@ int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
 		 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
 	msg_cdbg("Chip status register: Top/Bottom (TB) "
 		 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
-	spi_prettyprint_status_register_bp3210(status, 2);
+	spi_prettyprint_status_register_bp(status, 2);
 	spi_prettyprint_status_register_welwip(status);
 	msg_cdbg("Chip status register 2 is NOT decoded!\n");
 	return 0;
@@ -90,7 +90,7 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash)
 		 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
 	msg_cdbg("Chip status register: Top/Bottom (TB) "
 		 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
-	spi_prettyprint_status_register_bp3210(status, 2);
+	spi_prettyprint_status_register_bp(status, 2);
 	spi_prettyprint_status_register_welwip(status);
 	msg_cdbg("Chip status register 2 is NOT decoded!\n");
 	return 0;
diff --git a/at25.c b/at25.c
index ec9b4b6..8891e2b 100644
--- a/at25.c
+++ b/at25.c
@@ -23,6 +23,12 @@
 
 /* Prettyprint the status register. Works for Atmel A25/A26 series. */
 
+static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status)
+{
+	msg_cdbg("Chip status register: Write Protect Enable (WPEN) "
+		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+}
+
 static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status)
 {
 	msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) "
@@ -91,10 +97,7 @@ int spi_prettyprint_status_register_at25f(struct flashctx *flash)
 	spi_prettyprint_status_register_bit(status, 6);
 	spi_prettyprint_status_register_atmel_at25_epewpp(status);
 	spi_prettyprint_status_register_bit(status, 3);
-	msg_cdbg("Chip status register: Block Protect 0 (BP0) is "
-		 "%sset, %s sectors are protected\n",
-		 (status & (1 << 2)) ? "" : "not ",
-		 (status & (1 << 2)) ? "all" : "no");
+	spi_prettyprint_status_register_bp(status, 0);
 	spi_prettyprint_status_register_welwip(status);
 	return 0;
 }
@@ -106,14 +109,12 @@ int spi_prettyprint_status_register_at25fs010(struct flashctx *flash)
 	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
-	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
-		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+	spi_prettyprint_status_register_atmel_at25_wpen(status);
 	msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
 		 "%sset\n", (status & (1 << 6)) ? "" : "not ");
 	msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
 		 "%sset\n", (status & (1 << 5)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 4 is "
-		 "%sset\n", (status & (1 << 4)) ? "" : "not ");
+	spi_prettyprint_status_register_bit(status, 4);
 	msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
 		 "%sset\n", (status & (1 << 3)) ? "" : "not ");
 	msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
@@ -130,18 +131,8 @@ int spi_prettyprint_status_register_at25fs040(struct flashctx *flash)
 	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
-	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
-		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
-		 "%sset\n", (status & (1 << 6)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
-		 "%sset\n", (status & (1 << 5)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
-		 "%sset\n", (status & (1 << 4)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
-		 "%sset\n", (status & (1 << 3)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
-		 "%sset\n", (status & (1 << 2)) ? "" : "not ");
+	spi_prettyprint_status_register_atmel_at25_wpen(status);
+	spi_prettyprint_status_register_bp(status, 4);
 	/* FIXME: Pretty-print detailed sector protection status. */
 	spi_prettyprint_status_register_welwip(status);
 	return 0;
diff --git a/chipdrivers.h b/chipdrivers.h
index a1d0cd9..b20030b 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -47,7 +47,7 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int
 uint8_t spi_read_status_register(struct flashctx *flash);
 int spi_write_status_register(struct flashctx *flash, int status);
 void spi_prettyprint_status_register_bit(uint8_t status, int bit);
-void spi_prettyprint_status_register_bp3210(uint8_t status, int bp);
+void spi_prettyprint_status_register_bp(uint8_t status, int bp);
 void spi_prettyprint_status_register_welwip(uint8_t status);
 int spi_prettyprint_status_register(struct flashctx *flash);
 int spi_disable_blockprotect(struct flashctx *flash);
diff --git a/spi25.c b/spi25.c
index 3ce7f08..eaae204 100644
--- a/spi25.c
+++ b/spi25.c
@@ -327,21 +327,24 @@ void spi_prettyprint_status_register_welwip(uint8_t status)
 }
 
 /* Prettyprint the status register. Common definitions. */
-void spi_prettyprint_status_register_bp3210(uint8_t status, int bp)
+void spi_prettyprint_status_register_bp(uint8_t status, int bp)
 {
 	switch (bp) {
 	/* Fall through. */
+	case 4:
+		msg_cdbg("Chip status register: Block Protect 4 (BP4) "
+			     "is %sset\n", (status & (1 << 5)) ? "" : "not ");
 	case 3:
-		msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) "
+		msg_cdbg("Chip status register: Block Protect 3 (BP3) "
 			     "is %sset\n", (status & (1 << 5)) ? "" : "not ");
 	case 2:
-		msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) "
+		msg_cdbg("Chip status register: Block Protect 2 (BP2) "
 			     "is %sset\n", (status & (1 << 4)) ? "" : "not ");
 	case 1:
-		msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) "
+		msg_cdbg("Chip status register: Block Protect 1 (BP1) "
 			     "is %sset\n", (status & (1 << 3)) ? "" : "not ");
 	case 0:
-		msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) "
+		msg_cdbg("Chip status register: Block Protect 0 (BP0) "
 			     "is %sset\n", (status & (1 << 2)) ? "" : "not ");
 	}
 }
@@ -355,7 +358,7 @@ void spi_prettyprint_status_register_bit(uint8_t status, int bit)
 
 static void spi_prettyprint_status_register_common(uint8_t status)
 {
-	spi_prettyprint_status_register_bp3210(status, 3);
+	spi_prettyprint_status_register_bp(status, 3);
 	spi_prettyprint_status_register_welwip(status);
 }
 
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 02:10:23 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 02:10:23 +0100
Subject: [flashrom] [PATCH 4/5] Add spi_block_erase_62.
In-Reply-To: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329268224-26268-5-git-send-email-stefan.tauner@student.tuwien.ac.at>

This is used by the AT25F series (only?), but is generic enough to reside in spi25.c.
The only currently supported chip is the AT25F512B. Other members of that series
need some additional infrastructure code, hence this patch adds the erase function to
the AT25F512B only.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 chipdrivers.h |    1 +
 flashchips.c  |    3 +++
 spi.h         |    5 +++++
 spi25.c       |   47 +++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 56 insertions(+), 0 deletions(-)

diff --git a/chipdrivers.h b/chipdrivers.h
index 420564d..44eca65 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -40,6 +40,7 @@ int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int b
 int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
diff --git a/flashchips.c b/flashchips.c
index 3656794..80f29f6 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -1679,6 +1679,9 @@ const struct flashchip flashchips[] = {
 			}, {
 				.eraseblocks = { {64 * 1024, 1} },
 				.block_erase = spi_block_erase_c7,
+			}, {
+				.eraseblocks = { {64 * 1024, 1} },
+				.block_erase = spi_block_erase_62,
 			}
 		},
 		.printlock	= spi_prettyprint_status_register_at25f512b,
diff --git a/spi.h b/spi.h
index b908603..adb9109 100644
--- a/spi.h
+++ b/spi.h
@@ -61,6 +61,11 @@
 #define JEDEC_CE_60_OUTSIZE	0x01
 #define JEDEC_CE_60_INSIZE	0x00
 
+/* Chip Erase 0x62 is supported by Atmel AT25F chips. */
+#define JEDEC_CE_62		0x62
+#define JEDEC_CE_62_OUTSIZE	0x01
+#define JEDEC_CE_62_INSIZE	0x00
+
 /* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */
 #define JEDEC_CE_C7		0xc7
 #define JEDEC_CE_C7_OUTSIZE	0x01
diff --git a/spi25.c b/spi25.c
index 5c5048d..0d02559 100644
--- a/spi25.c
+++ b/spi25.c
@@ -488,6 +488,43 @@ int spi_chip_erase_60(struct flashctx *flash)
 	return 0;
 }
 
+int spi_chip_erase_62(struct flashctx *flash)
+{
+	int result;
+	struct spi_command cmds[] = {
+	{
+		.writecnt	= JEDEC_WREN_OUTSIZE,
+		.writearr	= (const unsigned char[]){ JEDEC_WREN },
+		.readcnt	= 0,
+		.readarr	= NULL,
+	}, {
+		.writecnt	= JEDEC_CE_62_OUTSIZE,
+		.writearr	= (const unsigned char[]){ JEDEC_CE_62 },
+		.readcnt	= 0,
+		.readarr	= NULL,
+	}, {
+		.writecnt	= 0,
+		.writearr	= NULL,
+		.readcnt	= 0,
+		.readarr	= NULL,
+	}};
+	
+	result = spi_send_multicommand(flash, cmds);
+	if (result) {
+		msg_cerr("%s failed during command execution\n",
+			__func__);
+		return result;
+	}
+	/* Wait until the Write-In-Progress bit is cleared.
+	 * This usually takes 2-5 s, so wait in 100 ms steps.
+	 */
+	/* FIXME: We assume spi_read_status_register will never fail. */
+	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+		programmer_delay(100 * 1000);
+	/* FIXME: Check the status register for errors. */
+	return 0;
+}
+
 int spi_chip_erase_c7(struct flashctx *flash)
 {
 	int result;
@@ -712,6 +749,16 @@ int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
 	return spi_chip_erase_60(flash);
 }
 
+int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
+{
+	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
+		msg_cerr("%s called with incorrect arguments\n",
+			__func__);
+		return -1;
+	}
+	return spi_chip_erase_62(flash);
+}
+
 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
 		       unsigned int blocklen)
 {
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 02:10:24 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 02:10:24 +0100
Subject: [flashrom] [PATCH 5/5] Add support for Atmel's AT25F series of SPI
	flash chips.
In-Reply-To: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1311944216-17435-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329268224-26268-6-git-send-email-stefan.tauner@student.tuwien.ac.at>

Besides the definitions of the the chips in flashchips.c this includes
- a dedicated probing method (probe_spi_at25f)
- a  pretty printing method (spi_prettyprint_status_register_at25f), and
- an unlocking method (spi_disable_blockprotect_at25f)

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 at25.c        |   98 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 chipdrivers.h |    3 ++
 flashchips.c  |   90 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 flashchips.h  |   10 ++---
 spi.h         |    9 +++--
 5 files changed, 200 insertions(+), 10 deletions(-)

diff --git a/at25.c b/at25.c
index 803e7e4..d0761f7 100644
--- a/at25.c
+++ b/at25.c
@@ -63,6 +63,24 @@ static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status)
 	}
 }
 
+/* used for AT25F512(A), AT25F1024(A) */
+int spi_prettyprint_status_register_at25f(struct flashctx *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register(flash);
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	spi_prettyprint_status_register_atmel_at25_wpen(status);
+	spi_prettyprint_status_register_bit(status, 6);
+	spi_prettyprint_status_register_bit(status, 5);
+	spi_prettyprint_status_register_bit(status, 4);
+	/* FIXME: Bit 3 is undefined on AT25F512A */
+	spi_prettyprint_status_register_bp(status, 1);
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
 int spi_prettyprint_status_register_at25df(struct flashctx *flash)
 {
 	uint8_t status;
@@ -154,6 +172,58 @@ int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash)
 	return 0;
 }
 
+int spi_disable_blockprotect_at25f(struct flashctx *flash)
+{
+	uint8_t status;
+	int result;
+
+	status = spi_read_status_register(flash);
+	/* If block protection is disabled (BP0 and BP1 are 0), stop here. */
+	if ((status & (3 << 2)) == 0)
+		return 0;
+
+	msg_cdbg("Some block protection in effect, disabling... ");
+	if (status & (1 << 7)) {
+		msg_cdbg("Need to disable Write Protect Enable (WPEN)\n");
+		/* The following is used in spi_disable_blockprotect_at25df
+		 * to check the state of the hardware lock pin. This is not
+		 * possible with this chip, so we have to try.
+		if ((status & (1 << 4)) == 0) {
+			msg_cerr("WP# pin is active, disabling "
+				 "write protection is impossible.\n");
+			return 1;
+		}
+		*/
+		/* All bits except bit 7 (WPEN) are readonly. If the WP pin is
+		 * low, WPEN is readonly and this will fail.  */
+		result = spi_write_status_register(flash, status & ~(1 << 7));
+		if (result) {
+			msg_cerr("spi_write_status_register failed.\n");
+			return result;
+		}
+		status = spi_read_status_register(flash);
+		if (status & (1 << 7)) {
+			msg_cerr("WP# pin is probably active, disabling "
+				 "write protection is impossible.\n");
+			return 1;
+		}
+		
+	}
+	/* Global unprotect. Make sure to mask WPEN as well. */
+	result = spi_write_status_register(flash, status & ~0x8c);
+	if (result) {
+		msg_cerr("spi_write_status_register failed.\n");
+		return result;
+	}
+	status = spi_read_status_register(flash);
+	if ((status & (3 << 2)) != 0) {
+		msg_cerr("Block protection could not be disabled!\n");
+		return 1;
+	}
+	msg_cdbg("done.\n");
+	return 0;
+}
+
 int spi_disable_blockprotect_at25df(struct flashctx *flash)
 {
 	uint8_t status;
@@ -279,3 +349,31 @@ int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
 	msg_cdbg("done.\n");
 	return 0;
 }
+
+int probe_spi_at25f(struct flashctx *flash)
+{
+	static const unsigned char cmd[AT25F_RDID_OUTSIZE] = { AT25F_RDID };
+	unsigned char readarr[AT25F_RDID_INSIZE];
+	uint32_t id1;
+	uint32_t id2;
+
+	if (spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr)) {
+		msg_cdbg("\n");
+		return 0;
+	}
+	id1 = readarr[0];
+	id2 = readarr[1];
+
+	msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
+
+	if (id1 == flash->manufacture_id && id2 == flash->model_id) {
+		/* Print the status register to tell the
+		 * user about possible write protection.
+		 */
+		spi_prettyprint_status_register_at25f(flash);
+
+		return 1;
+	}
+
+	return 0;
+}
diff --git a/chipdrivers.h b/chipdrivers.h
index 44eca65..9996493 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -74,15 +74,18 @@ int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash);
 /* at25.c */
 int spi_prettyprint_status_register_at25df(struct flashctx *flash);
 int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash);
+int spi_prettyprint_status_register_at25f(struct flashctx *flash);
 int spi_prettyprint_status_register_at25f512b(struct flashctx *flash);
 int spi_prettyprint_status_register_at25fs010(struct flashctx *flash);
 int spi_prettyprint_status_register_at25fs040(struct flashctx *flash);
 int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash);
 int spi_disable_blockprotect_at25df(struct flashctx *flash);
 int spi_disable_blockprotect_at25df_sec(struct flashctx *flash);
+int spi_disable_blockprotect_at25f(struct flashctx *flash);
 int spi_disable_blockprotect_at25f512b(struct flashctx *flash);
 int spi_disable_blockprotect_at25fs010(struct flashctx *flash);
 int spi_disable_blockprotect_at25fs040(struct flashctx *flash);
+int probe_spi_at25f(struct flashctx *flash);
 
 /* 82802ab.c */
 uint8_t wait_82802ab(struct flashctx *flash);
diff --git a/flashchips.c b/flashchips.c
index 80f29f6..b2d1fcc 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -1651,6 +1651,65 @@ const struct flashchip flashchips[] = {
 
 	{
 		.vendor		= "Atmel",
+		.name		= "AT25F512",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= ATMEL_ID,
+		.model_id	= ATMEL_AT25F512,
+		.total_size	= 64,
+		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_at25f,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {32 * 1024, 2} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 1} },
+				.block_erase = spi_block_erase_62,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_at25f,
+		.unlock		= spi_disable_blockprotect_at25f,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Atmel",
+		.name		= "AT25F512A",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= ATMEL_ID,
+		.model_id	= ATMEL_AT25F512A,
+		.total_size	= 64,
+		.page_size	= 128,
+		.feature_bits	= FEATURE_WRSR_WREN,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_at25f,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {32 * 1024, 2} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 1} },
+				.block_erase = spi_block_erase_62,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_at25f,
+		/* Not correct to use this one, because the BP1 bit is N/A. */
+		.unlock		= spi_disable_blockprotect_at25f,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Atmel",
 		.name		= "AT25F512B",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= ATMEL_ID,
@@ -1693,6 +1752,37 @@ const struct flashchip flashchips[] = {
 
 	{
 		.vendor		= "Atmel",
+		/* The A suffix indicates 33MHz instead of 20MHz clock rate.
+		 * All other properties seem to be the same.*/
+		.name		= "AT25F1024(A)",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= ATMEL_ID,
+		.model_id	= ATMEL_AT25F1024,
+		.total_size	= 128,
+		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_at25f,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {32 * 1024, 4} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {128 * 1024, 1} },
+				.block_erase = spi_block_erase_62,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_at25f,
+		.unlock		= spi_disable_blockprotect_at25f,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Atmel",
 		.name		= "AT25FS010",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= ATMEL_ID,
diff --git a/flashchips.h b/flashchips.h
index 03efb86..888fd1a 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -134,13 +134,11 @@
 #define ATMEL_AT25DF321A	0x4701
 #define ATMEL_AT25DF641		0x4800
 #define ATMEL_AT25DQ161		0x8600
-#define ATMEL_AT25F512		/* No device ID found in datasheet. Vendor ID
-				 * can be read with AT25F512A_RDID */
-#define ATMEL_AT25F512A		0x65 /* Needs AT25F512A_RDID */
+#define ATMEL_AT25F512		0x65	/* guessed, no device ID in datasheet.
+					 * Vendor ID can be read with AT25F_RDID */
+#define ATMEL_AT25F512A		0x65 /* Needs AT25F_RDID */
 #define ATMEL_AT25F512B		0x6500
-#define ATMEL_AT25F1024		/* No device ID found in datasheet. Vendor ID
-				 * can be read with AT25F512A_RDID */
-#define ATMEL_AT25F1024A		0x60 /* Needs AT25F512A_RDID */
+#define ATMEL_AT25F1024		0x60 /* Needs AT25F_RDID */
 #define ATMEL_AT25FS010		0x6601
 #define ATMEL_AT25FS040		0x6604
 #define ATMEL_AT26DF041		0x4400
diff --git a/spi.h b/spi.h
index adb9109..a5c3406 100644
--- a/spi.h
+++ b/spi.h
@@ -30,10 +30,11 @@
 /* INSIZE may be 0x04 for some chips*/
 #define JEDEC_RDID_INSIZE	0x03
 
-/* AT25F512A has bit 3 as don't care bit in commands */
-#define AT25F512A_RDID		0x15	/* 0x15 or 0x1d */
-#define AT25F512A_RDID_OUTSIZE	0x01
-#define AT25F512A_RDID_INSIZE	0x02
+/* Some Atmel AT25F* models have bit 3 as don't care bit in commands */
+/* 0x15 or 0x1d */
+#define AT25F_RDID		0x15
+#define AT25F_RDID_OUTSIZE	0x01
+#define AT25F_RDID_INSIZE	0x02
 
 /* Read Electronic Manufacturer Signature */
 #define JEDEC_REMS		0x90
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 02:13:22 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 02:13:22 +0100
Subject: [flashrom] [PATCH] dummyflasher: Add a status register to SPI chips.
In-Reply-To: <4F2BBE83.8040200@gmx.net>
References: <4F2BBE83.8040200@gmx.net>
Message-ID: <1329268402-26554-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

TODO: man page

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 dummyflasher.c |   66 +++++++++++++++++++++++++++++++++++++++++++++++--------
 it87spi.c      |    2 +-
 spi.h          |    6 ++++-
 spi25.c        |   24 ++++++++++----------
 4 files changed, 74 insertions(+), 24 deletions(-)

diff --git a/dummyflasher.c b/dummyflasher.c
index 6281ff8..33f3ed7 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -21,6 +21,7 @@
 #include <stdlib.h>
 #include <stdio.h>
 #include <ctype.h>
+#include <errno.h>
 #include "flash.h"
 #include "chipdrivers.h"
 #include "programmer.h"
@@ -61,6 +62,7 @@ unsigned char spi_blacklist[256];
 unsigned char spi_ignorelist[256];
 int spi_blacklist_size = 0;
 int spi_ignorelist_size = 0;
+static uint8_t emu_status = 0;
 #endif
 #endif
 
@@ -133,6 +135,9 @@ int dummy_init(void)
 	char *bustext = NULL;
 	char *tmp = NULL;
 	int i;
+#if EMULATE_SPI_CHIP
+	char *status = NULL;
+#endif
 #if EMULATE_CHIP
 	struct stat image_stat;
 #endif
@@ -299,6 +304,23 @@ int dummy_init(void)
 		return 1;
 	}
 
+#ifdef EMULATE_SPI_CHIP
+	status = extract_programmer_param("status");
+	if (status) {
+		char *endptr;
+		errno = 0;
+		emu_status = strtoul(status, &endptr, 0);
+		free(status);
+		if (errno != 0 || status == endptr) {
+			msg_perr("Error: initial status register specified, "
+				 "but the value could not be converted.\n");
+			return 1;
+		}
+		msg_pdbg("Initial status register is set to 0x%02x.\n",
+			 emu_status);
+	}
+#endif
+
 	msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size);
 	memset(flashchip_contents, 0xff, emu_chip_size);
 
@@ -419,7 +441,6 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 {
 	unsigned int offs, i;
 	static int unsigned aai_offs;
-	static int aai_active = 0;
 
 	if (writecnt == 0) {
 		msg_perr("No command sent to the chip!\n");
@@ -443,6 +464,17 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 			return 0;
 		}
 	}
+
+	if (emu_max_aai_size && (emu_status & SPI_SR_AAI)) {
+		if (writearr[0] != JEDEC_AAI_WORD_PROGRAM &&
+		    writearr[0] != JEDEC_WRDI &&
+		    writearr[0] != JEDEC_RDSR) {
+			msg_perr("Forbidden opcode (0x%02x) attempted during "
+				 "AAI sequence!\n", writearr[0]);
+			return 0;
+		}
+	}
+
 	switch (writearr[0]) {
 	case JEDEC_RES:
 		if (emu_chip != EMULATE_ST_M25P10_RES)
@@ -471,10 +503,23 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 		if (readcnt > 2)
 			readarr[2] = 0x4a;
 		break;
-	case JEDEC_RDSR:
-		memset(readarr, 0, readcnt);
-		if (aai_active)
-			memset(readarr, 1 << 6, readcnt);
+	case JEDEC_RDSR: {
+		memset(readarr, emu_status, readcnt);
+		break;
+	}
+	/* FIXME: this should be chip-specific. */
+	case JEDEC_EWSR:
+	case JEDEC_WREN:
+		emu_status |= SPI_SR_WEL;
+		break;
+	case JEDEC_WRSR:
+		if (!(emu_status & SPI_SR_WEL)) {
+			msg_perr("WRSR attempted, but WEL is 0!\n");
+			break;
+		}
+		/* FIXME: add some reasonable simulation of the busy flag */
+		emu_status = writearr[1] & ~SPI_SR_WIP;
+		msg_pdbg2("WRSR wrote 0x%02x.\n", emu_status);
 		break;
 	case JEDEC_READ:
 		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
@@ -500,7 +545,7 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 	case JEDEC_AAI_WORD_PROGRAM:
 		if (!emu_max_aai_size)
 			break;
-		if (!aai_active) {
+		if (!(emu_status & SPI_SR_AAI)) {
 			if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
 				msg_perr("Initial AAI WORD PROGRAM size too "
 					 "short!\n");
@@ -511,7 +556,7 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 					 "long!\n");
 				return 1;
 			}
-			aai_active = 1;
+			emu_status |= SPI_SR_AAI;
 			aai_offs = writearr[1] << 16 | writearr[2] << 8 |
 				   writearr[3];
 			/* Truncate to emu_chip_size. */
@@ -534,9 +579,8 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 		}
 		break;
 	case JEDEC_WRDI:
-		if (!emu_max_aai_size)
-			break;
-		aai_active = 0;
+		if (emu_max_aai_size)
+			emu_status &= ~SPI_SR_AAI;
 		break;
 	case JEDEC_SE:
 		if (!emu_jedec_se_size)
@@ -623,6 +667,8 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 		/* No special response. */
 		break;
 	}
+	if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR)
+		emu_status &= ~SPI_SR_WEL;
 	return 0;
 }
 #endif
diff --git a/it87spi.c b/it87spi.c
index f089d78..a2a98f1 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -335,7 +335,7 @@ static int it8716f_spi_page_program(struct flashctx *flash, uint8_t *buf,
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 1-10 ms, so wait in 1 ms steps.
 	 */
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(1000);
 	return 0;
 }
diff --git a/spi.h b/spi.h
index b908603..16fd280 100644
--- a/spi.h
+++ b/spi.h
@@ -90,7 +90,11 @@
 #define JEDEC_RDSR		0x05
 #define JEDEC_RDSR_OUTSIZE	0x01
 #define JEDEC_RDSR_INSIZE	0x01
-#define JEDEC_RDSR_BIT_WIP	(0x01 << 0)
+
+/* Status Register Bits */
+#define SPI_SR_WIP	(0x01 << 0)
+#define SPI_SR_WEL	(0x01 << 1)
+#define SPI_SR_AAI	(0x01 << 6)
 
 /* Write Status Enable */
 #define JEDEC_EWSR		0x50
diff --git a/spi25.c b/spi25.c
index 3ce7f08..22ab1ee 100644
--- a/spi25.c
+++ b/spi25.c
@@ -479,7 +479,7 @@ int spi_chip_erase_60(struct flashctx *flash)
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
 	/* FIXME: We assume spi_read_status_register will never fail. */
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(1000 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -515,7 +515,7 @@ int spi_chip_erase_c7(struct flashctx *flash)
 	 * This usually takes 1-85 s, so wait in 1 s steps.
 	 */
 	/* FIXME: We assume spi_read_status_register will never fail. */
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(1000 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -557,7 +557,7 @@ int spi_block_erase_52(struct flashctx *flash, unsigned int addr,
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -604,7 +604,7 @@ int spi_block_erase_d8(struct flashctx *flash, unsigned int addr,
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -649,7 +649,7 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr,
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 100-4000 ms, so wait in 100 ms steps.
 	 */
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(100 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -692,7 +692,7 @@ int spi_block_erase_20(struct flashctx *flash, unsigned int addr,
 	/* Wait until the Write-In-Progress bit is cleared.
 	 * This usually takes 15-800 ms, so wait in 10 ms steps.
 	 */
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(10 * 1000);
 	/* FIXME: Check the status register for errors. */
 	return 0;
@@ -776,7 +776,7 @@ static int spi_write_status_register_ewsr(struct flashctx *flash, int status)
 	 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
 	 */
 	programmer_delay(100 * 1000);
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) {
+	while (spi_read_status_register(flash) & SPI_SR_WIP) {
 		if (++i > 490) {
 			msg_cerr("Error: WIP bit after WRSR never cleared\n");
 			return TIMEOUT_ERROR;
@@ -824,7 +824,7 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status)
 	 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
 	 */
 	programmer_delay(100 * 1000);
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) {
+	while (spi_read_status_register(flash) & SPI_SR_WIP) {
 		if (++i > 490) {
 			msg_cerr("Error: WIP bit after WRSR never cleared\n");
 			return TIMEOUT_ERROR;
@@ -1053,7 +1053,7 @@ int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
 			rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite);
 			if (rc)
 				break;
-			while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+			while (spi_read_status_register(flash) & SPI_SR_WIP)
 				programmer_delay(10);
 		}
 		if (rc)
@@ -1080,7 +1080,7 @@ int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		result = spi_byte_program(flash, i, buf[i - start]);
 		if (result)
 			return 1;
-		while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+		while (spi_read_status_register(flash) & SPI_SR_WIP)
 			programmer_delay(10);
 	}
 
@@ -1175,7 +1175,7 @@ int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		 */
 		return result;
 	}
-	while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+	while (spi_read_status_register(flash) & SPI_SR_WIP)
 		programmer_delay(10);
 
 	/* We already wrote 2 bytes in the multicommand step. */
@@ -1187,7 +1187,7 @@ int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		cmd[2] = buf[pos++ - start];
 		spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0,
 				 cmd, NULL);
-		while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP)
+		while (spi_read_status_register(flash) & SPI_SR_WIP)
 			programmer_delay(10);
 	}
 
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 03:46:41 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 03:46:41 +0100
Subject: [flashrom] [PATCH] Manpage improvements.
In-Reply-To: <4F3AE821.6000607@gmx.net>
References: <4F3AE821.6000607@gmx.net>
Message-ID: <1329274001-30125-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

The sections describing the various options of the internal and dummy
programmers have grown out of proportions. This patch adds some headlines
to devide the unrelated topics a bit (with .TP commands). The previous indented
paragraphs for the various programmers were transformed to subsections (.SS).

Also, document the laptop=this_is_not_a_laptop internal programmer parameter
and remove some superfluous white space.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.8 |   57 ++++++++++++++++++++++++++++++++++++++++++++-------------
 1 files changed, 44 insertions(+), 13 deletions(-)

diff --git a/flashrom.8 b/flashrom.8
index 2f23cb8..1d9d06b 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -1,4 +1,4 @@
-.TH FLASHROM 8 "Jul 25, 2011"
+.TH FLASHROM 8 "Feb 15, 2012"
 .SH NAME
 flashrom \- detect, read, write, verify and erase flash chips
 .SH SYNOPSIS
@@ -223,8 +223,11 @@ parameters. These parameters are separated from the programmer name by a
 colon. While some programmers take arguments at fixed positions, other
 programmers use a key/value interface in which the key and value is separated
 by an equal sign and different pairs are separated by a comma or a colon.
-.TP
+.SS
 .BR "internal " programmer
+.TP
+.B Board Enables
+.sp
 Some mainboards require to run mainboard specific code to enable flash erase
 and write support (and probe support on old systems with parallel flash).
 The mainboard brand and model (if it requires specific code) is usually
@@ -275,17 +278,22 @@ has been written because it is known that writing/erasing without the board
 enable is going to fail. In any case (success or failure), please report to
 the flashrom mailing list, see below.
 .sp
+.TP
+.B Coreboot
+.sp
 On systems running coreboot, flashrom checks whether the desired image matches
 your mainboard. This needs some special board ID to be present in the image.
 If flashrom detects that the image you want to write and the current board
 do not match, it will refuse to write the image unless you specify
 .sp
 .B "  flashrom \-p internal:boardmismatch=force"
+.TP
+.B ITE IT87 Super I/O
 .sp
 If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
 translation, flashrom should autodetect that configuration. If you want to
 set the I/O base port of the IT87 series SPI controller manually instead of
-using the value provided by the BIOS, use the 
+using the value provided by the BIOS, use the
 .sp
 .B "  flashrom \-p internal:it87spiport=portnum"
 .sp
@@ -295,6 +303,9 @@ is the I/O port number (must be a multiple of 8). In the unlikely case
 flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
 report so we can diagnose the problem.
 .sp
+.TP
+.B Intel chipsets
+.sp
 If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
 attached, and if a valid descriptor was written to it (e.g. by the vendor), the
 chipset provides an alternative way to access the flash chip(s) named
@@ -331,6 +342,8 @@ settings. The default value for ICH7 is given in the example below.
 .sp
 Example:
 .B "flashrom \-p internal:fwh_idsel=0x001122334567"
+.TP
+.B Laptops
 .sp
 Using flashrom on laptops is dangerous and may easily make your hardware
 unusable (see also the
@@ -343,16 +356,25 @@ brick your laptop and write is very likely to brick your laptop.
 Chip read and probe may irritate your EC and cause fan failure, backlight
 failure, sudden poweroff, and other nasty effects.
 flashrom will attempt to detect laptops and abort immediately for safety
-reasons.
+reasons if it clearly identifies the host computer as one.
 If you want to proceed anyway at your own risk, use
 .sp
 .B "  flashrom \-p internal:laptop=force_I_want_a_brick"
 .sp
 You have been warned.
 .sp
+Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
+laptops. Some vendors did not implement those bits correctly or set them to
+generic and/or dummy values. flashrom will then issue a warning and bail out
+like above. In this case you can use
+.sp
+.B "  flashrom \-p internal:laptop=this_is_not_a_laptop"
+.sp
+to persuade flashrom that it does not run on a laptop.
+.sp
 We will not help you if you force flashing on a laptop because this is a really
 dumb idea.
-.TP
+.SS
 .BR "dummy " programmer
 The dummy programmer operates on a buffer in memory only. It provides a safe
 and fast way to test various aspects of flashrom and is mainly used in
@@ -394,6 +416,8 @@ vendor):
 .sp
 Example:
 .B "flashrom -p dummy:emulate=SST25VF040.REMS"
+.TP
+.B Persistent images
 .sp
 If you use flash chip emulation, flash image persistence is available as well
 by using the
@@ -407,6 +431,8 @@ where the chip contents on flashrom shutdown are written to.
 .sp
 Example:
 .B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
+.TP
+.B SPI write chunk size
 .sp
 If you use SPI flash chip emulation for a chip which supports SPI page write
 with the default opcode, you can set the maximum allowed write chunk size with
@@ -421,6 +447,8 @@ is the number of bytes (min. 1, max. 256).
 Example:
 .sp
 .B "  flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
+.TP
+.B SPI blacklist
 .sp
 To simulate a programmer which refuses to send certain SPI commands to the
 flash chip, you can specify a blacklist of SPI commands with the
@@ -433,6 +461,9 @@ controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
 commandlist may be up to 512 characters (256 commands) long.
 Implementation note: flashrom will detect an error during command execution.
 .sp
+.TP
+.B SPI ignorelist
+.sp
 To simulate a flash chip which ignores (doesn't support) certain SPI commands,
 you can specify an ignorelist of SPI commands with the
 .sp
@@ -443,7 +474,7 @@ SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
 command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to 512
 characters (256 commands) long.
 Implementation note: flashrom won't detect an error during command execution.
-.TP
+.SS
 .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
 " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\
 " , " satamv" ", and " atahpt " programmers
@@ -465,7 +496,7 @@ is the PCI function number of the desired device.
 .sp
 Example:
 .B "flashrom \-p nic3com:pci=05:04.0"
-.TP
+.SS
 .BR "ft2232_spi " programmer
 An optional parameter specifies the controller
 type and interface/port it should support. For that you have to use the
@@ -486,7 +517,7 @@ The default model is
 .B 4232H
 and the default interface is
 .BR B .
-.TP
+.SS
 .BR "serprog " programmer
 A mandatory parameter specifies either a serial
 device/baud combination or an IP/port combination for communication with the
@@ -502,7 +533,7 @@ syntax and for IP, you have to use
 instead. More information about serprog is available in
 .B serprog-protocol.txt
 in the source distribution.
-.TP
+.SS
 .BR "buspirate_spi " programmer
 A required
 .B dev
@@ -518,7 +549,7 @@ where
 can be
 .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
 (in Hz). The default is the maximum frequency of 8 MHz.
-.TP
+.SS
 .BR "dediprog " programmer
 An optional
 .B voltage
@@ -534,7 +565,7 @@ where
 can be
 .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
 or the equivalent in mV.
-.TP
+.SS
 .BR "rayer_spi " programmer
 The default I/O base address used for the parallel port is 0x378 and you can use
 the optional
@@ -564,9 +595,9 @@ More information about the RayeR hardware is available at
 .BR "http://rayer.ic.cz/elektro/spipgm.htm " .
 The schematic of the Xilinx DLC 5 was published at
 .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
-.TP
+.SS
 .BR "ogp_spi " programmer
-The flash ROM chip to access must be specified with the 
+The flash ROM chip to access must be specified with the
 .B rom
 parameter.
 .sp
-- 
1.7.1



From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 15 02:55:38 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 15 Feb 2012 02:55:38 +0100
Subject: [flashrom] [PATCH] Warn of one-time programmable (OTP) memory
In-Reply-To: <1313292964-2123-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1280430606-18194-1-git-send-email-dlenski@gmail.com>
	<1313292964-2123-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F3B109A.2030504@gmx.net>

Hi Stefan,

I have waited very long to comment on this patch, but I simply don't
have a good answer for it.
I do think that OTP/security memory is outside the scope of flashrom
because it behaves totally different (and testing could easily kill a
dozen chips during inital implementation, and a few chips each time
someone wants to retest). Now if something is outside the scope of
flashrom, should flashrom care at all? Some flash chips have GPI pins
(GPIO without output) and those are readable with commands very similar
to those used by flashrom. Should we tell the user about that feature as
well? We had such requests in the past, and I was not really happy about
them.


Am 14.08.2011 05:36 schrieb Stefan Tauner:
> Some flash chips contain OTP memory that we cannot read or write (yet). This
> prohibits us from cloning them, hence warn the user if we detect it. Not all
> variations of the tagged chips contain OTP memory. They are often only
> enabled on request or have there own ordering numbers. There is usually no
> way to distinguish them afaict.

Well, it's worse than that. I've seen datasheets for flash chips with
the following features:
- OTP memory, fully readable, fully writable once in one block (no
partial writes)
- OTP memory, fully readable, fully writable once per byte (partial
writes work just fine)
- OTP memory, fully readable, fully writable once per 2^n-byte block
- OTP memory, fully readable, only half of it writable, the other half
is programmed at the factory
- OTP memory, fully readable, completely pre-written at the factory (so
it's rather ROM than OTP)
- Hidden OTP memory which can only be read if you know the correct
security ID which is part of the OTP
- (The complete flash chip behaves like OTP (well, like ROM) once a
specific write-once status register is set)... not relevant here

And then you have the problem that multiple chip generations often share
the same device ID, so probing can't differentiate between a chip with
OTP and one without unless you're extremely lucky. Do we want
FEATURE_OTP and FEATURE_MAYBE_OTP?

Do we warn if a chip has a readonly serial number? That means the chip
can't be cloned. People who care about OTP for clonability reasons
probably care about other readonly contents as well. OTOH, other people
who don't use the OTP at all (for them, OTP is just an accidental
feature of a cheap flash chip) don't want to be bothered by yet another
line of output from flashrom which has no relevancy for them.


> The manpage is extended to describe the backgrounds a bit. While i touched
> that section, i also reformatted it a bit and removed the reference to the trac
> bug reporting facility.
>
> This patch is based on the idea and code of Daniel Lenski.
> ---
> the reason i removed the trac reference is that it is not used, i have no (working)
> login and it does not really fits our work flow anyway. the only user that used it
> in my active flashrom time ranted about it. would anyone miss it?

To be honest, trac is something I never got along with. Even if I'm
logged in there is no way for me to read the email address of the person
who opened the bug, so communication is pretty difficult. I'm all for
checking all old trac tickets, closing what can be closed, and moving
all other tickets in some way or another to the mailing list. However,
we should mention that it's OK to report bugs via IRC as well as long as
the reporter mentions a way to contact hi/her (i.e. email address).

Removing the trac reference and adding the IRC reference should be a
separate patch, though, which is
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

One comment about the man page formatting: This part of the patch may
conflict with the other man page formatting patch you sent. By the way,
do you know any good reference about man page formatting? I had trouble
finding out what .RE and .RS do.


> the new default verbosity output is:
> This chip may contain one-time programmable memory (see man page for details).
>
> the new dbg1/-V output is:
> This chip may contain one-time programmable memory.
> flashrom cannot read, and may never be able to write it. flashrom may not be
> able to completely clone the contents of this chip (see man page for details).
>
> there are certainly more chips with OTP memories out there. additions are
> welcome!
> i have only tagged chips with user modifiably OTP/security memories. there
> are some chips out there which have factory written IDs, but no OTP memory.
> a similar warning could/should be printed for those, but i did not want to
> abuse the OTP tag for this. also, there is nothing we can do, but read those IDs.
> duplicating chips using them is not possible, so a warning in the man page might
> suffice?
>
> since OTP memory (or any other data outside the linear address range of the
> "main" memory) can not be handled very well in flashrom right now, it is not
> clear how OTP memory access could be developed further. of course one could
> start to implement the basic methods needed to read them, but how they
> should be integrated then is not clear.
> one could start by adding an otp_print field to the struct flashchip and just
> dump the bytes on probing similar to the lock printing (not on default verbosity
> and possibly only if there are bytes different from 0x00 and 0xff).
>
> carl-daniel seems to be quite sceptical regarding handling OTP at all in flashrom.
> he stated "it does not really fit our device model at all", which is right, but could
> be changed.
> he also asked "should we really handle all features present in flash chips?"
> and the answer is probably "no", although i don't see a reason why we should
> not, if the effort is not too much and the architectural changes needed aren't
> obvious NOGOs.
> but OTP regions are somewhat special, they are not just *some* feature.

Indeed.


> one argument is the one stated in the message printed by this patch. flashrom
> is not able to clone chips that have some kind of OTP memory written right now.
> imo "cloning" a flash chip seems to be a valid use case for a tool like flashrom as
> long as it is feasible (which is not for chips with unique, preconfigured IDs).
>
> the other more theoretical argument i have is: OTP memory is just some
> memory in the flash chip. it may need other access patterns, but it is not much
> different from other write protected memories apart from that.
> some chips implement it in a way that it is even possible to erase the OTP
> regions. those regions are just normal flash and are made unwriteable by fuses
> in a register or another addressable byte.
>
> Signed-off-by: Daniel Lenski <dlenski at gmail.com>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Stefan: I don't want to veto this patch, and although I think that OTP
handling is not really a flashrom feature, I think that this
implementation satisfies the quality criteria for merging, so the patch is
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 15 03:14:19 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 15 Feb 2012 03:14:19 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user and disable writes when
 a protected address range is detected.
In-Reply-To: <1329233956-12464-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <4F398E21.3010404@gmx.net>
	<1329233956-12464-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F3B14FB.1090509@gmx.net>

Am 14.02.2012 16:39 schrieb Stefan Tauner:
> This includes not only the notorious read-only flash descriptors and locked ME
> regions, but also the more rarely used PRs (Protected Ranges).
> The user can enforce write support by specifying ich_spi_force=yes in the

Can you rename ich_spi_force to ich_ignore_locks or something similar?
The PR stuff is not limited to SPI IIRC.


> programmer options, but we don't tell him the exact syntax interactively. He
> has to read it up in the man page.
> ---
> non-verbose sample output from my laptop (that contains both protection types):
> [?]
> Found chipset "Intel QS57". Enabling flash write... WARNING: SPI Configuration Lockdown activated.
> WARNING: Flash Descriptor region is not fully accessible and flashrom can
> not deal with this correctly yet.
> Intel does not provide us the necessary documention to support this.
> Please send a verbose log to flashrom at flashrom.org if this board is not listed on
> http://flashrom.org/Supported_hardware#Supported_mainboards yet.
> Writes have been disabled. You can enforce write support with the
> ich_spi_force programmer option, but it will most likely harm your hardware!
> If you force flashrom you will get no support if something breaks.
> WARNING: Management Engine region is not fully accessible and flashrom can
> not deal with this correctly yet.
> WARNING: PR0: 0x007d0000-0x01ffffff is read-only.
> OK.
> [?]

Ugh. This is the non-verbose version? I had trouble parsing that message
flood on the first attempt. May I suggest an alternative wording?

WARNING: Flash Descriptor region is not fully accessible.
WARNING: Management Engine region is not fully accessible.
WARNING: PR0: 0x007d0000-0x01ffffff is read-only.
Please send a verbose log to flashrom at flashrom.org if this board is not listed on
http://flashrom.org/Supported_hardware#Supported_mainboards yet.
Writes have been disabled. You can force writing with the ich_ignore_locks
programmer option, but it will most likely brick your mainboard.

The idea of my wording is to postpone the explanatory message until all
"not accessible"/"read-only" messages have been printed.

The complaint about Intel belongs to the man page or to intel_mysteries.txt
(if you choose the latter, just mention intel_mysteries.txt at the relevant
location in the man page).

For the override case, just print the message above and additionally
"You have been warned. We will not support you if write/erase bricks your
mainboard. Proceeding anyway because user specified ich_ignore_locks."
or something similar.



> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
>  flashrom.8 |   15 ++++++++++
>  ichspi.c   |   90 +++++++++++++++++++++++++++++++++++++++++++++++------------
>  2 files changed, 86 insertions(+), 19 deletions(-)
>
> diff --git a/flashrom.8 b/flashrom.8
> index 2f23cb8..0ca4fdb 100644
> --- a/flashrom.8
> +++ b/flashrom.8
> @@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash
>  chip is attached). The other options (swseq, hwseq) select the respective mode
>  (if possible).
>  .sp
> +ICH8 and later southbridges may also have locked address ranges of different
> +kinds if a valid descriptor was written to it. The flash address space is then
> +partitioned in multiple so called "Flash Regions" containing the host firmware,
> +the ME firmware and so on respectively. The flash descriptor can also specify up
> +to 5 so called "Protected Regions", which are freely chosen address ranges
> +independent from the aforementioned "Flash Regions". All of them can be write
> +and/or read protected individually. If flashrom detects such a lock it will
> +disable write support unless the user forces it with the
> +.sp
> +.B "  flashrom \-p internal:ich_spi_force=yes"
> +.sp
> +syntax. If this leads to erase or write accesses to the flash it would most
> +probably bring it into an inconsistent and unbootable state and we will not
> +provide any support in such a case.
> +.sp
>  If you have an Intel chipset with an ICH6 or later southbridge and if you want
>  to set specific IDSEL values for a non-default flash chip or an embedded
>  controller (EC), you can use the
> diff --git a/ichspi.c b/ichspi.c
> index 163ecf1..f21bb35 100644
> --- a/ichspi.c
> +++ b/ichspi.c
> @@ -1416,12 +1416,36 @@ static int ich_spi_send_multicommand(struct flashctx *flash,
>  	return ret;
>  }
>  
> +static void ich9_disable_writes(int force, const char * const msg)
> +{
> +	/* Don't scare and spam the user even more if write support was already
> +	 * disabled */
> +	if (!programmer_may_write)
> +		return;
> +
> +	msg_pinfo("%s", msg);
> +	msg_pinfo("Please send a verbose log to flashrom at flashrom.org if this "
> +		  "board is not listed on\n"
> +		  "http://flashrom.org/Supported_hardware#Supported_mainboards "
> +		  "yet.\n");
> +	if (!force) {
> +		programmer_may_write = 0;
> +		msg_pinfo("Writes have been disabled. You can enforce write "
> +			  "support with the\nich_spi_force programmer option, "
> +			  "but it will most likely harm your hardware!\n");
> +	}
> +	msg_pinfo("If you force flashrom you will get no support if something "
> +		  "breaks.\n");
> +	if (force)
> +		msg_pinfo("Continuing anyway because the user forced us to!\n");
> +}
> +
>  #define ICH_BMWAG(x) ((x >> 24) & 0xff)
>  #define ICH_BMRAG(x) ((x >> 16) & 0xff)
>  #define ICH_BRWA(x)  ((x >>  8) & 0xff)
>  #define ICH_BRRA(x)  ((x >>  0) & 0xff)
>  
> -static void do_ich9_spi_frap(uint32_t frap, int i)
> +static void ich9_handle_frap(uint32_t frap, int i, int force)
>  {
>  	static const char *const access_names[4] = {
>  		"locked", "read-only", "write-only", "read-write"
> @@ -1447,8 +1471,15 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
>  		return;
>  	}
>  
> -	msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
> +	msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff),
>  		 access_names[rwperms]);
> +	if (rwperms == 0x3)
> +		return;
> +
> +	msg_pinfo("WARNING: %s region is not fully accessible and flashrom "
> +		  "can\nnot deal with this correctly yet.\n", region_names[i]);
> +	ich9_disable_writes(force, "Intel does not provide us the necessary "
> +			    "documention to support this.\n");
>  }
>  
>  	/* In contrast to FRAP and the master section of the descriptor the bits
> @@ -1460,21 +1491,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
>  #define ICH_PR_PERMS(pr)	(((~((pr) >> PR_RP_OFF) & 1) << 0) | \
>  				 ((~((pr) >> PR_WP_OFF) & 1) << 1))
>  
> -static void prettyprint_ich9_reg_pr(int i)
> +static void ich9_handle_pr(int i, int force)
>  {
> -	static const char *const access_names[4] = {
> -		"locked", "read-only", "write-only", "read-write"
> +	static const char *const access_names[3] = {
> +		"locked", "read-only", "write-only"
>  	};
>  	uint8_t off = ICH9_REG_PR0 + (i * 4);
>  	uint32_t pr = mmio_readl(ich_spibar + off);
> -	int rwperms = ICH_PR_PERMS(pr);
> +	unsigned int rwperms = ICH_PR_PERMS(pr);
>  
> -	msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i);
> -	if (rwperms != 0x3)
> -		msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr),
> -			 ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
> -	else
> -		msg_pdbg2(", unused)\n");
> +	if (rwperms >= 0x3) {

Why >= 0x3? AFAICS the ICH_PR_PERMS macro can only have values between
0x0 and 0x3.

> +		msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i);
> +		return;
> +	}
> +
> +	msg_pdbg("0x%02X: 0x%08x ", off, pr);
> +	msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
> +		  ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
> +	ich9_disable_writes(force, "There is no way to change this from within "
> +			    "the system.\n");
>  }
>  
>  /* Set/Clear the read and write protection enable bits of PR register @i
> @@ -1537,6 +1572,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
>  	uint16_t spibar_offset, tmp2;
>  	uint32_t tmp;
>  	char *arg;
> +	int ich_spi_force = 0;
>  	int desc_valid = 0;
>  	struct ich_descriptors desc = {{ 0 }};
>  	enum ich_spi_mode {
> @@ -1631,6 +1667,22 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
>  		}
>  		free(arg);
>  
> +		arg = extract_programmer_param("ich_spi_force");
> +		if (arg && !strcmp(arg, "yes")) {
> +			ich_spi_force = 1;
> +			msg_pspew("ich_spi_force enabled.\n");
> +		} else if (arg && !strlen(arg)) {
> +			msg_perr("Missing argument for ich_spi_force.\n");
> +			free(arg);
> +			return ERROR_FATAL;
> +		} else if (arg) {
> +			msg_perr("Unknown argument for ich_spi_force: \"%s\" "
> +				 "(not \"yes\").\n", arg);
> +			free(arg);
> +			return ERROR_FATAL;
> +		}
> +		free(arg);
> +
>  		tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS);
>  		msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
>  		prettyprint_ich9_reg_hsfs(tmp2);
> @@ -1665,17 +1717,17 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
>  			msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp));
>  			msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp));
>  
> -			/* Decode and print FREGx and FRAP registers */
> +			/* Handle FREGx and FRAP registers */
>  			for (i = 0; i < 5; i++)
> -				do_ich9_spi_frap(tmp, i);
> +				ich9_handle_frap(tmp, i, ich_spi_force);
>  		}
>  
> -		/* try to disable PR locks before printing them */
> -		if (!ichspi_lock)
> -			for (i = 0; i < 5; i++)
> +		for (i = 0; i < 5; i++) {
> +			/* if not locked down try to disable PR locks first */
> +			if (!ichspi_lock)
>  				ich9_set_pr(i, 0, 0);
> -		for (i = 0; i < 5; i++)
> -			prettyprint_ich9_reg_pr(i);
> +			ich9_handle_pr(i, ich_spi_force);
> +		}
>  
>  		tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS);
>  		msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff);

Looks good otherwise.
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From flashrom at vanderjagt.co.nz  Wed Feb 15 08:40:10 2012
From: flashrom at vanderjagt.co.nz (John-Paul Vanderjagt)
Date: Wed, 15 Feb 2012 20:40:10 +1300
Subject: [flashrom] successful BIOS flash report
Message-ID: <201202150750.q1F7oSwM023427@server.jp.loc>

Dear maintainers at flashrom at flashrom.org.

FYI, I'd like to report a successful BIOS flash on an Asus P5K-V
main board.  See relevant info below.  You may update your list
http://flashrom.org/Supported_hardware with this info.  Thanks for
producing flashrom.

Kind regards.
John-Paul Vanderjagt.
Wellington, New Zealand.
<flashrom at vanderjagt dot co dot nz>

--

Manual of main board:

http://dlcdnet.asus.com/pub/ASUS/mb/socket775/P5K-V/e3269_p5k-v_manual.zip

% rpm -qa flashrom
flashrom-0.9.3_r1246-3.1.i586

% uname -a
Linux server 2.6.37.6-0.11-default #1 SMP 2011-12-19 23:39:38 +0100 i686 i686 i386 GNU/Linux

% cat /etc/SuSE-release
openSUSE 11.4 (i586)
VERSION = 11.4
CODENAME = Celadon

% cat dmidecode.out_after_bios_upgrade
# dmidecode 2.11
SMBIOS 2.4 present.
70 structures occupying 2500 bytes.
Table at 0x000F06F0.

Handle 0x0000, DMI type 0, 24 bytes
BIOS Information
        Vendor: American Megatrends Inc.
        Version: 1002
        Release Date: 06/18/2008
        Address: 0xF0000
        Runtime Size: 64 kB
        ROM Size: 1024 kB
        Characteristics:
[...]
        BIOS Revision: 8.12

Handle 0x0001, DMI type 1, 27 bytes
System Information
        Manufacturer: System manufacturer
        Product Name: P5K-V
        Version: System Version
        Serial Number: System Serial Number
        UUID: 00020003-0004-0005-0006-000700080009
        Wake-up Type: Power Switch
        SKU Number: To Be Filled By O.E.M.
        Family: To Be Filled By O.E.M.

Handle 0x0002, DMI type 2, 15 bytes
Base Board Information
        Manufacturer: ASUSTeK Computer INC.
        Product Name: P5K-V
        Version: Rev 1.xx
        Serial Number: MB-1234567890
        Asset Tag: To Be Filled By O.E.M.
        Features:
                Board is a hosting board
                Board is replaceable
        Location In Chassis: To Be Filled By O.E.M.
        Chassis Handle: 0x0003
        Type: Motherboard
        Contained Object Handles: 0
[...]

% diff dmidecode.out_after_bios_upgrade dmidecode.out_before_bios_upgrade
3,4c3,4
< 70 structures occupying 2500 bytes.
< Table at 0x000F06F0.
---
> 70 structures occupying 2492 bytes.
> Table at 0x000F06E0.
9,10c9,10
<       Version: 1002
<       Release Date: 06/18/2008
---
>       Version: 0212
>       Release Date: 05/24/2007
48c48
<       UUID: 00020003-0004-0005-0006-000700080009
---
>       UUID: A095EBCD-CBFE-D511-B2E2-001BFC90E48F
58c58
<       Serial Number: MB-1234567890
---
>       Serial Number: MS1C75B79Y01238
80c80
<       OEM Information: 0x00000004
---
>       OEM Information: 0x00000001
590c590
<       String 1: To Be Filled By O.E.M.
---
>       String 1: 001BFC90E48F
[...]

--



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 13:18:16 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 13:18:16 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user and disable writes when
 a protected address range is detected.
In-Reply-To: <4F3B14FB.1090509@gmx.net>
References: <4F398E21.3010404@gmx.net>
	<1329233956-12464-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3B14FB.1090509@gmx.net>
Message-ID: <201202151217.q1FCHevV021764@mail2.student.tuwien.ac.at>

On Wed, 15 Feb 2012 03:14:19 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 14.02.2012 16:39 schrieb Stefan Tauner:
> > This includes not only the notorious read-only flash descriptors and locked ME
> > regions, but also the more rarely used PRs (Protected Ranges).
> > The user can enforce write support by specifying ich_spi_force=yes in the
> 
> Can you rename ich_spi_force to ich_ignore_locks or something similar?

the idea behind naming ich_spi_force not too specifically was that we
may need another force switch in the future and i dont want to add yet
another parameter (or change the old one, because it is a (small) UI
change), but it is not that important to me...

> The PR stuff is not limited to SPI IIRC.
i dont think so. there is a table in the respective datasheets named
"Flash Protection Mechanism Summary" it names the "Equivalent Function
on FWH" for the "BIOS Range Write Protection": "FWH Sector Protection"

My interpretation is that the "BIOS Range Write Protection" is the one
related to PRx and that "FWH Sector Protection" refers to the chip
feature of lock bits. Also, the PRx registers are located in the SPIBAR
range and the documentation of the PRx addresses refer to FLA, which is
only used to define the SPI flash address (for hwseq and swseq).

maybe name it ich_force?
NB: the other parameter for hw/swseq selection is ich_spi_mode

> > programmer options, but we don't tell him the exact syntax interactively. He
> > has to read it up in the man page.
> > ---
> > non-verbose sample output from my laptop (that contains both protection types):
> > [?]
> > Found chipset "Intel QS57". Enabling flash write... WARNING: SPI Configuration Lockdown activated.
> > WARNING: Flash Descriptor region is not fully accessible and flashrom can
> > not deal with this correctly yet.
> > Intel does not provide us the necessary documention to support this.
> > Please send a verbose log to flashrom at flashrom.org if this board is not listed on
> > http://flashrom.org/Supported_hardware#Supported_mainboards yet.
> > Writes have been disabled. You can enforce write support with the
> > ich_spi_force programmer option, but it will most likely harm your hardware!
> > If you force flashrom you will get no support if something breaks.
> > WARNING: Management Engine region is not fully accessible and flashrom can
> > not deal with this correctly yet.
> > WARNING: PR0: 0x007d0000-0x01ffffff is read-only.
> > OK.
> > [?]
> 
> Ugh. This is the non-verbose version? I had trouble parsing that message
> flood on the first attempt. May I suggest an alternative wording?

the good thing is.. it wont get much worse in verbose mode ;)

> WARNING: Flash Descriptor region is not fully accessible.
> WARNING: Management Engine region is not fully accessible.
> WARNING: PR0: 0x007d0000-0x01ffffff is read-only.
> Please send a verbose log to flashrom at flashrom.org if this board is not listed on
> http://flashrom.org/Supported_hardware#Supported_mainboards yet.
> Writes have been disabled. You can force writing with the ich_ignore_locks
> programmer option, but it will most likely brick your mainboard.
> 
> The idea of my wording is to postpone the explanatory message until all
> "not accessible"/"read-only" messages have been printed.

complicates the logic... this order would be my favorite too (of
course).

> The complaint about Intel belongs to the man page or to intel_mysteries.txt
> (if you choose the latter, just mention intel_mysteries.txt at the relevant
> location in the man page).

ok... i am certainly a bit biased on and obsessed with this :)

> 
> For the override case, just print the message above and additionally
> "You have been warned. We will not support you if write/erase bricks your
> mainboard. Proceeding anyway because user specified ich_ignore_locks."
> or something similar.

i will look into it.

> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> > ---
> >  flashrom.8 |   15 ++++++++++
> >  ichspi.c   |   90 +++++++++++++++++++++++++++++++++++++++++++++++------------
> >  2 files changed, 86 insertions(+), 19 deletions(-)
> >
> > diff --git a/flashrom.8 b/flashrom.8
> > index 2f23cb8..0ca4fdb 100644
> > --- a/flashrom.8
> > +++ b/flashrom.8
> > @@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash
> >  chip is attached). The other options (swseq, hwseq) select the respective mode
> >  (if possible).
> >  .sp
> > +ICH8 and later southbridges may also have locked address ranges of different
> > +kinds if a valid descriptor was written to it. The flash address space is then
> > +partitioned in multiple so called "Flash Regions" containing the host firmware,
> > +the ME firmware and so on respectively. The flash descriptor can also specify up
> > +to 5 so called "Protected Regions", which are freely chosen address ranges
> > +independent from the aforementioned "Flash Regions". All of them can be write
> > +and/or read protected individually. If flashrom detects such a lock it will
> > +disable write support unless the user forces it with the
> > +.sp
> > +.B "  flashrom \-p internal:ich_spi_force=yes"
> > +.sp
> > +syntax. If this leads to erase or write accesses to the flash it would most
> > +probably bring it into an inconsistent and unbootable state and we will not
> > +provide any support in such a case.
> > +.sp
> >  If you have an Intel chipset with an ICH6 or later southbridge and if you want
> >  to set specific IDSEL values for a non-default flash chip or an embedded
> >  controller (EC), you can use the
> > diff --git a/ichspi.c b/ichspi.c
> > index 163ecf1..f21bb35 100644
> > --- a/ichspi.c
> > +++ b/ichspi.c
> > @@ -1416,12 +1416,36 @@ static int ich_spi_send_multicommand(struct flashctx *flash,
> >  	return ret;
> >  }
> >  
> > +static void ich9_disable_writes(int force, const char * const msg)
> > +{
> > +	/* Don't scare and spam the user even more if write support was already
> > +	 * disabled */
> > +	if (!programmer_may_write)
> > +		return;
> > +
> > +	msg_pinfo("%s", msg);
> > +	msg_pinfo("Please send a verbose log to flashrom at flashrom.org if this "
> > +		  "board is not listed on\n"
> > +		  "http://flashrom.org/Supported_hardware#Supported_mainboards "
> > +		  "yet.\n");
> > +	if (!force) {
> > +		programmer_may_write = 0;
> > +		msg_pinfo("Writes have been disabled. You can enforce write "
> > +			  "support with the\nich_spi_force programmer option, "
> > +			  "but it will most likely harm your hardware!\n");
> > +	}
> > +	msg_pinfo("If you force flashrom you will get no support if something "
> > +		  "breaks.\n");
> > +	if (force)
> > +		msg_pinfo("Continuing anyway because the user forced us to!\n");
> > +}
> > +
> >  #define ICH_BMWAG(x) ((x >> 24) & 0xff)
> >  #define ICH_BMRAG(x) ((x >> 16) & 0xff)
> >  #define ICH_BRWA(x)  ((x >>  8) & 0xff)
> >  #define ICH_BRRA(x)  ((x >>  0) & 0xff)
> >  
> > -static void do_ich9_spi_frap(uint32_t frap, int i)
> > +static void ich9_handle_frap(uint32_t frap, int i, int force)
> >  {
> >  	static const char *const access_names[4] = {
> >  		"locked", "read-only", "write-only", "read-write"
> > @@ -1447,8 +1471,15 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
> >  		return;
> >  	}
> >  
> > -	msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
> > +	msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff),
> >  		 access_names[rwperms]);
> > +	if (rwperms == 0x3)
> > +		return;
> > +
> > +	msg_pinfo("WARNING: %s region is not fully accessible and flashrom "
> > +		  "can\nnot deal with this correctly yet.\n", region_names[i]);
> > +	ich9_disable_writes(force, "Intel does not provide us the necessary "
> > +			    "documention to support this.\n");
> >  }
> >  
> >  	/* In contrast to FRAP and the master section of the descriptor the bits
> > @@ -1460,21 +1491,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
> >  #define ICH_PR_PERMS(pr)	(((~((pr) >> PR_RP_OFF) & 1) << 0) | \
> >  				 ((~((pr) >> PR_WP_OFF) & 1) << 1))
> >  
> > -static void prettyprint_ich9_reg_pr(int i)
> > +static void ich9_handle_pr(int i, int force)
> >  {
> > -	static const char *const access_names[4] = {
> > -		"locked", "read-only", "write-only", "read-write"
> > +	static const char *const access_names[3] = {
> > +		"locked", "read-only", "write-only"
> >  	};
> >  	uint8_t off = ICH9_REG_PR0 + (i * 4);
> >  	uint32_t pr = mmio_readl(ich_spibar + off);
> > -	int rwperms = ICH_PR_PERMS(pr);
> > +	unsigned int rwperms = ICH_PR_PERMS(pr);
> >  
> > -	msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i);
> > -	if (rwperms != 0x3)
> > -		msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr),
> > -			 ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
> > -	else
> > -		msg_pdbg2(", unused)\n");
> > +	if (rwperms >= 0x3) {
> 
> Why >= 0x3? AFAICS the ICH_PR_PERMS macro can only have values between
> 0x0 and 0x3.

it does, but OTOH one has to direct the execution flow for the
impossible values anyway and since the else path would try to access
the array out of bounds, i have done it in that way.
note that ich9_handle_frap is different because there we access the
array before the if, so it does matter even less there. if you think
that reduces readability i can change it - for me it does not.

> > +		msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i);
> > +		return;
> > +	}
> > +
> > +	msg_pdbg("0x%02X: 0x%08x ", off, pr);
> > +	msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
> > +		  ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
> > +	ich9_disable_writes(force, "There is no way to change this from within "
> > +			    "the system.\n");
> >  }
> >  
> >  /* Set/Clear the read and write protection enable bits of PR register @i
> > @@ -1537,6 +1572,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
> >  	uint16_t spibar_offset, tmp2;
> >  	uint32_t tmp;
> >  	char *arg;
> > +	int ich_spi_force = 0;
> >  	int desc_valid = 0;
> >  	struct ich_descriptors desc = {{ 0 }};
> >  	enum ich_spi_mode {
> > @@ -1631,6 +1667,22 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
> >  		}
> >  		free(arg);
> >  
> > +		arg = extract_programmer_param("ich_spi_force");
> > +		if (arg && !strcmp(arg, "yes")) {
> > +			ich_spi_force = 1;
> > +			msg_pspew("ich_spi_force enabled.\n");
> > +		} else if (arg && !strlen(arg)) {
> > +			msg_perr("Missing argument for ich_spi_force.\n");
> > +			free(arg);
> > +			return ERROR_FATAL;
> > +		} else if (arg) {
> > +			msg_perr("Unknown argument for ich_spi_force: \"%s\" "
> > +				 "(not \"yes\").\n", arg);
> > +			free(arg);
> > +			return ERROR_FATAL;
> > +		}
> > +		free(arg);
> > +
> >  		tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS);
> >  		msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
> >  		prettyprint_ich9_reg_hsfs(tmp2);
> > @@ -1665,17 +1717,17 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
> >  			msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp));
> >  			msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp));
> >  
> > -			/* Decode and print FREGx and FRAP registers */
> > +			/* Handle FREGx and FRAP registers */
> >  			for (i = 0; i < 5; i++)
> > -				do_ich9_spi_frap(tmp, i);
> > +				ich9_handle_frap(tmp, i, ich_spi_force);
> >  		}
> >  
> > -		/* try to disable PR locks before printing them */
> > -		if (!ichspi_lock)
> > -			for (i = 0; i < 5; i++)
> > +		for (i = 0; i < 5; i++) {
> > +			/* if not locked down try to disable PR locks first */
> > +			if (!ichspi_lock)
> >  				ich9_set_pr(i, 0, 0);
> > -		for (i = 0; i < 5; i++)
> > -			prettyprint_ich9_reg_pr(i);
> > +			ich9_handle_pr(i, ich_spi_force);
> > +		}
> >  
> >  		tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS);
> >  		msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff);
> 
> Looks good otherwise.
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

ill try to make the output more readable, please notify me about the
other decisions.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 14:11:33 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 14:11:33 +0100
Subject: [flashrom] [PATCH] Warn of one-time programmable (OTP) memory
In-Reply-To: <4F3B109A.2030504@gmx.net>
References: <1280430606-18194-1-git-send-email-dlenski@gmail.com>
	<1313292964-2123-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3B109A.2030504@gmx.net>
Message-ID: <201202151310.q1FDAvd6019716@mail2.student.tuwien.ac.at>

On Wed, 15 Feb 2012 02:55:38 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Hi Stefan,
> 
> I have waited very long to comment on this patch, but I simply don't
> have a good answer for it.
> I do think that OTP/security memory is outside the scope of flashrom
> because it behaves totally different (and testing could easily kill a
> dozen chips during inital implementation, and a few chips each time
> someone wants to retest).

flashrom "bricks" complete mainboards now and then because the user did
not prepare well, did not read documentation or obeyed ridiculously
obvious warnings. putting this into relation with a developer (or
advanced user) that tests flashrom's OTP capabilities reveals what i
think about this argument. ;) Of course the comparison is not
completely fair because unerasable OTP bits are gone forever and
mainboards can be repaired? OTOH a new chip costs not much in relation
to fix a mainboard for must of our users.

> Now if something is outside the scope of
> flashrom, should flashrom care at all?

depends... i dont think of "the scope" as a clearly bounded area.
everything related to flash chips is somewhat in its scope (else we
would not talk about this), heck we even discussed EEPROM handling
multiple times... we dont need to support any and all feature found in
any flash chip out there, but we should integrate knowledge and code
for the more common ones that might be useful, if there is someone
willing to provide them (and maintain them if necessary).

> Some flash chips have GPI pins
> (GPIO without output) and those are readable with commands very similar
> to those used by flashrom. Should we tell the user about that feature as
> well? We had such requests in the past, and I was not really happy about
> them.

this is not about GPIO or other non-memory features (one can stretch
the words "read and write" to accessing IO streams, but let's pretend i
did not write that ;).

> Am 14.08.2011 05:36 schrieb Stefan Tauner:
> > Some flash chips contain OTP memory that we cannot read or write (yet). This
> > prohibits us from cloning them, hence warn the user if we detect it. Not all
> > variations of the tagged chips contain OTP memory. They are often only
> > enabled on request or have there own ordering numbers. There is usually no
> > way to distinguish them afaict.
> 
> Well, it's worse than that. I've seen datasheets for flash chips with
> the following features:
> - OTP memory, fully readable, fully writable once in one block (no
> partial writes)
> - OTP memory, fully readable, fully writable once per byte (partial
> writes work just fine)
> - OTP memory, fully readable, fully writable once per 2^n-byte block
> - OTP memory, fully readable, only half of it writable, the other half
> is programmed at the factory
> - OTP memory, fully readable, completely pre-written at the factory (so
> it's rather ROM than OTP)
> - Hidden OTP memory which can only be read if you know the correct
> security ID which is part of the OTP
> - (The complete flash chip behaves like OTP (well, like ROM) once a
> specific write-once status register is set)... not relevant here
> 
> And then you have the problem that multiple chip generations often share
> the same device ID, so probing can't differentiate between a chip with
> OTP and one without unless you're extremely lucky. Do we want
> FEATURE_OTP and FEATURE_MAYBE_OTP?

FEATURE_MAYBE_NOT_CLONEABLE
half serious... at least this is the semantics i would like to tag
and convey to the user for now.

> 
> Do we warn if a chip has a readonly serial number? That means the chip
> can't be cloned. People who care about OTP for clonability reasons
> probably care about other readonly contents as well. OTOH, other people
> who don't use the OTP at all (for them, OTP is just an accidental
> feature of a cheap flash chip) don't want to be bothered by yet another
> line of output from flashrom which has no relevancy for them.

do you agree to lowering the verbosity of the whole message to dbg
level?

> > The manpage is extended to describe the backgrounds a bit. While i touched
> > that section, i also reformatted it a bit and removed the reference to the trac
> > bug reporting facility.
> >
> > This patch is based on the idea and code of Daniel Lenski.
> > ---
> > the reason i removed the trac reference is that it is not used, i have no (working)
> > login and it does not really fits our work flow anyway. the only user that used it
> > in my active flashrom time ranted about it. would anyone miss it?
> 
> To be honest, trac is something I never got along with. Even if I'm
> logged in there is no way for me to read the email address of the person
> who opened the bug, so communication is pretty difficult. I'm all for
> checking all old trac tickets, closing what can be closed, and moving
> all other tickets in some way or another to the mailing list. However,
> we should mention that it's OK to report bugs via IRC as well as long as
> the reporter mentions a way to contact hi/her (i.e. email address).
> 
> Removing the trac reference and adding the IRC reference should be a
> separate patch, though, which is
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

ok, this will go into the recently posted manpage improvement patch
(planned to do that anyway because i did not think that you would look
at this one now :)

> 
> One comment about the man page formatting: This part of the patch may
> conflict with the other man page formatting patch you sent. By the way,
> do you know any good reference about man page formatting? I had trouble
> finding out what .RE and .RS do.

i have to look that stuff up every time myself, sorry.
yesterday i have used http://gnustep.made-it.com/man-groff.html but
it looks like that would not answer your question...

> > the new default verbosity output is:
> > This chip may contain one-time programmable memory (see man page for details).
> >
> > the new dbg1/-V output is:
> > This chip may contain one-time programmable memory.
> > flashrom cannot read, and may never be able to write it. flashrom may not be
> > able to completely clone the contents of this chip (see man page for details).
> >
> > there are certainly more chips with OTP memories out there. additions are
> > welcome!
> > i have only tagged chips with user modifiably OTP/security memories. there
> > are some chips out there which have factory written IDs, but no OTP memory.
> > a similar warning could/should be printed for those, but i did not want to
> > abuse the OTP tag for this. also, there is nothing we can do, but read those IDs.
> > duplicating chips using them is not possible, so a warning in the man page might
> > suffice?
> >
> > since OTP memory (or any other data outside the linear address range of the
> > "main" memory) can not be handled very well in flashrom right now, it is not
> > clear how OTP memory access could be developed further. of course one could
> > start to implement the basic methods needed to read them, but how they
> > should be integrated then is not clear.
> > one could start by adding an otp_print field to the struct flashchip and just
> > dump the bytes on probing similar to the lock printing (not on default verbosity
> > and possibly only if there are bytes different from 0x00 and 0xff).
> >
> > carl-daniel seems to be quite sceptical regarding handling OTP at all in flashrom.
> > he stated "it does not really fit our device model at all", which is right, but could
> > be changed.
> > he also asked "should we really handle all features present in flash chips?"
> > and the answer is probably "no", although i don't see a reason why we should
> > not, if the effort is not too much and the architectural changes needed aren't
> > obvious NOGOs.
> > but OTP regions are somewhat special, they are not just *some* feature.
> 
> Indeed.
> 
> 
> > one argument is the one stated in the message printed by this patch. flashrom
> > is not able to clone chips that have some kind of OTP memory written right now.
> > imo "cloning" a flash chip seems to be a valid use case for a tool like flashrom as
> > long as it is feasible (which is not for chips with unique, preconfigured IDs).
> >
> > the other more theoretical argument i have is: OTP memory is just some
> > memory in the flash chip. it may need other access patterns, but it is not much
> > different from other write protected memories apart from that.
> > some chips implement it in a way that it is even possible to erase the OTP
> > regions. those regions are just normal flash and are made unwriteable by fuses
> > in a register or another addressable byte.
> >
> > Signed-off-by: Daniel Lenski <dlenski at gmail.com>
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> 
> Stefan: I don't want to veto this patch, and although I think that OTP
> handling is not really a flashrom feature, I think that this
> implementation satisfies the quality criteria for merging, so the patch is
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

thanks! ill wait for your response regarding message verbosity while
merging the (independent) manpage change into my other patch.
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From secipolla at gmail.com  Wed Feb 15 13:58:14 2012
From: secipolla at gmail.com (Sergio Cipolla)
Date: Wed, 15 Feb 2012 10:58:14 -0200
Subject: [flashrom] Just asking some basic advice before I flash the BIOS.
Message-ID: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>

Hello. First of all, thank you for flashrom.
I have an ECS k7vta3 mobo with VT8233A southbridge.

# flashrom -r bios.old
flashrom v0.9.4-r1394 on Linux 3.2.0-1-686-pae (i686), built with
libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
Found chipset "VIA VT8233A". Enabling flash write... OK.
This chipset supports the following protocols: Non-SPI.
Found PMC flash chip "Pm29F002T" (256 kB, Parallel) at physical
address 0xfffc0000.
===
This flash part has status UNTESTED for operations: WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!

I have the latest BIOS (k7vta330d.exe) here. To write it I would simply run

# flashrom -wv k7vta330d.exe

right?
Should I add any -V just in case too?


From vidwer at gmail.com  Wed Feb 15 14:56:40 2012
From: vidwer at gmail.com (Idwer Vollering)
Date: Wed, 15 Feb 2012 14:56:40 +0100
Subject: [flashrom] Just asking some basic advice before I flash the
	BIOS.
In-Reply-To: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
References: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
Message-ID: <CAPp9OrkDKLRRTKRbmnzW8yj7r8ThfKmDKhwH3ka6ideoiOrQKg@mail.gmail.com>

2012/2/15 Sergio Cipolla <secipolla at gmail.com>:
> Hello. First of all, thank you for flashrom.
> I have an ECS k7vta3 mobo with VT8233A southbridge.

It looks like your board is supported:
http://www.coreboot.org/pipermail/coreboot/2009-June/050002.html
http://www.coreboot.org/pipermail/coreboot/2009-June/050004.html

Note that there seem to be several PCB revisions: v3.1, v5.0, v6.0,
v8.0: http://www.google.nl/search?&q=site:ecs.com.tw+ECS+k7vta3

>
> # flashrom -r bios.old
> flashrom v0.9.4-r1394 on Linux 3.2.0-1-686-pae (i686), built with
> libpci 3.1.7, GCC 4.6.1, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
>
> Calibrating delay loop... OK.
> Found chipset "VIA VT8233A". Enabling flash write... OK.
> This chipset supports the following protocols: Non-SPI.
> Found PMC flash chip "Pm29F002T" (256 kB, Parallel) at physical
> address 0xfffc0000.
> ===
> This flash part has status UNTESTED for operations: WRITE
> The test status of this chip may have been updated in the latest development
> version of flashrom. If you are running the latest development version,
> please email a report to flashrom at flashrom.org if any of the above operations
> work correctly for you with this flash part. Please include the flashrom
> output with the additional -V option for all operations you tested (-V, -Vr,
> -Vw, -VE), and mention which mainboard or programmer you tested.
> Please mention your board in the subject line. Thanks for your help!
>
> I have the latest BIOS (k7vta330d.exe) here. To write it I would simply run
>
> # flashrom -wv k7vta330d.exe
>
> right?

No: 1) that file isn't a BIOS file and 2) the filesize won't match the
chip's size. Unzip that .exe file and write "K7V330D.BIN" instead.
The "-v" parameter is for verifying chip content against files (on any
filesystem).

> Should I add any -V just in case too?

Adding "-V" and saving the output would be helpful, yes.

>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom


From secipolla at gmail.com  Wed Feb 15 14:59:04 2012
From: secipolla at gmail.com (Sergio Cipolla)
Date: Wed, 15 Feb 2012 11:59:04 -0200
Subject: [flashrom] Just asking some basic advice before I flash the
	BIOS.
In-Reply-To: <4F3BB589.1090206@gmail.com>
References: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
	<4F3BB589.1090206@gmail.com>
Message-ID: <CANLOsR7EsbzT2huXr+EtZHhEMpiCWQQ=hd2w0hkUFKos-KQ=Fw@mail.gmail.com>

unzip worked then flashing seems to have gone well too:
http://paste.flashrom.org/view.php?id=1079

I'll reboot just to check if everything is fine (and setup the BIOS)
then if it's all OK, should I report 'lspci -nnvvvxxx' and
'superiotool -deV' ?
Should I add 'flashrom -V' again to the report?
I didn't understand what 'file read with 'flashrom -r readout.rom'' is
( http://flashrom.org/IRC/Bot#.21summary ).


From roysjosh at gmail.com  Wed Feb 15 14:39:21 2012
From: roysjosh at gmail.com (Joshua Roys)
Date: Wed, 15 Feb 2012 08:39:21 -0500
Subject: [flashrom] Just asking some basic advice before I flash the
	BIOS.
In-Reply-To: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
References: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
Message-ID: <4F3BB589.1090206@gmail.com>

On 02/15/2012 07:58 AM, Sergio Cipolla wrote:
> Hello. First of all, thank you for flashrom.
> I have an ECS k7vta3 mobo with VT8233A southbridge.
>
> # flashrom -r bios.old

First, save this backup somewhere.  If you want to be really 
paranoid/safe also save it on external media.

> I have the latest BIOS (k7vta330d.exe) here. To write it I would simply run
>
> # flashrom -wv k7vta330d.exe
>
> right?
> Should I add any -V just in case too?
>

You'll need to get the bios out of the exe.  Try all of these:

unzip
cabextract
unshield
7za

Then find the file with an appropriate size.  It will be the exact 
number of bytes as the backup you have made.

Then, recent versions of flashrom automatically verify after writing so 
you do not need a little v.  A big V would be nice for debugging any 
issues that occur.

Now, make sure that you have time (at least a day, maybe more) to leave 
the machine running in case the flash fails.  If it does fail, it is 
likely some software protection that can be disabled with some 
investigation (some reverse engineering by a developer, a patch being 
written, applied by you and a new flashrom being compiled by you).

Also keep in mind that all flash updates have some amount of risk.

So the command you'll want to run is:
# flashrom -Vw $newfile
where $newfile is the image you find after uncompressing/extracting the 
.exe provided by the bios vendor.

Good luck (and please send success/failure reports to this list),

Josh



From roysjosh at gmail.com  Wed Feb 15 15:12:04 2012
From: roysjosh at gmail.com (Joshua Roys)
Date: Wed, 15 Feb 2012 09:12:04 -0500
Subject: [flashrom] Just asking some basic advice before I flash the
	BIOS.
In-Reply-To: <CANLOsR7EsbzT2huXr+EtZHhEMpiCWQQ=hd2w0hkUFKos-KQ=Fw@mail.gmail.com>
References: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
	<4F3BB589.1090206@gmail.com>
	<CANLOsR7EsbzT2huXr+EtZHhEMpiCWQQ=hd2w0hkUFKos-KQ=Fw@mail.gmail.com>
Message-ID: <4F3BBD34.80108@gmail.com>

On 02/15/2012 08:59 AM, Sergio Cipolla wrote:
> unzip worked then flashing seems to have gone well too:
> http://paste.flashrom.org/view.php?id=1079
>
> I'll reboot just to check if everything is fine (and setup the BIOS)
> then if it's all OK, should I report 'lspci -nnvvvxxx' and
> 'superiotool -deV' ?
> Should I add 'flashrom -V' again to the report?
> I didn't understand what 'file read with 'flashrom -r readout.rom'' is
> ( http://flashrom.org/IRC/Bot#.21summary ).
>

Hello,

Great!

It looks like your board already has the lspci output provided by 
someone else, and the flashrom -Vw output you put on paste.flashrom.org 
is good enough.

The "readout.rom" part, along with the rest of that description, is 
actually for people who we'll need to do some reverse engineering for in 
order to support flashing.  Since your board works, you don't need to 
upload it.

If you like you can paste a suprtiotool output, but again, since 
flashing works, it is not necessary.

Thanks,

Josh


From secipolla at gmail.com  Wed Feb 15 15:20:56 2012
From: secipolla at gmail.com (Sergio Cipolla)
Date: Wed, 15 Feb 2012 12:20:56 -0200
Subject: [flashrom] Just asking some basic advice before I flash the
	BIOS.
In-Reply-To: <4F3BBD34.80108@gmail.com>
References: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
	<4F3BB589.1090206@gmail.com>
	<CANLOsR7EsbzT2huXr+EtZHhEMpiCWQQ=hd2w0hkUFKos-KQ=Fw@mail.gmail.com>
	<4F3BBD34.80108@gmail.com>
Message-ID: <CANLOsR5i=M6dQM9Qsrds36GMzs4M7FjaKLH-F414Ym9+JDoR5w@mail.gmail.com>

On 15 February 2012 12:12, Joshua Roys <roysjosh at gmail.com> wrote:
> On 02/15/2012 08:59 AM, Sergio Cipolla wrote:
>>
>> unzip worked then flashing seems to have gone well too:
>> http://paste.flashrom.org/view.php?id=1079
>>
>> I'll reboot just to check if everything is fine (and setup the BIOS)
>> then if it's all OK, should I report 'lspci -nnvvvxxx' and
>> 'superiotool -deV' ?
>> Should I add 'flashrom -V' again to the report?
>> I didn't understand what 'file read with 'flashrom -r readout.rom'' is
>> ( http://flashrom.org/IRC/Bot#.21summary ).
>>
>
> Hello,
>
> Great!
>
> It looks like your board already has the lspci output provided by someone
> else, and the flashrom -Vw output you put on paste.flashrom.org is good
> enough.
>
> The "readout.rom" part, along with the rest of that description, is actually
> for people who we'll need to do some reverse engineering for in order to
> support flashing. ?Since your board works, you don't need to upload it.
>
> If you like you can paste a suprtiotool output, but again, since flashing
> works, it is not necessary.
>
> Thanks,
>
> Josh

OK. Thank you all again. Everything is fine with the new BIOS.
So maybe just the chip info should be updated to support write?
Just to make sure again, my mobo is K7VTA3/KT333:3.1 (3.1 being the
PCB version).


From sable_laser at yahoo.es  Wed Feb 15 15:49:42 2012
From: sable_laser at yahoo.es (Caronte Estigia)
Date: Wed, 15 Feb 2012 14:49:42 +0000 (GMT)
Subject: [flashrom] flashrom output for Asus M3N-HT DELUXE/HDMI.
Message-ID: <1329317382.58542.YahooMailClassic@web171213.mail.ir2.yahoo.com>

Hello!

As requested in the flashrom -V output, here is what I get running the command on a M3N-HT Deluxe MoBo.

If you need anything else, don't hesitate contacting me.

Regards.


flashrom v0.9.2-r1028 on Linux 2.6.35-32-generic (x86_64), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 1507M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1003 us, 10000 myus = 10003 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "System manufacturer"
DMI string system-product-name: "System Product Name"
DMI string system-version: "System Version"
DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
DMI string baseboard-product-name: "M3N-HT DELUXE"
DMI string baseboard-version: "1.XX"
DMI string chassis-type: "Desktop"
Found ITE Super I/O, id 8716
Found chipset "NVIDIA MCP78S", enabling flash write... chipset PCI ID is 10de:07
5d, This chipset is not really supported yet. Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Guessed flash bus type is SPI
Found SMBus device 10de:0752 at 00:01:1
SPI BAR is at 0xfdf80000, after clearing low bits BAR is at 0xfdf80000
SPI control is 0xc01a, enable=0, idle=0
Please send the output of "flashrom -V" to flashrom at flashrom.org to help us finish support for your chipset. Thanks.
SPI on this chipset is not supported yet.
OK.
This chipset supports the following protocols: None.
No IT87* serial flash segment enabled.
Probing for AMD Am29F010A/B, 128 KB: skipped.
Probing for AMD Am29F002(N)BB, 256 KB: skipped.
Probing for AMD Am29F002(N)BT, 256 KB: skipped.
Probing for AMD Am29F016D, 2048 KB: skipped.
Probing for AMD Am29F040B, 512 KB: skipped.
Probing for AMD Am29F080B, 1024 KB: skipped.
Probing for AMD Am29LV040B, 512 KB: skipped.
Probing for AMD Am29LV081B, 1024 KB: skipped.
Probing for ASD AE49F2008, 256 KB: skipped.
Probing for Atmel AT25DF021, 256 KB: skipped.
Probing for Atmel AT25DF041A, 512 KB: skipped.
Probing for Atmel AT25DF081, 1024 KB: skipped.
Probing for Atmel AT25DF161, 2048 KB: skipped.
Probing for Atmel AT25DF321, 4096 KB: skipped.
Probing for Atmel AT25DF321A, 4096 KB: skipped.
Probing for Atmel AT25DF641, 8192 KB: skipped.
Probing for Atmel AT25F512B, 64 KB: skipped.
Probing for Atmel AT25FS010, 128 KB: skipped.
Probing for Atmel AT25FS040, 512 KB: skipped.
Probing for Atmel AT26DF041, 512 KB: skipped.
Probing for Atmel AT26DF081A, 1024 KB: skipped.
Probing for Atmel AT26DF161, 2048 KB: skipped.
Probing for Atmel AT26DF161A, 2048 KB: skipped.
Probing for Atmel AT26F004, 512 KB: skipped.
Probing for Atmel AT29C512, 64 KB: skipped.
Probing for Atmel AT29C010A, 128 KB: skipped.
Probing for Atmel AT29C020, 256 KB: skipped.
Probing for Atmel AT29C040A, 512 KB: skipped.
Probing for Atmel AT45CS1282, 16896 KB: skipped.
Probing for Atmel AT45DB011D, 128 KB: skipped.
Probing for Atmel AT45DB021D, 256 KB: skipped.
Probing for Atmel AT45DB041D, 512 KB: skipped.
Probing for Atmel AT45DB081D, 1024 KB: skipped.
Probing for Atmel AT45DB161D, 2048 KB: skipped.
Probing for Atmel AT45DB321C, 4224 KB: skipped.
Probing for Atmel AT45DB321D, 4096 KB: skipped.
Probing for Atmel AT45DB642D, 8192 KB: skipped.
Probing for Atmel AT49BV512, 64 KB: skipped.
Probing for Atmel AT49F002(N), 256 KB: skipped.
Probing for Atmel AT49F002(N)T, 256 KB: skipped.
Probing for AMIC A25L40PT, 512 KB: skipped.
Probing for AMIC A25L40PU, 512 KB: skipped.
Probing for AMIC A29002B, 256 KB: skipped.
Probing for AMIC A29002T, 256 KB: skipped.
Probing for AMIC A29040B, 512 KB: skipped.
Probing for AMIC A49LF040A, 512 KB: skipped.
Probing for EMST F49B002UA, 256 KB: skipped.
Probing for Eon EN25B05, 64 KB: skipped.
Probing for Eon EN25B05T, 64 KB: skipped.
Probing for Eon EN25B10, 128 KB: skipped.
Probing for Eon EN25B10T, 128 KB: skipped.
Probing for Eon EN25B20, 256 KB: skipped.
Probing for Eon EN25B20T, 256 KB: skipped.
Probing for Eon EN25B40, 512 KB: skipped.
Probing for Eon EN25B40T, 512 KB: skipped.
Probing for Eon EN25B80, 1024 KB: skipped.
Probing for Eon EN25B80T, 1024 KB: skipped.
Probing for Eon EN25B16, 2048 KB: skipped.
Probing for Eon EN25B16T, 2048 KB: skipped.
Probing for Eon EN25B32, 4096 KB: skipped.
Probing for Eon EN25B32T, 4096 KB: skipped.
Probing for Eon EN25B64, 8192 KB: skipped.
Probing for Eon EN25B64T, 8192 KB: skipped.
Probing for Eon EN25D16, 2048 KB: skipped.
Probing for Eon EN25F05, 64 KB: skipped.
Probing for Eon EN25F10, 128 KB: skipped.
Probing for Eon EN25F20, 256 KB: skipped.
Probing for Eon EN25F40, 512 KB: skipped.
Probing for Eon EN25F80, 1024 KB: skipped.
Probing for Eon EN25F16, 2048 KB: skipped.
Probing for Eon EN25F32, 4096 KB: skipped.
Probing for Eon EN29F010, 128 KB: skipped.
Probing for EON EN29F002(A)(N)B, 256 KB: skipped.
Probing for EON EN29F002(A)(N)T, 256 KB: skipped.
Probing for Fujitsu MBM29F004BC, 512 KB: skipped.
Probing for Fujitsu MBM29F004TC, 512 KB: skipped.
Probing for Fujitsu MBM29F400BC, 512 KB: skipped.
Probing for Fujitsu MBM29F400TC, 512 KB: skipped.
Probing for Intel 28F001BX-B, 128 KB: skipped.
Probing for Intel 28F001BX-T, 128 KB: skipped.
Probing for Intel 28F004S5, 512 KB: skipped.
Probing for Intel 28F004BV/BE-B, 512 KB: skipped.
Probing for Intel 28F004BV/BE-T, 512 KB: skipped.
Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped.
Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped.
Probing for Intel 82802AB, 512 KB: skipped.
Probing for Intel 82802AC, 1024 KB: skipped.
Probing for Macronix MX25L512, 64 KB: skipped.
Probing for Macronix MX25L1005, 128 KB: skipped.
Probing for Macronix MX25L2005, 256 KB: skipped.
Probing for Macronix MX25L4005, 512 KB: skipped.
Probing for Macronix MX25L8005, 1024 KB: skipped.
Probing for Macronix MX25L1605, 2048 KB: skipped.
Probing for Macronix MX25L1635D, 2048 KB: skipped.
Probing for Macronix MX25L3205, 4096 KB: skipped.
Probing for Macronix MX25L3235D, 4096 KB: skipped.
Probing for Macronix MX25L6405, 8192 KB: skipped.
Probing for Macronix MX25L12805, 16384 KB: skipped.
Probing for Macronix MX29F001B, 128 KB: skipped.
Probing for Macronix MX29F001T, 128 KB: skipped.
Probing for Macronix MX29F002B, 256 KB: skipped.
Probing for Macronix MX29F002T, 256 KB: skipped.
Probing for Macronix MX29LV040, 512 KB: skipped.
Probing for Numonyx M25PE10, 128 KB: skipped.
Probing for Numonyx M25PE20, 256 KB: skipped.
Probing for Numonyx M25PE40, 512 KB: skipped.
Probing for Numonyx M25PE80, 1024 KB: skipped.
Probing for Numonyx M25PE16, 2048 KB: skipped.
Probing for PMC Pm25LV010, 128 KB: skipped.
Probing for PMC Pm25LV016B, 2048 KB: skipped.
Probing for PMC Pm25LV020, 256 KB: skipped.
Probing for PMC Pm25LV040, 512 KB: skipped.
Probing for PMC Pm25LV080B, 1024 KB: skipped.
Probing for PMC Pm25LV512, 64 KB: skipped.
Probing for PMC Pm29F002T, 256 KB: skipped.
Probing for PMC Pm29F002B, 256 KB: skipped.
Probing for PMC Pm39LV010, 128 KB: skipped.
Probing for PMC Pm39LV020, 256 KB: skipped.
Probing for PMC Pm39LV040, 512 KB: skipped.
Probing for PMC Pm49FL002, 256 KB: skipped.
Probing for PMC Pm49FL004, 512 KB: skipped.
Probing for Sanyo LF25FW203A, 2048 KB: skipped.
Probing for Sharp LHF00L04, 1024 KB: skipped.
Probing for Spansion S25FL008A, 1024 KB: skipped.
Probing for Spansion S25FL016A, 2048 KB: skipped.
Probing for SST SST25VF016B, 2048 KB: skipped.
Probing for SST SST25VF032B, 4096 KB: skipped.
Probing for SST SST25VF040.REMS, 512 KB: skipped.
Probing for SST SST25VF040B, 512 KB: skipped.
Probing for SST SST25VF040B.REMS, 512 KB: skipped.
Probing for SST SST25VF080B, 1024 KB: skipped.
Probing for SST SST28SF040A, 512 KB: skipped.
Probing for SST SST29EE010, 128 KB: skipped.
Probing for SST SST29LE010, 128 KB: skipped.
Probing for SST SST29EE020A, 256 KB: skipped.
Probing for SST SST29LE020, 256 KB: skipped.
Probing for SST SST39SF512, 64 KB: skipped.
Probing for SST SST39SF010A, 128 KB: skipped.
Probing for SST SST39SF020A, 256 KB: skipped.
Probing for SST SST39SF040, 512 KB: skipped.
Probing for SST SST39VF512, 64 KB: skipped.
Probing for SST SST39VF010, 128 KB: skipped.
Probing for SST SST39VF020, 256 KB: skipped.
Probing for SST SST39VF040, 512 KB: skipped.
Probing for SST SST39VF080, 1024 KB: skipped.
Probing for SST SST49LF002A/B, 256 KB: skipped.
Probing for SST SST49LF003A/B, 384 KB: skipped.
Probing for SST SST49LF004A/B, 512 KB: skipped.
Probing for SST SST49LF004C, 512 KB: skipped.
Probing for SST SST49LF008A, 1024 KB: skipped.
Probing for SST SST49LF008C, 1024 KB: skipped.
Probing for SST SST49LF016C, 2048 KB: skipped.
Probing for SST SST49LF020, 256 KB: skipped.
Probing for SST SST49LF020A, 256 KB: skipped.
Probing for SST SST49LF040, 512 KB: skipped.
Probing for SST SST49LF040B, 512 KB: skipped.
Probing for SST SST49LF080A, 1024 KB: skipped.
Probing for SST SST49LF160C, 2048 KB: skipped.
Probing for ST M25P05-A, 64 KB: skipped.
Probing for ST M25P05.RES, 64 KB: skipped.
Probing for ST M25P10-A, 128 KB: skipped.
Probing for ST M25P10.RES, 128 KB: skipped.
Probing for ST M25P20, 256 KB: skipped.
Probing for ST M25P40, 512 KB: skipped.
Probing for ST M25P40-old, 512 KB: skipped.
Probing for ST M25P80, 1024 KB: skipped.
Probing for ST M25P16, 2048 KB: skipped.
Probing for ST M25P32, 4096 KB: skipped.
Probing for ST M25P64, 8192 KB: skipped.
Probing for ST M25P128, 16384 KB: skipped.
Probing for ST M29F002B, 256 KB: skipped.
Probing for ST M29F002T/NT, 256 KB: skipped.
Probing for ST M29F040B, 512 KB: skipped.
Probing for ST M29F400BT, 512 KB: skipped.
Probing for ST M29W010B, 128 KB: skipped.
Probing for ST M29W040B, 512 KB: skipped.
Probing for ST M29W512B, 64 KB: skipped.
Probing for ST M50FLW040A, 512 KB: skipped.
Probing for ST M50FLW040B, 512 KB: skipped.
Probing for ST M50FLW080A, 1024 KB: skipped.
Probing for ST M50FLW080B, 1024 KB: skipped.
Probing for ST M50FW002, 256 KB: skipped.
Probing for ST M50FW016, 2048 KB: skipped.
Probing for ST M50FW040, 512 KB: skipped.
Probing for ST M50FW080, 1024 KB: skipped.
Probing for ST M50LPW116, 2048 KB: skipped.
Probing for SyncMOS S29C31004T, 512 KB: skipped.
Probing for SyncMOS S29C51001T, 128 KB: skipped.
Probing for SyncMOS S29C51002T, 256 KB: skipped.
Probing for SyncMOS S29C51004T, 512 KB: skipped.
Probing for TI TMS29F002RB, 256 KB: skipped.
Probing for TI TMS29F002RT, 256 KB: skipped.
Probing for Winbond W25Q80, 1024 KB: skipped.
Probing for Winbond W25Q16, 2048 KB: skipped.
Probing for Winbond W25Q32, 4096 KB: skipped.
Probing for Winbond W25x10, 128 KB: skipped.
Probing for Winbond W25x20, 256 KB: skipped.
Probing for Winbond W25x40, 512 KB: skipped.
Probing for Winbond W25x80, 1024 KB: skipped.
Probing for Winbond W25x16, 2048 KB: skipped.
Probing for Winbond W25x32, 4096 KB: skipped.
Probing for Winbond W25x64, 8192 KB: skipped.
Probing for Winbond W29C011, 128 KB: skipped.
Probing for Winbond W29C020C, 256 KB: skipped.
Probing for Winbond W29C040P, 512 KB: skipped.
Probing for Winbond W29EE011, 128 KB: skipped.
Probing for Winbond W39V040A, 512 KB: skipped.
Probing for Winbond W39V040B, 512 KB: skipped.
Probing for Winbond W39V040C, 512 KB: skipped.
Probing for Winbond W39V040FA, 512 KB: skipped.
Probing for Winbond W39V080A, 1024 KB: skipped.
Probing for Winbond W49F002U, 256 KB: skipped.
Probing for Winbond W49V002A, 256 KB: skipped.
Probing for Winbond W49V002FA, 256 KB: skipped.
Probing for Winbond W39V080FA, 1024 KB: skipped.
Probing for Winbond W39V080FA (dual mode), 512 KB: skipped.
Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped.
Probing for EON unknown EON SPI chip, 0 KB: skipped.
Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped.
Probing for PMC unknown PMC SPI chip, 0 KB: skipped.
Probing for SST unknown SST SPI chip, 0 KB: skipped.
Probing for ST unknown ST SPI chip, 0 KB: skipped.
Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped.
Probing for Generic unknown SPI chip (RDID), 0 KB: skipped.
Probing for Generic unknown SPI chip (REMS), 0 KB: skipped.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120215/8f73af04/attachment-0001.html>

From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 16:23:35 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 16:23:35 +0100
Subject: [flashrom] [PATCH] Manpage improvements.
In-Reply-To: <1329274001-30125-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329274001-30125-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

The sections describing the various options of the internal and dummy
programmers have grown out of proportions. This patch adds some headlines
to devide the unrelated topics a bit (with .TP commands). The previous indented
paragraphs for the various programmers were transformed to subsections (.SS).

Also, rephrase the documention related to laptops completely to make it
less redundant and more informative.
Document the laptop=this_is_not_a_laptop internal programmer parameter

Change the contact info in the bugs section by removing the trac
reference and adding IRC (and the pastebin) instead.

Remove some superfluous white space.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.8 |  111 +++++++++++++++++++++++++++++++++++++++++------------------
 1 files changed, 77 insertions(+), 34 deletions(-)

diff --git a/flashrom.8 b/flashrom.8
index 2f23cb8..c4356f8 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -1,4 +1,4 @@
-.TH FLASHROM 8 "Jul 25, 2011"
+.TH FLASHROM 8 "Feb 15, 2012"
 .SH NAME
 flashrom \- detect, read, write, verify and erase flash chips
 .SH SYNOPSIS
@@ -223,8 +223,11 @@ parameters. These parameters are separated from the programmer name by a
 colon. While some programmers take arguments at fixed positions, other
 programmers use a key/value interface in which the key and value is separated
 by an equal sign and different pairs are separated by a comma or a colon.
-.TP
+.SS
 .BR "internal " programmer
+.TP
+.B Board Enables
+.sp
 Some mainboards require to run mainboard specific code to enable flash erase
 and write support (and probe support on old systems with parallel flash).
 The mainboard brand and model (if it requires specific code) is usually
@@ -275,17 +278,22 @@ has been written because it is known that writing/erasing without the board
 enable is going to fail. In any case (success or failure), please report to
 the flashrom mailing list, see below.
 .sp
+.TP
+.B Coreboot
+.sp
 On systems running coreboot, flashrom checks whether the desired image matches
 your mainboard. This needs some special board ID to be present in the image.
 If flashrom detects that the image you want to write and the current board
 do not match, it will refuse to write the image unless you specify
 .sp
 .B "  flashrom \-p internal:boardmismatch=force"
+.TP
+.B ITE IT87 Super I/O
 .sp
 If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
 translation, flashrom should autodetect that configuration. If you want to
 set the I/O base port of the IT87 series SPI controller manually instead of
-using the value provided by the BIOS, use the 
+using the value provided by the BIOS, use the
 .sp
 .B "  flashrom \-p internal:it87spiport=portnum"
 .sp
@@ -295,6 +303,9 @@ is the I/O port number (must be a multiple of 8). In the unlikely case
 flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
 report so we can diagnose the problem.
 .sp
+.TP
+.B Intel chipsets
+.sp
 If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
 attached, and if a valid descriptor was written to it (e.g. by the vendor), the
 chipset provides an alternative way to access the flash chip(s) named
@@ -331,6 +342,8 @@ settings. The default value for ICH7 is given in the example below.
 .sp
 Example:
 .B "flashrom \-p internal:fwh_idsel=0x001122334567"
+.TP
+.B Laptops
 .sp
 Using flashrom on laptops is dangerous and may easily make your hardware
 unusable (see also the
@@ -338,21 +351,31 @@ unusable (see also the
 section). The embedded controller (EC) in these
 machines often interacts badly with flashing.
 .B http://www.flashrom.org/Laptops
-has more information. If flash is shared with the EC, erase is guaranteed to
-brick your laptop and write is very likely to brick your laptop.
-Chip read and probe may irritate your EC and cause fan failure, backlight
-failure, sudden poweroff, and other nasty effects.
-flashrom will attempt to detect laptops and abort immediately for safety
-reasons.
-If you want to proceed anyway at your own risk, use
+has more information. For example the EC firmware sometimes resides on the same
+flash chip as the host firmware. While flashrom tries to change the contents of
+that memory the EC might need to fetch new instructions or data from it and
+could stop working correctly. Probing for and reading from the chip may also
+irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
+other nasty effects. flashrom will attempt to detect if it is running on a
+laptop and abort immediately for safety reasons if it clearly identifies the
+host computer as one. If you want to proceed anyway at your own risk, use
 .sp
 .B "  flashrom \-p internal:laptop=force_I_want_a_brick"
 .sp
-You have been warned.
-.sp
 We will not help you if you force flashing on a laptop because this is a really
 dumb idea.
-.TP
+.sp
+You have been warned.
+.sp
+Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
+laptops. Some vendors did not implement those bits correctly or set them to
+generic and/or dummy values. flashrom will then issue a warning and bail out
+like above. In this case you can use
+.sp
+.B "  flashrom \-p internal:laptop=this_is_not_a_laptop"
+.sp
+to tell flashrom (at your own risk) that it does not running on a laptop.
+.SS
 .BR "dummy " programmer
 The dummy programmer operates on a buffer in memory only. It provides a safe
 and fast way to test various aspects of flashrom and is mainly used in
@@ -394,6 +417,8 @@ vendor):
 .sp
 Example:
 .B "flashrom -p dummy:emulate=SST25VF040.REMS"
+.TP
+.B Persistent images
 .sp
 If you use flash chip emulation, flash image persistence is available as well
 by using the
@@ -407,6 +432,8 @@ where the chip contents on flashrom shutdown are written to.
 .sp
 Example:
 .B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
+.TP
+.B SPI write chunk size
 .sp
 If you use SPI flash chip emulation for a chip which supports SPI page write
 with the default opcode, you can set the maximum allowed write chunk size with
@@ -421,6 +448,8 @@ is the number of bytes (min. 1, max. 256).
 Example:
 .sp
 .B "  flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
+.TP
+.B SPI blacklist
 .sp
 To simulate a programmer which refuses to send certain SPI commands to the
 flash chip, you can specify a blacklist of SPI commands with the
@@ -433,6 +462,9 @@ controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
 commandlist may be up to 512 characters (256 commands) long.
 Implementation note: flashrom will detect an error during command execution.
 .sp
+.TP
+.B SPI ignorelist
+.sp
 To simulate a flash chip which ignores (doesn't support) certain SPI commands,
 you can specify an ignorelist of SPI commands with the
 .sp
@@ -443,7 +475,7 @@ SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
 command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to 512
 characters (256 commands) long.
 Implementation note: flashrom won't detect an error during command execution.
-.TP
+.SS
 .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
 " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\
 " , " satamv" ", and " atahpt " programmers
@@ -465,7 +497,7 @@ is the PCI function number of the desired device.
 .sp
 Example:
 .B "flashrom \-p nic3com:pci=05:04.0"
-.TP
+.SS
 .BR "ft2232_spi " programmer
 An optional parameter specifies the controller
 type and interface/port it should support. For that you have to use the
@@ -486,7 +518,7 @@ The default model is
 .B 4232H
 and the default interface is
 .BR B .
-.TP
+.SS
 .BR "serprog " programmer
 A mandatory parameter specifies either a serial
 device/baud combination or an IP/port combination for communication with the
@@ -502,7 +534,7 @@ syntax and for IP, you have to use
 instead. More information about serprog is available in
 .B serprog-protocol.txt
 in the source distribution.
-.TP
+.SS
 .BR "buspirate_spi " programmer
 A required
 .B dev
@@ -518,7 +550,7 @@ where
 can be
 .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
 (in Hz). The default is the maximum frequency of 8 MHz.
-.TP
+.SS
 .BR "dediprog " programmer
 An optional
 .B voltage
@@ -534,7 +566,7 @@ where
 can be
 .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
 or the equivalent in mV.
-.TP
+.SS
 .BR "rayer_spi " programmer
 The default I/O base address used for the parallel port is 0x378 and you can use
 the optional
@@ -564,9 +596,9 @@ More information about the RayeR hardware is available at
 .BR "http://rayer.ic.cz/elektro/spipgm.htm " .
 The schematic of the Xilinx DLC 5 was published at
 .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
-.TP
+.SS
 .BR "ogp_spi " programmer
-The flash ROM chip to access must be specified with the 
+The flash ROM chip to access must be specified with the
 .B rom
 parameter.
 .sp
@@ -650,26 +682,37 @@ in
 .B "/etc/rc.securelevel"
 and rebooting, or rebooting into single user mode.
 .SH BUGS
-Please report any bugs at
-.sp
-.B "  http://www.flashrom.org/trac/flashrom/newticket"
-.sp
-or on the flashrom mailing list at
+Please report any bugs to the flashrom mailing list at
 .B "<flashrom at flashrom.org>"
 .sp
 We recommend to subscribe first at
 .sp
 .B "  http://www.flashrom.org/mailman/listinfo/flashrom"
 .sp
-Using flashrom on laptops is dangerous and may easily make your hardware
-unusable unless you can desolder the flash chip and have a full flash chip
-backup. This is caused by the embedded controller (EC) present in many laptops,
-which interacts badly with any flash attempts. This is a hardware limitation
-and flashrom will attempt to detect it and abort immediately for safety reasons.
-.sp
-More information about flashrom on laptops is available from
+Many of the developers communicate via the
+.B "#flashrom"
+IRC channel on
+.BR chat.freenode.net .
+You are welcome to join and ask questions, send us bug and success reports there
+too. Please provide a way to contact you later (e.g. a mail address) and be
+patient if there is no immediate reaction. Also, we provide a pastebin service
+at
+.B http://paste.flashrom.org
+that is very useful when you want to share logs etc. without spamming the
+channel.
+.SS
+.B Laptops
 .sp
-.B "  http://www.flashrom.org/Laptops"
+Using flashrom on laptops is dangerous and may easily make your hardware
+unusable. flashrom will attempt to detect if it is running on a laptop and abort
+immediately for safety reasons. Please see the detailed discussion of this topic
+and associated flashrom options in the
+.B Laptops
+paragraph in the
+.B internal programmer
+subsection of the
+.B PROGRAMMER SPECIFIC INFO
+section.
 .SH LICENSE
 .B flashrom
 is covered by the GNU General Public License (GPL), version 2. Some files are
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 16:28:36 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 16:28:36 +0100
Subject: [flashrom] Just asking some basic advice before I flash the
 BIOS.
In-Reply-To: <CANLOsR5i=M6dQM9Qsrds36GMzs4M7FjaKLH-F414Ym9+JDoR5w@mail.gmail.com>
References: <CANLOsR4O3ifcSxEwhf+EfbydC5mJ+OaN5zr5c1Pi+4aMnNdbeA@mail.gmail.com>
	<4F3BB589.1090206@gmail.com>
	<CANLOsR7EsbzT2huXr+EtZHhEMpiCWQQ=hd2w0hkUFKos-KQ=Fw@mail.gmail.com>
	<4F3BBD34.80108@gmail.com>
	<CANLOsR5i=M6dQM9Qsrds36GMzs4M7FjaKLH-F414Ym9+JDoR5w@mail.gmail.com>
Message-ID: <201202151527.q1FFRwVp004625@mail2.student.tuwien.ac.at>

On Wed, 15 Feb 2012 12:20:56 -0200
Sergio Cipolla <secipolla at gmail.com> wrote:

> OK. Thank you all again. Everything is fine with the new BIOS.
> So maybe just the chip info should be updated to support write?
> Just to make sure again, my mobo is K7VTA3/KT333:3.1 (3.1 being the
> PCB version).

hello sergio and thanks for your report.
The mainboard as well as the chip status have already been updated in
the past (might not show up yet on the website though).

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 16:36:46 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 16:36:46 +0100
Subject: [flashrom] successful BIOS flash report
In-Reply-To: <201202150750.q1F7oSwM023427@server.jp.loc>
References: <201202150750.q1F7oSwM023427@server.jp.loc>
Message-ID: <201202151536.q1FFa86p014253@mail2.student.tuwien.ac.at>

On Wed, 15 Feb 2012 20:40:10 +1300
John-Paul Vanderjagt <flashrom at vanderjagt.co.nz> wrote:

> Dear maintainers at flashrom at flashrom.org.
> 
> FYI, I'd like to report a successful BIOS flash on an Asus P5K-V
> main board.  See relevant info below.  You may update your list
> http://flashrom.org/Supported_hardware with this info.  Thanks for
> producing flashrom.
> [?]

Hello John-Paul,

thanks for your report!
I have marked the mainboard as supported and will commit that later
together with other small changes.
Your report contains quite some information we actually don't care much
about. More important than anything else is the (verbose/-V) output of
the actual write operation of flashrom (or if that is no longer
available just the verbose output of a probe (i.e. just flashrom -V).
Apart from that a link to the vendor website is handy and the exact
revision of the board if applicable might be of interest sometimes. I
write this because you seem to have invested quite some time on your
report (which i really appreciate).

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 16:40:37 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 16:40:37 +0100
Subject: [flashrom] flashrom output for Asus M3N-HT DELUXE/HDMI.
In-Reply-To: <1329317382.58542.YahooMailClassic@web171213.mail.ir2.yahoo.com>
References: <1329317382.58542.YahooMailClassic@web171213.mail.ir2.yahoo.com>
Message-ID: <201202151540.q1FFe0F2017716@mail2.student.tuwien.ac.at>

On Wed, 15 Feb 2012 14:49:42 +0000 (GMT)
Caronte Estigia <sable_laser at yahoo.es> wrote:

> Hello!
> 
> As requested in the flashrom -V output, here is what I get running the command on a M3N-HT Deluxe MoBo.
> 
> If you need anything else, don't hesitate contacting me.
> 
> Regards.
> 
> 
> flashrom v0.9.2-r1028 on Linux 2.6.35-32-generic (x86_64), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org

thanks for your report!
please update though ;)

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From bblaauw at home.nl  Wed Feb 15 19:37:31 2012
From: bblaauw at home.nl (Bernd Blaauw)
Date: Wed, 15 Feb 2012 19:37:31 +0100
Subject: [flashrom] [PATCH] Manpage improvements.
In-Reply-To: <1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329274001-30125-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F3BFB6B.7010200@home.nl>

Op 15-2-2012 16:23, Stefan Tauner schreef:
> Also, rephrase the documention related to laptops completely to make it
> less redundant and more informative.
> Document the laptop=this_is_not_a_laptop internal programmer parameter

Whatever happened to flashrom's semi-dependency on DMIDECODE?
I thought flashrom implemented its own dmi-calls since 0.9.4, but trying 
Idwer's DOS-port (rev1452) and not having DMIDECOD.EXE (yep, 8.3 naming, 
sorry) all I end up with in VMware/FreeDOS is a "hey can't identify 
anything, so this must be a laptop..if not, please override".

Overriding still produces the same 'please override' output followed by 
a message that you're overriding, and continues. Ofcourse no single 
emulation platform seems to have a flashrom anyway, so stuff happily aborts.

I guess flashrom could at least continue to try reading without needing 
an override. Erasing and writing ofcourse do require overrides if 
anything is uncertain in advance.



From stefan.tauner at student.tuwien.ac.at  Wed Feb 15 20:12:29 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 15 Feb 2012 20:12:29 +0100
Subject: [flashrom] [PATCH] Manpage improvements.
In-Reply-To: <4F3BFB6B.7010200@home.nl>
References: <1329274001-30125-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3BFB6B.7010200@home.nl>
Message-ID: <201202151911.q1FJBp3J007200@mail2.student.tuwien.ac.at>

On Wed, 15 Feb 2012 19:37:31 +0100
Bernd Blaauw <bblaauw at home.nl> wrote:

> Op 15-2-2012 16:23, Stefan Tauner schreef:
> > Also, rephrase the documention related to laptops completely to make it
> > less redundant and more informative.
> > Document the laptop=this_is_not_a_laptop internal programmer parameter
> 
> Whatever happened to flashrom's semi-dependency on DMIDECODE?
> I thought flashrom implemented its own dmi-calls since 0.9.4,

sadly not, feel free to review my patch ;)
http://patchwork.coreboot.org/patch/3356/

> but trying 
> Idwer's DOS-port (rev1452) and not having DMIDECOD.EXE (yep, 8.3 naming, 
> sorry) all I end up with in VMware/FreeDOS is a "hey can't identify 
> anything, so this must be a laptop..if not, please override".

more like "it *may* be a laptop, please confirm it is not"
 
> Overriding still produces the same 'please override' output followed by 
> a message that you're overriding, and continues. Ofcourse no single 
> emulation platform seems to have a flashrom anyway, so stuff happily aborts.

seems ok to me?

> I guess flashrom could at least continue to try reading without needing 
> an override. Erasing and writing ofcourse do require overrides if 
> anything is uncertain in advance.

and that guess is wrong. i have been told that *any* unexpected (by the
EC) flash access could lead to annoyances (as described in more detail
now in the manpage...) and that's the reason why we introduce such
seemingly stupid stuff.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From flashrom at vanderjagt.co.nz  Wed Feb 15 20:27:52 2012
From: flashrom at vanderjagt.co.nz (John-Paul Vanderjagt)
Date: Thu, 16 Feb 2012 08:27:52 +1300
Subject: [flashrom] successful BIOS flash report
Message-ID: <201202151929.q1FJTZ0d005858@server.jp.loc>

Hello Stefan.

Thanks for your reply.  Much appreciated.

As requested, please find below the output of actual writing of the
BIOS and below that the output of "flashrom -V".

The link to the mainboard:
http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/

The link to the mainboard manual:
http://dlcdnet.asus.com/pub/ASUS/mb/socket775/P5K-V/e3269_p5k-v_manual.zip

I don't know the exact revision of the board.  The board was purchased
in Oct 2007.

Kind regards.
John-Paul Vanderjagt
(Wellington, New Zealand)

--

> On Wed, 15 Feb 2012 20:40:10 +1300
> John-Paul Vanderjagt <flashrom at vanderjagt.co.nz> wrote:
> 
> > Dear maintainers at flashrom at flashrom.org.
> > 
> > FYI, I'd like to report a successful BIOS flash on an Asus P5K-V
> > main board.  See relevant info below.  You may update your list
> > http://flashrom.org/Supported_hardware with this info.  Thanks for
> > producing flashrom.
> > [???]
> 
> Hello John-Paul,
> 
> thanks for your report!
> I have marked the mainboard as supported and will commit that later
> together with other small changes.
> Your report contains quite some information we actually don't care much
> about. More important than anything else is the (verbose/-V) output of
> the actual write operation of flashrom (or if that is no longer
> available just the verbose output of a probe (i.e. just flashrom -V).
> Apart from that a link to the vendor website is handy and the exact
> revision of the board if applicable might be of interest sometimes. I
> write this because you seem to have invested quite some time on your
> report (which i really appreciate).
> 
> -- 
> Kind regards/Mit freundlichen Gr????en, Stefan Tauner

--

# flashrom -w P5K-V-1002.ROM
flashrom v0.9.3-r1246 on Linux 2.6.37.6-0.11-default (i686), built with libpci 3.1.7, GCC 4.5.1 20101208 [gcc-4_5-branch revision 167585], little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OK.
No coreboot table found.
Found chipset "Intel ICH9", enabling flash write... OK.
This chipset supports the following protocols: FWH,SPI.
Found chip "Winbond W25x80" (1024 KB, SPI) at physical address 0xfff00000.
===
This flash part has status UNTESTED for operations: WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
Flash image seems to be a legacy BIOS. Disabling checks.
Erasing and writing flash chip... Done.
Verifying flash... VERIFIED.          
# 

--

# flashrom -V
flashrom v0.9.3-r1246 on Linux 2.6.37.6-0.11-default (i686), built with libpci 3.1.7, GCC 4.5.1 20101208 [gcc-4_5-branch revision 167585], little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 3000M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1004 us, 10000 myus = 10001 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "System manufacturer"
DMI string system-product-name: "P5K-V"
DMI string system-version: "System Version"
DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
DMI string baseboard-product-name: "P5K-V"
DMI string baseboard-version: "Rev 1.xx"
DMI string chassis-type: "Desktop"
Found chipset "Intel ICH9", enabling flash write... chipset PCI ID is 8086:2918, 
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode disabled
0xffe00000/0xffa00000 FWH decode disabled
0xffd80000/0xff980000 FWH decode disabled
0xffd00000/0xff900000 FWH decode disabled
0xffc80000/0xff880000 FWH decode disabled
0xffc00000/0xff800000 FWH decode disabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0

Root Complex Register Block address = 0xfed1c000
GCS = 0x1464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x2008 (HSFS)
FLOCKDN 0, FDV 0, FDOPSS 1, SCIP 0, BERASE 1, AEL 0, FCERR 0, FDONE 0
0x50: 0x00000202 (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x02, BRRA 0x02
0x54: 0x00001fff (FREG0: Flash Descriptor)
Flash Descriptor region is unused.
0x58: 0x00001fff (FREG1: BIOS)
BIOS region is unused.
0x5C: 0x00001fff (FREG2: Management Engine)
Management Engine region is unused.
0x60: 0x00001fff (FREG3: Gigabit Ethernet)
Gigabit Ethernet region is unused.
0x64: 0x00001fff (FREG4: Platform Data)
Platform Data region is unused.
0x74: 0x00000000 (PR0)
0x78: 0x00000000 (PR1)
0x7C: 0x00000000 (PR2)
0x80: 0x00000000 (PR3)
0x84: 0x00000000 (PR4)
0x90: 0x00420000 (SSFS, SSFC)
0x94: 0x0000     (PREOP)
0x96: 0x543b     (OPTYPE)
0x98: 0x05d80302 (OPMENU)
0x9C: 0x0006019f (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xB0: 0x00000000 (FDOC)
Programming OPCODES... 
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
SPI Read Configuration: prefetching disabled, caching enabled, OK.
This chipset supports the following protocols: FWH,SPI.
Probing for AMD Am29F010A/B, 128 KB: skipped.
Probing for AMD Am29F002(N)BB, 256 KB: skipped.
Probing for AMD Am29F002(N)BT, 256 KB: skipped.
Probing for AMD Am29F016D, 2048 KB: skipped.
Probing for AMD Am29F040B, 512 KB: skipped.
Probing for AMD Am29F080B, 1024 KB: skipped.
Probing for AMD Am29LV040B, 512 KB: skipped.
Probing for AMD Am29LV081B, 1024 KB: skipped.
Probing for AMIC A25L05PT, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L05PU, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L10PT, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L10PU, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L20PT, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L20PU, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L40PT, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L40PU, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L80P, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L16PT, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L16PU, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L020, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L080, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L016, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25L032, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A25LQ032, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for AMIC A29002B, 256 KB: skipped.
Probing for AMIC A29002T, 256 KB: skipped.
Probing for AMIC A29040B, 512 KB: skipped.
Probing for AMIC A49LF040A, 512 KB: skipped.
Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25DQ161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT29C512, 64 KB: skipped.
Probing for Atmel AT29C010A, 128 KB: skipped.
Probing for Atmel AT29C020, 256 KB: skipped.
Probing for Atmel AT29C040A, 512 KB: skipped.
Probing for Atmel AT45CS1282, 16896 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB011D, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB021D, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB041D, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB081D, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB161D, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB321C, 4224 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB321D, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT45DB642D, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel AT49BV512, 64 KB: skipped.
Probing for Atmel AT49F020, 256 KB: skipped.
Probing for Atmel AT49F002(N), 256 KB: skipped.
Probing for Atmel AT49F002(N)T, 256 KB: skipped.
Probing for Bright BM29F040, 512 KB: skipped.
Probing for EMST F49B002UA, 256 KB: skipped.
Probing for EMST F25L008A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B05, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B05T, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B10T, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B20T, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B40T, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B80T, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B16T, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B32T, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25B64T, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25D16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F05, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN25F32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon EN29F010, 128 KB: skipped.
Probing for Eon EN29F002(A)(N)B, 256 KB: skipped.
Probing for Eon EN29F002(A)(N)T, 256 KB: skipped.
Probing for Fujitsu MBM29F004BC, 512 KB: skipped.
Probing for Fujitsu MBM29F004TC, 512 KB: skipped.
Probing for Fujitsu MBM29F400BC, 512 KB: skipped.
Probing for Fujitsu MBM29F400TC, 512 KB: skipped.
Probing for Hyundai HY29F002T, 256 KB: skipped.
Probing for Hyundai HY29F002B, 256 KB: skipped.
Probing for Hyundai HY29F040A, 512 KB: skipped.
Probing for Intel 28F001BN/BX-B, 128 KB: skipped.
Probing for Intel 28F001BN/BX-T, 128 KB: skipped.
Probing for Intel 28F002BC/BL/BV/BX-T, 256 KB: skipped.
Probing for Intel 28F008S3/S5/SC, 512 KB: skipped.
Probing for Intel 28F004B5/BE/BV/BX-B, 512 KB: skipped.
Probing for Intel 28F004B5/BE/BV/BX-T, 512 KB: skipped.
Probing for Intel 28F400BV/BX/CE/CV-B, 512 KB: skipped.
Probing for Intel 28F400BV/BX/CE/CV-T, 512 KB: skipped.
Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX25L512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L1005, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L2005, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L4005, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L1635D, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L1635E, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L3205, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L3235D, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L6405, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX25L12805, 16384 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix MX29F001B, 128 KB: skipped.
Probing for Macronix MX29F001T, 128 KB: skipped.
Probing for Macronix MX29F002B, 256 KB: skipped.
Probing for Macronix MX29F002T, 256 KB: skipped.
Probing for Macronix MX29F040, 512 KB: skipped.
Probing for Macronix MX29LV040, 512 KB: skipped.
Probing for MoselVitelic V29C51000B, 64 KB: skipped.
Probing for MoselVitelic V29C51000T, 64 KB: skipped.
Probing for MoselVitelic V29C51400B, 512 KB: skipped.
Probing for MoselVitelic V29C51400T, 512 KB: skipped.
Probing for MoselVitelic V29LC51000, 64 KB: skipped.
Probing for MoselVitelic V29LC51001, 128 KB: skipped.
Probing for MoselVitelic V29LC51002, 256 KB: skipped.
Probing for Numonyx M25PE10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Numonyx M25PE20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Numonyx M25PE40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Numonyx M25PE80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Numonyx M25PE16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC Pm25LV010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC Pm25LV016B, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC Pm25LV020, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC Pm25LV040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC Pm25LV080B, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC Pm25LV512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC Pm29F002T, 256 KB: skipped.
Probing for PMC Pm29F002B, 256 KB: skipped.
Probing for PMC Pm39LV010, 128 KB: skipped.
Probing for PMC Pm39LV020, 256 KB: skipped.
Probing for PMC Pm39LV040, 512 KB: skipped.
Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Sanyo LF25FW203A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Sharp LHF00L04, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Spansion S25FL004A, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Spansion S25FL008A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Spansion S25FL016A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Spansion S25FL032A, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Spansion S25FL064A, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for SST SST25VF010.REMS, 128 KB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF016B, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for SST SST25VF032B, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for SST SST25VF064C, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for SST SST25VF040.REMS, 512 KB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF040B, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for SST SST25LF040A.RES, 512 KB: 
program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190
on-the-fly OPCODE (0xAB) re-programmed, op-pos=2
probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25VF040B.REMS, 512 KB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for SST SST28SF040A, 512 KB: skipped.
Probing for SST SST29EE010, 128 KB: skipped.
Probing for SST SST29LE010, 128 KB: skipped.
Probing for SST SST29EE020A, 256 KB: skipped.
Probing for SST SST29LE020, 256 KB: skipped.
Probing for SST SST39SF512, 64 KB: skipped.
Probing for SST SST39SF010A, 128 KB: skipped.
Probing for SST SST39SF020A, 256 KB: skipped.
Probing for SST SST39SF040, 512 KB: skipped.
Probing for SST SST39VF512, 64 KB: skipped.
Probing for SST SST39VF010, 128 KB: skipped.
Probing for SST SST39VF020, 256 KB: skipped.
Probing for SST SST39VF040, 512 KB: skipped.
Probing for SST SST39VF080, 1024 KB: skipped.
Probing for SST SST49LF002A/B, 256 KB: probe_jedec_common: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 KB: probe_jedec_common: id1 0x7c, id2 0xc1, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004A/B, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 KB: probe_jedec_common: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008C, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF020, 256 KB: skipped.
Probing for SST SST49LF020A, 256 KB: skipped.
Probing for SST SST49LF040, 512 KB: skipped.
Probing for SST SST49LF040B, 512 KB: skipped.
Probing for SST SST49LF080A, 1024 KB: skipped.
Probing for SST SST49LF160C, 2048 KB: skipped.
Probing for ST M25P05-A, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P05.RES, 64 KB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P10.RES, 128 KB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P40-old, 512 KB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25P128, 16384 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25PX32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M25PX64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST M29F002B, 256 KB: skipped.
Probing for ST M29F002T/NT, 256 KB: skipped.
Probing for ST M29F040B, 512 KB: skipped.
Probing for ST M29F400BB, 512 KB: skipped.
Probing for ST M29F400BT, 512 KB: skipped.
Probing for ST M29W010B, 128 KB: skipped.
Probing for ST M29W040B, 512 KB: skipped.
Probing for ST M29W512B, 64 KB: skipped.
Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 KB: probe_82802ab: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 KB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50LPW116, 2048 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 KB: skipped.
Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 KB: skipped.
Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 KB: skipped.
Probing for TI TMS29F002RB, 256 KB: skipped.
Probing for TI TMS29F002RT, 256 KB: skipped.
Probing for Winbond W25Q80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25Q16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25Q32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25Q64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25x10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25x20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25x40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25x80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Chip status register is 00
Found chip "Winbond W25x80" (1024 KB, SPI) at physical address 0xfff00000.
Probing for Winbond W25x16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25x32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W25x64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 KB: skipped.
Probing for Winbond W29C020(C)/W29C022, 256 KB: skipped.
Probing for Winbond W29C040/P, 512 KB: skipped.
Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 KB: skipped.
Probing for Winbond W39V040A, 512 KB: skipped.
Probing for Winbond W39V040B, 512 KB: skipped.
Probing for Winbond W39V040C, 512 KB: skipped.
Probing for Winbond W39V040FA, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080A, 1024 KB: skipped.
Probing for Winbond W49F002U/N, 256 KB: skipped.
Probing for Winbond W49F020, 256 KB: skipped.
Probing for Winbond W49V002A, 256 KB: skipped.
Probing for Winbond W49V002FA, 256 KB: probe_jedec_common: id1 0xff, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 KB: probe_jedec_common: id1 0x41, id2 0x53, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA (dual mode), 512 KB: probe_jedec_common: id1 0x41, id2 0x4d, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMIC unknown AMIC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Atmel unknown Atmel SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Eon unknown Eon SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Macronix unknown Macronix SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for PMC unknown PMC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for SST unknown SST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for ST unknown ST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Sanyo unknown Sanyo SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (RDID), 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3014
Probing for Generic unknown SPI chip (REMS), 0 KB: probe_spi_rems: id1 0xef, id2 0x13
===
This flash part has status UNTESTED for operations: WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-Vw, -VE), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
No operations were specified.
Restoring PCI config space for 00:1f:0 reg 0xdc
#  

--



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 00:03:00 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 00:03:00 +0100
Subject: [flashrom] [PATCH] Warn of one-time programmable (OTP) memory
In-Reply-To: <201202151310.q1FDAvd6019716@mail2.student.tuwien.ac.at>
References: <1280430606-18194-1-git-send-email-dlenski@gmail.com>
	<1313292964-2123-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3B109A.2030504@gmx.net>
	<201202151310.q1FDAvd6019716@mail2.student.tuwien.ac.at>
Message-ID: <4F3C39A4.1090906@gmx.net>

Am 15.02.2012 14:11 schrieb Stefan Tauner:
> On Wed, 15 Feb 2012 02:55:38 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>> Now if something is outside the scope of
>> flashrom, should flashrom care at all?
> depends... i dont think of "the scope" as a clearly bounded area.
> everything related to flash chips is somewhat in its scope (else we
> would not talk about this), heck we even discussed EEPROM handling
> multiple times... we dont need to support any and all feature found in
> any flash chip out there, but we should integrate knowledge and code
> for the more common ones that might be useful, if there is someone
> willing to provide them (and maintain them if necessary).

If we target non-flash EEPROMs, we might as well support OTP. I'd say
such support is post-1.0 material, though (and no, I don't plan to delay
flashrom 1.0 like Wine 1.0 was delayed).


>> And then you have the problem that multiple chip generations often
>> share the same device ID, so probing can't differentiate between a
>> chip with OTP and one without unless you're extremely lucky. Do we
>> want FEATURE_OTP and FEATURE_MAYBE_OTP? 
> FEATURE_MAYBE_NOT_CLONEABLE
> half serious... at least this is the semantics i would like to tag
> and convey to the user for now.

Heh. I think FEATURE_OTP is OK for now, and postpone a split between
_OTP and _MAYBE_OTP.


>> Do we warn if a chip has a readonly serial number? That means the chip
>> can't be cloned. People who care about OTP for clonability reasons
>> probably care about other readonly contents as well. OTOH, other people
>> who don't use the OTP at all (for them, OTP is just an accidental
>> feature of a cheap flash chip) don't want to be bothered by yet another
>> line of output from flashrom which has no relevancy for them.
> do you agree to lowering the verbosity of the whole message to dbg
> level?

Yes.


>> Removing the trac reference and adding the IRC reference should be a
>> separate patch, though, which is
>> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> ok, this will go into the recently posted manpage improvement patch
> (planned to do that anyway because i did not think that you would look
> at this one now :)

Thanks!


>> do you know any good reference about man page formatting? I had trouble
>> finding out what .RE and .RS do.
> i have to look that stuff up every time myself, sorry.
> yesterday i have used http://gnustep.made-it.com/man-groff.html but
> it looks like that would not answer your question...

Thanks, it's a good start anyway.


>>> the other more theoretical argument i have is: OTP memory is just some
>>> memory in the flash chip. it may need other access patterns, but it is not much
>>> different from other write protected memories apart from that.
>>> some chips implement it in a way that it is even possible to erase the OTP
>>> regions. those regions are just normal flash and are made unwriteable by fuses
>>> in a register or another addressable byte.
>>>
>>> Signed-off-by: Daniel Lenski <dlenski at gmail.com>
>>> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
>> Stefan: I don't want to veto this patch, and although I think that OTP
>> handling is not really a flashrom feature, I think that this
>> implementation satisfies the quality criteria for merging, so the patch is
>> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> thanks! ill wait for your response regarding message verbosity while
> merging the (independent) manpage change into my other patch.

Go ahead.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From svn at flashrom.org  Thu Feb 16 00:40:23 2012
From: svn at flashrom.org (repository service)
Date: Thu, 16 Feb 2012 00:40:23 +0100
Subject: [flashrom] [commit] r1493 - trunk
Message-ID: <E1RxoSV-00063Q-Ha@ra.coresystems.de>

Author: stefanct
Date: Thu Feb 16 00:40:23 2012
New Revision: 1493
URL: http://flashrom.org/trac/flashrom/changeset/1493

Log:
Warn of one-time programmable (OTP) memory

Some flash chips contain OTP memory that we cannot read or write (yet). This
prohibits us from cloning them, hence warn the user if we detect it. Not all
variations of the tagged chips contain OTP memory. They are often only
enabled on request or have there own ordering numbers. There is usually no
way to distinguish them. Because this is a supposedly seldomly used feature
the warning is shown in with dbg verbosity.

The manpage is extended to describe the backgrounds a bit.

This patch is based on the idea and code of Daniel Lenski.
Signed-off-by: Daniel Lenski <dlenski at gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/flash.h
   trunk/flashchips.c
   trunk/flashrom.8
   trunk/flashrom.c

Modified: trunk/flash.h
==============================================================================
--- trunk/flash.h	Mon Feb 13 01:35:35 2012	(r1492)
+++ trunk/flash.h	Thu Feb 16 00:40:23 2012	(r1493)
@@ -83,6 +83,7 @@
 #define FEATURE_ADDR_SHIFTED	(1 << 5)
 #define FEATURE_WRSR_EWSR	(1 << 6)
 #define FEATURE_WRSR_WREN	(1 << 7)
+#define FEATURE_OTP		(1 << 8)
 #define FEATURE_WRSR_EITHER	(FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
 
 struct flashctx;

Modified: trunk/flashchips.c
==============================================================================
--- trunk/flashchips.c	Mon Feb 13 01:35:35 2012	(r1492)
+++ trunk/flashchips.c	Thu Feb 16 00:40:23 2012	(r1493)
@@ -1120,7 +1120,8 @@
 		.model_id	= AMIC_A25L032,
 		.total_size	= 4096,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 64B total; read 0x4B, 0x48; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -1158,7 +1159,8 @@
 		.model_id	= AMIC_A25LQ032,
 		.total_size	= 4096,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 64B total; read 0x4B, 0x48; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -1315,7 +1317,8 @@
 		.model_id	= ATMEL_AT25DF021,
 		.total_size	= 256,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -1543,7 +1546,8 @@
 		.model_id	= ATMEL_AT25DF321A,
 		.total_size	= 4096,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_OK_PROBE,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -1619,7 +1623,8 @@
 		.model_id	= ATMEL_AT25DQ161,
 		.total_size	= 2048,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -1657,7 +1662,8 @@
 		.model_id	= ATMEL_AT25F512B,
 		.total_size	= 64,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -2168,6 +2174,8 @@
 		.model_id	= ATMEL_AT45DB321D,
 		.total_size	= 4096 /* Size can only be determined from status register */,
 		.page_size	= 512 /* Size can only be determined from status register */,
+		/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
+		.feature_bits	= FEATURE_OTP,
 		.tested		= TEST_BAD_READ,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3236,8 +3244,8 @@
 		.model_id	= EON_EN25Q40,
 		.total_size	= 512,
 		.page_size	= 256,
-		/* TODO: chip features 256-byte one-time programmable region */
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 256B total; enter 0x3A */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3271,8 +3279,8 @@
 		.model_id	= EON_EN25Q80,
 		.total_size	= 1024,
 		.page_size	= 256,
-		/* TODO: chip features 256-byte one-time programmable region */
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 256B total; enter 0x3A */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3308,9 +3316,8 @@
 		.model_id	= EON_EN25Q16,
 		.total_size	= 2048,
 		.page_size	= 256,
-		/* TODO: EN25D16 features 512-byte one-time programmable region,
-		 * EN25Q16 features a 128-byte one-time programmable region */
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: D16 512B/Q16 128B total; enter 0x3A */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3348,8 +3355,8 @@
 		.model_id	= EON_EN25Q32,
 		.total_size	= 4096,
 		.page_size	= 256,
-		/* TODO: chip features 512-byte one-time programmable region */
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 512B total; enter 0x3A */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3383,8 +3390,8 @@
 		.model_id	= EON_EN25Q64,
 		.total_size	= 8192,
 		.page_size	= 256,
-		/* TODO: chip features 512-byte one-time programmable region */
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 512B total; enter 0x3A */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3418,8 +3425,8 @@
 		.model_id	= EON_EN25Q128,
 		.total_size	= 16384,
 		.page_size	= 256,
-		/* TODO: chip features 512-byte one-time programmable region */
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 512B total; enter 0x3A */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -3452,10 +3459,9 @@
 		.model_id	= EON_EN25QH16,
 		.total_size	= 2048,
 		.page_size	= 256,
-		/* TODO: chip features 512-byte one-time programmable region
-		 * and supports SFDP.
-		 */
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* supports SFDP */
+		/* OTP: 512B total; enter 0x3A */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -7092,6 +7098,8 @@
 		.model_id	= ST_M25PX16,
 		.total_size	= 2048,
 		.page_size	= 256,
+		/* OTP: 64B total; read 0x4B; write 0x42 */
+		.feature_bits	= FEATURE_OTP,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -7960,7 +7968,8 @@
 		.model_id	= WINBOND_NEX_W25Q80,
 		.total_size	= 1024,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -7997,7 +8006,8 @@
 		.model_id	= WINBOND_NEX_W25Q16,
 		.total_size	= 2048,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -8034,7 +8044,8 @@
 		.model_id	= WINBOND_NEX_W25Q32,
 		.total_size	= 4096,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -8071,7 +8082,8 @@
 		.model_id	= WINBOND_NEX_W25Q64,
 		.total_size	= 8192,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
@@ -8107,7 +8119,8 @@
 		.model_id	= WINBOND_NEX_W25Q128,
 		.total_size	= 16384,
 		.page_size	= 256,
-		.feature_bits	= FEATURE_WRSR_WREN,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
 		.tested		= TEST_OK_PROBE,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,

Modified: trunk/flashrom.8
==============================================================================
--- trunk/flashrom.8	Mon Feb 13 01:35:35 2012	(r1492)
+++ trunk/flashrom.8	Thu Feb 16 00:40:23 2012	(r1493)
@@ -670,6 +670,19 @@
 More information about flashrom on laptops is available from
 .sp
 .B "  http://www.flashrom.org/Laptops"
+.SS
+One-time programmable (OTP) memory and unique IDs
+.sp
+Some flash chips contain OTP memory often denoted as "security registers".
+They usually have a capacity in the range of some bytes to a few hundred
+bytes and can be used to give devices unique IDs etc. flashrom is not able
+to read or write these memories and may therefore not be able to duplicate a
+chip completely. For chip types known to include OTP memories a warning is
+printed when they are detected.
+.sp
+Similar to OTP memories are unique, factory programmed, unforgeable IDs.
+They are not modifiable by the user at all.
+.RE
 .SH LICENSE
 .B flashrom
 is covered by the GNU General Public License (GPL), version 2. Some files are

Modified: trunk/flashrom.c
==============================================================================
--- trunk/flashrom.c	Mon Feb 13 01:35:35 2012	(r1492)
+++ trunk/flashrom.c	Thu Feb 16 00:40:23 2012	(r1493)
@@ -1560,6 +1560,13 @@
 
 void check_chip_supported(const struct flashctx *flash)
 {
+	if (flash->feature_bits & FEATURE_OTP) {
+		msg_cdbg("This chip may contain one-time programmable memory. "
+			 "flashrom cannot read\nand may never be able to write "
+			 "it, hence it may not be able to completely\n"
+			 "clone the contents of this chip (see man page for "
+			 "details).\n");
+	}
 	if (TEST_OK_MASK != (flash->tested & TEST_OK_MASK)) {
 		msg_cinfo("===\n");
 		if (flash->tested & TEST_BAD_MASK) {


From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 00:42:03 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 00:42:03 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user and disable writes when
 a protected address range is detected.
In-Reply-To: <201202151217.q1FCHevV021764@mail2.student.tuwien.ac.at>
References: <4F398E21.3010404@gmx.net>
	<1329233956-12464-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3B14FB.1090509@gmx.net>
	<201202151217.q1FCHevV021764@mail2.student.tuwien.ac.at>
Message-ID: <4F3C42CB.30901@gmx.net>

Am 15.02.2012 13:18 schrieb Stefan Tauner:
> On Wed, 15 Feb 2012 03:14:19 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> Am 14.02.2012 16:39 schrieb Stefan Tauner:
>>> This includes not only the notorious read-only flash descriptors and locked ME
>>> regions, but also the more rarely used PRs (Protected Ranges).
>>> The user can enforce write support by specifying ich_spi_force=yes in the
>> Can you rename ich_spi_force to ich_ignore_locks or something similar?
> the idea behind naming ich_spi_force not too specifically was that we
> may need another force switch in the future and i dont want to add yet
> another parameter (or change the old one, because it is a (small) UI
> change), but it is not that important to me...

Right. Regardless of which name we pick, it won't be optimal. You know
that code better than I do, so the naming choice is yours.


>> The PR stuff is not limited to SPI IIRC.
> i dont think so. there is a table in the respective datasheets named
> "Flash Protection Mechanism Summary" it names the "Equivalent Function
> on FWH" for the "BIOS Range Write Protection": "FWH Sector Protection"
>
> My interpretation is that the "BIOS Range Write Protection" is the one
> related to PRx and that "FWH Sector Protection" refers to the chip
> feature of lock bits. Also, the PRx registers are located in the SPIBAR
> range and the documentation of the PRx addresses refer to FLA, which is
> only used to define the SPI flash address (for hwseq and swseq).
>
> maybe name it ich_force?

Sounds a bit odd (what are we forcing?). Your original naming was better
than ich_force. To be honest, I think some of the ICH specific
programmer parameters will go away anyway once we have better documentation.


> NB: the other parameter for hw/swseq selection is ich_spi_mode
>
>>> programmer options, but we don't tell him the exact syntax interactively. He
>>> has to read it up in the man page.
>>> ---
>>> non-verbose sample output from my laptop (that contains both protection types):
>>> [?]
>>> Found chipset "Intel QS57". Enabling flash write... WARNING: SPI Configuration Lockdown activated.
>>> WARNING: Flash Descriptor region is not fully accessible and flashrom can
>>> not deal with this correctly yet.
>>> Intel does not provide us the necessary documention to support this.
>>> Please send a verbose log to flashrom at flashrom.org if this board is not listed on
>>> http://flashrom.org/Supported_hardware#Supported_mainboards yet.
>>> Writes have been disabled. You can enforce write support with the
>>> ich_spi_force programmer option, but it will most likely harm your hardware!
>>> If you force flashrom you will get no support if something breaks.
>>> WARNING: Management Engine region is not fully accessible and flashrom can
>>> not deal with this correctly yet.
>>> WARNING: PR0: 0x007d0000-0x01ffffff is read-only.
>>> OK.
>>> [?]
>> Ugh. This is the non-verbose version? I had trouble parsing that message
>> flood on the first attempt. May I suggest an alternative wording?
> the good thing is.. it wont get much worse in verbose mode ;)

Heh.


>> WARNING: Flash Descriptor region is not fully accessible.
>> WARNING: Management Engine region is not fully accessible.
>> WARNING: PR0: 0x007d0000-0x01ffffff is read-only.
>> Please send a verbose log to flashrom at flashrom.org if this board is not listed on
>> http://flashrom.org/Supported_hardware#Supported_mainboards yet.
>> Writes have been disabled. You can force writing with the ich_ignore_locks
>> programmer option, but it will most likely brick your mainboard.
>>
>> The idea of my wording is to postpone the explanatory message until all
>> "not accessible"/"read-only" messages have been printed.
> complicates the logic... this order would be my favorite too (of
> course).

Should be possible if the function doing the check (ich9_handle_frap and
ich9_handle_pr) returns int instead of void.


>> The complaint about Intel belongs to the man page or to intel_mysteries.txt
>> (if you choose the latter, just mention intel_mysteries.txt at the relevant
>> location in the man page).
> ok... i am certainly a bit biased on and obsessed with this :)

And I think you're right.


>> For the override case, just print the message above and additionally
>> "You have been warned. We will not support you if write/erase bricks your
>> mainboard. Proceeding anyway because user specified ich_ignore_locks."
>> or something similar.
> i will look into it.
>
>>> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
>>>
>>> --- a/ichspi.c
>>> +++ b/ichspi.c
>>> @@ -1460,21 +1491,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
>>>  #define ICH_PR_PERMS(pr)	(((~((pr) >> PR_RP_OFF) & 1) << 0) | \
>>>  				 ((~((pr) >> PR_WP_OFF) & 1) << 1))
>>>  
>>> -static void prettyprint_ich9_reg_pr(int i)
>>> +static void ich9_handle_pr(int i, int force)
>>>  {
>>> -	static const char *const access_names[4] = {
>>> -		"locked", "read-only", "write-only", "read-write"
>>> +	static const char *const access_names[3] = {
>>> +		"locked", "read-only", "write-only"
>>>  	};
>>>  	uint8_t off = ICH9_REG_PR0 + (i * 4);
>>>  	uint32_t pr = mmio_readl(ich_spibar + off);
>>> -	int rwperms = ICH_PR_PERMS(pr);
>>> +	unsigned int rwperms = ICH_PR_PERMS(pr);
>>>  
>>> -	msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i);
>>> -	if (rwperms != 0x3)
>>> -		msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr),
>>> -			 ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
>>> -	else
>>> -		msg_pdbg2(", unused)\n");
>>> +	if (rwperms >= 0x3) {
>> Why >= 0x3? AFAICS the ICH_PR_PERMS macro can only have values between
>> 0x0 and 0x3.
> it does, but OTOH one has to direct the execution flow for the
> impossible values anyway

Really? In this case, the compiler even has the chance to know which
possible values rwperms may have.


> and since the else path would try to access
> the array out of bounds, i have done it in that way.

Assuming there is no memory corruption, we can be totally sure that
regardless of the value of pr, rwperms can only be one of
0x0,0x1,0x2,0x3. This means out-of-bounds is impossible, and a good
compiler should realize that.


> note that ich9_handle_frap is different because there we access the
> array before the if, so it does matter even less there. if you think
> that reduces readability i can change it - for me it does not.

You know the datasheets very well, and you also know the code very well.
For me, the >= operation implied that values >0x3 were possible and
that's why I complained. My goal is to have code which can be read
mostly in isolation without chasing nonexisting corner cases. Then
again, this is my personal impression, not some scientifically
measurable hard fact.


>>> +		msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i);
>>> +		return;
>>> +	}
>>> +
>>> +	msg_pdbg("0x%02X: 0x%08x ", off, pr);
>>> +	msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
>>> +		  ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
>>> +	ich9_disable_writes(force, "There is no way to change this from within "
>>> +			    "the system.\n");
>>>  }
>>>  
>>>  /* Set/Clear the read and write protection enable bits of PR register @i
>> Looks good otherwise.
>> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> ill try to make the output more readable, please notify me about the
> other decisions.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 00:43:13 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 00:43:13 +0100
Subject: [flashrom] [PATCH] Warn of one-time programmable (OTP) memory
In-Reply-To: <4F3C39A4.1090906@gmx.net>
References: <1280430606-18194-1-git-send-email-dlenski@gmail.com>
	<1313292964-2123-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3B109A.2030504@gmx.net>
	<201202151310.q1FDAvd6019716@mail2.student.tuwien.ac.at>
	<4F3C39A4.1090906@gmx.net>
Message-ID: <201202152342.q1FNgYYE005542@mail2.student.tuwien.ac.at>

On Thu, 16 Feb 2012 00:03:00 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 15.02.2012 14:11 schrieb Stefan Tauner:
> > On Wed, 15 Feb 2012 02:55:38 +0100
> > Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
> >> Now if something is outside the scope of
> >> flashrom, should flashrom care at all?
> > depends... i dont think of "the scope" as a clearly bounded area.
> > everything related to flash chips is somewhat in its scope (else we
> > would not talk about this), heck we even discussed EEPROM handling
> > multiple times... we dont need to support any and all feature found in
> > any flash chip out there, but we should integrate knowledge and code
> > for the more common ones that might be useful, if there is someone
> > willing to provide them (and maintain them if necessary).
> 
> If we target non-flash EEPROMs, we might as well support OTP. I'd say
> such support is post-1.0 material, though (and no, I don't plan to delay
> flashrom 1.0 like Wine 1.0 was delayed).

no, you will tell us that you may tag 1.0 next week - every week :P

> >> Do we warn if a chip has a readonly serial number? That means the chip
> >> can't be cloned. People who care about OTP for clonability reasons
> >> probably care about other readonly contents as well. OTOH, other people
> >> who don't use the OTP at all (for them, OTP is just an accidental
> >> feature of a cheap flash chip) don't want to be bothered by yet another
> >> line of output from flashrom which has no relevancy for them.
> > do you agree to lowering the verbosity of the whole message to dbg
> > level?
> 
> Yes.

done and committed in r1493, one less yay!

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 00:58:02 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 00:58:02 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user and disable writes when a
	protected address range is detected.
In-Reply-To: <4F3C42CB.30901@gmx.net>
References: <4F3C42CB.30901@gmx.net>
Message-ID: <1329350282-10446-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

This includes not only the notorious read-only flash descriptors and locked ME
regions, but also the more rarely used PRs (Protected Ranges).
The user can enforce write support by specifying ich_spi_force=yes in the
programmer options, but we don't tell him the exact syntax interactively. He
has to read it up in the man page.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
---
 flashrom.8 |   15 ++++++++++
 ichspi.c   |   87 ++++++++++++++++++++++++++++++++++++++++++++++--------------
 2 files changed, 82 insertions(+), 20 deletions(-)

diff --git a/flashrom.8 b/flashrom.8
index e5f9a29..76aacba 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash
 chip is attached). The other options (swseq, hwseq) select the respective mode
 (if possible).
 .sp
+ICH8 and later southbridges may also have locked address ranges of different
+kinds if a valid descriptor was written to it. The flash address space is then
+partitioned in multiple so called "Flash Regions" containing the host firmware,
+the ME firmware and so on respectively. The flash descriptor can also specify up
+to 5 so called "Protected Regions", which are freely chosen address ranges
+independent from the aforementioned "Flash Regions". All of them can be write
+and/or read protected individually. If flashrom detects such a lock it will
+disable write support unless the user forces it with the
+.sp
+.B "  flashrom \-p internal:ich_spi_force=yes"
+.sp
+syntax. If this leads to erase or write accesses to the flash it would most
+probably bring it into an inconsistent and unbootable state and we will not
+provide any support in such a case.
+.sp
 If you have an Intel chipset with an ICH6 or later southbridge and if you want
 to set specific IDSEL values for a non-default flash chip or an embedded
 controller (EC), you can use the
diff --git a/ichspi.c b/ichspi.c
index 163ecf1..711f46c 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1421,7 +1421,8 @@ static int ich_spi_send_multicommand(struct flashctx *flash,
 #define ICH_BRWA(x)  ((x >>  8) & 0xff)
 #define ICH_BRRA(x)  ((x >>  0) & 0xff)
 
-static void do_ich9_spi_frap(uint32_t frap, int i)
+/* returns 0 if region is unused or r/w */
+static int ich9_handle_frap(uint32_t frap, int i)
 {
 	static const char *const access_names[4] = {
 		"locked", "read-only", "write-only", "read-write"
@@ -1444,11 +1445,16 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
 	if (base > limit) {
 		/* this FREG is disabled */
 		msg_pdbg("%s region is unused.\n", region_names[i]);
-		return;
+		return 0;
 	}
 
-	msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
+	msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff),
 		 access_names[rwperms]);
+	if (rwperms == 0x3)
+		return 0;
+
+	msg_pinfo("WARNING: %s region is not fully accessible.\n", region_names[i]);
+	return 1;
 }
 
 	/* In contrast to FRAP and the master section of the descriptor the bits
@@ -1460,21 +1466,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
 #define ICH_PR_PERMS(pr)	(((~((pr) >> PR_RP_OFF) & 1) << 0) | \
 				 ((~((pr) >> PR_WP_OFF) & 1) << 1))
 
-static void prettyprint_ich9_reg_pr(int i)
+/* returns 0 if range is unused (i.e. r/w) */
+static int ich9_handle_pr(int i)
 {
-	static const char *const access_names[4] = {
-		"locked", "read-only", "write-only", "read-write"
+	static const char *const access_names[3] = {
+		"locked", "read-only", "write-only"
 	};
 	uint8_t off = ICH9_REG_PR0 + (i * 4);
 	uint32_t pr = mmio_readl(ich_spibar + off);
-	int rwperms = ICH_PR_PERMS(pr);
+	unsigned int rwperms = ICH_PR_PERMS(pr);
 
-	msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i);
-	if (rwperms != 0x3)
-		msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr),
-			 ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
-	else
-		msg_pdbg2(", unused)\n");
+	if (rwperms == 0x3) {
+		msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i);
+		return 0;
+	}
+
+	msg_pdbg("0x%02X: 0x%08x ", off, pr);
+	msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
+		  ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
+	return 1;
 }
 
 /* Set/Clear the read and write protection enable bits of PR register @i
@@ -1537,6 +1547,8 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 	uint16_t spibar_offset, tmp2;
 	uint32_t tmp;
 	char *arg;
+	int ich_spi_force = 0;
+	int ich_spi_has_locks = 0;
 	int desc_valid = 0;
 	struct ich_descriptors desc = {{ 0 }};
 	enum ich_spi_mode {
@@ -1631,6 +1643,22 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		}
 		free(arg);
 
+		arg = extract_programmer_param("ich_spi_force");
+		if (arg && !strcmp(arg, "yes")) {
+			ich_spi_force = 1;
+			msg_pspew("ich_spi_force enabled.\n");
+		} else if (arg && !strlen(arg)) {
+			msg_perr("Missing argument for ich_spi_force.\n");
+			free(arg);
+			return ERROR_FATAL;
+		} else if (arg) {
+			msg_perr("Unknown argument for ich_spi_force: \"%s\" "
+				 "(not \"yes\").\n", arg);
+			free(arg);
+			return ERROR_FATAL;
+		}
+		free(arg);
+
 		tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS);
 		msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
 		prettyprint_ich9_reg_hsfs(tmp2);
@@ -1665,17 +1693,36 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 			msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp));
 			msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp));
 
-			/* Decode and print FREGx and FRAP registers */
+			/* Handle FREGx and FRAP registers */
 			for (i = 0; i < 5; i++)
-				do_ich9_spi_frap(tmp, i);
+				ich_spi_has_locks |= ich9_handle_frap(tmp, i);
 		}
 
-		/* try to disable PR locks before printing them */
-		if (!ichspi_lock)
-			for (i = 0; i < 5; i++)
+		for (i = 0; i < 5; i++) {
+			/* if not locked down try to disable PR locks first */
+			if (!ichspi_lock)
 				ich9_set_pr(i, 0, 0);
-		for (i = 0; i < 5; i++)
-			prettyprint_ich9_reg_pr(i);
+			ich_spi_has_locks |= ich9_handle_pr(i);
+		}
+
+		if (ich_spi_has_locks) {
+			msg_pinfo("Please send a verbose log to "
+				  "flashrom at flashrom.org if this board is not "
+				  "listed on\n"
+				  "http://flashrom.org/Supported_hardware#Supported_mainboards "
+				  "yet.\n");
+			if (!ich_spi_force)
+				programmer_may_write = 0;
+			msg_pinfo("Writes have been disabled. You can enforce "
+				  "write support with the\nich_spi_force "
+				  "programmer option, but it will most likely "
+				  "harm your hardware!\nIf you force flashrom "
+				  "you will get no support if something "
+				  "breaks.\n");
+			if (ich_spi_force)
+				msg_pinfo("Continuing with write support "
+					  "because the user forced us to!\n");
+		}
 
 		tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS);
 		msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff);
-- 
1.7.1



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 01:11:32 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 01:11:32 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user and disable writes when
 a protected address range is detected.
In-Reply-To: <1329350282-10446-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <4F3C42CB.30901@gmx.net>
	<1329350282-10446-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F3C49B4.1000107@gmx.net>

Am 16.02.2012 00:58 schrieb Stefan Tauner:
> This includes not only the notorious read-only flash descriptors and locked ME
> regions, but also the more rarely used PRs (Protected Ranges).
> The user can enforce write support by specifying ich_spi_force=yes in the
> programmer options, but we don't tell him the exact syntax interactively. He
> has to read it up in the man page.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

The Intel rant seems to be missing... I thought you only wanted to move it.


> diff --git a/flashrom.8 b/flashrom.8
> index e5f9a29..76aacba 100644
> --- a/flashrom.8
> +++ b/flashrom.8
> @@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash
>  chip is attached). The other options (swseq, hwseq) select the respective mode
>  (if possible).
>  .sp
> +ICH8 and later southbridges may also have locked address ranges of different
> +kinds if a valid descriptor was written to it. The flash address space is then
> +partitioned in multiple so called "Flash Regions" containing the host firmware,
> +the ME firmware and so on respectively. The flash descriptor can also specify up
> +to 5 so called "Protected Regions", which are freely chosen address ranges
> +independent from the aforementioned "Flash Regions". All of them can be write
> +and/or read protected individually. If flashrom detects such a lock it will
> +disable write support unless the user forces it with the
> +.sp
> +.B "  flashrom \-p internal:ich_spi_force=yes"
> +.sp
> +syntax. If this leads to erase or write accesses to the flash it would most
> +probably bring it into an inconsistent and unbootable state and we will not
> +provide any support in such a case.
> +.sp
>  If you have an Intel chipset with an ICH6 or later southbridge and if you want
>  to set specific IDSEL values for a non-default flash chip or an embedded
>  controller (EC), you can use the
> diff --git a/ichspi.c b/ichspi.c
> index 163ecf1..711f46c 100644
> --- a/ichspi.c
> +++ b/ichspi.c
> @@ -1444,11 +1445,16 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
>  	if (base > limit) {
>  		/* this FREG is disabled */
>  		msg_pdbg("%s region is unused.\n", region_names[i]);
> -		return;
> +		return 0;
>  	}
>  
> -	msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
> +	msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff),
>  		 access_names[rwperms]);
> +	if (rwperms == 0x3)
> +		return 0;
> +
> +	msg_pinfo("WARNING: %s region is not fully accessible.\n", region_names[i]);

Odd. For FRAP, the _pinfo message just says "not fully accessible", but
for PR, the _pinfo message mentions the actual read/write protection.
Not terribly important to fix, just a small inconsistency I noticed.


> +	return 1;
>  }
>  
>  	/* In contrast to FRAP and the master section of the descriptor the bits
> @@ -1460,21 +1466,25 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
>  #define ICH_PR_PERMS(pr)	(((~((pr) >> PR_RP_OFF) & 1) << 0) | \
>  				 ((~((pr) >> PR_WP_OFF) & 1) << 1))
>  
> -static void prettyprint_ich9_reg_pr(int i)
> +/* returns 0 if range is unused (i.e. r/w) */
> +static int ich9_handle_pr(int i)
>  {
> -	static const char *const access_names[4] = {
> -		"locked", "read-only", "write-only", "read-write"
> +	static const char *const access_names[3] = {
> +		"locked", "read-only", "write-only"
>  	};
>  	uint8_t off = ICH9_REG_PR0 + (i * 4);
>  	uint32_t pr = mmio_readl(ich_spibar + off);
> -	int rwperms = ICH_PR_PERMS(pr);
> +	unsigned int rwperms = ICH_PR_PERMS(pr);
>  
> -	msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i);
> -	if (rwperms != 0x3)
> -		msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr),
> -			 ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
> -	else
> -		msg_pdbg2(", unused)\n");
> +	if (rwperms == 0x3) {
> +		msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i);
> +		return 0;
> +	}
> +
> +	msg_pdbg("0x%02X: 0x%08x ", off, pr);
> +	msg_pinfo("WARNING: PR%u: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
> +		  ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
> +	return 1;
>  }
>  
>  /* Set/Clear the read and write protection enable bits of PR register @i
> @@ -1537,6 +1547,8 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
>  	uint16_t spibar_offset, tmp2;
>  	uint32_t tmp;
>  	char *arg;
> +	int ich_spi_force = 0;
> +	int ich_spi_has_locks = 0;

Rename to ich_spi_has_region_locks or ich_spi_has_locked_regions or
somesuch. Otherwise there is possibility for confusion between
ich_spi_has_locks and ichspi_lock.


>  	int desc_valid = 0;
>  	struct ich_descriptors desc = {{ 0 }};
>  	enum ich_spi_mode {
> @@ -1665,17 +1693,36 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
>  			msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp));
>  			msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp));
>  
> -			/* Decode and print FREGx and FRAP registers */
> +			/* Handle FREGx and FRAP registers */
>  			for (i = 0; i < 5; i++)
> -				do_ich9_spi_frap(tmp, i);
> +				ich_spi_has_locks |= ich9_handle_frap(tmp, i);
>  		}
>  
> -		/* try to disable PR locks before printing them */
> -		if (!ichspi_lock)
> -			for (i = 0; i < 5; i++)
> +		for (i = 0; i < 5; i++) {
> +			/* if not locked down try to disable PR locks first */
> +			if (!ichspi_lock)
>  				ich9_set_pr(i, 0, 0);
> -		for (i = 0; i < 5; i++)
> -			prettyprint_ich9_reg_pr(i);
> +			ich_spi_has_locks |= ich9_handle_pr(i);
> +		}
> +
> +		if (ich_spi_has_locks) {
>

Thanks for working tirelessly to get this code into an excellent shape!

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 01:39:18 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 01:39:18 +0100
Subject: [flashrom] [PATCH] Workaround missing %hhx support in MinGW sscanf
Message-ID: <4F3C5036.9000402@gmx.net>

MinGW uses standard Windows C libraries and those apparently don't
support %hhx for sscanf into a uint8_t. SCNx8 isn't available either.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c
===================================================================
--- flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c	(Revision 1492)
+++ flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c	(Arbeitskopie)
@@ -199,7 +199,12 @@
 			}
 		}
 		for (i = 0; i < spi_blacklist_size; i++) {
-			sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);
+			unsigned int tmp2;
+			/* SCNx8 is apparently not supported by MSVC (and thus
+			 * MinGW), so work around it with an extra variable
+			 */
+			sscanf(tmp + i * 2, "%2x", &tmp2);
+			spi_blacklist[i] = (uint8_t)tmp2;
 		}
 		msg_pdbg("SPI blacklist is ");
 		for (i = 0; i < spi_blacklist_size; i++)
@@ -230,7 +235,12 @@
 			}
 		}
 		for (i = 0; i < spi_ignorelist_size; i++) {
-			sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);
+			unsigned int tmp2;
+			/* SCNx8 is apparently not supported by MSVC (and thus
+			 * MinGW), so work around it with an extra variable
+			 */
+			sscanf(tmp + i * 2, "%2x", &tmp2);
+			spi_ignorelist[i] = (uint8_t)tmp2;
 		}
 		msg_pdbg("SPI ignorelist is ");
 		for (i = 0; i < spi_ignorelist_size; i++)


-- 
http://www.hailfinger.org/



From svn at flashrom.org  Thu Feb 16 02:13:32 2012
From: svn at flashrom.org (repository service)
Date: Thu, 16 Feb 2012 02:13:32 +0100
Subject: [flashrom] [commit] r1494 - trunk
Message-ID: <E1Rxpue-00045j-Ht@ra.coresystems.de>

Author: stefanct
Date: Thu Feb 16 02:13:00 2012
New Revision: 1494
URL: http://flashrom.org/trac/flashrom/changeset/1494

Log:
ichspi.c: warn user and disable writes when a protected address range is detected.

This includes not only the notorious read-only flash descriptors and locked ME
regions, but also the more rarely used PRs (Protected Ranges).
The user can enforce write support by specifying ich_spi_force=yes in the
programmer options, but we don't tell him the exact syntax interactively. He
has to read it up in the man page.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/flashrom.8
   trunk/ichspi.c

Modified: trunk/flashrom.8
==============================================================================
--- trunk/flashrom.8	Thu Feb 16 00:40:23 2012	(r1493)
+++ trunk/flashrom.8	Thu Feb 16 02:13:00 2012	(r1494)
@@ -315,6 +315,21 @@
 chip is attached). The other options (swseq, hwseq) select the respective mode
 (if possible).
 .sp
+ICH8 and later southbridges may also have locked address ranges of different
+kinds if a valid descriptor was written to it. The flash address space is then
+partitioned in multiple so called "Flash Regions" containing the host firmware,
+the ME firmware and so on respectively. The flash descriptor can also specify up
+to 5 so called "Protected Regions", which are freely chosen address ranges
+independent from the aforementioned "Flash Regions". All of them can be write
+and/or read protected individually. If flashrom detects such a lock it will
+disable write support unless the user forces it with the
+.sp
+.B "  flashrom \-p internal:ich_spi_force=yes"
+.sp
+syntax. If this leads to erase or write accesses to the flash it would most
+probably bring it into an inconsistent and unbootable state and we will not
+provide any support in such a case.
+.sp
 If you have an Intel chipset with an ICH6 or later southbridge and if you want
 to set specific IDSEL values for a non-default flash chip or an embedded
 controller (EC), you can use the

Modified: trunk/ichspi.c
==============================================================================
--- trunk/ichspi.c	Thu Feb 16 00:40:23 2012	(r1493)
+++ trunk/ichspi.c	Thu Feb 16 02:13:00 2012	(r1494)
@@ -1421,7 +1421,8 @@
 #define ICH_BRWA(x)  ((x >>  8) & 0xff)
 #define ICH_BRRA(x)  ((x >>  0) & 0xff)
 
-static void do_ich9_spi_frap(uint32_t frap, int i)
+/* returns 0 if region is unused or r/w */
+static int ich9_handle_frap(uint32_t frap, int i)
 {
 	static const char *const access_names[4] = {
 		"locked", "read-only", "write-only", "read-write"
@@ -1436,19 +1437,26 @@
 	int offset = ICH9_REG_FREG0 + i * 4;
 	uint32_t freg = mmio_readl(ich_spibar + offset);
 
-	msg_pdbg("0x%02X: 0x%08x (FREG%i: %s)\n",
-		     offset, freg, i, region_names[i]);
-
 	base  = ICH_FREG_BASE(freg);
 	limit = ICH_FREG_LIMIT(freg);
 	if (base > limit) {
 		/* this FREG is disabled */
-		msg_pdbg("%s region is unused.\n", region_names[i]);
-		return;
+		msg_pdbg2("0x%02X: 0x%08x FREG%i: %s region is unused.\n",
+			  offset, freg, i, region_names[i]);
+		return 0;
+	}
+	msg_pdbg("0x%02X: 0x%08x ", offset, freg);
+	if (rwperms == 0x3) {
+		msg_pdbg("FREG%i: %s region (0x%08x-0x%08x) is %s.\n", i,
+			 region_names[i], base, (limit | 0x0fff),
+			 access_names[rwperms]);
+		return 0;
 	}
 
-	msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
-		 access_names[rwperms]);
+	msg_pinfo("FREG%i: WARNING: %s region (0x%08x-0x%08x) is %s.\n", i,
+		  region_names[i], base, (limit | 0x0fff),
+		  access_names[rwperms]);
+	return 1;
 }
 
 	/* In contrast to FRAP and the master section of the descriptor the bits
@@ -1460,21 +1468,25 @@
 #define ICH_PR_PERMS(pr)	(((~((pr) >> PR_RP_OFF) & 1) << 0) | \
 				 ((~((pr) >> PR_WP_OFF) & 1) << 1))
 
-static void prettyprint_ich9_reg_pr(int i)
+/* returns 0 if range is unused (i.e. r/w) */
+static int ich9_handle_pr(int i)
 {
-	static const char *const access_names[4] = {
-		"locked", "read-only", "write-only", "read-write"
+	static const char *const access_names[3] = {
+		"locked", "read-only", "write-only"
 	};
 	uint8_t off = ICH9_REG_PR0 + (i * 4);
 	uint32_t pr = mmio_readl(ich_spibar + off);
-	int rwperms = ICH_PR_PERMS(pr);
+	unsigned int rwperms = ICH_PR_PERMS(pr);
 
-	msg_pdbg2("0x%02X: 0x%08x (PR%u", off, pr, i);
-	if (rwperms != 0x3)
-		msg_pdbg2(")\n0x%08x-0x%08x is %s\n", ICH_FREG_BASE(pr),
-			 ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
-	else
-		msg_pdbg2(", unused)\n");
+	if (rwperms == 0x3) {
+		msg_pdbg2("0x%02X: 0x%08x (PR%u is unused)\n", off, pr, i);
+		return 0;
+	}
+
+	msg_pdbg("0x%02X: 0x%08x ", off, pr);
+	msg_pinfo("PR%u: WARNING: 0x%08x-0x%08x is %s.\n", i, ICH_FREG_BASE(pr),
+		  ICH_FREG_LIMIT(pr) | 0x0fff, access_names[rwperms]);
+	return 1;
 }
 
 /* Set/Clear the read and write protection enable bits of PR register @i
@@ -1537,6 +1549,8 @@
 	uint16_t spibar_offset, tmp2;
 	uint32_t tmp;
 	char *arg;
+	int ich_spi_force = 0;
+	int ich_spi_rw_restricted = 0;
 	int desc_valid = 0;
 	struct ich_descriptors desc = {{ 0 }};
 	enum ich_spi_mode {
@@ -1631,6 +1645,22 @@
 		}
 		free(arg);
 
+		arg = extract_programmer_param("ich_spi_force");
+		if (arg && !strcmp(arg, "yes")) {
+			ich_spi_force = 1;
+			msg_pspew("ich_spi_force enabled.\n");
+		} else if (arg && !strlen(arg)) {
+			msg_perr("Missing argument for ich_spi_force.\n");
+			free(arg);
+			return ERROR_FATAL;
+		} else if (arg) {
+			msg_perr("Unknown argument for ich_spi_force: \"%s\" "
+				 "(not \"yes\").\n", arg);
+			free(arg);
+			return ERROR_FATAL;
+		}
+		free(arg);
+
 		tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS);
 		msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2);
 		prettyprint_ich9_reg_hsfs(tmp2);
@@ -1665,17 +1695,36 @@
 			msg_pdbg("BRWA 0x%02x, ", ICH_BRWA(tmp));
 			msg_pdbg("BRRA 0x%02x\n", ICH_BRRA(tmp));
 
-			/* Decode and print FREGx and FRAP registers */
+			/* Handle FREGx and FRAP registers */
 			for (i = 0; i < 5; i++)
-				do_ich9_spi_frap(tmp, i);
+				ich_spi_rw_restricted |= ich9_handle_frap(tmp, i);
 		}
 
-		/* try to disable PR locks before printing them */
-		if (!ichspi_lock)
-			for (i = 0; i < 5; i++)
+		for (i = 0; i < 5; i++) {
+			/* if not locked down try to disable PR locks first */
+			if (!ichspi_lock)
 				ich9_set_pr(i, 0, 0);
-		for (i = 0; i < 5; i++)
-			prettyprint_ich9_reg_pr(i);
+			ich_spi_rw_restricted |= ich9_handle_pr(i);
+		}
+
+		if (ich_spi_rw_restricted) {
+			msg_pinfo("Please send a verbose log to "
+				  "flashrom at flashrom.org if this board is not "
+				  "listed on\n"
+				  "http://flashrom.org/Supported_hardware#Supported_mainboards "
+				  "yet.\n");
+			if (!ich_spi_force)
+				programmer_may_write = 0;
+			msg_pinfo("Writes have been disabled. You can enforce "
+				  "write support with the\nich_spi_force "
+				  "programmer option, but it will most likely "
+				  "harm your hardware!\nIf you force flashrom "
+				  "you will get no support if something "
+				  "breaks.\n");
+			if (ich_spi_force)
+				msg_pinfo("Continuing with write support "
+					  "because the user forced us to!\n");
+		}
 
 		tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS);
 		msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff);


From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 02:18:17 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 02:18:17 +0100
Subject: [flashrom] [PATCH] ichspi.c: warn user and disable writes when
 a protected address range is detected.
In-Reply-To: <4F3C49B4.1000107@gmx.net>
References: <4F3C42CB.30901@gmx.net>
	<1329350282-10446-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3C49B4.1000107@gmx.net>
Message-ID: <201202160117.q1G1Hb9J009099@mail2.student.tuwien.ac.at>

On Thu, 16 Feb 2012 01:11:32 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 16.02.2012 00:58 schrieb Stefan Tauner:
> > This includes not only the notorious read-only flash descriptors and locked ME
> > regions, but also the more rarely used PRs (Protected Ranges).
> > The user can enforce write support by specifying ich_spi_force=yes in the
> > programmer options, but we don't tell him the exact syntax interactively. He
> > has to read it up in the man page.
> >
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> 
> The Intel rant seems to be missing... I thought you only wanted to move it.

postponed... there is so much i should add to that simple rant ;)

> > diff --git a/flashrom.8 b/flashrom.8
> > index e5f9a29..76aacba 100644
> > --- a/flashrom.8
> > +++ b/flashrom.8
> > @@ -315,6 +315,21 @@ important opcodes are inaccessible due to lockdown; or if more than one flash
> >  chip is attached). The other options (swseq, hwseq) select the respective mode
> >  (if possible).
> >  .sp
> > +ICH8 and later southbridges may also have locked address ranges of different
> > +kinds if a valid descriptor was written to it. The flash address space is then
> > +partitioned in multiple so called "Flash Regions" containing the host firmware,
> > +the ME firmware and so on respectively. The flash descriptor can also specify up
> > +to 5 so called "Protected Regions", which are freely chosen address ranges
> > +independent from the aforementioned "Flash Regions". All of them can be write
> > +and/or read protected individually. If flashrom detects such a lock it will
> > +disable write support unless the user forces it with the
> > +.sp
> > +.B "  flashrom \-p internal:ich_spi_force=yes"
> > +.sp
> > +syntax. If this leads to erase or write accesses to the flash it would most
> > +probably bring it into an inconsistent and unbootable state and we will not
> > +provide any support in such a case.
> > +.sp
> >  If you have an Intel chipset with an ICH6 or later southbridge and if you want
> >  to set specific IDSEL values for a non-default flash chip or an embedded
> >  controller (EC), you can use the
> > diff --git a/ichspi.c b/ichspi.c
> > index 163ecf1..711f46c 100644
> > --- a/ichspi.c
> > +++ b/ichspi.c
> > @@ -1444,11 +1445,16 @@ static void do_ich9_spi_frap(uint32_t frap, int i)
> >  	if (base > limit) {
> >  		/* this FREG is disabled */
> >  		msg_pdbg("%s region is unused.\n", region_names[i]);
> > -		return;
> > +		return 0;
> >  	}
> >  
> > -	msg_pdbg("0x%08x-0x%08x is %s\n", base, (limit | 0x0fff),
> > +	msg_pdbg("0x%08x-0x%08x is %s.\n", base, (limit | 0x0fff),
> >  		 access_names[rwperms]);
> > +	if (rwperms == 0x3)
> > +		return 0;
> > +
> > +	msg_pinfo("WARNING: %s region is not fully accessible.\n", region_names[i]);
> 
> Odd. For FRAP, the _pinfo message just says "not fully accessible", but
> for PR, the _pinfo message mentions the actual read/write protection.
> Not terribly important to fix, just a small inconsistency I noticed.

terribly to fix actually. :)

> > +	int ich_spi_force = 0;
> > +	int ich_spi_has_locks = 0;
> 
> Rename to ich_spi_has_region_locks or ich_spi_has_locked_regions or
> somesuch. Otherwise there is possibility for confusion between
> ich_spi_has_locks and ichspi_lock.

ich_spi_rw_restricted

 
> Thanks for working tirelessly to get this code into an excellent shape!

Thanks for your very work-creating^Wuseful comments!
committed in r1494.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From vidwer at gmail.com  Thu Feb 16 02:30:18 2012
From: vidwer at gmail.com (Idwer Vollering)
Date: Thu, 16 Feb 2012 02:30:18 +0100
Subject: [flashrom] [PATCH] Workaround missing %hhx support in MinGW
	sscanf
In-Reply-To: <4F3C5036.9000402@gmx.net>
References: <4F3C5036.9000402@gmx.net>
Message-ID: <CAPp9OrkLBHEc+QGSff8i6473ySuyihx=AsWXdSka=0dsa7mzWw@mail.gmail.com>

2012/2/16 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>:
> MinGW uses standard Windows C libraries and those apparently don't
> support %hhx for sscanf into a uint8_t. SCNx8 isn't available either.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Acked-by: Idwer Vollering <vidwer at gmail.com>

>
> Index: flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c
> ===================================================================
> --- flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c ? ? ? (Revision 1492)
> +++ flashrom-mingw_workaround_broken_sscanf_uint8t/dummyflasher.c ? ? ? (Arbeitskopie)
> @@ -199,7 +199,12 @@
> ? ? ? ? ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?for (i = 0; i < spi_blacklist_size; i++) {
> - ? ? ? ? ? ? ? ? ? ? ? sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);
> + ? ? ? ? ? ? ? ? ? ? ? unsigned int tmp2;
> + ? ? ? ? ? ? ? ? ? ? ? /* SCNx8 is apparently not supported by MSVC (and thus
> + ? ? ? ? ? ? ? ? ? ? ? ?* MinGW), so work around it with an extra variable
> + ? ? ? ? ? ? ? ? ? ? ? ?*/
> + ? ? ? ? ? ? ? ? ? ? ? sscanf(tmp + i * 2, "%2x", &tmp2);
> + ? ? ? ? ? ? ? ? ? ? ? spi_blacklist[i] = (uint8_t)tmp2;
> ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?msg_pdbg("SPI blacklist is ");
> ? ? ? ? ? ? ? ?for (i = 0; i < spi_blacklist_size; i++)
> @@ -230,7 +235,12 @@
> ? ? ? ? ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?for (i = 0; i < spi_ignorelist_size; i++) {
> - ? ? ? ? ? ? ? ? ? ? ? sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);
> + ? ? ? ? ? ? ? ? ? ? ? unsigned int tmp2;
> + ? ? ? ? ? ? ? ? ? ? ? /* SCNx8 is apparently not supported by MSVC (and thus
> + ? ? ? ? ? ? ? ? ? ? ? ?* MinGW), so work around it with an extra variable
> + ? ? ? ? ? ? ? ? ? ? ? ?*/
> + ? ? ? ? ? ? ? ? ? ? ? sscanf(tmp + i * 2, "%2x", &tmp2);
> + ? ? ? ? ? ? ? ? ? ? ? spi_ignorelist[i] = (uint8_t)tmp2;
> ? ? ? ? ? ? ? ?}
> ? ? ? ? ? ? ? ?msg_pdbg("SPI ignorelist is ");
> ? ? ? ? ? ? ? ?for (i = 0; i < spi_ignorelist_size; i++)
>
>
> --
> http://www.hailfinger.org/
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom

From svn at flashrom.org  Thu Feb 16 02:43:07 2012
From: svn at flashrom.org (repository service)
Date: Thu, 16 Feb 2012 02:43:07 +0100
Subject: [flashrom] [commit] r1495 - trunk
Message-ID: <E1RxqNH-00083n-3R@ra.coresystems.de>

Author: hailfinger
Date: Thu Feb 16 02:43:06 2012
New Revision: 1495
URL: http://flashrom.org/trac/flashrom/changeset/1495

Log:
Workaround missing %hhx support in MinGW sscanf

MinGW uses standard Windows C libraries and those apparently don't
support %hhx for sscanf into a uint8_t. SCNx8 isn't available either.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Idwer Vollering <vidwer at gmail.com>

Modified:
   trunk/dummyflasher.c

Modified: trunk/dummyflasher.c
==============================================================================
--- trunk/dummyflasher.c	Thu Feb 16 02:13:00 2012	(r1494)
+++ trunk/dummyflasher.c	Thu Feb 16 02:43:06 2012	(r1495)
@@ -199,7 +199,12 @@
 			}
 		}
 		for (i = 0; i < spi_blacklist_size; i++) {
-			sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);
+			unsigned int tmp2;
+			/* SCNx8 is apparently not supported by MSVC (and thus
+			 * MinGW), so work around it with an extra variable
+			 */
+			sscanf(tmp + i * 2, "%2x", &tmp2);
+			spi_blacklist[i] = (uint8_t)tmp2;
 		}
 		msg_pdbg("SPI blacklist is ");
 		for (i = 0; i < spi_blacklist_size; i++)
@@ -230,7 +235,12 @@
 			}
 		}
 		for (i = 0; i < spi_ignorelist_size; i++) {
-			sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);
+			unsigned int tmp2;
+			/* SCNx8 is apparently not supported by MSVC (and thus
+			 * MinGW), so work around it with an extra variable
+			 */
+			sscanf(tmp + i * 2, "%2x", &tmp2);
+			spi_ignorelist[i] = (uint8_t)tmp2;
 		}
 		msg_pdbg("SPI ignorelist is ");
 		for (i = 0; i < spi_ignorelist_size; i++)


From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 02:43:44 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 02:43:44 +0100
Subject: [flashrom] [PATCH] Workaround missing %hhx support in MinGW
	sscanf
In-Reply-To: <CAPp9OrkLBHEc+QGSff8i6473ySuyihx=AsWXdSka=0dsa7mzWw@mail.gmail.com>
References: <4F3C5036.9000402@gmx.net>
	<CAPp9OrkLBHEc+QGSff8i6473ySuyihx=AsWXdSka=0dsa7mzWw@mail.gmail.com>
Message-ID: <4F3C5F50.1080804@gmx.net>

Am 16.02.2012 02:30 schrieb Idwer Vollering:
> 2012/2/16 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>:
>> > MinGW uses standard Windows C libraries and those apparently don't
>> > support %hhx for sscanf into a uint8_t. SCNx8 isn't available either.
>> >
>> > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Idwer Vollering <vidwer at gmail.com>

Thanks, committed in r1495.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From matthewnubbe at gmail.com  Thu Feb 16 07:22:20 2012
From: matthewnubbe at gmail.com (Matthew Nubbe)
Date: Thu, 16 Feb 2012 00:22:20 -0600
Subject: [flashrom] ASUS M3N78-VM: flashrom -V
Message-ID: <CACgb-H4VJv+_+F-vhC-SvNqTnYzH7YWqMmiJ-9+dgj7fzRY6-g@mail.gmail.com>

flashrom v0.9.4-r1395 on Linux 3.1.9-2-ARCH (x86_64), built with libpci
3.1.8, GCC 4.6.2, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 741M loops per
second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 989 us, 10000 myus
= 9909 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "System manufacturer"
DMI string system-product-name: "System Product Name"
DMI string system-version: "System Version"
DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
DMI string baseboard-product-name: "M3N78-VM"
DMI string baseboard-version: "Rev X.0x"
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8712 on port 0x2e
Found chipset "NVIDIA MCP78S" with PCI ID 10de:075c.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Flash bus type is SPI
SPI on this chipset is WIP. Please report any success or failure by mailing
us the verbose output to flashrom at flashrom.org, thanks!
Found SMBus device 10de:0752 at 00:01:1
MCP SPI BAR is at 0xfbf80000
Mapping NVIDIA MCP6x SPI at 0xfbf80000, unaligned size 0x544.
SPI control is 0xc01a, req=0, gnt=0
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for
your
chipset. Thanks.
OK.
This chipset supports the following protocols: SPI.
Super I/O ID 0x8712 is not on the list of flash capable controllers.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address
0xfff00000.
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xc2, id2 0x2014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xc2, id2 0x13
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0...
0x000000-0x000fff:EW, 0x001000-0x001fff:EW, 0x002000-0x002fff:EW,
0x003000-0x003fff:EW, 0x004000-0x004fff:EW, 0x005000-0x005fff:EW,
0x006000-0x006fff:EW, 0x007000-0x007fff:EW, 0x008000-0x008fff:EW,
0x009000-0x009fff:EW, 0x00a000-0x00afff:EW, 0x00b000-0x00bfff:EW,
0x00c000-0x00cfff:EW, 0x00d000-0x00dfff:EW, 0x00e000-0x00efff:EW,
0x00f000-0x00ffff:EW, 0x010000-0x010fff:EW, 0x011000-0x011fff:EW,
0x012000-0x012fff:EW, 0x013000-0x013fff:EW, 0x014000-0x014fff:EW,
0x015000-0x015fff:EW, 0x016000-0x016fff:EW, 0x017000-0x017fff:EW,
0x018000-0x018fff:EW, 0x019000-0x019fff:EW, 0x01a000-0x01afff:EW,
0x01b000-0x01bfff:EW, 0x01c000-0x01cfff:EW, 0x01d000-0x01dfff:EW,
0x01e000-0x01efff:EW, 0x01f000-0x01ffff:EW, 0x020000-0x020fff:EW,
0x021000-0x021fff:EW, 0x022000-0x022fff:EW, 0x023000-0x023fff:EW,
0x024000-0x024fff:EW, 0x025000-0x025fff:EW, 0x026000-0x026fff:EW,
0x027000-0x027fff:EW, 0x028000-0x028fff:EW, 0x029000-0x029fff:EW,
0x02a000-0x02afff:EW, 0x02b000-0x02bfff:EW, 0x02c000-0x02cfff:EW,
0x02d000-0x02dfff:EW, 0x02e000-0x02efff:EW, 0x02f000-0x02ffff:EW,
0x030000-0x030fff:EW, 0x031000-0x031fff:EW, 0x032000-0x032fff:EW,
0x033000-0x033fff:EW, 0x034000-0x034fff:EW, 0x035000-0x035fff:EW,
0x036000-0x036fff:EW, 0x037000-0x037fff:EW, 0x038000-0x038fff:EW,
0x039000-0x039fff:EW, 0x03a000-0x03afff:EW, 0x03b000-0x03bfff:EW,
0x03c000-0x03cfff:EW, 0x03d000-0x03dfff:EW, 0x03e000-0x03efff:EW,
0x03f000-0x03ffff:EW, 0x040000-0x040fff:EW, 0x041000-0x041fff:EW,
0x042000-0x042fff:EW, 0x043000-0x043fff:EW, 0x044000-0x044fff:EW,
0x045000-0x045fff:EW, 0x046000-0x046fff:EW, 0x047000-0x047fff:EW,
0x048000-0x048fff:EW, 0x049000-0x049fff:EW, 0x04a000-0x04afff:EW,
0x04b000-0x04bfff:EW, 0x04c000-0x04cfff:EW, 0x04d000-0x04dfff:EW,
0x04e000-0x04efff:EW, 0x04f000-0x04ffff:EW, 0x050000-0x050fff:EW,
0x051000-0x051fff:EW, 0x052000-0x052fff:EW, 0x053000-0x053fff:EW,
0x054000-0x054fff:EW, 0x055000-0x055fff:EW, 0x056000-0x056fff:EW,
0x057000-0x057fff:EW, 0x058000-0x058fff:EW, 0x059000-0x059fff:EW,
0x05a000-0x05afff:EW, 0x05b000-0x05bfff:EW, 0x05c000-0x05cfff:EW,
0x05d000-0x05dfff:EW, 0x05e000-0x05efff:EW, 0x05f000-0x05ffff:EW,
0x060000-0x060fff:EW, 0x061000-0x061fff:EW, 0x062000-0x062fff:W,
0x063000-0x063fff:W, 0x064000-0x064fff:W, 0x065000-0x065fff:W,
0x066000-0x066fff:W, 0x067000-0x067fff:W, 0x068000-0x068fff:S,
0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S,
0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S,
0x06f000-0x06ffff:S, 0x070000-0x070fff:S, 0x071000-0x071fff:S,
0x072000-0x072fff:S, 0x073000-0x073fff:S, 0x074000-0x074fff:S,
0x075000-0x075fff:S, 0x076000-0x076fff:S, 0x077000-0x077fff:S,
0x078000-0x078fff:S, 0x079000-0x079fff:S, 0x07a000-0x07afff:S,
0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S,
0x07e000-0x07efff:S, 0x07f000-0x07ffff:S, 0x080000-0x080fff:S,
0x081000-0x081fff:S, 0x082000-0x082fff:S, 0x083000-0x083fff:S,
0x084000-0x084fff:S, 0x085000-0x085fff:S, 0x086000-0x086fff:S,
0x087000-0x087fff:S, 0x088000-0x088fff:S, 0x089000-0x089fff:S,
0x08a000-0x08afff:S, 0x08b000-0x08bfff:S, 0x08c000-0x08cfff:S,
0x08d000-0x08dfff:S, 0x08e000-0x08efff:S, 0x08f000-0x08ffff:EW,
0x090000-0x090fff:EW, 0x091000-0x091fff:EW, 0x092000-0x092fff:EW,
0x093000-0x093fff:EW, 0x094000-0x094fff:EW, 0x095000-0x095fff:EW,
0x096000-0x096fff:EW, 0x097000-0x097fff:EW, 0x098000-0x098fff:EW,
0x099000-0x099fff:EW, 0x09a000-0x09afff:EW, 0x09b000-0x09bfff:EW,
0x09c000-0x09cfff:EW, 0x09d000-0x09dfff:EW, 0x09e000-0x09efff:EW,
0x09f000-0x09ffff:EW, 0x0a0000-0x0a0fff:EW, 0x0a1000-0x0a1fff:EW,
0x0a2000-0x0a2fff:EW, 0x0a3000-0x0a3fff:EW, 0x0a4000-0x0a4fff:EW,
0x0a5000-0x0a5fff:EW, 0x0a6000-0x0a6fff:EW, 0x0a7000-0x0a7fff:EW,
0x0a8000-0x0a8fff:EW, 0x0a9000-0x0a9fff:EW, 0x0aa000-0x0aafff:EW,
0x0ab000-0x0abfff:EW, 0x0ac000-0x0acfff:EW, 0x0ad000-0x0adfff:EW,
0x0ae000-0x0aefff:EW, 0x0af000-0x0affff:EW, 0x0b0000-0x0b0fff:EW,
0x0b1000-0x0b1fff:EW, 0x0b2000-0x0b2fff:EW, 0x0b3000-0x0b3fff:EW,
0x0b4000-0x0b4fff:EW, 0x0b5000-0x0b5fff:EW, 0x0b6000-0x0b6fff:EW,
0x0b7000-0x0b7fff:EW, 0x0b8000-0x0b8fff:EW, 0x0b9000-0x0b9fff:EW,
0x0ba000-0x0bafff:EW, 0x0bb000-0x0bbfff:EW, 0x0bc000-0x0bcfff:EW,
0x0bd000-0x0bdfff:EW, 0x0be000-0x0befff:EW, 0x0bf000-0x0bffff:EW,
0x0c0000-0x0c0fff:EW, 0x0c1000-0x0c1fff:EW, 0x0c2000-0x0c2fff:EW,
0x0c3000-0x0c3fff:EW, 0x0c4000-0x0c4fff:EW, 0x0c5000-0x0c5fff:EW,
0x0c6000-0x0c6fff:EW, 0x0c7000-0x0c7fff:EW, 0x0c8000-0x0c8fff:EW,
0x0c9000-0x0c9fff:EW, 0x0ca000-0x0cafff:EW, 0x0cb000-0x0cbfff:EW,
0x0cc000-0x0ccfff:EW, 0x0cd000-0x0cdfff:EW, 0x0ce000-0x0cefff:EW,
0x0cf000-0x0cffff:EW, 0x0d0000-0x0d0fff:EW, 0x0d1000-0x0d1fff:EW,
0x0d2000-0x0d2fff:EW, 0x0d3000-0x0d3fff:EW, 0x0d4000-0x0d4fff:EW,
0x0d5000-0x0d5fff:EW, 0x0d6000-0x0d6fff:EW, 0x0d7000-0x0d7fff:EW,
0x0d8000-0x0d8fff:EW, 0x0d9000-0x0d9fff:EW, 0x0da000-0x0dafff:EW,
0x0db000-0x0dbfff:EW, 0x0dc000-0x0dcfff:E, 0x0dd000-0x0ddfff:E,
0x0de000-0x0defff:E, 0x0df000-0x0dffff:S, 0x0e0000-0x0e0fff:S,
0x0e1000-0x0e1fff:S, 0x0e2000-0x0e2fff:S, 0x0e3000-0x0e3fff:S,
0x0e4000-0x0e4fff:S, 0x0e5000-0x0e5fff:S, 0x0e6000-0x0e6fff:S,
0x0e7000-0x0e7fff:S, 0x0e8000-0x0e8fff:S, 0x0e9000-0x0e9fff:S,
0x0ea000-0x0eafff:S, 0x0eb000-0x0ebfff:S, 0x0ec000-0x0ecfff:S,
0x0ed000-0x0edfff:S, 0x0ee000-0x0eefff:S, 0x0ef000-0x0effff:S,
0x0f0000-0x0f0fff:EW, 0x0f1000-0x0f1fff:EW, 0x0f2000-0x0f2fff:EW,
0x0f3000-0x0f3fff:EW, 0x0f4000-0x0f4fff:EW, 0x0f5000-0x0f5fff:EW,
0x0f6000-0x0f6fff:EW, 0x0f7000-0x0f7fff:EW, 0x0f8000-0x0f8fff:EW,
0x0f9000-0x0f9fff:EW, 0x0fa000-0x0fafff:EW, 0x0fb000-0x0fbfff:EW,
0x0fc000-0x0fcfff:EW, 0x0fd000-0x0fdfff:EW, 0x0fe000-0x0fefff:EW,
0x0ff000-0x0fffff:EW
Erase/write done.
Verifying flash... VERIFIED.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120216/90daa9af/attachment-0001.html>

From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 18:41:11 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 18:41:11 +0100
Subject: [flashrom] ASUS M3N78-VM: flashrom -V
In-Reply-To: <CACgb-H4VJv+_+F-vhC-SvNqTnYzH7YWqMmiJ-9+dgj7fzRY6-g@mail.gmail.com>
References: <CACgb-H4VJv+_+F-vhC-SvNqTnYzH7YWqMmiJ-9+dgj7fzRY6-g@mail.gmail.com>
Message-ID: <201202161740.q1GHeWoK016962@mail2.student.tuwien.ac.at>

Hello Matthew,

thanks for your report! That mainboard was already reported:
http://www.flashrom.org/pipermail/flashrom/2011-May/006496.html

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 19:15:59 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 19:15:59 +0100
Subject: [flashrom] [PATCH] Reenable forced read
Message-ID: <4F3D47DF.30409@gmx.net>

Forced read functionality was disabled when programmer registration was
merged in r.

We now support registering more than one controller at once for each bus
type. This can happen e.g. if one SPI controller has an attached flash
chip and one controller doesn't. In such a case we rely on the probe
mechanism to find exactly one chip, and the probe mechanism will
remember which controller/bus the flash chip is attached to. A forced
read does not have the luxury of knowing which compatible controller to
use, so this case is handled by always picking the first one. That may
or may not be the correct one, but there is no way (yet) to specify
which controller a flash chip is attached to.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-forced_read_reenable/cli_classic.c
===================================================================
--- flashrom-forced_read_reenable/cli_classic.c	(Revision 1495)
+++ flashrom-forced_read_reenable/cli_classic.c	(Arbeitskopie)
@@ -456,11 +456,27 @@
 			printf("Note: flashrom can never write if the flash "
 			       "chip isn't found automatically.\n");
 		}
-#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered?
 		if (force && read_it && chip_to_probe) {
+			struct registered_programmer *pgm;
+			int compatible_programmers = 0;
 			printf("Force read (-f -r -c) requested, pretending "
 			       "the chip is there:\n");
-			startchip = probe_flash(0, &flashes[0], 1);
+			/* This loop just counts compatible controllers. */
+			for (j = 0; j < registered_programmer_count; j++) {
+				pgm = &registered_programmers[j];
+				if (pgm->buses_supported & flashes[0].bustype)
+					compatible_programmers++;
+			}
+			if (compatible_programmers > 1)
+				printf("More than one compatible controller "
+				       "found for the requested flash chip, "
+				       "using the first one.\n");
+			for (j = 0; j < registered_programmer_count; j++) {
+				pgm = &registered_programmers[j];
+				startchip = probe_flash(pgm, 0, &flashes[0], 1);
+				if (startchip != -1)
+					break;
+			}
 			if (startchip == -1) {
 				printf("Probing for flash chip '%s' failed.\n",
 				       chip_to_probe);
@@ -471,7 +487,6 @@
 			       "contain garbage.\n");
 			return read_flash_to_file(&flashes[0], filename);
 		}
-#endif
 		ret = 1;
 		goto out_shutdown;
 	} else if (!chip_to_probe) {


-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 19:56:25 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 19:56:25 +0100
Subject: [flashrom] [PATCH] Document and enable the linux_spi driver
Message-ID: <4F3D5159.4030705@gmx.net>

The linux_spi driver is now enabled by default on Linux.
A man page entry and a line in --list-supported output have been added.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-linux_spi_documentation/Makefile
===================================================================
--- flashrom-linux_spi_documentation/Makefile	(Revision 1495)
+++ flashrom-linux_spi_documentation/Makefile	(Arbeitskopie)
@@ -209,6 +209,14 @@
 endif
 endif
 
+ifneq ($(TARGET_OS), Linux)
+ifeq ($(CONFIG_LINUX_SPI), yes)
+UNSUPPORTED_FEATURES += CONFIG_LINUX_SPI=yes
+else
+override CONFIG_LINUX_SPI = no
+endif
+endif
+
 # Determine the destination processor architecture.
 # IMPORTANT: The following line must be placed before ARCH is ever used
 # (of course), but should come after any lines setting CC because the line
@@ -324,16 +332,15 @@
 # Always enable Bus Pirate SPI for now.
 CONFIG_BUSPIRATE_SPI ?= yes
 
-# Disable Linux spidev interface support for now, until we check for a Linux
-# device (not host, as DOS binaries for example are built on a Linux host).
-CONFIG_LINUX_SPI ?= no
-
 # Disable Dediprog SF100 until support is complete and tested.
 CONFIG_DEDIPROG ?= no
 
 # Always enable Marvell SATA controllers for now.
 CONFIG_SATAMV ?= yes
 
+# Enable Linux spidev interface by default. We disable it on non-Linux targets.
+CONFIG_LINUX_SPI ?= yes
+
 # Disable wiki printing by default. It is only useful if you have wiki access.
 CONFIG_PRINT_WIKI ?= no
 
@@ -465,11 +472,6 @@
 NEED_SERIAL := yes
 endif
 
-ifeq ($(CONFIG_LINUX_SPI), yes)
-FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1'
-PROGRAMMER_OBJS += linux_spi.o
-endif
-
 ifeq ($(CONFIG_DEDIPROG), yes)
 FEATURE_CFLAGS += -D'CONFIG_DEDIPROG=1'
 FEATURE_LIBS += -lusb
@@ -482,6 +484,11 @@
 NEED_PCI := yes
 endif
 
+ifeq ($(CONFIG_LINUX_SPI), yes)
+FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1'
+PROGRAMMER_OBJS += linux_spi.o
+endif
+
 ifeq ($(NEED_SERIAL), yes)
 LIB_OBJS += serial.o
 endif
Index: flashrom-linux_spi_documentation/flashrom.8
===================================================================
--- flashrom-linux_spi_documentation/flashrom.8	(Revision 1495)
+++ flashrom-linux_spi_documentation/flashrom.8	(Arbeitskopie)
@@ -205,6 +205,8 @@
 .sp
 .BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
 .sp
+.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
+.sp
 Some programmers have optional or mandatory parameters which are described
 in detail in the
 .B PROGRAMMER SPECIFIC INFO
@@ -607,6 +609,17 @@
 .sp
 More information about the hardware is available at
 .BR http://wiki.opengraphics.org .
+.TP
+.BR "linux_spi " programmer
+You have to specify the SPI controller to use with the
+.sp
+.B "  flashrom \-p linux_spi:dev=/dev/spidevX.Y"
+.sp
+syntax where
+.B /dev/spidevX.Y
+is the Linux device node for your SPI controller.
+.sp
+Please note that the linux_spi driver only works on Linux.
 .SH EXIT STATUS
 flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
 (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
Index: flashrom-linux_spi_documentation/print.c
===================================================================
--- flashrom-linux_spi_documentation/print.c	(Revision 1495)
+++ flashrom-linux_spi_documentation/print.c	(Arbeitskopie)
@@ -527,6 +527,11 @@
 	       programmer_table[PROGRAMMER_SATAMV].name);
 	print_supported_pcidevs(satas_mv);
 #endif
+#if CONFIG_LINUX_SPI == 1
+	msg_ginfo("\nSupported devices for the %s programmer:\n",
+	       programmer_table[PROGRAMMER_LINUX_SPI].name);
+	msg_ginfo("Device files /dev/spidev*.*\n");
+#endif
 }
 
 #if CONFIG_INTERNAL == 1


-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 20:08:13 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 20:08:13 +0100
Subject: [flashrom] [PATCH] Reenable forced read (stefanct's version)
In-Reply-To: <4F3D47DF.30409@gmx.net>
References: <4F3D47DF.30409@gmx.net>
Message-ID: <1329419293-6344-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

what about something like this?
single loop, more obvious(?) execution flow
printf is misaligned, but you get the idea.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---

 cli_classic.c |   19 ++++++++++++++++---
 1 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/cli_classic.c b/cli_classic.c
index 7661612..df1f668 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -456,11 +456,25 @@ int main(int argc, char *argv[])
 			printf("Note: flashrom can never write if the flash "
 			       "chip isn't found automatically.\n");
 		}
-#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered?
 		if (force && read_it && chip_to_probe) {
+			struct registered_programmer *pgm;
+			struct registered_programmer *first_pgm = NULL;
 			printf("Force read (-f -r -c) requested, pretending "
 			       "the chip is there:\n");
-			startchip = probe_flash(0, &flashes[0], 1);
+			for (j = 0; j < registered_programmer_count; j++) {
+				pgm = &registered_programmers[j];
+				if (pgm->buses_supported & flashes[0].bustype) {
+					if (first_pgm == NULL)
+						first_pgm = pgm;
+					else {
+				printf("More than one compatible controller "
+				       "found for the requested flash chip, "
+				       "using the first one.\n");
+					break;
+					}
+				}
+			}
+			startchip = probe_flash(first_pgm, 0, &flashes[0], 1);
 			if (startchip == -1) {
 				printf("Probing for flash chip '%s' failed.\n",
 				       chip_to_probe);
@@ -471,7 +485,6 @@ int main(int argc, char *argv[])
 			       "contain garbage.\n");
 			return read_flash_to_file(&flashes[0], filename);
 		}
-#endif
 		ret = 1;
 		goto out_shutdown;
 	} else if (!chip_to_probe) {
-- 
1.7.1



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 21:18:06 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 21:18:06 +0100
Subject: [flashrom] [PATCH] Reenable forced read
In-Reply-To: <4F3D47DF.30409@gmx.net>
References: <4F3D47DF.30409@gmx.net>
Message-ID: <4F3D647E.3050804@gmx.net>

Am 16.02.2012 19:15 schrieb Carl-Daniel Hailfinger:
> Forced read functionality was disabled when programmer registration was
> merged in r.
>
> We now support registering more than one controller at once for each bus
> type. This can happen e.g. if one SPI controller has an attached flash
> chip and one controller doesn't. In such a case we rely on the probe
> mechanism to find exactly one chip, and the probe mechanism will
> remember which controller/bus the flash chip is attached to. A forced
> read does not have the luxury of knowing which compatible controller to
> use, so this case is handled by always picking the first one. That may
> or may not be the correct one, but there is no way (yet) to specify
> which controller a flash chip is attached to.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-forced_read_reenable/cli_classic.c
===================================================================
--- flashrom-forced_read_reenable/cli_classic.c	(Revision 1495)
+++ flashrom-forced_read_reenable/cli_classic.c	(Arbeitskopie)
@@ -168,7 +168,7 @@
 	struct flashctx *fill_flash;
 	const char *name;
 	int namelen, opt, i, j;
-	int startchip = 0, chipcount = 0, option_index = 0, force = 0;
+	int startchip = -1, chipcount = 0, option_index = 0, force = 0;
 #if CONFIG_PRINT_WIKI == 1
 	int list_supported_wiki = 0;
 #endif
@@ -456,11 +456,27 @@
 			printf("Note: flashrom can never write if the flash "
 			       "chip isn't found automatically.\n");
 		}
-#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered?
 		if (force && read_it && chip_to_probe) {
+			struct registered_programmer *pgm;
+			int compatible_programmers = 0;
 			printf("Force read (-f -r -c) requested, pretending "
 			       "the chip is there:\n");
-			startchip = probe_flash(0, &flashes[0], 1);
+			/* This loop just counts compatible controllers. */
+			for (j = 0; j < registered_programmer_count; j++) {
+				pgm = &registered_programmers[j];
+				if (pgm->buses_supported & flashes[0].bustype)
+					compatible_programmers++;
+			}
+			if (compatible_programmers > 1)
+				printf("More than one compatible controller "
+				       "found for the requested flash chip, "
+				       "using the first one.\n");
+			for (j = 0; j < registered_programmer_count; j++) {
+				pgm = &registered_programmers[j];
+				startchip = probe_flash(pgm, 0, &flashes[0], 1);
+				if (startchip != -1)
+					break;
+			}
 			if (startchip == -1) {
 				printf("Probing for flash chip '%s' failed.\n",
 				       chip_to_probe);
@@ -471,7 +487,6 @@
 			       "contain garbage.\n");
 			return read_flash_to_file(&flashes[0], filename);
 		}
-#endif
 		ret = 1;
 		goto out_shutdown;
 	} else if (!chip_to_probe) {


-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 21:24:17 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 21:24:17 +0100
Subject: [flashrom] [PATCH] Reenable forced read
In-Reply-To: <4F3D647E.3050804@gmx.net>
References: <4F3D47DF.30409@gmx.net>
	<4F3D647E.3050804@gmx.net>
Message-ID: <201202162023.q1GKNZ9G007535@mail2.student.tuwien.ac.at>

On Thu, 16 Feb 2012 21:18:06 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 16.02.2012 19:15 schrieb Carl-Daniel Hailfinger:
> > Forced read functionality was disabled when programmer registration was
> > merged in r.
> >
> > We now support registering more than one controller at once for each bus
> > type. This can happen e.g. if one SPI controller has an attached flash
> > chip and one controller doesn't. In such a case we rely on the probe
> > mechanism to find exactly one chip, and the probe mechanism will
> > remember which controller/bus the flash chip is attached to. A forced
> > read does not have the luxury of knowing which compatible controller to
> > use, so this case is handled by always picking the first one. That may
> > or may not be the correct one, but there is no way (yet) to specify
> > which controller a flash chip is attached to.
> >
> > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

as discussed on IRC this one does not segfault when there are no
registered programmers, hence
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Thu Feb 16 21:31:27 2012
From: svn at flashrom.org (repository service)
Date: Thu, 16 Feb 2012 21:31:27 +0100
Subject: [flashrom] [commit] r1496 - trunk
Message-ID: <E1Ry7zD-0001zV-O5@ra.coresystems.de>

Author: hailfinger
Date: Thu Feb 16 21:31:25 2012
New Revision: 1496
URL: http://flashrom.org/trac/flashrom/changeset/1496

Log:
Reenable forced read

Forced read functionality was disabled when programmer registration was
merged in r1475.

We now support registering more than one controller at once for each bus
type. This can happen e.g. if one SPI controller has an attached flash
chip and one controller doesn't. In such a case we rely on the probe
mechanism to find exactly one chip, and the probe mechanism will
remember which controller/bus the flash chip is attached to. A forced
read does not have the luxury of knowing which compatible controller to
use, so this case is handled by always picking the first one. That may
or may not be the correct one, but there is no way (yet) to specify
which controller a flash chip is attached to.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/cli_classic.c

Modified: trunk/cli_classic.c
==============================================================================
--- trunk/cli_classic.c	Thu Feb 16 02:43:06 2012	(r1495)
+++ trunk/cli_classic.c	Thu Feb 16 21:31:25 2012	(r1496)
@@ -168,7 +168,7 @@
 	struct flashctx *fill_flash;
 	const char *name;
 	int namelen, opt, i, j;
-	int startchip = 0, chipcount = 0, option_index = 0, force = 0;
+	int startchip = -1, chipcount = 0, option_index = 0, force = 0;
 #if CONFIG_PRINT_WIKI == 1
 	int list_supported_wiki = 0;
 #endif
@@ -456,11 +456,27 @@
 			printf("Note: flashrom can never write if the flash "
 			       "chip isn't found automatically.\n");
 		}
-#if 0 // FIXME: What happens for a forced chip read if multiple compatible programmers are registered?
 		if (force && read_it && chip_to_probe) {
+			struct registered_programmer *pgm;
+			int compatible_programmers = 0;
 			printf("Force read (-f -r -c) requested, pretending "
 			       "the chip is there:\n");
-			startchip = probe_flash(0, &flashes[0], 1);
+			/* This loop just counts compatible controllers. */
+			for (j = 0; j < registered_programmer_count; j++) {
+				pgm = &registered_programmers[j];
+				if (pgm->buses_supported & flashes[0].bustype)
+					compatible_programmers++;
+			}
+			if (compatible_programmers > 1)
+				printf("More than one compatible controller "
+				       "found for the requested flash chip, "
+				       "using the first one.\n");
+			for (j = 0; j < registered_programmer_count; j++) {
+				pgm = &registered_programmers[j];
+				startchip = probe_flash(pgm, 0, &flashes[0], 1);
+				if (startchip != -1)
+					break;
+			}
 			if (startchip == -1) {
 				printf("Probing for flash chip '%s' failed.\n",
 				       chip_to_probe);
@@ -471,7 +487,6 @@
 			       "contain garbage.\n");
 			return read_flash_to_file(&flashes[0], filename);
 		}
-#endif
 		ret = 1;
 		goto out_shutdown;
 	} else if (!chip_to_probe) {


From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 21:44:41 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 21:44:41 +0100
Subject: [flashrom] [PATCH] Manpage improvements.
In-Reply-To: <1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329425081-9878-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

The sections describing the various options of the internal and dummy
programmers have grown out of proportions. This patch adds some headlines
to devide the unrelated topics a bit (with .TP commands). The previous indented
paragraphs for the various programmers were transformed to subsections (.SS).

Also, rephrase the documention related to laptops completely to make it
less redundant and more informative.
Document the laptop=this_is_not_a_laptop internal programmer parameter

Change the contact info in the bugs section by removing the trac
reference and adding IRC (and the pastebin) instead.

Remove some superfluous white space.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.8 |  111 +++++++++++++++++++++++++++++++++++++++++------------------
 1 files changed, 77 insertions(+), 34 deletions(-)

diff --git a/flashrom.8 b/flashrom.8
index 76aacba..782f30b 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -1,4 +1,4 @@
-.TH FLASHROM 8 "Jul 25, 2011"
+.TH FLASHROM 8 "Feb 15, 2012"
 .SH NAME
 flashrom \- detect, read, write, verify and erase flash chips
 .SH SYNOPSIS
@@ -223,8 +223,11 @@ parameters. These parameters are separated from the programmer name by a
 colon. While some programmers take arguments at fixed positions, other
 programmers use a key/value interface in which the key and value is separated
 by an equal sign and different pairs are separated by a comma or a colon.
-.TP
+.SS
 .BR "internal " programmer
+.TP
+.B Board Enables
+.sp
 Some mainboards require to run mainboard specific code to enable flash erase
 and write support (and probe support on old systems with parallel flash).
 The mainboard brand and model (if it requires specific code) is usually
@@ -275,17 +278,22 @@ has been written because it is known that writing/erasing without the board
 enable is going to fail. In any case (success or failure), please report to
 the flashrom mailing list, see below.
 .sp
+.TP
+.B Coreboot
+.sp
 On systems running coreboot, flashrom checks whether the desired image matches
 your mainboard. This needs some special board ID to be present in the image.
 If flashrom detects that the image you want to write and the current board
 do not match, it will refuse to write the image unless you specify
 .sp
 .B "  flashrom \-p internal:boardmismatch=force"
+.TP
+.B ITE IT87 Super I/O
 .sp
 If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
 translation, flashrom should autodetect that configuration. If you want to
 set the I/O base port of the IT87 series SPI controller manually instead of
-using the value provided by the BIOS, use the 
+using the value provided by the BIOS, use the
 .sp
 .B "  flashrom \-p internal:it87spiport=portnum"
 .sp
@@ -295,6 +303,9 @@ is the I/O port number (must be a multiple of 8). In the unlikely case
 flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
 report so we can diagnose the problem.
 .sp
+.TP
+.B Intel chipsets
+.sp
 If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
 attached, and if a valid descriptor was written to it (e.g. by the vendor), the
 chipset provides an alternative way to access the flash chip(s) named
@@ -346,6 +357,8 @@ settings. The default value for ICH7 is given in the example below.
 .sp
 Example:
 .B "flashrom \-p internal:fwh_idsel=0x001122334567"
+.TP
+.B Laptops
 .sp
 Using flashrom on laptops is dangerous and may easily make your hardware
 unusable (see also the
@@ -353,21 +366,31 @@ unusable (see also the
 section). The embedded controller (EC) in these
 machines often interacts badly with flashing.
 .B http://www.flashrom.org/Laptops
-has more information. If flash is shared with the EC, erase is guaranteed to
-brick your laptop and write is very likely to brick your laptop.
-Chip read and probe may irritate your EC and cause fan failure, backlight
-failure, sudden poweroff, and other nasty effects.
-flashrom will attempt to detect laptops and abort immediately for safety
-reasons.
-If you want to proceed anyway at your own risk, use
+has more information. For example the EC firmware sometimes resides on the same
+flash chip as the host firmware. While flashrom tries to change the contents of
+that memory the EC might need to fetch new instructions or data from it and
+could stop working correctly. Probing for and reading from the chip may also
+irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
+other nasty effects. flashrom will attempt to detect if it is running on a
+laptop and abort immediately for safety reasons if it clearly identifies the
+host computer as one. If you want to proceed anyway at your own risk, use
 .sp
 .B "  flashrom \-p internal:laptop=force_I_want_a_brick"
 .sp
-You have been warned.
-.sp
 We will not help you if you force flashing on a laptop because this is a really
 dumb idea.
-.TP
+.sp
+You have been warned.
+.sp
+Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
+laptops. Some vendors did not implement those bits correctly or set them to
+generic and/or dummy values. flashrom will then issue a warning and bail out
+like above. In this case you can use
+.sp
+.B "  flashrom \-p internal:laptop=this_is_not_a_laptop"
+.sp
+to tell flashrom (at your own risk) that it does not running on a laptop.
+.SS
 .BR "dummy " programmer
 The dummy programmer operates on a buffer in memory only. It provides a safe
 and fast way to test various aspects of flashrom and is mainly used in
@@ -409,6 +432,8 @@ vendor):
 .sp
 Example:
 .B "flashrom -p dummy:emulate=SST25VF040.REMS"
+.TP
+.B Persistent images
 .sp
 If you use flash chip emulation, flash image persistence is available as well
 by using the
@@ -422,6 +447,8 @@ where the chip contents on flashrom shutdown are written to.
 .sp
 Example:
 .B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
+.TP
+.B SPI write chunk size
 .sp
 If you use SPI flash chip emulation for a chip which supports SPI page write
 with the default opcode, you can set the maximum allowed write chunk size with
@@ -436,6 +463,8 @@ is the number of bytes (min. 1, max. 256).
 Example:
 .sp
 .B "  flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
+.TP
+.B SPI blacklist
 .sp
 To simulate a programmer which refuses to send certain SPI commands to the
 flash chip, you can specify a blacklist of SPI commands with the
@@ -448,6 +477,9 @@ controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
 commandlist may be up to 512 characters (256 commands) long.
 Implementation note: flashrom will detect an error during command execution.
 .sp
+.TP
+.B SPI ignorelist
+.sp
 To simulate a flash chip which ignores (doesn't support) certain SPI commands,
 you can specify an ignorelist of SPI commands with the
 .sp
@@ -458,7 +490,7 @@ SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
 command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to 512
 characters (256 commands) long.
 Implementation note: flashrom won't detect an error during command execution.
-.TP
+.SS
 .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
 " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\
 " , " satamv" ", and " atahpt " programmers
@@ -480,7 +512,7 @@ is the PCI function number of the desired device.
 .sp
 Example:
 .B "flashrom \-p nic3com:pci=05:04.0"
-.TP
+.SS
 .BR "ft2232_spi " programmer
 An optional parameter specifies the controller
 type and interface/port it should support. For that you have to use the
@@ -501,7 +533,7 @@ The default model is
 .B 4232H
 and the default interface is
 .BR B .
-.TP
+.SS
 .BR "serprog " programmer
 A mandatory parameter specifies either a serial
 device/baud combination or an IP/port combination for communication with the
@@ -517,7 +549,7 @@ syntax and for IP, you have to use
 instead. More information about serprog is available in
 .B serprog-protocol.txt
 in the source distribution.
-.TP
+.SS
 .BR "buspirate_spi " programmer
 A required
 .B dev
@@ -533,7 +565,7 @@ where
 can be
 .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
 (in Hz). The default is the maximum frequency of 8 MHz.
-.TP
+.SS
 .BR "dediprog " programmer
 An optional
 .B voltage
@@ -549,7 +581,7 @@ where
 can be
 .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
 or the equivalent in mV.
-.TP
+.SS
 .BR "rayer_spi " programmer
 The default I/O base address used for the parallel port is 0x378 and you can use
 the optional
@@ -579,9 +611,9 @@ More information about the RayeR hardware is available at
 .BR "http://rayer.ic.cz/elektro/spipgm.htm " .
 The schematic of the Xilinx DLC 5 was published at
 .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
-.TP
+.SS
 .BR "ogp_spi " programmer
-The flash ROM chip to access must be specified with the 
+The flash ROM chip to access must be specified with the
 .B rom
 parameter.
 .sp
@@ -665,25 +697,37 @@ in
 .B "/etc/rc.securelevel"
 and rebooting, or rebooting into single user mode.
 .SH BUGS
-Please report any bugs at
-.sp
-.B "  http://www.flashrom.org/trac/flashrom/newticket"
-.sp
-or on the flashrom mailing list at
+Please report any bugs to the flashrom mailing list at
 .B "<flashrom at flashrom.org>"
 .sp
 We recommend to subscribe first at
 .sp
 .B "  http://www.flashrom.org/mailman/listinfo/flashrom"
 .sp
-Using flashrom on laptops is dangerous and may easily make your hardware
-unusable unless you can desolder the flash chip and have a full flash chip
-backup. This is caused by the embedded controller (EC) present in many laptops,
-which interacts badly with any flash attempts. This is a hardware limitation
-and flashrom will attempt to detect it and abort immediately for safety reasons.
-.sp
-More information about flashrom on laptops is available from
+Many of the developers communicate via the
+.B "#flashrom"
+IRC channel on
+.BR chat.freenode.net .
+You are welcome to join and ask questions, send us bug and success reports there
+too. Please provide a way to contact you later (e.g. a mail address) and be
+patient if there is no immediate reaction. Also, we provide a pastebin service
+at
+.B http://paste.flashrom.org
+that is very useful when you want to share logs etc. without spamming the
+channel.
+.SS
+.B Laptops
 .sp
+Using flashrom on laptops is dangerous and may easily make your hardware
+unusable. flashrom will attempt to detect if it is running on a laptop and abort
+immediately for safety reasons. Please see the detailed discussion of this topic
+and associated flashrom options in the
+.B Laptops
+paragraph in the
+.B internal programmer
+subsection of the
+.B PROGRAMMER SPECIFIC INFO
+section.
 .B "  http://www.flashrom.org/Laptops"
 .SS
 One-time programmable (OTP) memory and unique IDs
@@ -697,7 +741,6 @@ printed when they are detected.
 .sp
 Similar to OTP memories are unique, factory programmed, unforgeable IDs.
 They are not modifiable by the user at all.
-.RE
 .SH LICENSE
 .B flashrom
 is covered by the GNU General Public License (GPL), version 2. Some files are
-- 
1.7.1



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 21:53:24 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 21:53:24 +0100
Subject: [flashrom] [PATCH] Manpage improvements.
In-Reply-To: <1329425081-9878-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329425081-9878-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F3D6CC4.9010700@gmx.net>

Am 16.02.2012 21:44 schrieb Stefan Tauner:
> The sections describing the various options of the internal and dummy
> programmers have grown out of proportions. This patch adds some headlines
> to devide the unrelated topics a bit (with .TP commands). The previous indented
> paragraphs for the various programmers were transformed to subsections (.SS).
>
> Also, rephrase the documention related to laptops completely to make it
> less redundant and more informative.
> Document the laptop=this_is_not_a_laptop internal programmer parameter
>
> Change the contact info in the bugs section by removing the trac
> reference and adding IRC (and the pastebin) instead.
>
> Remove some superfluous white space.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From svn at flashrom.org  Thu Feb 16 21:55:31 2012
From: svn at flashrom.org (repository service)
Date: Thu, 16 Feb 2012 21:55:31 +0100
Subject: [flashrom] [commit] r1497 - trunk
Message-ID: <E1Ry8MV-00041B-FL@ra.coresystems.de>

Author: stefanct
Date: Thu Feb 16 21:55:27 2012
New Revision: 1497
URL: http://flashrom.org/trac/flashrom/changeset/1497

Log:
Manpage improvements.

The sections describing the various options of the internal and dummy
programmers have grown out of proportions. This patch adds some headlines
to devide the unrelated topics a bit (with .TP commands). The previous indented
paragraphs for the various programmers were transformed to subsections (.SS).

Also, rephrase the documention related to laptops completely to make it
less redundant and more informative.
Document the laptop=this_is_not_a_laptop internal programmer parameter

Change the contact info in the bugs section by removing the trac
reference and adding IRC (and the pastebin) instead.

Remove some superfluous white space and a .RE (restore indentation) command.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/flashrom.8

Modified: trunk/flashrom.8
==============================================================================
--- trunk/flashrom.8	Thu Feb 16 21:31:25 2012	(r1496)
+++ trunk/flashrom.8	Thu Feb 16 21:55:27 2012	(r1497)
@@ -1,4 +1,4 @@
-.TH FLASHROM 8 "Jul 25, 2011"
+.TH FLASHROM 8 "Feb 15, 2012"
 .SH NAME
 flashrom \- detect, read, write, verify and erase flash chips
 .SH SYNOPSIS
@@ -223,8 +223,11 @@
 colon. While some programmers take arguments at fixed positions, other
 programmers use a key/value interface in which the key and value is separated
 by an equal sign and different pairs are separated by a comma or a colon.
-.TP
+.SS
 .BR "internal " programmer
+.TP
+.B Board Enables
+.sp
 Some mainboards require to run mainboard specific code to enable flash erase
 and write support (and probe support on old systems with parallel flash).
 The mainboard brand and model (if it requires specific code) is usually
@@ -275,17 +278,22 @@
 enable is going to fail. In any case (success or failure), please report to
 the flashrom mailing list, see below.
 .sp
+.TP
+.B Coreboot
+.sp
 On systems running coreboot, flashrom checks whether the desired image matches
 your mainboard. This needs some special board ID to be present in the image.
 If flashrom detects that the image you want to write and the current board
 do not match, it will refuse to write the image unless you specify
 .sp
 .B "  flashrom \-p internal:boardmismatch=force"
+.TP
+.B ITE IT87 Super I/O
 .sp
 If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
 translation, flashrom should autodetect that configuration. If you want to
 set the I/O base port of the IT87 series SPI controller manually instead of
-using the value provided by the BIOS, use the 
+using the value provided by the BIOS, use the
 .sp
 .B "  flashrom \-p internal:it87spiport=portnum"
 .sp
@@ -295,6 +303,9 @@
 flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
 report so we can diagnose the problem.
 .sp
+.TP
+.B Intel chipsets
+.sp
 If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
 attached, and if a valid descriptor was written to it (e.g. by the vendor), the
 chipset provides an alternative way to access the flash chip(s) named
@@ -346,6 +357,8 @@
 .sp
 Example:
 .B "flashrom \-p internal:fwh_idsel=0x001122334567"
+.TP
+.B Laptops
 .sp
 Using flashrom on laptops is dangerous and may easily make your hardware
 unusable (see also the
@@ -353,21 +366,31 @@
 section). The embedded controller (EC) in these
 machines often interacts badly with flashing.
 .B http://www.flashrom.org/Laptops
-has more information. If flash is shared with the EC, erase is guaranteed to
-brick your laptop and write is very likely to brick your laptop.
-Chip read and probe may irritate your EC and cause fan failure, backlight
-failure, sudden poweroff, and other nasty effects.
-flashrom will attempt to detect laptops and abort immediately for safety
-reasons.
-If you want to proceed anyway at your own risk, use
+has more information. For example the EC firmware sometimes resides on the same
+flash chip as the host firmware. While flashrom tries to change the contents of
+that memory the EC might need to fetch new instructions or data from it and
+could stop working correctly. Probing for and reading from the chip may also
+irritate your EC and cause fan failure, backlight failure, sudden poweroff, and
+other nasty effects. flashrom will attempt to detect if it is running on a
+laptop and abort immediately for safety reasons if it clearly identifies the
+host computer as one. If you want to proceed anyway at your own risk, use
 .sp
 .B "  flashrom \-p internal:laptop=force_I_want_a_brick"
 .sp
-You have been warned.
-.sp
 We will not help you if you force flashing on a laptop because this is a really
 dumb idea.
-.TP
+.sp
+You have been warned.
+.sp
+Currently we rely on the chassis type encoded in the DMI/SMBIOS data to detect
+laptops. Some vendors did not implement those bits correctly or set them to
+generic and/or dummy values. flashrom will then issue a warning and bail out
+like above. In this case you can use
+.sp
+.B "  flashrom \-p internal:laptop=this_is_not_a_laptop"
+.sp
+to tell flashrom (at your own risk) that it does not running on a laptop.
+.SS
 .BR "dummy " programmer
 The dummy programmer operates on a buffer in memory only. It provides a safe
 and fast way to test various aspects of flashrom and is mainly used in
@@ -409,6 +432,8 @@
 .sp
 Example:
 .B "flashrom -p dummy:emulate=SST25VF040.REMS"
+.TP
+.B Persistent images
 .sp
 If you use flash chip emulation, flash image persistence is available as well
 by using the
@@ -422,6 +447,8 @@
 .sp
 Example:
 .B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
+.TP
+.B SPI write chunk size
 .sp
 If you use SPI flash chip emulation for a chip which supports SPI page write
 with the default opcode, you can set the maximum allowed write chunk size with
@@ -436,6 +463,8 @@
 Example:
 .sp
 .B "  flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
+.TP
+.B SPI blacklist
 .sp
 To simulate a programmer which refuses to send certain SPI commands to the
 flash chip, you can specify a blacklist of SPI commands with the
@@ -448,6 +477,9 @@
 commandlist may be up to 512 characters (256 commands) long.
 Implementation note: flashrom will detect an error during command execution.
 .sp
+.TP
+.B SPI ignorelist
+.sp
 To simulate a flash chip which ignores (doesn't support) certain SPI commands,
 you can specify an ignorelist of SPI commands with the
 .sp
@@ -458,7 +490,7 @@
 command 0x03 (READ) and command 0x02 (WRITE).  commandlist may be up to 512
 characters (256 commands) long.
 Implementation note: flashrom won't detect an error during command execution.
-.TP
+.SS
 .BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
 " , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\
 " , " satamv" ", and " atahpt " programmers
@@ -480,7 +512,7 @@
 .sp
 Example:
 .B "flashrom \-p nic3com:pci=05:04.0"
-.TP
+.SS
 .BR "ft2232_spi " programmer
 An optional parameter specifies the controller
 type and interface/port it should support. For that you have to use the
@@ -501,7 +533,7 @@
 .B 4232H
 and the default interface is
 .BR B .
-.TP
+.SS
 .BR "serprog " programmer
 A mandatory parameter specifies either a serial
 device/baud combination or an IP/port combination for communication with the
@@ -517,7 +549,7 @@
 instead. More information about serprog is available in
 .B serprog-protocol.txt
 in the source distribution.
-.TP
+.SS
 .BR "buspirate_spi " programmer
 A required
 .B dev
@@ -533,7 +565,7 @@
 can be
 .BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
 (in Hz). The default is the maximum frequency of 8 MHz.
-.TP
+.SS
 .BR "dediprog " programmer
 An optional
 .B voltage
@@ -549,7 +581,7 @@
 can be
 .BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
 or the equivalent in mV.
-.TP
+.SS
 .BR "rayer_spi " programmer
 The default I/O base address used for the parallel port is 0x378 and you can use
 the optional
@@ -579,9 +611,9 @@
 .BR "http://rayer.ic.cz/elektro/spipgm.htm " .
 The schematic of the Xilinx DLC 5 was published at
 .BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
-.TP
+.SS
 .BR "ogp_spi " programmer
-The flash ROM chip to access must be specified with the 
+The flash ROM chip to access must be specified with the
 .B rom
 parameter.
 .sp
@@ -665,25 +697,37 @@
 .B "/etc/rc.securelevel"
 and rebooting, or rebooting into single user mode.
 .SH BUGS
-Please report any bugs at
-.sp
-.B "  http://www.flashrom.org/trac/flashrom/newticket"
-.sp
-or on the flashrom mailing list at
+Please report any bugs to the flashrom mailing list at
 .B "<flashrom at flashrom.org>"
 .sp
 We recommend to subscribe first at
 .sp
 .B "  http://www.flashrom.org/mailman/listinfo/flashrom"
 .sp
-Using flashrom on laptops is dangerous and may easily make your hardware
-unusable unless you can desolder the flash chip and have a full flash chip
-backup. This is caused by the embedded controller (EC) present in many laptops,
-which interacts badly with any flash attempts. This is a hardware limitation
-and flashrom will attempt to detect it and abort immediately for safety reasons.
-.sp
-More information about flashrom on laptops is available from
+Many of the developers communicate via the
+.B "#flashrom"
+IRC channel on
+.BR chat.freenode.net .
+You are welcome to join and ask questions, send us bug and success reports there
+too. Please provide a way to contact you later (e.g. a mail address) and be
+patient if there is no immediate reaction. Also, we provide a pastebin service
+at
+.B http://paste.flashrom.org
+that is very useful when you want to share logs etc. without spamming the
+channel.
+.SS
+.B Laptops
 .sp
+Using flashrom on laptops is dangerous and may easily make your hardware
+unusable. flashrom will attempt to detect if it is running on a laptop and abort
+immediately for safety reasons. Please see the detailed discussion of this topic
+and associated flashrom options in the
+.B Laptops
+paragraph in the
+.B internal programmer
+subsection of the
+.B PROGRAMMER SPECIFIC INFO
+section.
 .B "  http://www.flashrom.org/Laptops"
 .SS
 One-time programmable (OTP) memory and unique IDs
@@ -697,7 +741,6 @@
 .sp
 Similar to OTP memories are unique, factory programmed, unforgeable IDs.
 They are not modifiable by the user at all.
-.RE
 .SH LICENSE
 .B flashrom
 is covered by the GNU General Public License (GPL), version 2. Some files are


From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 21:59:44 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 21:59:44 +0100
Subject: [flashrom] [PATCH] Document and enable the linux_spi driver
In-Reply-To: <4F3D5159.4030705@gmx.net>
References: <4F3D5159.4030705@gmx.net>
Message-ID: <201202162059.q1GKx2ah005850@mail2.student.tuwien.ac.at>

On Thu, 16 Feb 2012 19:56:25 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> The linux_spi driver is now enabled by default on Linux.
> A man page entry and a line in --list-supported output have been added.
> 
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> 
> [?]
> Index: flashrom-linux_spi_documentation/flashrom.8
> ===================================================================
> --- flashrom-linux_spi_documentation/flashrom.8	(Revision 1495)
> +++ flashrom-linux_spi_documentation/flashrom.8	(Arbeitskopie)
> @@ -205,6 +205,8 @@
>  .sp
>  .BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
>  .sp
> +.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
> +.sp
>  Some programmers have optional or mandatory parameters which are described
>  in detail in the
>  .B PROGRAMMER SPECIFIC INFO
> @@ -607,6 +609,17 @@
>  .sp
>  More information about the hardware is available at
>  .BR http://wiki.opengraphics.org .
> +.TP

with -.TP+.SS
this is
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>


-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 21:59:20 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 21:59:20 +0100
Subject: [flashrom] [PATCH] Document and enable the linux_spi driver
In-Reply-To: <4F3D5159.4030705@gmx.net>
References: <4F3D5159.4030705@gmx.net>
Message-ID: <4F3D6E28.3010300@gmx.net>

Am 16.02.2012 19:56 schrieb Carl-Daniel Hailfinger:
> The linux_spi driver is now enabled by default on Linux.
> A man page entry and a line in --list-supported output have been added.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

New version, adapted to new man page formatting.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-linux_spi_documentation/Makefile
===================================================================
--- flashrom-linux_spi_documentation/Makefile	(Revision 1497)
+++ flashrom-linux_spi_documentation/Makefile	(Arbeitskopie)
@@ -209,6 +209,14 @@
 endif
 endif
 
+ifneq ($(TARGET_OS), Linux)
+ifeq ($(CONFIG_LINUX_SPI), yes)
+UNSUPPORTED_FEATURES += CONFIG_LINUX_SPI=yes
+else
+override CONFIG_LINUX_SPI = no
+endif
+endif
+
 # Determine the destination processor architecture.
 # IMPORTANT: The following line must be placed before ARCH is ever used
 # (of course), but should come after any lines setting CC because the line
@@ -324,16 +332,15 @@
 # Always enable Bus Pirate SPI for now.
 CONFIG_BUSPIRATE_SPI ?= yes
 
-# Disable Linux spidev interface support for now, until we check for a Linux
-# device (not host, as DOS binaries for example are built on a Linux host).
-CONFIG_LINUX_SPI ?= no
-
 # Disable Dediprog SF100 until support is complete and tested.
 CONFIG_DEDIPROG ?= no
 
 # Always enable Marvell SATA controllers for now.
 CONFIG_SATAMV ?= yes
 
+# Enable Linux spidev interface by default. We disable it on non-Linux targets.
+CONFIG_LINUX_SPI ?= yes
+
 # Disable wiki printing by default. It is only useful if you have wiki access.
 CONFIG_PRINT_WIKI ?= no
 
@@ -465,11 +472,6 @@
 NEED_SERIAL := yes
 endif
 
-ifeq ($(CONFIG_LINUX_SPI), yes)
-FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1'
-PROGRAMMER_OBJS += linux_spi.o
-endif
-
 ifeq ($(CONFIG_DEDIPROG), yes)
 FEATURE_CFLAGS += -D'CONFIG_DEDIPROG=1'
 FEATURE_LIBS += -lusb
@@ -482,6 +484,11 @@
 NEED_PCI := yes
 endif
 
+ifeq ($(CONFIG_LINUX_SPI), yes)
+FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1'
+PROGRAMMER_OBJS += linux_spi.o
+endif
+
 ifeq ($(NEED_SERIAL), yes)
 LIB_OBJS += serial.o
 endif
Index: flashrom-linux_spi_documentation/flashrom.8
===================================================================
--- flashrom-linux_spi_documentation/flashrom.8	(Revision 1497)
+++ flashrom-linux_spi_documentation/flashrom.8	(Arbeitskopie)
@@ -205,6 +205,8 @@
 .sp
 .BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
 .sp
+.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
+.sp
 Some programmers have optional or mandatory parameters which are described
 in detail in the
 .B PROGRAMMER SPECIFIC INFO
@@ -639,6 +641,17 @@
 .sp
 More information about the hardware is available at
 .BR http://wiki.opengraphics.org .
+.SS
+.BR "linux_spi " programmer
+You have to specify the SPI controller to use with the
+.sp
+.B "  flashrom \-p linux_spi:dev=/dev/spidevX.Y"
+.sp
+syntax where
+.B /dev/spidevX.Y
+is the Linux device node for your SPI controller.
+.sp
+Please note that the linux_spi driver only works on Linux.
 .SH EXIT STATUS
 flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
 (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
Index: flashrom-linux_spi_documentation/print.c
===================================================================
--- flashrom-linux_spi_documentation/print.c	(Revision 1497)
+++ flashrom-linux_spi_documentation/print.c	(Arbeitskopie)
@@ -527,6 +527,11 @@
 	       programmer_table[PROGRAMMER_SATAMV].name);
 	print_supported_pcidevs(satas_mv);
 #endif
+#if CONFIG_LINUX_SPI == 1
+	msg_ginfo("\nSupported devices for the %s programmer:\n",
+	       programmer_table[PROGRAMMER_LINUX_SPI].name);
+	msg_ginfo("Device files /dev/spidev*.*\n");
+#endif
 }
 
 #if CONFIG_INTERNAL == 1


-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Thu Feb 16 22:00:26 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 16 Feb 2012 22:00:26 +0100
Subject: [flashrom] [PATCH] Manpage improvements.
In-Reply-To: <4F3D6CC4.9010700@gmx.net>
References: <1329319415-5581-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329425081-9878-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3D6CC4.9010700@gmx.net>
Message-ID: <201202162059.q1GKxikB006393@mail2.student.tuwien.ac.at>

On Thu, 16 Feb 2012 21:53:24 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 16.02.2012 21:44 schrieb Stefan Tauner:
> > The sections describing the various options of the internal and dummy
> > programmers have grown out of proportions. This patch adds some headlines
> > to devide the unrelated topics a bit (with .TP commands). The previous indented
> > paragraphs for the various programmers were transformed to subsections (.SS).
> >
> > Also, rephrase the documention related to laptops completely to make it
> > less redundant and more informative.
> > Document the laptop=this_is_not_a_laptop internal programmer parameter
> >
> > Change the contact info in the bugs section by removing the trac
> > reference and adding IRC (and the pastebin) instead.
> >
> > Remove some superfluous white space.
> >
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> 
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> 
> Regards,
> Carl-Daniel
> 

thanks, r1497

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Thu Feb 16 22:00:30 2012
From: svn at flashrom.org (repository service)
Date: Thu, 16 Feb 2012 22:00:30 +0100
Subject: [flashrom] [commit] r1498 - trunk
Message-ID: <E1Ry8RK-0005v0-Pj@ra.coresystems.de>

Author: hailfinger
Date: Thu Feb 16 22:00:27 2012
New Revision: 1498
URL: http://flashrom.org/trac/flashrom/changeset/1498

Log:
Document and enable the linux_spi driver

The linux_spi driver is now enabled by default on Linux.
A man page entry and a line in --list-supported output have been added.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/Makefile
   trunk/flashrom.8
   trunk/print.c

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile	Thu Feb 16 21:55:27 2012	(r1497)
+++ trunk/Makefile	Thu Feb 16 22:00:27 2012	(r1498)
@@ -209,6 +209,14 @@
 endif
 endif
 
+ifneq ($(TARGET_OS), Linux)
+ifeq ($(CONFIG_LINUX_SPI), yes)
+UNSUPPORTED_FEATURES += CONFIG_LINUX_SPI=yes
+else
+override CONFIG_LINUX_SPI = no
+endif
+endif
+
 # Determine the destination processor architecture.
 # IMPORTANT: The following line must be placed before ARCH is ever used
 # (of course), but should come after any lines setting CC because the line
@@ -324,16 +332,15 @@
 # Always enable Bus Pirate SPI for now.
 CONFIG_BUSPIRATE_SPI ?= yes
 
-# Disable Linux spidev interface support for now, until we check for a Linux
-# device (not host, as DOS binaries for example are built on a Linux host).
-CONFIG_LINUX_SPI ?= no
-
 # Disable Dediprog SF100 until support is complete and tested.
 CONFIG_DEDIPROG ?= no
 
 # Always enable Marvell SATA controllers for now.
 CONFIG_SATAMV ?= yes
 
+# Enable Linux spidev interface by default. We disable it on non-Linux targets.
+CONFIG_LINUX_SPI ?= yes
+
 # Disable wiki printing by default. It is only useful if you have wiki access.
 CONFIG_PRINT_WIKI ?= no
 
@@ -465,11 +472,6 @@
 NEED_SERIAL := yes
 endif
 
-ifeq ($(CONFIG_LINUX_SPI), yes)
-FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1'
-PROGRAMMER_OBJS += linux_spi.o
-endif
-
 ifeq ($(CONFIG_DEDIPROG), yes)
 FEATURE_CFLAGS += -D'CONFIG_DEDIPROG=1'
 FEATURE_LIBS += -lusb
@@ -482,6 +484,11 @@
 NEED_PCI := yes
 endif
 
+ifeq ($(CONFIG_LINUX_SPI), yes)
+FEATURE_CFLAGS += -D'CONFIG_LINUX_SPI=1'
+PROGRAMMER_OBJS += linux_spi.o
+endif
+
 ifeq ($(NEED_SERIAL), yes)
 LIB_OBJS += serial.o
 endif

Modified: trunk/flashrom.8
==============================================================================
--- trunk/flashrom.8	Thu Feb 16 21:55:27 2012	(r1497)
+++ trunk/flashrom.8	Thu Feb 16 22:00:27 2012	(r1498)
@@ -205,6 +205,8 @@
 .sp
 .BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
 .sp
+.BR "* linux_spi" " (for SPI flash ROMs accessible via /dev/spidevX.Y on Linux)"
+.sp
 Some programmers have optional or mandatory parameters which are described
 in detail in the
 .B PROGRAMMER SPECIFIC INFO
@@ -639,6 +641,17 @@
 .sp
 More information about the hardware is available at
 .BR http://wiki.opengraphics.org .
+.SS
+.BR "linux_spi " programmer
+You have to specify the SPI controller to use with the
+.sp
+.B "  flashrom \-p linux_spi:dev=/dev/spidevX.Y"
+.sp
+syntax where
+.B /dev/spidevX.Y
+is the Linux device node for your SPI controller.
+.sp
+Please note that the linux_spi driver only works on Linux.
 .SH EXIT STATUS
 flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
 (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Thu Feb 16 21:55:27 2012	(r1497)
+++ trunk/print.c	Thu Feb 16 22:00:27 2012	(r1498)
@@ -527,6 +527,11 @@
 	       programmer_table[PROGRAMMER_SATAMV].name);
 	print_supported_pcidevs(satas_mv);
 #endif
+#if CONFIG_LINUX_SPI == 1
+	msg_ginfo("\nSupported devices for the %s programmer:\n",
+	       programmer_table[PROGRAMMER_LINUX_SPI].name);
+	msg_ginfo("Device files /dev/spidev*.*\n");
+#endif
 }
 
 #if CONFIG_INTERNAL == 1


From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 22:01:12 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 22:01:12 +0100
Subject: [flashrom] [PATCH] Reenable forced read
In-Reply-To: <201202162023.q1GKNZ9G007535@mail2.student.tuwien.ac.at>
References: <4F3D47DF.30409@gmx.net> <4F3D647E.3050804@gmx.net>
	<201202162023.q1GKNZ9G007535@mail2.student.tuwien.ac.at>
Message-ID: <4F3D6E98.2020109@gmx.net>

Am 16.02.2012 21:24 schrieb Stefan Tauner:
> On Thu, 16 Feb 2012 21:18:06 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> Am 16.02.2012 19:15 schrieb Carl-Daniel Hailfinger:
>>> Forced read functionality was disabled when programmer registration was
>>> merged in r.
>>>
>>> We now support registering more than one controller at once for each bus
>>> type. This can happen e.g. if one SPI controller has an attached flash
>>> chip and one controller doesn't. In such a case we rely on the probe
>>> mechanism to find exactly one chip, and the probe mechanism will
>>> remember which controller/bus the flash chip is attached to. A forced
>>> read does not have the luxury of knowing which compatible controller to
>>> use, so this case is handled by always picking the first one. That may
>>> or may not be the correct one, but there is no way (yet) to specify
>>> which controller a flash chip is attached to.
>>>
>>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> as discussed on IRC this one does not segfault when there are no
> registered programmers, hence
> Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Thanks, committed in r1496.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 22:01:55 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 22:01:55 +0100
Subject: [flashrom] [PATCH] Document and enable the linux_spi driver
In-Reply-To: <4F3D6E28.3010300@gmx.net>
References: <4F3D5159.4030705@gmx.net> <4F3D6E28.3010300@gmx.net>
Message-ID: <4F3D6EC3.3050709@gmx.net>

Am 16.02.2012 21:59 schrieb Carl-Daniel Hailfinger:
> Am 16.02.2012 19:56 schrieb Carl-Daniel Hailfinger:
>> The linux_spi driver is now enabled by default on Linux.
>> A man page entry and a line in --list-supported output have been added.
>>
>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> New version, adapted to new man page formatting.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Thanks for the review.
Committed in r1497.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 22:02:56 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 22:02:56 +0100
Subject: [flashrom] [PATCH] Document and enable the linux_spi driver
In-Reply-To: <4F3D6EC3.3050709@gmx.net>
References: <4F3D5159.4030705@gmx.net> <4F3D6E28.3010300@gmx.net>
	<4F3D6EC3.3050709@gmx.net>
Message-ID: <4F3D6F00.9060302@gmx.net>

Am 16.02.2012 22:01 schrieb Carl-Daniel Hailfinger:
> Committed in r1497. 
Sorry, wrong number.

Committed in r1498.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From svn at flashrom.org  Thu Feb 16 22:07:07 2012
From: svn at flashrom.org (repository service)
Date: Thu, 16 Feb 2012 22:07:07 +0100
Subject: [flashrom] [commit] r1499 - trunk
Message-ID: <E1Ry8Xj-0007OF-VH@ra.coresystems.de>

Author: stefanct
Date: Thu Feb 16 22:07:07 2012
New Revision: 1499
URL: http://flashrom.org/trac/flashrom/changeset/1499

Log:
Add a bunch of new/tested stuff and various small changes 10

Tested mainboards:
OK:
 - ABIT A-S78H
   http://www.flashrom.org/pipermail/flashrom/2012-January/008603.html
 - ASRock AM2NF6G-VSTA
   http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
 - ASUS KFSN4-DRE/SAS
   reported by ted on IRC
 - ASUS M2A-VM (HDMI variant)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html
 - ASUS M4N78 PRO
   http://www.flashrom.org/pipermail/flashrom/2012-January/008598.html
 - ASUS P5K-V
   http://www.flashrom.org/pipermail/flashrom/2012-February/008737.html
 - ASUS P5KPL-CM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008522.html
 - ASUS P5N7A-VM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
 - ASUS P5QPL-AM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008557.html
 - ECS GF7100PVT-M3
   http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
 - ECS K7SEM
   http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
 - ECS P4M800PRO-M V2.0
   http://www.flashrom.org/pipermail/flashrom/2012-January/008478.html
 - Gigabyte 880GMA-USB3
   http://www.flashrom.org/pipermail/flashrom/2012-February/008715.html
 - Gigabyte GA-EP31-DS3L
   http://www.flashrom.org/pipermail/flashrom/2012-January/008601.html
 - Gigabyte GA-X58A-UDR3
   http://www.flashrom.org/pipermail/flashrom/2012-January/008572.html
 - Gigabyte GA-Z68XP-UD3
   http://paste.flashrom.org/view.php?id=1058
 - HP ProLiant N40L
   http://www.flashrom.org/pipermail/flashrom/2012-February/008650.html
 - MSI MS-7309 (K9N6PGM2-V2)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008441.html
 - MSI MS-7548 (Aspen-GL8E used in HP Pavilion a6750f)
   http://www.flashrom.org/pipermail/flashrom/2012-February/008666.html
 - MSI MS-7676 (H67MA-ED55(B3))
   http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html
 - PC Engines Alix.6f2
   Reported by Philip Prindeville on IRC
 - Shuttle AV18E2
   http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html
 - Supermicro X8DTE-F
   http://www.flashrom.org/pipermail/flashrom/2011-November/008304.html
 - Supermicro X8DTT-HIBQF
   http://www.flashrom.org/pipermail/flashrom/2012-January/008520.html
NOT OK:
 - ASUS P8H61-M LE/USB3
   http://www.flashrom.org/pipermail/flashrom/2012-January/008491.html
 - ASUS P8H67-M PRO
   http://www.flashrom.org/pipermail/flashrom/2011-December/008321.html
 - ASUS P8Z68-V PRO
   http://www.flashrom.org/pipermail/flashrom/2012-January/008469.html
 - Clevo P150HM (laptop)
   http://www.flashrom.org/pipermail/flashrom/2012-February/008717.html
 - Intel D425KT
   http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html
 - Supermicro X9SCA-F
   http://www.flashrom.org/pipermail/flashrom/2011-December/008313.html

Tested flash chips:
 - mark AT29C512 as TEST_OK_PREW
   http://paste.flashrom.org/view.php?id=977
 - mark M25P40 as TEST_OK_PREW
   http://www.flashrom.org/pipermail/flashrom/2011-December/008351.html
 - mark M25PE80 as TEST_OK_PREW
   http://paste.flashrom.org/view.php?id=1061
 - mark MX25L6405 as TEST_OK_PREW
   tested myself with an MX25L6436E variant on serprog
 - mark W39V080A as TEST_OK_PREW
   http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html

Tested chipsets:
 - SiS 730 (:0730)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
 - NVIDIA MCP61 (:03e0)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
 - NVIDIA MCP73 (:07d7)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
 - NVIDIA MCP79 (:0aac)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
 - VIA VT82C69x (0691) and VT82C686A/B (:0686)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html

 - AMD's SB950 (and presumably also SB920) have the same PCI ID as previous
   generations, hence change the chipset enable device string. Thanks to
   Christian Ruppert for the suggestion.
 - Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard
   graphics card in its pattern. Change this to the LPC controller.
 - Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable
   wrapper of it (enable_flash_pch6).
 - Fix two paranoid checks for address < 0 in ichspi.c which became futile (and
   generate clang warnings) with the unsignify patch committed in r1470.
 - Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could
   be distinguished by an extended RDID probe (Atmel's patented EDI procedure),
   which we do not support yet, hence handle them as one model for now.
 - Source format fixes and typos

the addition of the ASRock AM2NF6G-VSTA to print.c is
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
everything else is
Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/board_enable.c
   trunk/chipset_enable.c
   trunk/dediprog.c
   trunk/dummyflasher.c
   trunk/flashchips.c
   trunk/flashchips.h
   trunk/ichspi.c
   trunk/print.c

Modified: trunk/board_enable.c
==============================================================================
--- trunk/board_enable.c	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/board_enable.c	Thu Feb 16 22:07:07 2012	(r1499)
@@ -1562,7 +1562,7 @@
 /*
  * Suited for:
  *  - AOpen i945GMx-VFX: Intel 945GM + ICH7-M used in ...
- *    - FCS ESPRIMO Q5010 (SMBIOS: D2544-B1)
+ *    - FSC ESPRIMO Q5010 (SMBIOS: D2544-B1)
  */
 static int intel_ich_gpio38_raise(void)
 {
@@ -2114,7 +2114,7 @@
 	{0x8086, 0x2930, 0x147b, 0x1083,  0x10ec, 0x8167, 0x147b, 0x1083, NULL,         NULL, NULL,           P3, "abit",        "IP35 Pro",              0,   OK, intel_ich_gpio16_raise},
 	{0x10de, 0x0050, 0x147b, 0x1c1a,       0,      0,      0,      0, NULL,         NULL, NULL,           P3, "abit",        "KN8 Ultra",             0,   NT, nvidia_mcp_gpio2_lower},
 	{0x10de, 0x01e0, 0x147b, 0x1c00,  0x10de, 0x0060, 0x147B, 0x1c00, NULL,         NULL, NULL,           P3, "abit",        "NF7-S",                 0,   OK, nvidia_mcp_gpio8_raise},
-	{0x10de, 0x02f0, 0x147b, 0x1c26,  0x10de, 0x0240, 0x10de, 0x0222, NULL,         NULL, NULL,           P3, "abit",        "NF-M2 nView",           0,   OK, nvidia_mcp_gpio4_lower},
+	{0x10de, 0x02f0, 0x147b, 0x1c26,  0x10de, 0x0260, 0x147b, 0x1c26, NULL,         NULL, NULL,           P3, "abit",        "NF-M2 nView",           0,   OK, nvidia_mcp_gpio4_lower},
 	{0x1106, 0x0691,      0,      0,  0x1106, 0x3057,      0,      0, "(VA6)$",     NULL, NULL,           P3, "abit",        "VA6",                   0,   OK, via_apollo_gpo4_lower},
 	{0x1106, 0x0691,      0,      0,  0x1106, 0x3057,      0,      0, NULL,         "abit", "vt6x4",      P3, "abit",        "VT6X4",                 0,   OK, via_apollo_gpo4_lower},
 	{0x105a, 0x0d30, 0x105a, 0x4d33,  0x8086, 0x1130, 0x8086,      0, NULL,         NULL, NULL,           P3, "Acorp",       "6A815EPD",              0,   OK, board_acorp_6a815epd},

Modified: trunk/chipset_enable.c
==============================================================================
--- trunk/chipset_enable.c	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/chipset_enable.c	Thu Feb 16 22:07:07 2012	(r1499)
@@ -1155,7 +1155,7 @@
 #if defined(__i386__) || defined(__x86_64__)
 	{0x1002, 0x4377, OK, "ATI", "SB400",		enable_flash_sb400},
 	{0x1002, 0x438d, OK, "AMD", "SB600",		enable_flash_sb600},
-	{0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600},
+	{0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600},
 	{0x100b, 0x0510, NT, "AMD", "SC1100",		enable_flash_sc1100},
 	{0x1022, 0x2080, OK, "AMD", "CS5536",		enable_flash_cs5536},
 	{0x1022, 0x2090, OK, "AMD", "CS5536",		enable_flash_cs5536},
@@ -1178,7 +1178,7 @@
 	{0x1039, 0x0651, OK, "SiS", "651",		enable_flash_sis540},
 	{0x1039, 0x0655, NT, "SiS", "655",		enable_flash_sis540},
 	{0x1039, 0x0661, OK, "SiS", "661",		enable_flash_sis540},
-	{0x1039, 0x0730, NT, "SiS", "730",		enable_flash_sis540},
+	{0x1039, 0x0730, OK, "SiS", "730",		enable_flash_sis540},
 	{0x1039, 0x0733, NT, "SiS", "733",		enable_flash_sis540},
 	{0x1039, 0x0735, OK, "SiS", "735",		enable_flash_sis540},
 	{0x1039, 0x0740, NT, "SiS", "740",		enable_flash_sis540},
@@ -1222,7 +1222,7 @@
 	{0x10de, 0x0365, OK, "NVIDIA", "MCP55",		enable_flash_mcp55}, /* LPC */
 	{0x10de, 0x0366, OK, "NVIDIA", "MCP55",		enable_flash_mcp55}, /* LPC */
 	{0x10de, 0x0367, OK, "NVIDIA", "MCP55",		enable_flash_mcp55}, /* Pro */
-	{0x10de, 0x03e0, NT, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
+	{0x10de, 0x03e0, OK, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
 	{0x10de, 0x03e1, OK, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
 	{0x10de, 0x03e2, NT, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
 	{0x10de, 0x03e3, NT, "NVIDIA", "MCP61",		enable_flash_mcp6x_7x},
@@ -1233,8 +1233,8 @@
 	{0x10de, 0x0548, OK, "NVIDIA", "MCP67",		enable_flash_mcp6x_7x},
 	{0x10de, 0x075c, NT, "NVIDIA", "MCP78S",	enable_flash_mcp6x_7x},
 	{0x10de, 0x075d, OK, "NVIDIA", "MCP78S",	enable_flash_mcp6x_7x},
-	{0x10de, 0x07d7, NT, "NVIDIA", "MCP73",		enable_flash_mcp6x_7x},
-	{0x10de, 0x0aac, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
+	{0x10de, 0x07d7, OK, "NVIDIA", "MCP73",		enable_flash_mcp6x_7x},
+	{0x10de, 0x0aac, OK, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
 	{0x10de, 0x0aad, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
 	{0x10de, 0x0aae, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
 	{0x10de, 0x0aaf, NT, "NVIDIA", "MCP79",		enable_flash_mcp6x_7x},
@@ -1243,12 +1243,12 @@
 	{0x1106, 0x0595, NT, "VIA", "VT82C595",		via_no_byte_merge},
 	{0x1106, 0x0597, NT, "VIA", "VT82C597",		via_no_byte_merge},
 	{0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A",	via_no_byte_merge},
-	{0x1106, 0x0691, NT, "VIA", "VT82C69x",		via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */
+	{0x1106, 0x0691, OK, "VIA", "VT82C69x",		via_no_byte_merge},
 	{0x1106, 0x8601, NT, "VIA", "VT8601T",		via_no_byte_merge},
 	/* VIA southbridges */
 	{0x1106, 0x0586, OK, "VIA", "VT82C586A/B",	enable_flash_amd8111},
 	{0x1106, 0x0596, OK, "VIA", "VT82C596",		enable_flash_amd8111},
-	{0x1106, 0x0686, NT, "VIA", "VT82C686A/B",	enable_flash_amd8111},
+	{0x1106, 0x0686, OK, "VIA", "VT82C686A/B",	enable_flash_amd8111},
 	{0x1106, 0x3074, OK, "VIA", "VT8233",		enable_flash_vt823x},
 	{0x1106, 0x3147, OK, "VIA", "VT8233A",		enable_flash_vt823x},
 	{0x1106, 0x3177, OK, "VIA", "VT8235",		enable_flash_vt823x},
@@ -1279,8 +1279,8 @@
 	{0x8086, 0x1c54, NT, "Intel", "C204",		enable_flash_pch6},
 	{0x8086, 0x1c56, NT, "Intel", "C206",		enable_flash_pch6},
 	{0x8086, 0x1c5c, NT, "Intel", "H61",		enable_flash_pch6},
-	{0x8086, 0x1d40, OK, "Intel", "X79",		enable_flash_ich10}, /* FIXME: when datasheet is available */
-	{0x8086, 0x1d41, NT, "Intel", "X79",		enable_flash_ich10}, /* FIXME: when datasheet is available */
+	{0x8086, 0x1d40, OK, "Intel", "X79",		enable_flash_pch6},
+	{0x8086, 0x1d41, NT, "Intel", "X79",		enable_flash_pch6},
 	{0x8086, 0x2410, OK, "Intel", "ICH",		enable_flash_ich_4e},
 	{0x8086, 0x2420, OK, "Intel", "ICH0",		enable_flash_ich_4e},
 	{0x8086, 0x2440, OK, "Intel", "ICH2",		enable_flash_ich_4e},

Modified: trunk/dediprog.c
==============================================================================
--- trunk/dediprog.c	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/dediprog.c	Thu Feb 16 22:07:07 2012	(r1499)
@@ -299,7 +299,7 @@
 	return 0;
 }
 
-/* Bulk write interface, will read multiple page_size byte chunks aligned to page_size bytes.
+/* Bulk write interface, will write multiple page_size byte chunks aligned to page_size bytes.
  * @start	start address
  * @len		length
  * @return	0 on success, 1 on failure

Modified: trunk/dummyflasher.c
==============================================================================
--- trunk/dummyflasher.c	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/dummyflasher.c	Thu Feb 16 22:07:07 2012	(r1499)
@@ -435,7 +435,7 @@
 		msg_perr("No command sent to the chip!\n");
 		return 1;
 	}
-	/* spi_blacklist has precedence before spi_ignorelist. */
+	/* spi_blacklist has precedence over spi_ignorelist. */
 	for (i = 0; i < spi_blacklist_size; i++) {
 		if (writearr[0] == spi_blacklist[i]) {
 			msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",

Modified: trunk/flashchips.c
==============================================================================
--- trunk/flashchips.c	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/flashchips.c	Thu Feb 16 22:07:07 2012	(r1499)
@@ -1579,7 +1579,7 @@
 
 	{
 		.vendor		= "Atmel",
-		.name		= "AT25DF641",
+		.name		= "AT25DF641(A)",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= ATMEL_ID,
 		.model_id	= ATMEL_AT25DF641,
@@ -1967,7 +1967,7 @@
 		.total_size	= 64,
 		.page_size	= 128,
 		.feature_bits	= FEATURE_LONG_RESET,
-		.tested		= TEST_UNTESTED,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
 		.probe_timing	= 10000, /* 10mS, Enter=Exec */
 		.block_erasers	=
@@ -4427,7 +4427,7 @@
 		.total_size	= 8192,
 		.page_size	= 256,
 		.feature_bits	= FEATURE_WRSR_WREN,
-		.tested		= TEST_OK_PROBE,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
@@ -4957,7 +4957,7 @@
 		.model_id	= ST_M25PE80,
 		.total_size	= 1024,
 		.page_size	= 256,
-		.tested		= TEST_OK_PRE,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
@@ -6910,7 +6910,7 @@
 		.model_id	= ST_M25P40,
 		.total_size	= 512,
 		.page_size	= 256,
-		.tested		= TEST_OK_PR,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
 		.block_erasers	=
@@ -8690,9 +8690,9 @@
 		.total_size	= 1024,
 		.page_size	= 64 * 1024,
 		.feature_bits	= FEATURE_EITHER_RESET,
-		.tested		= TEST_UNTESTED,
+		.tested		= TEST_OK_PREW,
 		.probe		= probe_jedec,
-		.probe_timing	= 10, 
+		.probe_timing	= 10,
 		.block_erasers	=
 		{
 			{

Modified: trunk/flashchips.h
==============================================================================
--- trunk/flashchips.h	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/flashchips.h	Thu Feb 16 22:07:07 2012	(r1499)
@@ -364,7 +364,7 @@
 #define MACRONIX_MX25L8005	0x2014	/* Same as MX25V8005 */
 #define MACRONIX_MX25L1605	0x2015	/* MX25L1605{,A,D} */
 #define MACRONIX_MX25L3205	0x2016	/* MX25L3205{,A} */
-#define MACRONIX_MX25L6405	0x2017	/* MX25L3205{,D} */
+#define MACRONIX_MX25L6405	0x2017	/* MX25L6405{,D}, MX25L6406E, MX25L6436E */
 #define MACRONIX_MX25L12805	0x2018	/* MX25L12805 */
 #define MACRONIX_MX25L1635D	0x2415
 #define MACRONIX_MX25L1635E	0x2515	/* MX25L1635{E} */

Modified: trunk/ichspi.c
==============================================================================
--- trunk/ichspi.c	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/ichspi.c	Thu Feb 16 22:07:07 2012	(r1499)
@@ -1286,7 +1286,7 @@
 	uint16_t timeout = 100 * 60;
 	uint8_t block_len;
 
-	if (addr < 0 || addr + len > flash->total_size * 1024) {
+	if (addr + len > flash->total_size * 1024) {
 		msg_perr("Request to read from an inaccessible memory address "
 			 "(addr=0x%x, len=%d).\n", addr, len);
 		return -1;
@@ -1324,7 +1324,7 @@
 	uint16_t timeout = 100 * 60;
 	uint8_t block_len;
 
-	if (addr < 0 || addr + len > flash->total_size * 1024) {
+	if (addr + len > flash->total_size * 1024) {
 		msg_perr("Request to write to an inaccessible memory address "
 			 "(addr=0x%x, len=%d).\n", addr, len);
 		return -1;

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Thu Feb 16 22:00:27 2012	(r1498)
+++ trunk/print.c	Thu Feb 16 22:07:07 2012	(r1499)
@@ -546,6 +546,7 @@
 const struct board_info boards_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
 	B("A-Trend",	"ATC-6220",		1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
+	B("abit",	"A-S78H",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
 	B("abit",	"AN-M2",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
 	B("abit",	"AV8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
 	B("abit",	"AX8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
@@ -565,7 +566,7 @@
 	B("Advantech",	"PCM-5820",		1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
 	B("agami",	"Aruma",		1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
 	B("Albatron",	"PM266A Pro",		1, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
-	B("AOpen",	"i945GMx-VFX",		1, NULL, "This is (also?) an OEM board from FCS (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
+	B("AOpen",	"i945GMx-VFX",		1, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
 	B("AOpen",	"vKM400Am-S",		1, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
 	B("Artec Group","DBE61",		1, "http://wiki.thincan.org/DBE61", NULL),
 	B("Artec Group","DBE62",		1, "http://wiki.thincan.org/DBE62", NULL),
@@ -576,6 +577,7 @@
 	B("ASRock",	"A330GC",		1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
 	B("ASRock",	"A770CrossFire",	1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
 	B("ASRock",	"ALiveNF6G-DVI",	1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
+	B("ASRock",	"AM2NF6G-VSTA",		1, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
 	B("ASRock",	"ConRoeXFire-eSATA2",	1, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
 	B("ASRock",	"K7S41",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
 	B("ASRock",	"K7S41GX",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
@@ -594,7 +596,7 @@
 	B("ASUS",	"A7V8X-MX",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
 	B("ASUS",	"A7V8X-MX SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
 	B("ASUS",	"A7V8X-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
-	B("ASUS",	"A8M2N-LA (NodusM3-GL8E)",	1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
+	B("ASUS",	"A8M2N-LA (NodusM3-GL8E)", 1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
 	B("ASUS",	"A8N-E",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
 	B("ASUS",	"A8N-LA (Nagami-GL8E)",	1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
 	B("ASUS",	"A8N-SLI",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
@@ -614,8 +616,9 @@
 	B("ASUS",	"K8V SE Deluxe",	1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
 	B("ASUS",	"K8V-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
 	B("ASUS",	"K8V-X SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
+	B("ASUS",	"KFSN4-DRE/SAS",	1, "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL),
 	B("ASUS",	"M2A-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
-	B("ASUS",	"M2A-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", "See http://www.coreboot.org/pipermail/coreboot/2007-September/025281.html"),
+	B("ASUS",	"M2A-VM (HDMI)",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
 	B("ASUS",	"M2N32-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
 	B("ASUS",	"M2N-E",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
 	B("ASUS",	"M2N-E SLI",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
@@ -629,12 +632,13 @@
 	B("ASUS",	"M3A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
 	B("ASUS",	"M3N78-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
 	B("ASUS",	"M4A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
-	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
 	B("ASUS",	"M4A785TD-M EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
+	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
 	B("ASUS",	"M4A78LT-M LE",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
 	B("ASUS",	"M4A79T Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
 	B("ASUS",	"M4A87TD/USB3",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
 	B("ASUS",	"M4A89GTD PRO",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
+	B("ASUS",	"M4N78 PRO",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
 	B("ASUS",	"M5A99X EVO",		1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
 	B("ASUS",	"MEW-AM",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
 	B("ASUS",	"MEW-VM",		0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
@@ -670,8 +674,10 @@
 	B("ASUS",	"P5GDC Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
 	B("ASUS",	"P5GDC-V Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
 	B("ASUS",	"P5GD2/C variants",	0, NULL, "Untested board enable."),
+	B("ASUS",	"P5K-V",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
 	B("ASUS",	"P5K-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
 	B("ASUS",	"P5KC",			1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
+	B("ASUS",	"P5KPL-CM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
 	B("ASUS",	"P5L-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
 	B("ASUS",	"P5L-VM 1394",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
 	B("ASUS",	"P5LD2",		0, NULL, "Untested board enable."),
@@ -682,8 +688,10 @@
 	B("ASUS",	"P5N-D",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
 	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
 	B("ASUS",	"P5N32-E SLI",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
+	B("ASUS",	"P5N7A-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
 	B("ASUS",	"P5ND2-SLI Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
 	B("ASUS",	"P5PE-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
+	B("ASUS",	"P5QPL-AM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
 	B("ASUS",	"P5VD1-X",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
 	B("ASUS",	"P6T SE",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
 	B("ASUS",	"P6T Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
@@ -693,7 +701,10 @@
 	B("ASUS",	"P8B-E/4L",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8B WS",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8H61 PRO",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H61-M LE/USB3",	0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H67-M PRO",		0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8P67 (rev. 3.1)",	0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8Z68-V PRO",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
 	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
 	B("BCOM",	"WinNET100",		1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
@@ -710,10 +721,12 @@
 	B("DFI",	"855GME-MGF",		0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
 	B("DFI",	"Blood-Iron P35 T2RL",	1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
 	B("Elitegroup",	"GeForce6100SM-M ",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
+	B("Elitegroup", "GF7100PVT-M3 (V1.0)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
 	B("Elitegroup",	"K7S5A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
 	B("Elitegroup",	"K7S6A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
+	B("Elitegroup", "K7SEM (V1.0A)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
 	B("Elitegroup",	"K7VTA3",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
-	B("Elitegroup",	"P4M800PRO-M (V1.0A)",	1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
+	B("Elitegroup",	"P4M800PRO-M (V1.0A, V2.0)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
 	B("Elitegroup", "P4VXMS (V1.0A)",	1, NULL, NULL),
 	B("Elitegroup",	"P6IWP-Fe",		1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
 	B("Elitegroup",	"P6VAP-A+",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
@@ -743,6 +756,7 @@
 	B("GIGABYTE",	"GA-7DXR",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
 	B("GIGABYTE",	"GA-7VT600",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
 	B("GIGABYTE",	"GA-7ZM",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
+	B("GIGABYTE",	"GA-880GMA-USB3 (rev. 3.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
 	B("GIGABYTE",	"GA-8I945GZME-RH",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
 	B("GIGABYTE",	"GA-8IP775",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
 	B("GIGABYTE",	"GA-8IRML",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
@@ -751,6 +765,7 @@
 	B("GIGABYTE",	"GA-945PL-S3P (rev. 6.6)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
 	B("GIGABYTE",	"GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
 	B("GIGABYTE",	"GA-965P-DS4",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
+	B("GIGABYTE",	"GA-EP31-DS3L (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
 	B("GIGABYTE",	"GA-EP35-DS3L",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
 	B("GIGABYTE",	"GA-EX58-UD4P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
 	B("GIGABYTE",	"GA-K8N-SLI",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
@@ -774,10 +789,13 @@
 	B("GIGABYTE",	"GA-P55A-UD4 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
 	B("GIGABYTE",	"GA-P67A-UD3P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
 	B("GIGABYTE",	"GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL),
+	B("GIGABYTE",	"GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL),
 	B("GIGABYTE",	"GA-Z68MX-UD2H-B (rev. 1.3)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
+	B("GIGABYTE",	"GA-Z68XP-UD3 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
 	B("HP",		"e-Vectra P2706T",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
 	B("HP",		"ProLiant DL145 G3",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
 	B("HP",		"ProLiant DL165 G6",	1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
+	B("HP",		"ProLiant N40L",	1, NULL, NULL),
 	B("HP",		"Puffer2-UL8E",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
 	B("HP",		"Vectra VL400",		1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
 	B("HP",		"Vectra VL420 SFF",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
@@ -787,6 +805,7 @@
 	B("IBM",	"x3455",		1, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
 	B("IEI",	"PICOe-9452",		1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
 	B("Intel",	"D201GLY",		1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
+	B("Intel",	"D425KT",		0, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
 	B("Intel",	"D865GLC",		0, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
 	B("Intel",	"DG45ID",		0, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
 	B("Intel",	"DH67CF",		0, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
@@ -830,6 +849,7 @@
 	B("MSI",	"MS-7253 (K9VGM-V)",	1, "http://www.msi.com/product/mb/K9VGM-V.html", NULL),
 	B("MSI",	"MS-7255 (P4M890M)",	1, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
 	B("MSI",	"MS-7260 (K9N Neo PCB 1.0)", 0, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+	B("MSI",	"MS-7309 (K9N6PGM2-V2)", 1, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
 	B("MSI",	"MS-7312 (K9MM-V)",	1, "http://www.msi.com/product/mb/K9MM-V.html", NULL),
 	B("MSI",	"MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
 	B("MSI",	"MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
@@ -837,12 +857,14 @@
 	B("MSI",	"MS-7376 (K9A2 Platinum V1)", 1, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
 	B("MSI",	"MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
 	B("MSI",	"MS-7529 (G31TM-P21)",  1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
+	B("MSI",	"MS-7548 (Aspen-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
 	B("MSI",	"MS-7596 (785GM-E51)",  1, "http://www.msi.com/product/mb/785GM-E51.html", NULL),
 	B("MSI",	"MS-7599 (870-C45)",	1, "http://www.msi.com/product/mb/870-C45.html", NULL),
 	B("MSI",	"MS-7613 (Iona-GL8E)",	0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("MSI",	"MS-7635 (H55M-ED55)",	0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("MSI",	"MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
 	B("MSI",	"MS-7642 (890GXM-G65)",	1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
+	B("MSI",	"MS-7676 (H67MA-ED55(B3))", 1, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
 	B("MSI",	"MS-7696 (A75MA-G55)",	1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
 	B("MSI",	"MS-7698 (E350IA-E45)",	1, "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
 	B("NEC",	"PowerMate 2000",	1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
@@ -855,6 +877,7 @@
 	B("PC Engines",	"Alix.2d3",		1, "http://pcengines.ch/alix2d3.htm", NULL),
 	B("PC Engines",	"Alix.3c3",		1, "http://pcengines.ch/alix3c3.htm", NULL),
 	B("PC Engines",	"Alix.3d3",		1, "http://pcengines.ch/alix3d3.htm", NULL),
+	B("PC Engines",	"Alix.6f2",		1, "http://pcengines.ch/alix6f2.htm", NULL),
 	B("PC Engines",	"WRAP.2E",		1, "http://pcengines.ch/wrap2e1.htm", NULL),
 	B("Portwell",	"PEB-4700VLA",		1, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
 	B("RCA",	"RM4100",		1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
@@ -862,6 +885,7 @@
 	B("Shuttle",	"AK31",			1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
 	B("Shuttle",	"AK38N",		1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
 	B("Shuttle",	"AV11V30",		1, NULL, NULL),
+	B("Shuttle",	"AV18E2",		1, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
 	B("Shuttle",	"FD37",			1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
 	B("Shuttle",	"FH67",			1, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
 	B("Shuttle",	"FN25",			1, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
@@ -880,12 +904,15 @@
 	B("Supermicro", "X7DBT-INF",		1, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
 	B("Supermicro", "X7SPA-HF",		1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
 	B("Supermicro", "X8DT3",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
+	B("Supermicro", "X8DTE-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
 	B("Supermicro", "X8DTH-6F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
 	B("Supermicro",	"X8DTT-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
+	B("Supermicro",	"X8DTT-HIBQF",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
 	B("Supermicro",	"X8DTU-6TF+",		0, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Supermicro",	"X8DTU-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
 	B("Supermicro",	"X8SIE(-F)",		0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
 	B("Supermicro",	"X8STi",		1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
+	B("Supermicro",	"X9SCA-F",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Supermicro",	"X9SCL",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("T-Online",	"S-100",		1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
 	B("Tekram",	"P6Pro-A5",		1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
@@ -951,11 +978,12 @@
 	B("ASUS",	"A8Jm",			1, NULL, NULL),
 	B("ASUS",	"Eee PC 701 4G",	0, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
 	B("ASUS",	"M6Ne",			0, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
+	B("Clevo",	"P150HM",		0, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Dell",	"Latitude CPi A366XT",	0, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
 	B("HP/Compaq",	"nx9005",		0, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
 	B("HP/Compaq",	"nx9010",		0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
 	B("IBM/Lenovo",	"Thinkpad T40p",	0, "http://www.thinkwiki.org/wiki/Category:T40p", NULL),
-	B("IBM/Lenovo",	"Thinkpad T410s",	0, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25x64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
+	B("IBM/Lenovo",	"Thinkpad T410s",	0, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
 	B("IBM/Lenovo",	"240",			0, "http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
 	B("Lenovo",	"3000 V100 TF05Cxx",	1, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
 #endif


From c-d.hailfinger.devel.2006 at gmx.net  Thu Feb 16 22:11:33 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Thu, 16 Feb 2012 22:11:33 +0100
Subject: [flashrom] [PATCH] flashrom 0.9.5
Message-ID: <4F3D7105.9050806@gmx.net>

Increase flashrom release number to 0.9.5

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-0.9.5-release/Makefile
===================================================================
--- flashrom-0.9.5-release/Makefile	(Revision 1499)
+++ flashrom-0.9.5-release/Makefile	(Arbeitskopie)
@@ -277,7 +277,7 @@
 # will not require subversion. The downloadable snapshots are already exported.
 SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown)
 
-RELEASE := 0.9.4
+RELEASE := 0.9.5
 VERSION := $(RELEASE)-r$(SVNVERSION)
 RELEASENAME ?= $(VERSION)
 


-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb 17 00:38:33 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 17 Feb 2012 00:38:33 +0100
Subject: [flashrom] [PATCH] Add support for SFDP (JESD216).
In-Reply-To: <201202091739.q19Hdf9o014330@mail2.student.tuwien.ac.at>
References: <1327879443-11326-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<84758b260241cd069355aca2c618fc144576a422.1327989256.git.stefan.tauner@student.tuwien.ac.at>
	<4F2B34D4.7000501@gmx.net>
	<201202090006.q1906G4I030920@mail2.student.tuwien.ac.at>
	<201202091739.q19Hdf9o014330@mail2.student.tuwien.ac.at>
Message-ID: <4F3D9379.2040604@gmx.net>

Am 09.02.2012 18:40 schrieb Stefan Tauner:
> From: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> Date: Thu, 9 Feb 2012 16:09:31 +0100
> Subject: [PATCH] Add support for SFDP (JESD216).
>
> Similar to modules using the opaque programmer framework (e.g. ICH Hardware
> Sequencing) this uses a template struct flashchip element in flashchips.c with
> a special probe function that fills the obtained values into that struct.
>
> This allows yet unknown SPI chips to be supported (read, erase, write) almost
> as if it was already added to flashchips.c.
>
> Documentation used:
> http://www.jedec.org/standards-documents/docs/jesd216 (2011-04)
> W25Q32BV data sheet Revision F (2011-04-01)
> EN25QH16 data sheet Revision F (2011-06-01)
> MX25L6436E data sheet Revision 1.8 (2011-12-26)
>
> Tested-by: David Hendricks <dhendrix at google.com>
> on W25Q64CV + dediprog
> Tested-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> on a 2010 MX25L6436E with preliminary (i.e. incorrect) SFDP implementation + serprog
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

With the following conditions:
- two fixup patches later in this thread integrated
- unkown->unknown fixes
- NPH formatting as discussed on IRC
- spi_sfdp_read naming as dicusssed on IRC
this patch is
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

would be nice to have one consolidated patch on the mailing list, just
for the record.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Fri Feb 17 03:25:32 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 03:25:32 +0100
Subject: [flashrom] [PATCH 1/2] Add support for SFDP (JESD216).
In-Reply-To: <4F3D9379.2040604@gmx.net>
References: <4F3D9379.2040604@gmx.net>
Message-ID: <1329445533-22172-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

Similar to modules using the opaque programmer framework (e.g. ICH Hardware
Sequencing) this uses a template struct flashchip element in flashchips.c with
a special probe function that fills the obtained values into that struct.

This allows yet unknown SPI chips to be supported (read, erase, write) almost
as if it was already added to flashchips.c.

Documentation used:
http://www.jedec.org/standards-documents/docs/jesd216 (2011-04)
W25Q32BV data sheet Revision F (2011-04-01)
EN25QH16 data sheet Revision F (2011-06-01)
MX25L6436E data sheet Revision 1.8 (2011-12-26)

Tested-by: David Hendricks <dhendrix at google.com>
on W25Q64CV + dediprog
Tested-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
on a 2010 MX25L6436E with preliminary (i.e. incorrect) SFDP implementation + serprog

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
---
 Makefile      |    2 +-
 chipdrivers.h |    4 +
 flash.h       |    2 +
 flashchips.c  |   23 ++++
 flashchips.h  |   10 +-
 flashrom.c    |   37 +++++-
 sfdp.c        |  370 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 spi.h         |    5 +
 spi25.c       |   26 ++++
 9 files changed, 467 insertions(+), 12 deletions(-)
 create mode 100644 sfdp.c

diff --git a/Makefile b/Makefile
index afe2dfb..2d18fc5 100644
--- a/Makefile
+++ b/Makefile
@@ -261,7 +261,7 @@ endif
 CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \
 	sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \
 	sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \
-	a25.o at25.o opaque.o
+	a25.o at25.o opaque.o sfdp.o
 
 LIB_OBJS = layout.o
 
diff --git a/chipdrivers.h b/chipdrivers.h
index a1d0cd9..bd81098 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -41,6 +41,7 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int b
 int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode);
 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
@@ -58,6 +59,9 @@ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, u
 int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
 int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 
+/* sfdp.c */
+int probe_spi_sfdp(struct flashctx *flash);
+
 /* opaque.c */
 int probe_opaque(struct flashctx *flash);
 int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
diff --git a/flash.h b/flash.h
index 20db343..0dac13d 100644
--- a/flash.h
+++ b/flash.h
@@ -175,6 +175,8 @@ struct flashctx {
 	struct registered_programmer *pgm;
 };
 
+typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+
 #define TEST_UNTESTED	0
 
 #define TEST_OK_PROBE	(1 << 0)
diff --git a/flashchips.c b/flashchips.c
index d789904..b6296c5 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -8885,6 +8885,29 @@ const struct flashchip flashchips[] = {
 		.read		= read_memmapped,
 		.voltage	= {3000, 3600}, /* Also has 12V fast program */
 	},
+	
+	{
+		.vendor		= "Unknown",
+		.name		= "SFDP-capable chip",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GENERIC_MANUF_ID,
+		.model_id	= SFDP_DEVICE_ID,
+		/* We present our own "report this" text hence we do not
+		 * want the default "This flash part has status UNTESTED..."
+		 * text to be printed. */
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_sfdp,
+		.unlock		= spi_disable_blockprotect, /* is this safe? */
+		.read		= spi_chip_read,
+		/* FIXME: some vendor extensions define this */
+		.voltage	= {},
+		 /* Everything below will be set by the probing function. */
+		.write		= NULL,
+		.total_size	= 0,
+		.page_size	= 0,
+		.feature_bits	= 0,
+		.block_erasers	= {},
+	},
 
 	{
 		.vendor		= "Programmer",
diff --git a/flashchips.h b/flashchips.h
index 8587ce9..de3c79d 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -34,8 +34,11 @@
  * SPI parts have 16-bit device IDs if they support RDID.
  */
 
-#define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
-#define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
+#define GENERIC_MANUF_ID	0xFFFF	/* Check if there is a vendor ID */
+#define GENERIC_DEVICE_ID	0xFFFF	/* Only match the vendor ID */
+#define SFDP_DEVICE_ID		0xFFFE
+#define PROGMANUF_ID		0xFFFE	/* dummy ID for opaque chips behind a programmer */
+#define PROGDEV_ID		0x01	/* dummy ID for opaque chips behind a programmer */
 
 #define ALLIANCE_ID		0x52	/* Alliance Semiconductor */
 #define ALLIANCE_AS29F002B	0x34
@@ -646,7 +649,4 @@
 #define WINBOND_W49V002A	0xB0
 #define WINBOND_W49V002FA	0x32
 
-#define PROGMANUF_ID		0xFFFE	/* dummy ID for opaque chips behind a programmer */
-#define PROGDEV_ID		0x01	/* dummy ID for opaque chips behind a programmer */
-
 #endif /* !FLASHCHIPS_H */
diff --git a/flashrom.c b/flashrom.c
index a378e51..cad043b 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -980,13 +980,38 @@ int probe_flash(struct registered_programmer *pgm, int startchip,
 
 		/* If this is the first chip found, accept it.
 		 * If this is not the first chip found, accept it only if it is
-		 * a non-generic match.
-		 * We could either make chipcount global or provide it as
-		 * parameter, or we assume that startchip==0 means this call to
-		 * probe_flash() is the first one and thus no chip has been
-		 * found before.
+		 * a non-generic match. SFDP and CFI are generic matches.
+		 * startchip==0 means this call to probe_flash() is the first
+		 * one for this programmer interface and thus no other chip has
+		 * been found on this interface.
 		 */
-		if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID)
+		if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) {
+			msg_cinfo("===\n"
+				  "SFDP has autodetected a flash chip which is "
+				  "not natively supported by flashrom yet.\n");
+			if (count_usable_erasers(fill_flash) == 0)
+				msg_cinfo("The standard operations read and "
+					  "verify should work, but to support "
+					  "erase, write and all other "
+					  "possible features");
+			else
+				msg_cinfo("All standard operations (read, "
+					  "verify, erase and write) should "
+					  "work, but to support all possible "
+					  "features");
+
+			msg_cinfo(" we need to add them manually.\nYou "
+				  "can help us by mailing us the output of "
+				  "the following command to flashrom at flashrom."
+				  "org: \n'flashrom -VV [plus the "
+				  "-p/--programmer parameter (if needed)]"
+				  "'\nThanks for your help!\n"
+				  "===\n");
+		}
+
+		if (startchip == 0 ||
+		    ((fill_flash->model_id != GENERIC_DEVICE_ID) &&
+		     (fill_flash->model_id != SFDP_DEVICE_ID)))
 			break;
 
 notfound:
diff --git a/sfdp.c b/sfdp.c
new file mode 100644
index 0000000..6a76994
--- /dev/null
+++ b/sfdp.c
@@ -0,0 +1,370 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2011-2012 Stefan Tauner
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "flash.h"
+#include "spi.h"
+#include "chipdrivers.h"
+
+static int spi_sfdp_read_sfdp_chunk(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
+{
+	int i, ret;
+	const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = {
+		JEDEC_SFDP,
+		(address >> 16) & 0xff,
+		(address >> 8) & 0xff,
+		(address >> 0) & 0xff,
+		/* FIXME: the following dummy byte explodes on some programmers.
+		 * One possible workaround would be to read the dummy byte
+		 * instead and discard its value.
+		 */
+		0
+	};
+	msg_cspew("%s: addr=0x%x, len=%d, data:\n", __func__, address, len);
+	ret = spi_send_command(flash, sizeof(cmd), len, cmd, buf);
+	for (i = 0; i < len; i++)
+		msg_cspew(" 0x%02x", buf[i]);
+	msg_cspew("\n");
+	return ret;
+}
+
+static int spi_sfdp_read_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
+{
+	/* FIXME: this is wrong. There are different upper bounds for the number
+	 * of bytes to read on the various programmers (even depending on the
+	 * rest of the structure of the transaction).*/
+	int maxstep = 8;
+	int ret = 0;
+	while (len > 0) {
+		int step = min(len, maxstep);
+		ret = spi_sfdp_read_sfdp_chunk(flash, address, buf, step);
+		if (ret)
+			return ret;
+		address += step;
+		buf += step;
+		len -= step;
+	}
+	return ret;
+}
+
+struct sfdp_tbl_hdr {
+	uint8_t id;
+	uint8_t v_minor;
+	uint8_t v_major;
+	uint8_t len;
+	uint32_t ptp; /* 24b pointer */
+};
+
+static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint32_t block_size)
+{
+	int i;
+	uint32_t total_size = flash->total_size * 1024;
+	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
+
+	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
+		msg_cdbg("%s: invalid input\n", __func__);
+		return 1;
+	}
+
+	for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
+		struct block_eraser *eraser = &flash->block_erasers[i];
+		/* Check for duplicates (including (some) non-uniform ones). */
+		if (eraser->eraseblocks[0].size == block_size &&
+		    eraser->block_erase == erasefn) {
+			msg_cdbg2("  Tried to add a duplicate block eraser: "
+				  "%d x %d B with opcode 0x%02x\n",
+				  total_size/block_size, block_size, opcode);
+			return 1;
+		}
+		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
+			msg_cspew("  Block Eraser %d is already occupied.\n",
+				  i);
+			continue;
+		}
+
+		eraser->block_erase = erasefn;
+		eraser->eraseblocks[0].size = block_size;
+		eraser->eraseblocks[0].count = total_size/block_size;
+		msg_cdbg2("  Block eraser %d: %d x %d B with opcode "
+			  "0x%02x\n", i, total_size/block_size, block_size,
+			  opcode);
+		return 0;
+	}
+	msg_cinfo("%s: Not enough space to store another eraser (i=%d)."
+		  " Please report this at flashrom at flashrom.org\n",
+		  __func__, i);
+	return 1;
+}
+
+static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
+{
+	uint32_t tmp32;
+	uint8_t tmp8;
+	uint32_t total_size; /* in bytes */
+	uint32_t block_size;
+	int dw, j;
+
+	msg_cdbg("Parsing JEDEC flash parameter table... ");
+	if (len != 9 * 4 && len != 4 * 4) {
+		msg_cerr("%s: len out of spec\n", __func__);
+		return 1;
+	}
+	msg_cdbg2("\n");
+	
+	/* 1. double word */
+	dw = 0;
+	tmp32 = buf[(4 * dw) + 0];
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+
+	tmp8 = (tmp32 >> 17) & 0x3;
+	switch (tmp8) {
+	case 0x0:
+		msg_cdbg2("  3-Byte only addressing.\n");
+		break;
+	case 0x1:
+		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
+		break;
+	case 0x2:
+		msg_cerr("  4-Byte only addressing (not supported by "
+			 "flashrom).\n");
+		return 1;
+	default:
+		msg_cerr("  Required addressing mode (0x%x) not supported.\n",
+			 tmp8);
+		return 1;
+	}
+
+	msg_cdbg2("  Status register is ");
+	if (tmp32 & (1 << 3)) {
+		msg_cdbg2("volatile and writes to the status register have to "
+			  "be enabled with ");
+		if (tmp32 & (1 << 4)) {
+			flash->feature_bits = FEATURE_WRSR_WREN;
+			msg_cdbg2("WREN (0x06).\n");
+		} else {
+			flash->feature_bits = FEATURE_WRSR_EWSR;
+			msg_cdbg2("EWSR (0x50).\n");
+		}
+	} else
+		msg_cdbg2("non-volatile and the standard does not allow "
+			  "vendors to tell us whether EWSR/WREN is needed for "
+			  "status register writes - assuming EWSR.\n");
+
+	msg_cdbg2("  Write chunk size is ");
+	if (tmp32 & (1 << 2)) {
+		msg_cdbg2("at least 64 B.\n");
+		flash->page_size = 64;
+		flash->write = spi_chip_write_256;
+	} else {
+		msg_cdbg2("1 B only.\n");
+		flash->page_size = 256;
+		flash->write = spi_chip_write_1;
+	}
+
+	if ((tmp32 & 0x3) == 0x1) {
+		sfdp_add_uniform_eraser(flash, (tmp32 >> 8) & 0xFF, 4 * 1024);
+	}
+
+	/* 2. double word */
+	dw = 1;
+	tmp32 = buf[(4 * dw) + 0];
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+
+	if (tmp32 & (1 << 31)) {
+		msg_cerr("Flash chip size >= 4 Gb/512 MB not supported.\n");
+		return 1;
+	}
+	total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
+	flash->total_size = total_size / 1024;
+	msg_cdbg2("  Flash chip size is %d kB.\n", flash->total_size);
+	if (total_size > (1 << 24)) {
+		msg_cerr("Flash chip size is bigger than what 3-Byte addressing "
+			 "can access.\n");
+		return 1;
+	}
+
+	/* FIXME: double words 3-7 contain unused fast read information */
+
+	if (len == 4 * 4) {
+		msg_cdbg("It seems like this chip supports the preliminary "
+			 "Intel version of SFDP, skipping processing of double "
+			 "words 3-9.\n");
+		goto done;
+	}
+
+	dw = 8;
+	for (j = 0; j < 4; j++) {
+		/* 8 double words from the start + 2 words for every eraser */
+		tmp8 = buf[(4 * dw) + (2 * j)];
+		if (tmp8 == 0) {
+			msg_cdbg2("  Block eraser %d is unused.\n", j);
+			continue;
+		}
+		if (tmp8 >= 31) {
+			msg_cdbg2("  Block size of eraser %d (2^%d) is too big "
+				  "for flashrom.\n", j, tmp8);
+			continue;
+		}
+		block_size = 1 << (tmp8); /* block_size = 2 ^ field */
+
+		tmp8 = buf[(4 * dw) + (2 * j) + 1];
+		sfdp_add_uniform_eraser(flash, tmp8, block_size);
+	}
+
+done:
+	msg_cdbg("done.\n");
+	return 0;
+}
+
+int probe_spi_sfdp(struct flashctx *flash)
+{
+	int ret = 0;
+	uint8_t buf[8];
+	uint32_t tmp32;
+	uint8_t nph;
+	/* need to limit the table loop by comparing i to uint8_t nph hence: */
+	uint16_t i;
+	struct sfdp_tbl_hdr *hdrs;
+	uint8_t *hbuf;
+	uint8_t *tbuf;
+
+	if (spi_sfdp_read_sfdp(flash, 0x00, buf, 4)) {
+		msg_cdbg("Receiving SFDP signature failed.\n");
+		return 0;
+	}
+	tmp32 = buf[0];
+	tmp32 |= ((unsigned int)buf[1]) << 8;
+	tmp32 |= ((unsigned int)buf[2]) << 16;
+	tmp32 |= ((unsigned int)buf[3]) << 24;
+
+	if (tmp32 != 0x50444653) {
+		msg_cdbg2("Signature = 0x%08x (should be 0x50444653)\n", tmp32);
+		msg_cdbg("No SFDP signature found.\n");
+		return 0;
+	}
+
+	if (spi_sfdp_read_sfdp(flash, 0x04, buf, 3)) {
+		msg_cerr("Receiving SFDP revision and number of parameter "
+			 "headers (NPH) failed. ");
+		return 0;
+	}
+	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
+	if (buf[1] != 0x01) {
+		msg_cinfo("The chip supports an unknown version of SFDP. "
+			  "Aborting SFDP probe!\n");
+		return 0;
+	}
+	nph = buf[2];
+	msg_cdbg2("SFDP number of parameter headers is %d (NPH = %d).\n",
+		  nph + 1, nph);
+
+	/* Fetch all parameter headers, even if we don't use them all (yet). */
+	hbuf = malloc((nph + 1) * 8);
+	hdrs = malloc((nph + 1) * sizeof(struct sfdp_tbl_hdr));
+	if (hbuf == NULL || hdrs == NULL ) {
+		msg_gerr("Out of memory!\n");
+		goto cleanup_hdrs;
+	}
+	if (spi_sfdp_read_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) {
+		msg_cerr("Receiving SFDP parameter table headers failed.\n");
+		goto cleanup_hdrs;
+	}
+
+	for (i = 0; i <= nph; i++) {
+		uint16_t len;
+		hdrs[i].id = hbuf[(8 * i) + 0];
+		hdrs[i].v_minor = hbuf[(8 * i) + 1];
+		hdrs[i].v_major = hbuf[(8 * i) + 2];
+		hdrs[i].len = hbuf[(8 * i) + 3];
+		hdrs[i].ptp = hbuf[(8 * i) + 4];
+		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8;
+		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16;
+		msg_cdbg2("\nSFDP parameter table header %d/%d:\n", i, nph);
+		msg_cdbg2("  ID 0x%02x, version %d.%d\n", hdrs[i].id,
+			  hdrs[i].v_major, hdrs[i].v_minor);
+		len = hdrs[i].len * 4;
+		tmp32 = hdrs[i].ptp;
+		msg_cdbg2("  Length %d B, Parameter Table Pointer 0x%06x\n",
+			  len, tmp32);
+
+		if (tmp32 + len >= (1 << 24)) {
+			msg_cinfo("SFDP Parameter Table %d supposedly overflows "
+				  "addressable SFDP area. This most\nprobably "
+				  "indicates a corrupt SFDP parameter table "
+				  "header. Skipping it.\n", i);
+			continue;
+		}
+
+		tbuf = malloc(len);
+		if (tbuf == NULL) {
+			msg_gerr("Out of memory!\n");
+			goto cleanup_hdrs;
+		}
+		if (spi_sfdp_read_sfdp(flash, tmp32, tbuf, len)){
+			msg_cerr("Fetching SFDP parameter table %d failed.\n",
+				 i);
+			free(tbuf);
+			continue;
+		}
+		msg_cspew("  Parameter table contents:\n");
+		for (tmp32 = 0; tmp32 < len; tmp32++) {
+			if ((tmp32 % 8) == 0) {
+				msg_cspew("    0x%04x: ", tmp32);
+			}
+			msg_cspew(" %02x", buf[tmp32]);
+			if ((tmp32 % 8) == 7) {
+				msg_cspew("\n");
+				continue;
+			}
+			if ((tmp32 % 8) == 3) {
+				msg_cspew(" ");
+				continue;
+			}
+		}
+
+		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
+			if (hdrs[i].id != 0)
+				msg_cdbg("ID of the mandatory JEDEC SFDP "
+					 "parameter table is not 0 as demanded "
+					 "by JESD216 (warning only).\n");
+
+			if (hdrs[i].v_major != 0x01) {
+				msg_cinfo("The chip contains an unknown "
+					  "version of the JEDEC flash "
+					  "parameters table, skipping it.\n");
+			} else if (len != 9 * 4 && len != 4 * 4) {
+				msg_cdbg("Length of the mandatory JEDEC SFDP "
+					 "parameter table is wrong (%d B), "
+					 "skipping it.\n", len);
+			} else if (sfdp_fill_flash(flash, tbuf, len) == 0)
+				ret = 1;
+		}
+		free(tbuf);
+	}
+
+cleanup_hdrs:
+	free(hdrs);
+	free(hbuf);
+	return ret;
+}
diff --git a/spi.h b/spi.h
index b908603..5f07eae 100644
--- a/spi.h
+++ b/spi.h
@@ -40,6 +40,11 @@
 #define JEDEC_REMS_OUTSIZE	0x04
 #define JEDEC_REMS_INSIZE	0x02
 
+/* Read Serial Flash Discoverable Parameters (SFDP) */
+#define JEDEC_SFDP		0x5a
+#define JEDEC_SFDP_OUTSIZE	0x05	/* 8b op, 24b addr, 8b dummy */
+/*      JEDEC_SFDP_INSIZE : any length */
+
 /* Read Electronic Signature */
 #define JEDEC_RES		0xab
 #define JEDEC_RES_OUTSIZE	0x04
diff --git a/spi25.c b/spi25.c
index 3ce7f08..b7e8189 100644
--- a/spi25.c
+++ b/spi25.c
@@ -720,6 +720,32 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
 	return spi_chip_erase_c7(flash);
 }
 
+erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)
+{
+	switch(opcode){
+	case 0xff:
+	case 0x00:
+		/* Not specified, assuming "not supported". */
+		return NULL;
+	case 0x20:
+		return &spi_block_erase_20;
+	case 0x52:
+		return &spi_block_erase_52;
+	case 0x60:
+		return &spi_block_erase_60;
+	case 0xc7:
+		return &spi_block_erase_c7;
+	case 0xd7:
+		return &spi_block_erase_d7;
+	case 0xd8:
+		return &spi_block_erase_d8;
+	default:
+		msg_cinfo("%s: unknown erase opcode (0x%02x). Please report "
+			  "this at flashrom at flashrom.org\n", __func__, opcode);
+		return NULL;
+	}
+}
+
 int spi_write_status_enable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Fri Feb 17 03:25:33 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 03:25:33 +0100
Subject: [flashrom] [PATCH 2/2] fixup! Add support for SFDP (JESD216).
In-Reply-To: <4F3D9379.2040604@gmx.net>
References: <4F3D9379.2040604@gmx.net>
Message-ID: <1329445533-22172-2-git-send-email-stefan.tauner@student.tuwien.ac.at>


Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
we were wrong regarding the probing process... the generic probes are
executed apparently. this patch degrades all failure outputs (but OOM)
to dbg.

 sfdp.c |   22 +++++++++++-----------
 1 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/sfdp.c b/sfdp.c
index 6a76994..75dfb5f 100644
--- a/sfdp.c
+++ b/sfdp.c
@@ -123,7 +123,7 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 
 	msg_cdbg("Parsing JEDEC flash parameter table... ");
 	if (len != 9 * 4 && len != 4 * 4) {
-		msg_cerr("%s: len out of spec\n", __func__);
+		msg_cdbg("%s: len out of spec\n", __func__);
 		return 1;
 	}
 	msg_cdbg2("\n");
@@ -144,11 +144,11 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
 		break;
 	case 0x2:
-		msg_cerr("  4-Byte only addressing (not supported by "
+		msg_cdbg("  4-Byte only addressing (not supported by "
 			 "flashrom).\n");
 		return 1;
 	default:
-		msg_cerr("  Required addressing mode (0x%x) not supported.\n",
+		msg_cdbg("  Required addressing mode (0x%x) not supported.\n",
 			 tmp8);
 		return 1;
 	}
@@ -192,14 +192,14 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
 
 	if (tmp32 & (1 << 31)) {
-		msg_cerr("Flash chip size >= 4 Gb/512 MB not supported.\n");
+		msg_cdbg("Flash chip size >= 4 Gb/512 MB not supported.\n");
 		return 1;
 	}
 	total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
 	flash->total_size = total_size / 1024;
 	msg_cdbg2("  Flash chip size is %d kB.\n", flash->total_size);
 	if (total_size > (1 << 24)) {
-		msg_cerr("Flash chip size is bigger than what 3-Byte addressing "
+		msg_cdbg("Flash chip size is bigger than what 3-Byte addressing "
 			 "can access.\n");
 		return 1;
 	}
@@ -265,13 +265,13 @@ int probe_spi_sfdp(struct flashctx *flash)
 	}
 
 	if (spi_sfdp_read_sfdp(flash, 0x04, buf, 3)) {
-		msg_cerr("Receiving SFDP revision and number of parameter "
+		msg_cdbg("Receiving SFDP revision and number of parameter "
 			 "headers (NPH) failed. ");
 		return 0;
 	}
 	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
 	if (buf[1] != 0x01) {
-		msg_cinfo("The chip supports an unknown version of SFDP. "
+		msg_cdbg("The chip supports an unknown version of SFDP. "
 			  "Aborting SFDP probe!\n");
 		return 0;
 	}
@@ -287,7 +287,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 		goto cleanup_hdrs;
 	}
 	if (spi_sfdp_read_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) {
-		msg_cerr("Receiving SFDP parameter table headers failed.\n");
+		msg_cdbg("Receiving SFDP parameter table headers failed.\n");
 		goto cleanup_hdrs;
 	}
 
@@ -309,7 +309,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 			  len, tmp32);
 
 		if (tmp32 + len >= (1 << 24)) {
-			msg_cinfo("SFDP Parameter Table %d supposedly overflows "
+			msg_cdbg("SFDP Parameter Table %d supposedly overflows "
 				  "addressable SFDP area. This most\nprobably "
 				  "indicates a corrupt SFDP parameter table "
 				  "header. Skipping it.\n", i);
@@ -322,7 +322,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 			goto cleanup_hdrs;
 		}
 		if (spi_sfdp_read_sfdp(flash, tmp32, tbuf, len)){
-			msg_cerr("Fetching SFDP parameter table %d failed.\n",
+			msg_cdbg("Fetching SFDP parameter table %d failed.\n",
 				 i);
 			free(tbuf);
 			continue;
@@ -350,7 +350,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 					 "by JESD216 (warning only).\n");
 
 			if (hdrs[i].v_major != 0x01) {
-				msg_cinfo("The chip contains an unknown "
+				msg_cdbg("The chip contains an unknown "
 					  "version of the JEDEC flash "
 					  "parameters table, skipping it.\n");
 			} else if (len != 9 * 4 && len != 4 * 4) {
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Fri Feb 17 03:37:54 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 03:37:54 +0100
Subject: [flashrom] [PATCH] flashrom 0.9.5
In-Reply-To: <4F3D7105.9050806@gmx.net>
References: <4F3D7105.9050806@gmx.net>
Message-ID: <201202170237.q1H2bApB009923@mail2.student.tuwien.ac.at>

On Thu, 16 Feb 2012 22:11:33 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Increase flashrom release number to 0.9.5
> 
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> 
> Index: flashrom-0.9.5-release/Makefile
> ===================================================================
> --- flashrom-0.9.5-release/Makefile	(Revision 1499)
> +++ flashrom-0.9.5-release/Makefile	(Arbeitskopie)
> @@ -277,7 +277,7 @@
>  # will not require subversion. The downloadable snapshots are already exported.
>  SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown)
>  
> -RELEASE := 0.9.4
> +RELEASE := 0.9.5
>  VERSION := $(RELEASE)-r$(SVNVERSION)
>  RELEASENAME ?= $(VERSION)
>  
> 
> 

id wish to push this tonight (after sfdp is in) and release 0.9.6 (or
0.9.5.1) in about 2-3 weeks (real weeks, not carldani weeks ;) with log
file support and a few other small, easily reviewed bits.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Fri Feb 17 03:39:40 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 03:39:40 +0100
Subject: [flashrom] [PATCH] Add a bunch of new/tested stuff and various
 small changes 10
In-Reply-To: <1329089601-7810-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329089601-7810-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <201202170238.q1H2cvM3010518@mail2.student.tuwien.ac.at>

was committed with some additional changes in r1499.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From mightyiampresence at gmail.com  Fri Feb 17 10:10:08 2012
From: mightyiampresence at gmail.com (Shahar Or)
Date: Fri, 17 Feb 2012 11:10:08 +0200
Subject: [flashrom] Verified working on Gigabyte 880GMA-USB3
In-Reply-To: <201202131353.q1DDrVrC018002@mail2.student.tuwien.ac.at>
References: <CAF3gKsyc4+=BjBFRkwMxW+zb+ObFZsYhtXQjC1zBMFOYoiodOg@mail.gmail.com>
	<201202131353.q1DDrVrC018002@mail2.student.tuwien.ac.at>
Message-ID: <CAF3gKsyhwTdu9+-GY2q0Oxw7kO+epH=pJoU9kDqVYO1VkWaT_Q@mail.gmail.com>

On 13 February 2012 15:54, Stefan Tauner
<stefan.tauner at student.tuwien.ac.at> wrote:
>
> On Mon, 13 Feb 2012 12:09:53 +0200
> Shahar Or <mightyiampresence at gmail.com> wrote:
>
> > Dear ones,
> >
> > I'm not subscribed to the list so please reply directly.
> >
> > I've tested read and write on Gigabyte GA-880GMA-USB3 (rev 3.1).
> >
> > Thanks so much for enabling me to flash my BIOS ROM from Linux!
> >
> > Here's the link to the mainboard's page in Gigabyte:
> > http://www.gigabyte.com/products/product-page.aspx?pid=3817
>
>
> Hello Shahar,
>
> thanks for your report! I have marked the mainboard as tested and will
> commit that later together with other small changes. It would be
> appreciated if you could upload verbose logs of flashrom with such
> reports (at least a verbose probing with flashrom -V).

Alright you're welcome.

Here's the 'flashrom -V' output attached.
>
> --
> Kind regards/Mit freundlichen Gr??en, Stefan Tauner

Thank you for all the work!

Blessings,
Shahar
-------------- next part --------------
A non-text attachment was scrubbed...
Name: flashrom-V.log.GA-880GMA-USB3
Type: application/octet-stream
Size: 20569 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120217/52fb8a32/attachment-0001.obj>

From stefan.tauner at student.tuwien.ac.at  Fri Feb 17 12:57:53 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 12:57:53 +0100
Subject: [flashrom] [PATCH] flashrom 0.9.5
In-Reply-To: <201202170237.q1H2bApB009923@mail2.student.tuwien.ac.at>
References: <4F3D7105.9050806@gmx.net>
	<201202170237.q1H2bApB009923@mail2.student.tuwien.ac.at>
Message-ID: <201202171157.q1HBv9YX022996@mail2.student.tuwien.ac.at>

On Fri, 17 Feb 2012 03:37:54 +0100
Stefan Tauner <stefan.tauner at student.tuwien.ac.at> wrote:

> id wish to push this tonight (after sfdp is in) and release 0.9.6 (or
> 0.9.5.1) in about 2-3 weeks (real weeks, not carldani weeks ;) with log
> file support and a few other small, easily reviewed bits.

because i dont want to have a 0.9.5 experience ever again, i plan to
plan (and push more) for 0.9.6.

here is my preliminary todo list for 0.9.6:
http://flashrom.org/Flashrom/0.9.6

it focuses on small and less controversial (hopefully) patches and is
just a proposal?

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb 17 15:20:59 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 17 Feb 2012 15:20:59 +0100
Subject: [flashrom] [PATCH 2/2] fixup! Add support for SFDP (JESD216).
In-Reply-To: <1329445533-22172-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <4F3D9379.2040604@gmx.net>
	<1329445533-22172-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F3E624B.3020907@gmx.net>

Am 17.02.2012 03:25 schrieb Stefan Tauner:
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
> we were wrong regarding the probing process... the generic probes are
> executed apparently. this patch degrades all failure outputs (but OOM)
> to dbg.

Not sure if you want to reindent the messages for the cinfo->cdbg
change. Either way is OK.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From svn at flashrom.org  Fri Feb 17 15:51:04 2012
From: svn at flashrom.org (repository service)
Date: Fri, 17 Feb 2012 15:51:04 +0100
Subject: [flashrom] [commit] r1500 - trunk
Message-ID: <E1RyP9M-00063K-QD@ra.coresystems.de>

Author: stefanct
Date: Fri Feb 17 15:51:04 2012
New Revision: 1500
URL: http://flashrom.org/trac/flashrom/changeset/1500

Log:
Add support for SFDP (JESD216).

Similar to modules using the opaque programmer framework (e.g. ICH Hardware
Sequencing) this uses a template struct flashchip element in flashchips.c with
a special probe function that fills the obtained values into that struct.

This allows yet unknown SPI chips to be supported (read, erase, write) almost
as if it was already added to flashchips.c.

Documentation used:
http://www.jedec.org/standards-documents/docs/jesd216 (2011-04)
W25Q32BV data sheet Revision F (2011-04-01)
EN25QH16 data sheet Revision F (2011-06-01)
MX25L6436E data sheet Revision 1.8 (2011-12-26)

Tested-by: David Hendricks <dhendrix at google.com>
on W25Q64CV + dediprog
Tested-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
on a 2010 MX25L6436E with preliminary (i.e. incorrect) SFDP implementation + serprog

Thanks also to Michael Karcher for his comments and preliminary review!

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Added:
   trunk/sfdp.c   (contents, props changed)
Modified:
   trunk/Makefile
   trunk/chipdrivers.h
   trunk/flash.h
   trunk/flashchips.c
   trunk/flashchips.h
   trunk/flashrom.c
   trunk/spi.h
   trunk/spi25.c

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/Makefile	Fri Feb 17 15:51:04 2012	(r1500)
@@ -261,7 +261,7 @@
 CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \
 	sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \
 	sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \
-	a25.o at25.o opaque.o
+	a25.o at25.o opaque.o sfdp.o
 
 LIB_OBJS = layout.o
 

Modified: trunk/chipdrivers.h
==============================================================================
--- trunk/chipdrivers.h	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/chipdrivers.h	Fri Feb 17 15:51:04 2012	(r1500)
@@ -41,6 +41,7 @@
 int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode);
 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len);
@@ -58,6 +59,9 @@
 int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize);
 int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 
+/* sfdp.c */
+int probe_spi_sfdp(struct flashctx *flash);
+
 /* opaque.c */
 int probe_opaque(struct flashctx *flash);
 int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);

Modified: trunk/flash.h
==============================================================================
--- trunk/flash.h	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/flash.h	Fri Feb 17 15:51:04 2012	(r1500)
@@ -175,6 +175,8 @@
 	struct registered_programmer *pgm;
 };
 
+typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
+
 #define TEST_UNTESTED	0
 
 #define TEST_OK_PROBE	(1 << 0)

Modified: trunk/flashchips.c
==============================================================================
--- trunk/flashchips.c	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/flashchips.c	Fri Feb 17 15:51:04 2012	(r1500)
@@ -8885,6 +8885,29 @@
 		.read		= read_memmapped,
 		.voltage	= {3000, 3600}, /* Also has 12V fast program */
 	},
+	
+	{
+		.vendor		= "Unknown",
+		.name		= "SFDP-capable chip",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GENERIC_MANUF_ID,
+		.model_id	= SFDP_DEVICE_ID,
+		/* We present our own "report this" text hence we do not
+		 * want the default "This flash part has status UNTESTED..."
+		 * text to be printed. */
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_sfdp,
+		.unlock		= spi_disable_blockprotect, /* is this safe? */
+		.read		= spi_chip_read,
+		/* FIXME: some vendor extensions define this */
+		.voltage	= {},
+		 /* Everything below will be set by the probing function. */
+		.write		= NULL,
+		.total_size	= 0,
+		.page_size	= 0,
+		.feature_bits	= 0,
+		.block_erasers	= {},
+	},
 
 	{
 		.vendor		= "Programmer",

Modified: trunk/flashchips.h
==============================================================================
--- trunk/flashchips.h	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/flashchips.h	Fri Feb 17 15:51:04 2012	(r1500)
@@ -34,8 +34,11 @@
  * SPI parts have 16-bit device IDs if they support RDID.
  */
 
-#define GENERIC_MANUF_ID	0xffff	/* Check if there is a vendor ID */
-#define GENERIC_DEVICE_ID	0xffff	/* Only match the vendor ID */
+#define GENERIC_MANUF_ID	0xFFFF	/* Check if there is a vendor ID */
+#define GENERIC_DEVICE_ID	0xFFFF	/* Only match the vendor ID */
+#define SFDP_DEVICE_ID		0xFFFE
+#define PROGMANUF_ID		0xFFFE	/* dummy ID for opaque chips behind a programmer */
+#define PROGDEV_ID		0x01	/* dummy ID for opaque chips behind a programmer */
 
 #define ALLIANCE_ID		0x52	/* Alliance Semiconductor */
 #define ALLIANCE_AS29F002B	0x34
@@ -646,7 +649,4 @@
 #define WINBOND_W49V002A	0xB0
 #define WINBOND_W49V002FA	0x32
 
-#define PROGMANUF_ID		0xFFFE	/* dummy ID for opaque chips behind a programmer */
-#define PROGDEV_ID		0x01	/* dummy ID for opaque chips behind a programmer */
-
 #endif /* !FLASHCHIPS_H */

Modified: trunk/flashrom.c
==============================================================================
--- trunk/flashrom.c	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/flashrom.c	Fri Feb 17 15:51:04 2012	(r1500)
@@ -980,13 +980,38 @@
 
 		/* If this is the first chip found, accept it.
 		 * If this is not the first chip found, accept it only if it is
-		 * a non-generic match.
-		 * We could either make chipcount global or provide it as
-		 * parameter, or we assume that startchip==0 means this call to
-		 * probe_flash() is the first one and thus no chip has been
-		 * found before.
+		 * a non-generic match. SFDP and CFI are generic matches.
+		 * startchip==0 means this call to probe_flash() is the first
+		 * one for this programmer interface and thus no other chip has
+		 * been found on this interface.
 		 */
-		if (startchip == 0 || fill_flash->model_id != GENERIC_DEVICE_ID)
+		if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) {
+			msg_cinfo("===\n"
+				  "SFDP has autodetected a flash chip which is "
+				  "not natively supported by flashrom yet.\n");
+			if (count_usable_erasers(fill_flash) == 0)
+				msg_cinfo("The standard operations read and "
+					  "verify should work, but to support "
+					  "erase, write and all other "
+					  "possible features");
+			else
+				msg_cinfo("All standard operations (read, "
+					  "verify, erase and write) should "
+					  "work, but to support all possible "
+					  "features");
+
+			msg_cinfo(" we need to add them manually.\nYou "
+				  "can help us by mailing us the output of "
+				  "the following command to flashrom at flashrom."
+				  "org: \n'flashrom -VV [plus the "
+				  "-p/--programmer parameter (if needed)]"
+				  "'\nThanks for your help!\n"
+				  "===\n");
+		}
+
+		if (startchip == 0 ||
+		    ((fill_flash->model_id != GENERIC_DEVICE_ID) &&
+		     (fill_flash->model_id != SFDP_DEVICE_ID)))
 			break;
 
 notfound:

Added: trunk/sfdp.c
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ trunk/sfdp.c	Fri Feb 17 15:51:04 2012	(r1500)
@@ -0,0 +1,370 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2011-2012 Stefan Tauner
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "flash.h"
+#include "spi.h"
+#include "chipdrivers.h"
+
+static int spi_sfdp_read_sfdp_chunk(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
+{
+	int i, ret;
+	const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = {
+		JEDEC_SFDP,
+		(address >> 16) & 0xff,
+		(address >> 8) & 0xff,
+		(address >> 0) & 0xff,
+		/* FIXME: the following dummy byte explodes on some programmers.
+		 * One possible workaround would be to read the dummy byte
+		 * instead and discard its value.
+		 */
+		0
+	};
+	msg_cspew("%s: addr=0x%x, len=%d, data:\n", __func__, address, len);
+	ret = spi_send_command(flash, sizeof(cmd), len, cmd, buf);
+	for (i = 0; i < len; i++)
+		msg_cspew(" 0x%02x", buf[i]);
+	msg_cspew("\n");
+	return ret;
+}
+
+static int spi_sfdp_read_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
+{
+	/* FIXME: this is wrong. There are different upper bounds for the number
+	 * of bytes to read on the various programmers (even depending on the
+	 * rest of the structure of the transaction).*/
+	int maxstep = 8;
+	int ret = 0;
+	while (len > 0) {
+		int step = min(len, maxstep);
+		ret = spi_sfdp_read_sfdp_chunk(flash, address, buf, step);
+		if (ret)
+			return ret;
+		address += step;
+		buf += step;
+		len -= step;
+	}
+	return ret;
+}
+
+struct sfdp_tbl_hdr {
+	uint8_t id;
+	uint8_t v_minor;
+	uint8_t v_major;
+	uint8_t len;
+	uint32_t ptp; /* 24b pointer */
+};
+
+static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint32_t block_size)
+{
+	int i;
+	uint32_t total_size = flash->total_size * 1024;
+	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
+
+	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
+		msg_cdbg("%s: invalid input\n", __func__);
+		return 1;
+	}
+
+	for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
+		struct block_eraser *eraser = &flash->block_erasers[i];
+		/* Check for duplicates (including (some) non-uniform ones). */
+		if (eraser->eraseblocks[0].size == block_size &&
+		    eraser->block_erase == erasefn) {
+			msg_cdbg2("  Tried to add a duplicate block eraser: "
+				  "%d x %d B with opcode 0x%02x\n",
+				  total_size/block_size, block_size, opcode);
+			return 1;
+		}
+		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
+			msg_cspew("  Block Eraser %d is already occupied.\n",
+				  i);
+			continue;
+		}
+
+		eraser->block_erase = erasefn;
+		eraser->eraseblocks[0].size = block_size;
+		eraser->eraseblocks[0].count = total_size/block_size;
+		msg_cdbg2("  Block eraser %d: %d x %d B with opcode "
+			  "0x%02x\n", i, total_size/block_size, block_size,
+			  opcode);
+		return 0;
+	}
+	msg_cinfo("%s: Not enough space to store another eraser (i=%d)."
+		  " Please report this at flashrom at flashrom.org\n",
+		  __func__, i);
+	return 1;
+}
+
+static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
+{
+	uint32_t tmp32;
+	uint8_t tmp8;
+	uint32_t total_size; /* in bytes */
+	uint32_t block_size;
+	int dw, j;
+
+	msg_cdbg("Parsing JEDEC flash parameter table... ");
+	if (len != 9 * 4 && len != 4 * 4) {
+		msg_cdbg("%s: len out of spec\n", __func__);
+		return 1;
+	}
+	msg_cdbg2("\n");
+	
+	/* 1. double word */
+	dw = 0;
+	tmp32 = buf[(4 * dw) + 0];
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+
+	tmp8 = (tmp32 >> 17) & 0x3;
+	switch (tmp8) {
+	case 0x0:
+		msg_cdbg2("  3-Byte only addressing.\n");
+		break;
+	case 0x1:
+		msg_cdbg2("  3-Byte (and optionally 4-Byte) addressing.\n");
+		break;
+	case 0x2:
+		msg_cdbg("  4-Byte only addressing (not supported by "
+			 "flashrom).\n");
+		return 1;
+	default:
+		msg_cdbg("  Required addressing mode (0x%x) not supported.\n",
+			 tmp8);
+		return 1;
+	}
+
+	msg_cdbg2("  Status register is ");
+	if (tmp32 & (1 << 3)) {
+		msg_cdbg2("volatile and writes to the status register have to "
+			  "be enabled with ");
+		if (tmp32 & (1 << 4)) {
+			flash->feature_bits = FEATURE_WRSR_WREN;
+			msg_cdbg2("WREN (0x06).\n");
+		} else {
+			flash->feature_bits = FEATURE_WRSR_EWSR;
+			msg_cdbg2("EWSR (0x50).\n");
+		}
+	} else
+		msg_cdbg2("non-volatile and the standard does not allow "
+			  "vendors to tell us whether EWSR/WREN is needed for "
+			  "status register writes - assuming EWSR.\n");
+
+	msg_cdbg2("  Write chunk size is ");
+	if (tmp32 & (1 << 2)) {
+		msg_cdbg2("at least 64 B.\n");
+		flash->page_size = 64;
+		flash->write = spi_chip_write_256;
+	} else {
+		msg_cdbg2("1 B only.\n");
+		flash->page_size = 256;
+		flash->write = spi_chip_write_1;
+	}
+
+	if ((tmp32 & 0x3) == 0x1) {
+		sfdp_add_uniform_eraser(flash, (tmp32 >> 8) & 0xFF, 4 * 1024);
+	}
+
+	/* 2. double word */
+	dw = 1;
+	tmp32 = buf[(4 * dw) + 0];
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+
+	if (tmp32 & (1 << 31)) {
+		msg_cdbg("Flash chip size >= 4 Gb/512 MB not supported.\n");
+		return 1;
+	}
+	total_size = ((tmp32 & 0x7FFFFFFF) + 1) / 8;
+	flash->total_size = total_size / 1024;
+	msg_cdbg2("  Flash chip size is %d kB.\n", flash->total_size);
+	if (total_size > (1 << 24)) {
+		msg_cdbg("Flash chip size is bigger than what 3-Byte addressing "
+			 "can access.\n");
+		return 1;
+	}
+
+	/* FIXME: double words 3-7 contain unused fast read information */
+
+	if (len == 4 * 4) {
+		msg_cdbg("It seems like this chip supports the preliminary "
+			 "Intel version of SFDP, skipping processing of double "
+			 "words 3-9.\n");
+		goto done;
+	}
+
+	dw = 8;
+	for (j = 0; j < 4; j++) {
+		/* 8 double words from the start + 2 words for every eraser */
+		tmp8 = buf[(4 * dw) + (2 * j)];
+		if (tmp8 == 0) {
+			msg_cdbg2("  Block eraser %d is unused.\n", j);
+			continue;
+		}
+		if (tmp8 >= 31) {
+			msg_cdbg2("  Block size of eraser %d (2^%d) is too big "
+				  "for flashrom.\n", j, tmp8);
+			continue;
+		}
+		block_size = 1 << (tmp8); /* block_size = 2 ^ field */
+
+		tmp8 = buf[(4 * dw) + (2 * j) + 1];
+		sfdp_add_uniform_eraser(flash, tmp8, block_size);
+	}
+
+done:
+	msg_cdbg("done.\n");
+	return 0;
+}
+
+int probe_spi_sfdp(struct flashctx *flash)
+{
+	int ret = 0;
+	uint8_t buf[8];
+	uint32_t tmp32;
+	uint8_t nph;
+	/* need to limit the table loop by comparing i to uint8_t nph hence: */
+	uint16_t i;
+	struct sfdp_tbl_hdr *hdrs;
+	uint8_t *hbuf;
+	uint8_t *tbuf;
+
+	if (spi_sfdp_read_sfdp(flash, 0x00, buf, 4)) {
+		msg_cdbg("Receiving SFDP signature failed.\n");
+		return 0;
+	}
+	tmp32 = buf[0];
+	tmp32 |= ((unsigned int)buf[1]) << 8;
+	tmp32 |= ((unsigned int)buf[2]) << 16;
+	tmp32 |= ((unsigned int)buf[3]) << 24;
+
+	if (tmp32 != 0x50444653) {
+		msg_cdbg2("Signature = 0x%08x (should be 0x50444653)\n", tmp32);
+		msg_cdbg("No SFDP signature found.\n");
+		return 0;
+	}
+
+	if (spi_sfdp_read_sfdp(flash, 0x04, buf, 3)) {
+		msg_cdbg("Receiving SFDP revision and number of parameter "
+			 "headers (NPH) failed. ");
+		return 0;
+	}
+	msg_cdbg2("SFDP revision = %d.%d\n", buf[1], buf[0]);
+	if (buf[1] != 0x01) {
+		msg_cdbg("The chip supports an unknown version of SFDP. "
+			  "Aborting SFDP probe!\n");
+		return 0;
+	}
+	nph = buf[2];
+	msg_cdbg2("SFDP number of parameter headers is %d (NPH = %d).\n",
+		  nph + 1, nph);
+
+	/* Fetch all parameter headers, even if we don't use them all (yet). */
+	hbuf = malloc((nph + 1) * 8);
+	hdrs = malloc((nph + 1) * sizeof(struct sfdp_tbl_hdr));
+	if (hbuf == NULL || hdrs == NULL ) {
+		msg_gerr("Out of memory!\n");
+		goto cleanup_hdrs;
+	}
+	if (spi_sfdp_read_sfdp(flash, 0x08, hbuf, (nph + 1) * 8)) {
+		msg_cdbg("Receiving SFDP parameter table headers failed.\n");
+		goto cleanup_hdrs;
+	}
+
+	for (i = 0; i <= nph; i++) {
+		uint16_t len;
+		hdrs[i].id = hbuf[(8 * i) + 0];
+		hdrs[i].v_minor = hbuf[(8 * i) + 1];
+		hdrs[i].v_major = hbuf[(8 * i) + 2];
+		hdrs[i].len = hbuf[(8 * i) + 3];
+		hdrs[i].ptp = hbuf[(8 * i) + 4];
+		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 5]) << 8;
+		hdrs[i].ptp |= ((unsigned int)hbuf[(8 * i) + 6]) << 16;
+		msg_cdbg2("\nSFDP parameter table header %d/%d:\n", i, nph);
+		msg_cdbg2("  ID 0x%02x, version %d.%d\n", hdrs[i].id,
+			  hdrs[i].v_major, hdrs[i].v_minor);
+		len = hdrs[i].len * 4;
+		tmp32 = hdrs[i].ptp;
+		msg_cdbg2("  Length %d B, Parameter Table Pointer 0x%06x\n",
+			  len, tmp32);
+
+		if (tmp32 + len >= (1 << 24)) {
+			msg_cdbg("SFDP Parameter Table %d supposedly overflows "
+				  "addressable SFDP area. This most\nprobably "
+				  "indicates a corrupt SFDP parameter table "
+				  "header. Skipping it.\n", i);
+			continue;
+		}
+
+		tbuf = malloc(len);
+		if (tbuf == NULL) {
+			msg_gerr("Out of memory!\n");
+			goto cleanup_hdrs;
+		}
+		if (spi_sfdp_read_sfdp(flash, tmp32, tbuf, len)){
+			msg_cdbg("Fetching SFDP parameter table %d failed.\n",
+				 i);
+			free(tbuf);
+			continue;
+		}
+		msg_cspew("  Parameter table contents:\n");
+		for (tmp32 = 0; tmp32 < len; tmp32++) {
+			if ((tmp32 % 8) == 0) {
+				msg_cspew("    0x%04x: ", tmp32);
+			}
+			msg_cspew(" %02x", buf[tmp32]);
+			if ((tmp32 % 8) == 7) {
+				msg_cspew("\n");
+				continue;
+			}
+			if ((tmp32 % 8) == 3) {
+				msg_cspew(" ");
+				continue;
+			}
+		}
+
+		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
+			if (hdrs[i].id != 0)
+				msg_cdbg("ID of the mandatory JEDEC SFDP "
+					 "parameter table is not 0 as demanded "
+					 "by JESD216 (warning only).\n");
+
+			if (hdrs[i].v_major != 0x01) {
+				msg_cdbg("The chip contains an unknown "
+					  "version of the JEDEC flash "
+					  "parameters table, skipping it.\n");
+			} else if (len != 9 * 4 && len != 4 * 4) {
+				msg_cdbg("Length of the mandatory JEDEC SFDP "
+					 "parameter table is wrong (%d B), "
+					 "skipping it.\n", len);
+			} else if (sfdp_fill_flash(flash, tbuf, len) == 0)
+				ret = 1;
+		}
+		free(tbuf);
+	}
+
+cleanup_hdrs:
+	free(hdrs);
+	free(hbuf);
+	return ret;
+}

Modified: trunk/spi.h
==============================================================================
--- trunk/spi.h	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/spi.h	Fri Feb 17 15:51:04 2012	(r1500)
@@ -40,6 +40,11 @@
 #define JEDEC_REMS_OUTSIZE	0x04
 #define JEDEC_REMS_INSIZE	0x02
 
+/* Read Serial Flash Discoverable Parameters (SFDP) */
+#define JEDEC_SFDP		0x5a
+#define JEDEC_SFDP_OUTSIZE	0x05	/* 8b op, 24b addr, 8b dummy */
+/*      JEDEC_SFDP_INSIZE : any length */
+
 /* Read Electronic Signature */
 #define JEDEC_RES		0xab
 #define JEDEC_RES_OUTSIZE	0x04

Modified: trunk/spi25.c
==============================================================================
--- trunk/spi25.c	Thu Feb 16 22:07:07 2012	(r1499)
+++ trunk/spi25.c	Fri Feb 17 15:51:04 2012	(r1500)
@@ -720,6 +720,32 @@
 	return spi_chip_erase_c7(flash);
 }
 
+erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode)
+{
+	switch(opcode){
+	case 0xff:
+	case 0x00:
+		/* Not specified, assuming "not supported". */
+		return NULL;
+	case 0x20:
+		return &spi_block_erase_20;
+	case 0x52:
+		return &spi_block_erase_52;
+	case 0x60:
+		return &spi_block_erase_60;
+	case 0xc7:
+		return &spi_block_erase_c7;
+	case 0xd7:
+		return &spi_block_erase_d7;
+	case 0xd8:
+		return &spi_block_erase_d8;
+	default:
+		msg_cinfo("%s: unknown erase opcode (0x%02x). Please report "
+			  "this at flashrom at flashrom.org\n", __func__, opcode);
+		return NULL;
+	}
+}
+
 int spi_write_status_enable(struct flashctx *flash)
 {
 	static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };


From svn at flashrom.org  Fri Feb 17 15:51:15 2012
From: svn at flashrom.org (repository service)
Date: Fri, 17 Feb 2012 15:51:15 +0100
Subject: [flashrom] [commit] r1501 - trunk
Message-ID: <E1RyP9X-00067e-T1@ra.coresystems.de>

Author: stefanct
Date: Fri Feb 17 15:51:15 2012
New Revision: 1501
URL: http://flashrom.org/trac/flashrom/changeset/1501

Log:
Add board enable for ASUS OPLX-M.

The vendor enable does some other funky stuff with MTRRs/MSRs, SMIs,
cache and legacy ISA address forward twiddling. I would only use
this patch to read and verify the existing contents, just to be safe.

The PCI IDs of the onboard devices do contain no subsystem IDs at all.

Probing and reading was
Tested-by: Ville Skytt? <ville.skytta at iki.fi>
See http://www.flashrom.org/pipermail/flashrom/2010-October/005256.html

Signed-off-by: Joshua Roys <roysjosh at gmail.com>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/board_enable.c
   trunk/print.c

Modified: trunk/board_enable.c
==============================================================================
--- trunk/board_enable.c	Fri Feb 17 15:51:04 2012	(r1500)
+++ trunk/board_enable.c	Fri Feb 17 15:51:15 2012	(r1501)
@@ -1240,6 +1240,7 @@
 
 /*
  * Suited for:
+ *  - ASUS OPLX-M
  *  - ASUS P2B-N
  */
 static int intel_piix4_gpo18_lower(void)
@@ -2144,6 +2145,7 @@
 	{0x10DE, 0x0264, 0x1043, 0x81C0,  0x10DE, 0x0260, 0x1043, 0x81C0, NULL,         NULL, NULL,           P3, "ASUS",        "M2NBP-VM CSM",          0,   OK, nvidia_mcp_gpio0_raise},
 	{0x1106, 0x1336, 0x1043, 0x80ed,  0x1106, 0x3288, 0x1043, 0x8249, NULL,         NULL, NULL,           P3, "ASUS",        "M2V-MX",                0,   OK, via_vt823x_gpio5_raise},
 	{0x8086, 0x24cc,      0,      0,  0x8086, 0x24c3, 0x1043, 0x1869, "^M6Ne$",     NULL, NULL,           P3, "ASUS",        "M6Ne",                  0,   NT, intel_ich_gpio43_raise},
+	{0x8086, 0x7180,      0,      0,  0x8086, 0x7110,      0,      0, "^OPLX-M$",   NULL, NULL,           P3, "ASUS",        "OPLX-M",                0,   NT, intel_piix4_gpo18_lower},
 	{0x8086, 0x7190,      0,      0,  0x8086, 0x7110,      0,      0, "^P2B-N$",    NULL, NULL,           P3, "ASUS",        "P2B-N",                 0,   OK, intel_piix4_gpo18_lower},
 	{0x8086, 0x1A30, 0x1043, 0x8025,  0x8086, 0x244B, 0x104D, 0x80F0, NULL,         NULL, NULL,           P3, "ASUS",        "P4B266-LM",             0,   OK, intel_ich_gpio21_raise},
 	{0x8086, 0x1a30, 0x1043, 0x8070,  0x8086, 0x244b, 0x1043, 0x8028, NULL,         NULL, NULL,           P3, "ASUS",        "P4B266",                0,   OK, intel_ich_gpio22_raise},

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Fri Feb 17 15:51:04 2012	(r1500)
+++ trunk/print.c	Fri Feb 17 15:51:15 2012	(r1501)
@@ -642,6 +642,7 @@
 	B("ASUS",	"M5A99X EVO",		1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
 	B("ASUS",	"MEW-AM",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
 	B("ASUS",	"MEW-VM",		0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("ASUS",	"OPLX-M",		0, NULL, "Untested board enable."),
 	B("ASUS",	"P2B",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
 	B("ASUS",	"P2B-D",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
 	B("ASUS",	"P2B-DS",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),


From stefan.tauner at student.tuwien.ac.at  Fri Feb 17 15:53:35 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 15:53:35 +0100
Subject: [flashrom] [PATCH 2/2] fixup! Add support for SFDP (JESD216).
In-Reply-To: <4F3E624B.3020907@gmx.net>
References: <4F3D9379.2040604@gmx.net>
	<1329445533-22172-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F3E624B.3020907@gmx.net>
Message-ID: <201202171452.q1HEqoFq005880@mail2.student.tuwien.ac.at>

On Fri, 17 Feb 2012 15:20:59 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 17.02.2012 03:25 schrieb Stefan Tauner:
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> > ---
> > we were wrong regarding the probing process... the generic probes are
> > executed apparently. this patch degrades all failure outputs (but OOM)
> > to dbg.
> 
> Not sure if you want to reindent the messages for the cinfo->cdbg
> change. Either way is OK.
> 
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> 
> Regards,
> Carl-Daniel
> 

Thanks!
committed in r1500 with a grin. :)

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at gmx.at  Fri Feb 17 15:57:28 2012
From: stefan.tauner at gmx.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 15:57:28 +0100
Subject: [flashrom] ASUS OPLX-M results (no flash device found)
In-Reply-To: <201010252324.49559.ville.skytta@iki.fi>
Message-ID: <mailman.0.1329492502.14581.flashrom@flashrom.org>

i have rebased and committed that (untested) board enable now in r1501
to reduce the patch pile.

Ville: thanks for testing!
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From milosz.kedziora at gmail.com  Fri Feb 17 16:45:40 2012
From: milosz.kedziora at gmail.com (Milosz Kedziora)
Date: Fri, 17 Feb 2012 16:45:40 +0100
Subject: [flashrom] ASROCK 330HT: flashrom -V
Message-ID: <CAMkN_-9=e_fQu5rxG6MOujF+RRNO8PqgP2_m1nc=2sG_OTk3YA@mail.gmail.com>

in att

best regards
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120217/403dcd37/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: flashrom_v
Type: application/octet-stream
Size: 13772 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120217/403dcd37/attachment.obj>

From stefan.tauner at student.tuwien.ac.at  Fri Feb 17 20:13:53 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Fri, 17 Feb 2012 20:13:53 +0100
Subject: [flashrom] [PATCH] flashrom 0.9.5
In-Reply-To: <4F3D7105.9050806@gmx.net>
References: <4F3D7105.9050806@gmx.net>
Message-ID: <201202171913.q1HJD7ZH018483@mail2.student.tuwien.ac.at>

On Thu, 16 Feb 2012 22:11:33 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Increase flashrom release number to 0.9.5
> 
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> 
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Fri Feb 17 21:03:38 2012
From: svn at flashrom.org (repository service)
Date: Fri, 17 Feb 2012 21:03:38 +0100
Subject: [flashrom] [commit] r1502 - trunk
Message-ID: <E1RyU1q-0003BA-Ta@ra.coresystems.de>

Author: stefanct
Date: Fri Feb 17 21:03:37 2012
New Revision: 1502
URL: http://flashrom.org/trac/flashrom/changeset/1502

Log:
Add a bunch of new/tested stuff and various small changes 11

Tested Mainboards:
NOT OK:
 - HP dc7800
   http://paste.flashrom.org/view.php?id=1084

 - add "Low Profile Desktop" to our dmi whitelist
 - fix print_wiki (broken since r1488)

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/dmi.c
   trunk/print.c
   trunk/print_wiki.c

Modified: trunk/dmi.c
==============================================================================
--- trunk/dmi.c	Fri Feb 17 15:51:15 2012	(r1501)
+++ trunk/dmi.c	Fri Feb 17 21:03:37 2012	(r1502)
@@ -71,7 +71,8 @@
 } dmi_chassis_types[] = {
 	{0x01, 2, "Other"},
 	{0x02, 2, "Unknown"},
-	{0x03, 0, "Desktop",},
+	{0x03, 0, "Desktop"},
+	{0x04, 0, "Low Profile Desktop"},
 	{0x06, 0, "Mini Tower"},
 	{0x07, 0, "Tower"},
 	{0x08, 1, "Portable"},

Modified: trunk/print.c
==============================================================================
--- trunk/print.c	Fri Feb 17 15:51:15 2012	(r1501)
+++ trunk/print.c	Fri Feb 17 21:03:37 2012	(r1502)
@@ -798,6 +798,7 @@
 	B("HP",		"ProLiant DL165 G6",	1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
 	B("HP",		"ProLiant N40L",	1, NULL, NULL),
 	B("HP",		"Puffer2-UL8E",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
+	B("HP",		"dc7800",		0, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1", "ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor, locked ME region."),
 	B("HP",		"Vectra VL400",		1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
 	B("HP",		"Vectra VL420 SFF",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
 	B("HP",		"xw4400 (0A68h)",	0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),

Modified: trunk/print_wiki.c
==============================================================================
--- trunk/print_wiki.c	Fri Feb 17 15:51:15 2012	(r1501)
+++ trunk/print_wiki.c	Fri Feb 17 21:03:37 2012	(r1502)
@@ -220,6 +220,7 @@
 		if (!strncmp(f->vendor, "Unknown", 7) ||
 		    !strncmp(f->vendor, "Programmer", 10) ||
 		    !strncmp(f->name, "unknown", 7))
+			continue;
 		chipcount++;
 	}
 


From svn at flashrom.org  Sat Feb 18 03:34:58 2012
From: svn at flashrom.org (repository service)
Date: Sat, 18 Feb 2012 03:34:58 +0100
Subject: [flashrom] [commit] r1503 - trunk
Message-ID: <E1Rya8Y-0006jC-Qq@ra.coresystems.de>

Author: hailfinger
Date: Sat Feb 18 03:34:58 2012
New Revision: 1503
URL: http://flashrom.org/trac/flashrom/changeset/1503

Log:
Increase flashrom release number to 0.9.5

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/Makefile

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile	Fri Feb 17 21:03:37 2012	(r1502)
+++ trunk/Makefile	Sat Feb 18 03:34:58 2012	(r1503)
@@ -277,7 +277,7 @@
 # will not require subversion. The downloadable snapshots are already exported.
 SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown)
 
-RELEASE := 0.9.4
+RELEASE := 0.9.5
 VERSION := $(RELEASE)-r$(SVNVERSION)
 RELEASENAME ?= $(VERSION)
 


From svn at flashrom.org  Sat Feb 18 03:38:36 2012
From: svn at flashrom.org (repository service)
Date: Sat, 18 Feb 2012 03:38:36 +0100
Subject: [flashrom] [commit] r1504 - tags/flashrom-0.9.5
Message-ID: <E1RyaC4-0007gu-Ic@ra.coresystems.de>

Author: hailfinger
Date: Sat Feb 18 03:38:36 2012
New Revision: 1504
URL: http://flashrom.org/trac/flashrom/changeset/1504

Log:
Tag flashrom 0.9.5

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Added:
   tags/flashrom-0.9.5/
      - copied from r1503, trunk/


From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb 18 03:40:30 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 18 Feb 2012 03:40:30 +0100
Subject: [flashrom] [PATCH] flashrom 0.9.5
In-Reply-To: <201202171913.q1HJD7ZH018483@mail2.student.tuwien.ac.at>
References: <4F3D7105.9050806@gmx.net>
	<201202171913.q1HJD7ZH018483@mail2.student.tuwien.ac.at>
Message-ID: <4F3F0F9E.2070504@gmx.net>

Am 17.02.2012 20:13 schrieb Stefan Tauner:
> On Thu, 16 Feb 2012 22:11:33 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> Increase flashrom release number to 0.9.5
>>
>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
>>
> Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Thanks, committed in r1503.

0.9.5 release tagged in r1504.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 01:14:24 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 01:14:24 +0100
Subject: [flashrom] [PATCH] Fix sfdp_add_uniform_eraser
In-Reply-To: <201202171452.q1HEqoFq005880@mail2.student.tuwien.ac.at>
References: <201202171452.q1HEqoFq005880@mail2.student.tuwien.ac.at>
Message-ID: <1329610464-13264-1-git-send-email-stefan.tauner@student.tuwien.ac.at>


Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---

Please grant me a coding style exception regarding using pointers as
logical values because i obviously can not grasp them :P

 sfdp.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/sfdp.c b/sfdp.c
index 75dfb5f..cd01faa 100644
--- a/sfdp.c
+++ b/sfdp.c
@@ -79,7 +79,7 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
 
 	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
-		msg_cdbg("%s: invalid input\n", __func__);
+		msg_cdbg("%s: invalid input.\n", __func__);
 		return 1;
 	}
 
@@ -89,11 +89,12 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 		if (eraser->eraseblocks[0].size == block_size &&
 		    eraser->block_erase == erasefn) {
 			msg_cdbg2("  Tried to add a duplicate block eraser: "
-				  "%d x %d B with opcode 0x%02x\n",
+				  "%d x %d B with opcode 0x%02x.\n",
 				  total_size/block_size, block_size, opcode);
 			return 1;
 		}
-		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
+		if (eraser->eraseblocks[0].size != 0 ||
+		    eraser->block_erase != NULL) {
 			msg_cspew("  Block Eraser %d is already occupied.\n",
 				  i);
 			continue;
-- 
1.7.1



From steffen.kremser at googlemail.com  Sun Feb 19 08:23:03 2012
From: steffen.kremser at googlemail.com (Steffen Kremser)
Date: Sun, 19 Feb 2012 08:23:03 +0100
Subject: [flashrom] Point of View ION-MB330: flashrom -V
Message-ID: <CAMO=Fy5urAqW=hfOTpu3MGpL5ecYnRy0j5c_FUrMJXwpuAbo3Q@mail.gmail.com>

flashrom v0.9.5-r1504 on Linux 3.2.6-nouveau (i686), built with libpci
3.1.9, GCC 4.5.3, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 462M loops per
second, 10 myus = 11 us, 100 myus = 98 us, 1000 myus = 988 us, 10000 myus =
9858 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "Point of View"
DMI string system-product-name: "Point of View"
DMI string system-version: "To Be Filled By O.E.M."
DMI string baseboard-manufacturer: "Point of View"
DMI string baseboard-product-name: "Point of View"
DMI string baseboard-version: "1.00"
DMI string chassis-type: "Desktop"
Found chipset "NVIDIA MCP79" with PCI ID 10de:0aad.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write... This chipset is not really supported yet.
Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0
Flash bus type is SPI
SPI on this chipset is WIP. Please report any success or failure by mailing
us the verbose output to flashrom at flashrom.org, thanks!
Found SMBus device 10de:0aa2 at 00:03:2
MCP SPI BAR is at 0xfae80000
Mapping NVIDIA MCP6x SPI at 0xfae80000, unaligned size 0x544.
SPI control is 0xc01a, req=0, gnt=0
Please send the output of "flashrom -V" to flashrom at flashrom.org with
your board name: flashrom -V as the subject to help us finish support for
your
chipset. Thanks.
OK.
The following protocols are supported: SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Chip status register is 00
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found Macronix flash chip "MX25L8005" (1024 kB, SPI) at physical address
0xfff00000.
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for SST SST25LF040A, 512 kB: probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2
0x2014
Probing for Unknown SFDP-capable chip, 0 kB: No SFDP signature found.
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xc2, id2 0x2014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2,
id2 0x2014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xc2, id2 0x2014
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xc2, id2 0x2014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xc2, id2 0x13
Found Macronix flash chip "MX25L8005" (1024 kB, SPI).
No operations were specified.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120219/22e14d77/attachment-0001.html>

From scottrade at askmarcos.com  Sun Feb 19 15:08:06 2012
From: scottrade at askmarcos.com (root)
Date: Sun, 19 Feb 2012 15:08:06 +0100 (CET)
Subject: [flashrom] flashrom -V as requested
Message-ID: <20120219140806.504982CEFC@im>

flashrom v0.9.2-r1141 on Linux 2.6.38-13-generic (i686), built with libpci 3.1.7, GCC 4.5.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 2 usecs, 189M loops per second, delay more than 10% too short (got 25% of expected delay), recalculating... 216M loops per second, delay more than 10% too short (got 28% of expected delay), recalculating... 260M loops per second, delay more than 10% too short (got 44% of expected delay), recalculating... 264M loops per second, delay more than 10% too short (got 34% of expected delay), recalculating... 266M loops per second, 10 myus = 4 us, 100 myus = 34 us, 1000 myus = 332 us, 10000 myus = 3311 us, 8 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: " "
DMI string system-product-name: " "
DMI string system-version: " "
DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd."
DMI string baseboard-product-name: "M61SME-S2"
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found ITE Super I/O, id 8716
Found chipset "NVIDIA MCP61", enabling flash write... chipset PCI ID is 10de:03e0, This chipset is not really supported yet. Guesswork...
ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0
Flash bus type is LPC
Found SMBus device 10de:03eb at 00:01:1
MCP SPI BAR is at 0xfec80000
Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.
Please send the output of "flashrom -V" to flashrom at flashrom.org to help us finish support for your chipset. Thanks.
OK.
This chipset supports the following protocols: LPC.
Serial flash segment 0xfffe0000-0xffffffff enabled
Serial flash segment 0x000e0000-0x000fffff enabled
Serial flash segment 0xffee0000-0xffefffff disabled
Serial flash segment 0xfff80000-0xfffeffff enabled
LPC write to serial flash enabled
Serial flash pin 29
Serial flash port 0x0820
Probing for AMD Am29F010A/B, 128 KB: skipped.
Probing for AMD Am29F002(N)BB, 256 KB: skipped.
Probing for AMD Am29F002(N)BT, 256 KB: skipped.
Probing for AMD Am29F016D, 2048 KB: skipped.
Probing for AMD Am29F040B, 512 KB: skipped.
Probing for AMD Am29F080B, 1024 KB: skipped.
Probing for AMD Am29LV040B, 512 KB: skipped.
Probing for AMD Am29LV081B, 1024 KB: skipped.
Probing for AMIC A25L05PT, 64 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L05PU, 64 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L10PT, 128 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L10PU, 128 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L20PT, 256 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L20PU, 256 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L40PT, 512 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L40PU, 512 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L80P, 1024 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L16PT, 2048 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L16PU, 2048 KB: 4 byte RDID not supported on this SPI controller
Probing for AMIC A25L512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A25L010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A25L020, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A25L040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A25L080, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A25L016, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A25L032, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A25LQ032, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for AMIC A29002B, 256 KB: skipped.
Probing for AMIC A29002T, 256 KB: skipped.
Probing for AMIC A29040B, 512 KB: skipped.
Probing for AMIC A49LF040A, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for ASD AE49F2008, 256 KB: skipped.
Probing for Atmel AT25DF021, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DF041A, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DF081, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DF321, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DF321A, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DF641, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25DQ161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25F512B, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25FS010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT25FS040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT26DF041, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT26DF081A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT26DF161, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT26DF161A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT26F004, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT29C512, 64 KB: skipped.
Probing for Atmel AT29C010A, 128 KB: skipped.
Probing for Atmel AT29C020, 256 KB: skipped.
Probing for Atmel AT29C040A, 512 KB: skipped.
Probing for Atmel AT45CS1282, 16896 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB011D, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB021D, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB041D, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB081D, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB161D, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB321C, 4224 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB321D, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT45DB642D, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Atmel AT49BV512, 64 KB: skipped.
Probing for Atmel AT49F020, 256 KB: skipped.
Probing for Atmel AT49F002(N), 256 KB: skipped.
Probing for Atmel AT49F002(N)T, 256 KB: skipped.
Probing for EMST F49B002UA, 256 KB: skipped.
Probing for EMST F25L008A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B05, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B05T, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B10T, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B20T, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B40T, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B80T, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B16T, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B32T, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25B64T, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25D16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25F05, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25F10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25F20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25F40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25F80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25F16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN25F32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon EN29F010, 128 KB: skipped.
Probing for Eon EN29F002(A)(N)B, 256 KB: skipped.
Probing for Eon EN29F002(A)(N)T, 256 KB: skipped.
Probing for Fujitsu MBM29F004BC, 512 KB: skipped.
Probing for Fujitsu MBM29F004TC, 512 KB: skipped.
Probing for Fujitsu MBM29F400BC, 512 KB: skipped.
Probing for Fujitsu MBM29F400TC, 512 KB: skipped.
Probing for Hyundai HY29F002T, 256 KB: skipped.
Probing for Hyundai HY29F002B, 256 KB: skipped.
Probing for Intel 28F001BX-B, 128 KB: skipped.
Probing for Intel 28F001BX-T, 128 KB: skipped.
Probing for Intel 28F002BC-T, 256 KB: skipped.
Probing for Intel 28F004S5, 512 KB: skipped.
Probing for Intel 28F004BV/BE-B, 512 KB: skipped.
Probing for Intel 28F004BV/BE-T, 512 KB: skipped.
Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped.
Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped.
Probing for Intel 82802AB, 512 KB: skipped.
Probing for Intel 82802AC, 1024 KB: skipped.
Probing for Macronix MX25L512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L1005, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L2005, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L4005, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L8005, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L1635D, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L3205, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L3235D, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L6405, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX25L12805, 16384 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix MX29F001B, 128 KB: skipped.
Probing for Macronix MX29F001T, 128 KB: skipped.
Probing for Macronix MX29F002B, 256 KB: skipped.
Probing for Macronix MX29F002T, 256 KB: skipped.
Probing for Macronix MX29LV040, 512 KB: skipped.
Probing for MoselVitelic V29C51000B, 64 KB: skipped.
Probing for MoselVitelic V29C51000T, 64 KB: skipped.
Probing for MoselVitelic V29C51400B, 512 KB: skipped.
Probing for MoselVitelic V29C51400T, 512 KB: skipped.
Probing for MoselVitelic V29LC51000, 64 KB: skipped.
Probing for MoselVitelic V29LC51001, 128 KB: skipped.
Probing for MoselVitelic V29LC51002, 256 KB: skipped.
Probing for Numonyx M25PE10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Numonyx M25PE20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Numonyx M25PE40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Numonyx M25PE80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Numonyx M25PE16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC Pm25LV010, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC Pm25LV016B, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC Pm25LV020, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC Pm25LV040, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC Pm25LV080B, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC Pm25LV512, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC Pm29F002T, 256 KB: skipped.
Probing for PMC Pm29F002B, 256 KB: skipped.
Probing for PMC Pm39LV010, 128 KB: skipped.
Probing for PMC Pm39LV020, 256 KB: skipped.
Probing for PMC Pm39LV040, 512 KB: skipped.
Probing for PMC Pm49FL002, 256 KB: probe_jedec_common: id1 0x2d, id2 0xc2, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for Sanyo LF25FW203A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Sharp LHF00L04, 1024 KB: skipped.
Probing for Spansion S25FL008A, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Spansion S25FL016A, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for SST SST25VF016B, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for SST SST25VF032B, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for SST SST25VF064C, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for SST SST25VF040.REMS, 512 KB: probe_spi_rems: id1 0xef, id2 0x12
Probing for SST SST25VF040B, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for SST SST25LF040A.RES, 512 KB: probe_spi_res2: id1 0x12, id2 0x12
Probing for SST SST25VF040B.REMS, 512 KB: probe_spi_rems: id1 0xef, id2 0x12
Probing for SST SST25VF080B, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for SST SST28SF040A, 512 KB: skipped.
Probing for SST SST29EE010, 128 KB: skipped.
Probing for SST SST29LE010, 128 KB: skipped.
Probing for SST SST29EE020A, 256 KB: skipped.
Probing for SST SST29LE020, 256 KB: skipped.
Probing for SST SST39SF512, 64 KB: skipped.
Probing for SST SST39SF010A, 128 KB: skipped.
Probing for SST SST39SF020A, 256 KB: skipped.
Probing for SST SST39SF040, 512 KB: skipped.
Probing for SST SST39VF512, 64 KB: skipped.
Probing for SST SST39VF010, 128 KB: skipped.
Probing for SST SST39VF020, 256 KB: skipped.
Probing for SST SST39VF040, 512 KB: skipped.
Probing for SST SST39VF080, 1024 KB: skipped.
Probing for SST SST49LF002A/B, 256 KB: skipped.
Probing for SST SST49LF003A/B, 384 KB: skipped.
Probing for SST SST49LF004A/B, 512 KB: skipped.
Probing for SST SST49LF004C, 512 KB: skipped.
Probing for SST SST49LF008A, 1024 KB: skipped.
Probing for SST SST49LF008C, 1024 KB: skipped.
Probing for SST SST49LF016C, 2048 KB: skipped.
Probing for SST SST49LF020, 256 KB: probe_jedec_common: id1 0x2d, id2 0xc2, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF020A, 256 KB: probe_jedec_common: id1 0x2d, id2 0xc2, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF040, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF040B, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF160C, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M25P05-A, 64 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P05.RES, 64 KB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P10.RES, 128 KB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P40-old, 512 KB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M25P128, 16384 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST M29F002B, 256 KB: skipped.
Probing for ST M29F002T/NT, 256 KB: skipped.
Probing for ST M29F040B, 512 KB: skipped.
Probing for ST M29F400BB, 512 KB: skipped.
Probing for ST M29F400BT, 512 KB: skipped.
Probing for ST M29W010B, 128 KB: skipped.
Probing for ST M29W040B, 512 KB: skipped.
Probing for ST M29W512B, 64 KB: skipped.
Probing for ST M50FLW040A, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 KB: probe_82802ab: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 KB: skipped.
Probing for ST M50FW016, 2048 KB: skipped.
Probing for ST M50FW040, 512 KB: skipped.
Probing for ST M50FW080, 1024 KB: skipped.
Probing for ST M50LPW116, 2048 KB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 KB: skipped.
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 KB: skipped.
Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 KB: skipped.
Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 KB: skipped.
Probing for TI TMS29F002RB, 256 KB: skipped.
Probing for TI TMS29F002RT, 256 KB: skipped.
Probing for Winbond W25Q80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25Q16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25Q32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25Q64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25x10, 128 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25x20, 256 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25x40, 512 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Chip status register is 00
Found chip "Winbond W25x40" (512 KB, SPI) at physical address 0xfff80000.
Probing for Winbond W25x80, 1024 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25x16, 2048 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25x32, 4096 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W25x64, 8192 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Winbond W29C011, 128 KB: skipped.
Probing for Winbond W29C020C, 256 KB: skipped.
Probing for Winbond W29C040P, 512 KB: skipped.
Probing for Winbond W29EE011, 128 KB: skipped.
Probing for Winbond W39V040A, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040B, 512 KB: probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040C, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x49, id2 0x4d, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 KB: skipped.
Probing for Winbond W39V080A, 1024 KB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49F002U, 256 KB: skipped.
Probing for Winbond W49F020, 256 KB: skipped.
Probing for Winbond W49V002A, 256 KB: probe_jedec_common: id1 0x2d, id2 0xc2, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 KB: skipped.
Probing for Winbond W39V080FA, 1024 KB: skipped.
Probing for Winbond W39V080FA (dual mode), 512 KB: skipped.
Probing for AMIC unknown AMIC SPI chip, 0 KB: 4 byte RDID not supported on this SPI controller
Probing for Atmel unknown Atmel SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Eon unknown Eon SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Macronix unknown Macronix SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for PMC unknown PMC SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for SST unknown SST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for ST unknown ST SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Sanyo unknown Sanyo SPI chip, 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Generic unknown SPI chip (RDID), 0 KB: probe_spi_rdid_generic: id1 0xef, id2 0x3013
Probing for Generic unknown SPI chip (REMS), 0 KB: probe_spi_rems: id1 0xef, id2 0x12
No operations were specified.


From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 20:05:14 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 20:05:14 +0100
Subject: [flashrom] [PATCH] Fix sfdp_add_uniform_eraser and its usage.
In-Reply-To: <1329610464-13264-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329610464-13264-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329678314-28564-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it looked for
eraser slots that have no erase functions set instead of those that have one set.

Also, the special 4k opcode encoded in the first double word was tried to add
with sfdp_add_uniform_eraser although the total size of the chip was not yet
known. This is now postponed and an additional check to sfdp_add_uniform_eraser
is added.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
this is the last fixup combined with what is described in the second half
of the commit log above.

 sfdp.c |   18 +++++++++++++-----
 1 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/sfdp.c b/sfdp.c
index 75dfb5f..80faeca 100644
--- a/sfdp.c
+++ b/sfdp.c
@@ -78,8 +78,10 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 	uint32_t total_size = flash->total_size * 1024;
 	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
 
-	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
-		msg_cdbg("%s: invalid input\n", __func__);
+	if (erasefn == NULL || total_size == 0 || block_size == 0 ||
+	    total_size % block_size != 0) {
+		msg_cdbg("%s: invalid input, please report to "
+			 "flashrom at flashrom.org\n", __func__);
 		return 1;
 	}
 
@@ -89,11 +91,12 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 		if (eraser->eraseblocks[0].size == block_size &&
 		    eraser->block_erase == erasefn) {
 			msg_cdbg2("  Tried to add a duplicate block eraser: "
-				  "%d x %d B with opcode 0x%02x\n",
+				  "%d x %d B with opcode 0x%02x.\n",
 				  total_size/block_size, block_size, opcode);
 			return 1;
 		}
-		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
+		if (eraser->eraseblocks[0].size != 0 ||
+		    eraser->block_erase != NULL) {
 			msg_cspew("  Block Eraser %d is already occupied.\n",
 				  i);
 			continue;
@@ -115,6 +118,7 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 
 static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 {
+	uint8_t opcode_4k = 0xFF;
 	uint32_t tmp32;
 	uint8_t tmp8;
 	uint32_t total_size; /* in bytes */
@@ -181,7 +185,8 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 	}
 
 	if ((tmp32 & 0x3) == 0x1) {
-		sfdp_add_uniform_eraser(flash, (tmp32 >> 8) & 0xFF, 4 * 1024);
+		/* add the eraser later, because we don't know total_size yet */
+		opcode_4k = (tmp32 >> 8) & 0xFF;
 	}
 
 	/* 2. double word */
@@ -204,6 +209,9 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 		return 1;
 	}
 
+	if (opcode_4k != 0xFF)
+		sfdp_add_uniform_eraser(flash, opcode_4k, 4 * 1024);
+
 	/* FIXME: double words 3-7 contain unused fast read information */
 
 	if (len == 4 * 4) {
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 21:26:53 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 21:26:53 +0100
Subject: [flashrom] [PATCH 1/5] print_wiki.c: count pci devices and cleanup
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329683217-31150-2-git-send-email-stefan.tauner@student.tuwien.ac.at>


Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 ft2232_spi.c |   13 -------
 print.c      |   15 ++++++++
 print_wiki.c |  106 +++++++++++++++++++++++++++++++++++++++++++---------------
 3 files changed, 94 insertions(+), 40 deletions(-)

diff --git a/ft2232_spi.c b/ft2232_spi.c
index 122866f..ec4934e 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -435,17 +435,4 @@ static int ft2232_spi_send_command(struct flashctx *flash,
 	return failed ? -1 : 0;
 }
 
-void print_supported_usbdevs(const struct usbdev_status *devs)
-{
-	int i;
-
-	msg_pinfo("USB devices:\n");
-	for (i = 0; devs[i].vendor_name != NULL; i++) {
-		msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
-			  devs[i].device_name, devs[i].vendor_id,
-			  devs[i].device_id,
-			  (devs[i].status == NT) ? " (untested)" : "");
-	}
-}
-
 #endif
diff --git a/print.c b/print.c
index 1fdeac7..f0c701e 100644
--- a/print.c
+++ b/print.c
@@ -422,6 +422,21 @@ static void print_supported_boards_helper(const struct board_info *boards,
 }
 #endif
 
+#if CONFIG_FT2232_SPI == 1
+void print_supported_usbdevs(const struct usbdev_status *devs)
+{
+	int i;
+
+	msg_pinfo("USB devices:\n");
+	for (i = 0; devs[i].vendor_name != NULL; i++) {
+		msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
+			  devs[i].device_name, devs[i].vendor_id,
+			  devs[i].device_id,
+			  (devs[i].status == NT) ? " (untested)" : "");
+	}
+}
+#endif
+
 void print_supported(void)
 {
 	print_supported_chips();
diff --git a/print_wiki.c b/print_wiki.c
index 377154d..a8c9d76 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -72,10 +72,7 @@ static const char chip_th[] = "{\
 | Probe\n| Read\n| Erase\n| Write\n\
 | align=\"center\" | Min \n| align=\"center\" | Max\n\n";
 
-static const char programmer_section[] = "\
-\n== Supported programmers ==\n\nThis is a list \
-of supported PCI devices flashrom can use as programmer:\n\n{| border=\"0\" \
-valign=\"top\"\n| valign=\"top\"|\n\n{| border=\"0\" style=\"font-size: \
+static const char programmer_th[] = "{| border=\"0\" style=\"font-size: \
 smaller\" valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\
 ! align=\"left\" | Device\n! align=\"center\" | PCI IDs\n\
 ! align=\"center\" | Status\n\n";
@@ -126,7 +123,7 @@ static void print_supported_chipsets_wiki(int cols)
 	printf("\n|}\n\n|}\n");
 }
 
-static void wiki_helper(const char *devicetype, int cols,
+static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			const struct board_info boards[])
 {
 	int i, j, k = 0, boardcount_good = 0, boardcount_bad = 0, color = 1;
@@ -199,10 +196,10 @@ static void wiki_helper(const char *devicetype, int cols,
 static void print_supported_boards_wiki(void)
 {
 	printf("%s", board_intro);
-	wiki_helper("boards", 2, boards_known);
+	print_supported_boards_wiki_helper("boards", 2, boards_known);
 
 	printf("%s", laptop_intro);
-	wiki_helper("laptops", 1, laptops_known);
+	print_supported_boards_wiki_helper("laptops", 1, laptops_known);
 }
 #endif
 
@@ -276,7 +273,16 @@ static void print_supported_chips_wiki(int cols)
 
 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */
 #if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1
-static void print_supported_pcidevs_wiki(const struct pcidev_status *devs)
+static int count_supported_pcidevs_wiki(const struct pcidev_status *devs)
+{
+	int i = 0;
+	unsigned int count = 0;
+	for (i = 0; devs[i].vendor_name != NULL; i++)
+			count++;
+	return count;
+}
+
+static void print_supported_pcidevs_wiki_helper(const struct pcidev_status *devs)
 {
 	int i = 0;
 	static int c = 0;
@@ -294,50 +300,96 @@ static void print_supported_pcidevs_wiki(const struct pcidev_status *devs)
 }
 #endif
 
-void print_supported_wiki(void)
+static void print_supported_pcidevs_wiki()
 {
-	time_t t = time(NULL);
+	unsigned int pci_count = 0;
 
-	printf(wiki_header, ctime(&t), flashrom_version);
-	print_supported_chips_wiki(2);
-#if CONFIG_INTERNAL == 1
-	print_supported_chipsets_wiki(3);
-	print_supported_boards_wiki();
+#if CONFIG_NIC3COM == 1
+	pci_count += count_supported_pcidevs_wiki(nics_3com);
+#endif
+#if CONFIG_NICREALTEK == 1
+	pci_count += count_supported_pcidevs_wiki(nics_realtek);
+#endif
+#if CONFIG_NICNATSEMI == 1
+	pci_count += count_supported_pcidevs_wiki(nics_natsemi);
+#endif
+#if CONFIG_GFXNVIDIA == 1
+	pci_count += count_supported_pcidevs_wiki(gfx_nvidia);
+#endif
+#if CONFIG_DRKAISER == 1
+	pci_count += count_supported_pcidevs_wiki(drkaiser_pcidev);
+#endif
+#if CONFIG_SATASII == 1
+	pci_count += count_supported_pcidevs_wiki(satas_sii);
+#endif
+#if CONFIG_ATAHPT == 1
+	pci_count += count_supported_pcidevs_wiki(ata_hpt);
+#endif
+#if CONFIG_NICINTEL == 1
+	pci_count += count_supported_pcidevs_wiki(nics_intel);
+#endif
+#if CONFIG_NICINTEL_SPI == 1
+	pci_count += count_supported_pcidevs_wiki(nics_intel_spi);
+#endif
+#if CONFIG_OGP_SPI == 1
+	pci_count += count_supported_pcidevs_wiki(ogp_spi);
+#endif
+#if CONFIG_SATAMV == 1
+	pci_count += count_supported_pcidevs_wiki(satas_mv);
 #endif
-	printf("%s", programmer_section);
+
+	printf("\n== Supported programmers ==\n\nTotal amount of supported "
+	       "PCI devices flashrom can use as programmer: '''%d'''\n\n"
+	       "{| border=\"0\" valign=\"top\"\n| valign=\"top\"|\n\n",
+	       pci_count);
+	printf("%s", programmer_th);
+
 #if CONFIG_NIC3COM == 1
-	print_supported_pcidevs_wiki(nics_3com);
+	print_supported_pcidevs_wiki_helper(nics_3com);
 #endif
 #if CONFIG_NICREALTEK == 1
-	print_supported_pcidevs_wiki(nics_realtek);
+	print_supported_pcidevs_wiki_helper(nics_realtek);
 #endif
 #if CONFIG_NICNATSEMI == 1
-	print_supported_pcidevs_wiki(nics_natsemi);
+	print_supported_pcidevs_wiki_helper(nics_natsemi);
 #endif
 #if CONFIG_GFXNVIDIA == 1
-	print_supported_pcidevs_wiki(gfx_nvidia);
+	print_supported_pcidevs_wiki_helper(gfx_nvidia);
 #endif
 #if CONFIG_DRKAISER == 1
-	print_supported_pcidevs_wiki(drkaiser_pcidev);
+	print_supported_pcidevs_wiki_helper(drkaiser_pcidev);
 #endif
 #if CONFIG_SATASII == 1
-	print_supported_pcidevs_wiki(satas_sii);
+	print_supported_pcidevs_wiki_helper(satas_sii);
 #endif
 #if CONFIG_ATAHPT == 1
-	print_supported_pcidevs_wiki(ata_hpt);
+	print_supported_pcidevs_wiki_helper(ata_hpt);
 #endif
 #if CONFIG_NICINTEL == 1
-	print_supported_pcidevs_wiki(nics_intel);
+	print_supported_pcidevs_wiki_helper(nics_intel);
 #endif
 #if CONFIG_NICINTEL_SPI == 1
-	print_supported_pcidevs_wiki(nics_intel_spi);
+	print_supported_pcidevs_wiki_helper(nics_intel_spi);
 #endif
 #if CONFIG_OGP_SPI == 1
-	print_supported_pcidevs_wiki(ogp_spi);
+	print_supported_pcidevs_wiki_helper(ogp_spi);
 #endif
 #if CONFIG_SATAMV == 1
-	print_supported_pcidevs_wiki(satas_mv);
+	print_supported_pcidevs_wiki_helper(satas_mv);
 #endif
 	printf("\n|}\n");
 }
 
+void print_supported_wiki(void)
+{
+	time_t t = time(NULL);
+
+	printf(wiki_header, ctime(&t), flashrom_version);
+	print_supported_chips_wiki(2);
+#if CONFIG_INTERNAL == 1
+	print_supported_chipsets_wiki(3);
+	print_supported_boards_wiki();
+#endif
+	print_supported_pcidevs_wiki();
+}
+
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 21:26:52 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 21:26:52 +0100
Subject: [flashrom] [PATCH 0/5] wiki patches
Message-ID: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

Stefan Tauner (5):
  print_wiki.c: count pci devices and cleanup
  Introduce and use enum test_state
  print_wiki.c fix columns calculations
  squash! print_wiki.c fix columns calculations
  squash! print_wiki.c fix columns calculations

 flash.h      |    7 +-
 ft2232_spi.c |   13 -
 print.c      |  884 +++++++++++++++++++++++++++++-----------------------------
 print_wiki.c |  197 +++++++++----
 programmer.h |    6 +-
 5 files changed, 593 insertions(+), 514 deletions(-)



From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 21:26:56 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 21:26:56 +0100
Subject: [flashrom] [PATCH 4/5] squash! print_wiki.c fix columns calculations
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329683217-31150-5-git-send-email-stefan.tauner@student.tuwien.ac.at>

- boards

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 print_wiki.c |   26 ++++++++++++++++----------
 1 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/print_wiki.c b/print_wiki.c
index b9fed47..e80b7f3 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -134,11 +134,12 @@ static void print_supported_chipsets_wiki(int cols)
 static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			const struct board_info boards[])
 {
-	int i, j, k = 0, color = 1;
+	int i, k = 0, color = 1;
 	int num_notes = 0;
 	char *notes = calloc(1, 1);
 	const struct board_match *b = board_matches;
 	unsigned int boardcount = 0, boardcount_good = 0, boardcount_bad = 0;
+	unsigned int lines_per_col;
 	char tmp[900 + 1];
 
 	for (i = 0; boards[i].vendor != NULL; i++) {
@@ -149,12 +150,17 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 		boardcount++;
 	}
 
+	/* +1 to force the resulting number of columns to be < cols */
+	lines_per_col = boardcount / cols + ((boardcount%cols) > 0 ? 1 : 0);
+
 	printf("\n\nTotal amount of supported %s: '''%d'''. "
 	       "Not yet supported (i.e., known-bad): '''%d'''.\n\n"
-	       "{| border=\"0\" valign=\"top\"\n| valign=\"top\"|\n\n%s",
-	       devicetype, boardcount_good, boardcount_bad, board_th);
+	       "{| border=\"0\" valign=\"top\"\n",
+	       devicetype, boardcount_good, boardcount_bad);
 
-	for (i = 0, j = 0; boards[i].vendor != NULL; i++, j++) {
+	for (i = 0; boards[i].vendor != NULL; i++) {
+		if ((i % lines_per_col) == 0)
+			printf("| valign=\"top\"|\n\n%s", board_th);
 
 		/* Alternate colors if the vendor changes. */
 		if (i > 0 && strcmp(boards[i].vendor, boards[i - 1].vendor))
@@ -190,14 +196,14 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			printf("\n");
 		}
 
-		/* Split table in 'cols' columns. */
-		if (j >= (boardcount / cols + 1)) {
-			printf("\n|}\n\n| valign=\"top\"|\n\n%s", board_th);
-			j = 0;
-		}
+		if (((i % lines_per_col) + 1) == lines_per_col)
+			printf("\n|}\n\n");
 	}
 
-	printf("\n|}\n\n|}\n");
+	/* end inner table if it did not fill the last column fully */
+	if (((i % lines_per_col)) > 0)
+		printf("\n|}\n\n");
+	printf("\n\n|}\n");
 
 	if (num_notes > 0)
 		printf("\n<small>\n%s</small>\n", notes);
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 21:26:55 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 21:26:55 +0100
Subject: [flashrom] [PATCH 3/5] print_wiki.c fix columns calculations
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329683217-31150-4-git-send-email-stefan.tauner@student.tuwien.ac.at>

for
- chipsets

---

i noticed that the chipset columns were not uniformly divided at all
and looked at the code in more detail... out came this series of
patches that changes all three major sections of the wiki page
similarly (hopefully to the better) and it split respectively for
easier reviewing. getting this right is not trivial due to the
possible corner cases... and it makes one cry when aware of real
programming languages ;)

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 print_wiki.c |   36 +++++++++++++++++++++++-------------
 1 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/print_wiki.c b/print_wiki.c
index 58f1612..b9fed47 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -91,18 +91,26 @@ wrong (a working backup flash chip and/or good soldering skills).\n</div>\n";
 
 static void print_supported_chipsets_wiki(int cols)
 {
-	int i, j, enablescount = 0, color = 1;
+	int enablescount = 0, color = 1;
+	int i;
+	unsigned int lines_per_col;
 	const struct penable *e;
 
 	for (e = chipset_enables; e->vendor_name != NULL; e++)
 		enablescount++;
 
+	/* +1 to force the resulting number of columns to be < cols */
+	lines_per_col = enablescount / cols + ((enablescount%cols) > 0 ? 1 : 0);
+
 	printf("\n== Supported chipsets ==\n\nTotal amount of supported "
-	       "chipsets: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n| "
-	       "valign=\"top\"|\n\n%s", enablescount, chipset_th);
+	       "chipsets: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n",
+	       enablescount);
 
 	e = chipset_enables;
-	for (i = 0, j = 0; e[i].vendor_name != NULL; i++, j++) {
+	for (i = 0; e[i].vendor_name != NULL; i++) {
+		if ((i % lines_per_col) == 0)
+			printf("| valign=\"top\"|\n\n%s", chipset_th);
+
 		/* Alternate colors if the vendor changes. */
 		if (i > 0 && strcmp(e[i].vendor_name, e[i - 1].vendor_name))
 			color = !color;
@@ -113,30 +121,32 @@ static void print_supported_chipsets_wiki(int cols)
 		       e[i].vendor_id, e[i].device_id,
 		       (e[i].status == OK) ? "{{OK}}" : "{{?3}}");
 
-		/* Split table in 'cols' columns. */
-		if (j >= (enablescount / cols + 1)) {
-			printf("\n|}\n\n| valign=\"top\"|\n\n%s", chipset_th);
-			j = 0;
-		}
+		if (((i % lines_per_col) + 1) == lines_per_col)
+			printf("\n|}\n\n");
 	}
 
-	printf("\n|}\n\n|}\n");
+	/* end inner table if it did not fill the last column fully */
+	if (((i % lines_per_col)) > 0)
+		printf("\n|}\n\n");
+	printf("\n\n|}\n");
 }
 
 static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			const struct board_info boards[])
 {
-	int i, j, k = 0, boardcount_good = 0, boardcount_bad = 0, color = 1;
+	int i, j, k = 0, color = 1;
 	int num_notes = 0;
 	char *notes = calloc(1, 1);
-	char tmp[900 + 1];
 	const struct board_match *b = board_matches;
+	unsigned int boardcount = 0, boardcount_good = 0, boardcount_bad = 0;
+	char tmp[900 + 1];
 
 	for (i = 0; boards[i].vendor != NULL; i++) {
 		if (boards[i].working == OK)
 			boardcount_good++;
 		if (boards[i].working == BAD)
 			boardcount_bad++;
+		boardcount++;
 	}
 
 	printf("\n\nTotal amount of supported %s: '''%d'''. "
@@ -181,7 +191,7 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 		}
 
 		/* Split table in 'cols' columns. */
-		if (j >= ((boardcount_good + boardcount_bad) / cols + 1)) {
+		if (j >= (boardcount / cols + 1)) {
 			printf("\n|}\n\n| valign=\"top\"|\n\n%s", board_th);
 			j = 0;
 		}
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 21:26:57 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 21:26:57 +0100
Subject: [flashrom] [PATCH 5/5] squash! print_wiki.c fix columns calculations
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329683217-31150-6-git-send-email-stefan.tauner@student.tuwien.ac.at>

- chips

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 print_wiki.c |   26 ++++++++++++++++----------
 1 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/print_wiki.c b/print_wiki.c
index e80b7f3..28d5722 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -224,6 +224,7 @@ static void print_supported_chips_wiki(int cols)
 {
 	int i = 0, c = 1, chipcount = 0;
 	const struct flashchip *f, *old = NULL;
+	unsigned int lines_per_col;
 	uint32_t t;
 	char *s;
 	char vmax[6];
@@ -238,9 +239,12 @@ static void print_supported_chips_wiki(int cols)
 		chipcount++;
 	}
 
+	/* +1 to force the resulting number of columns to be < cols */
+	lines_per_col = chipcount / cols + ((chipcount%cols) > 0 ? 1 : 0);
+
 	printf("\n== Supported chips ==\n\nTotal amount of supported "
-	       "chips: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n"
-		"| valign=\"top\"|\n\n%s", chipcount, chip_th);
+	       "chips: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n",
+	       chipcount);
 
 	for (f = flashchips; f->name != NULL; f++, i++) {
 		/* Don't print generic entries. */
@@ -249,10 +253,14 @@ static void print_supported_chips_wiki(int cols)
 		    !strncmp(f->name, "unknown", 7))
 			continue;
 
+		if ((i % lines_per_col) == 0)
+			printf("| valign=\"top\"|\n\n%s", chip_th);
+
 		/* Alternate colors if the vendor changes. */
 		if (old != NULL && strcmp(old->vendor, f->vendor))
 			c = !c;
 
+		old = f;
 		t = f->tested;
 		s = flashbuses_to_text(f->bustype);
 		sprintf(vmin, "%0.03f", f->voltage.min / (double)1000);
@@ -276,16 +284,14 @@ static void print_supported_chips_wiki(int cols)
 		       f->voltage.min ? vmax : "N/A");
 		free(s);
 
-		/* Split table into 'cols' columns. */
-		if (i >= (chipcount / cols + 1)) {
-			printf("\n|}\n\n| valign=\"top\"|\n\n%s", chip_th);
-			i = 0;
-		}
-
-		old = f;
+		if (((i % lines_per_col) + 1) == lines_per_col)
+			printf("\n|}\n\n");
 	}
 
-	printf("\n|}\n\n|}\n");
+	/* end inner table if it did not fill the last column fully */
+	if (((i % lines_per_col)) > 0)
+		printf("\n|}\n\n");
+	printf("\n\n|}\n");
 }
 
 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sun Feb 19 21:26:54 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 19 Feb 2012 21:26:54 +0100
Subject: [flashrom] [PATCH 2/5] Introduce and use enum test_state
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1329683217-31150-3-git-send-email-stefan.tauner@student.tuwien.ac.at>

Previously boards in the wiki were tagged either as working or as known
bad. But we added support to various boards via board enables that were
then never tested because the owners have not reported back. This can
now be tagged with NT and is shown appropriately.

Also, the underlying data structure indicating state was converted from
macros to an enum while preserving original integer values.

Because all lines specifying supported boards and laptops were touched
anyway, this patch also re-indents them.

---
TODO: change other occurrences to use it.  wanted to get feedack first.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flash.h      |    7 +-
 print.c      |  869 +++++++++++++++++++++++++++++-----------------------------
 print_wiki.c |    7 +-
 programmer.h |    6 +-
 4 files changed, 446 insertions(+), 443 deletions(-)

diff --git a/flash.h b/flash.h
index 0dac13d..4d0d79b 100644
--- a/flash.h
+++ b/flash.h
@@ -251,8 +251,11 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, i
 int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
 int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
 
-#define OK 0
-#define NT 1    /* Not tested */
+enum test_state {
+	OK = 0,
+	NT = 1,	/* Not tested */
+	BAD
+};
 
 /* Something happened that shouldn't happen, but we can go on. */
 #define ERROR_NONFATAL 0x100
diff --git a/print.c b/print.c
index f0c701e..6969551 100644
--- a/print.c
+++ b/print.c
@@ -560,428 +560,427 @@ void print_supported(void)
 /* Please keep this list alphabetically ordered by vendor/board. */
 const struct board_info boards_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
-	B("A-Trend",	"ATC-6220",		1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
-	B("abit",	"A-S78H",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
-	B("abit",	"AN-M2",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
-	B("abit",	"AV8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
-	B("abit",	"AX8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
-	B("abit",	"BM6",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
-	B("abit",	"Fatal1ty F-I90HD",	1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
-	B("abit",	"IC7",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
-	B("abit",	"IP35",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
-	B("abit",	"IP35 Pro",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL),
-	B("abit",	"IS-10",		0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", "Reported by deejkuba at aol.com to flashrom at coreboot.org, no public archive. Missing board enable and/or M50FW040 unlocking. May work now."),
-	B("abit",	"KN8 Ultra",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra", NULL),
-	B("abit",	"NF-M2 nView",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
-	B("abit",	"NF-M2S",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2", NULL),
-	B("abit",	"NF7-S",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
-	B("abit",	"VA6",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6", NULL),
-	B("abit",	"VT6X4",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
-	B("Acorp",	"6A815EPD",		1, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
-	B("Advantech",	"PCM-5820",		1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
-	B("agami",	"Aruma",		1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
-	B("Albatron",	"PM266A Pro",		1, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
-	B("AOpen",	"i945GMx-VFX",		1, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
-	B("AOpen",	"vKM400Am-S",		1, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
-	B("Artec Group","DBE61",		1, "http://wiki.thincan.org/DBE61", NULL),
-	B("Artec Group","DBE62",		1, "http://wiki.thincan.org/DBE62", NULL),
-	B("ASI",	"MB-5BLMP",		1, "http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."),
-	B("ASRock",	"775i65G",		1, "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
-	B("ASRock",	"890GX Extreme3",	1, "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
-	B("ASRock",	"939A785GMH/128M",	1, "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
-	B("ASRock",	"A330GC",		1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
-	B("ASRock",	"A770CrossFire",	1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
-	B("ASRock",	"ALiveNF6G-DVI",	1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
-	B("ASRock",	"AM2NF6G-VSTA",		1, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
-	B("ASRock",	"ConRoeXFire-eSATA2",	1, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
-	B("ASRock",	"K7S41",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
-	B("ASRock",	"K7S41GX",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
-	B("ASRock",	"K7VT4A+",		0, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
-	B("ASRock",	"K8S8X",		1, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
-	B("ASRock",	"M3A790GXH/128M",	1, "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
-	B("ASRock",	"P4i65GV",		1, "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
-	B("ASUS",	"A7N8X Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
-	B("ASUS",	"A7N8X-E Deluxe",	1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
-	B("ASUS",	"A7N8X-VM/400",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
-	B("ASUS",	"A7V133",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
-	B("ASUS",	"A7V333",		1, "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
-	B("ASUS",	"A7V400-MX",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
-	B("ASUS",	"A7V600-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
-	B("ASUS",	"A7V8X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
-	B("ASUS",	"A7V8X-MX",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
-	B("ASUS",	"A7V8X-MX SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
-	B("ASUS",	"A7V8X-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
-	B("ASUS",	"A8M2N-LA (NodusM3-GL8E)", 1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
-	B("ASUS",	"A8N-E",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
-	B("ASUS",	"A8N-LA (Nagami-GL8E)",	1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
-	B("ASUS",	"A8N-SLI",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
-	B("ASUS",	"A8N-SLI Deluxe",	0, NULL, "Untested board enable."),
-	B("ASUS",	"A8N-SLI Premium",	1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
-	B("ASUS",	"A8N-VM",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
-	B("ASUS",	"A8N-VM CSM",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
-	B("ASUS",	"A8NE-FM/S",		1, "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM", NULL),
-	B("ASUS",	"A8V Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
-	B("ASUS",	"A8V-E Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
-	B("ASUS",	"A8V-E SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
-	B("ASUS",	"Crosshair II Formula",	1, "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
-	B("ASUS",	"Crosshair IV Extreme",	1, "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
-	B("ASUS",	"E35M1-I DELUXE",	1, "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
-	B("ASUS",	"K8N",			1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
-	B("ASUS",	"K8V",			1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
-	B("ASUS",	"K8V SE Deluxe",	1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
-	B("ASUS",	"K8V-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
-	B("ASUS",	"K8V-X SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
-	B("ASUS",	"KFSN4-DRE/SAS",	1, "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL),
-	B("ASUS",	"M2A-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
-	B("ASUS",	"M2A-VM (HDMI)",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
-	B("ASUS",	"M2N32-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
-	B("ASUS",	"M2N-E",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
-	B("ASUS",	"M2N-E SLI",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
-	B("ASUS",	"M2N-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
-	B("ASUS",	"M2NBP-VM CSM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
-	B("ASUS",	"M2NPV-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
-	B("ASUS",	"M2V",			1, "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
-	B("ASUS",	"M2V-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
-	B("ASUS",	"M3A",			1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
-	B("ASUS",	"M3A76-CM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
-	B("ASUS",	"M3A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
-	B("ASUS",	"M3N78-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
-	B("ASUS",	"M4A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
-	B("ASUS",	"M4A785TD-M EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
-	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
-	B("ASUS",	"M4A78LT-M LE",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
-	B("ASUS",	"M4A79T Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
-	B("ASUS",	"M4A87TD/USB3",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
-	B("ASUS",	"M4A89GTD PRO",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
-	B("ASUS",	"M4N78 PRO",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
-	B("ASUS",	"M5A99X EVO",		1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
-	B("ASUS",	"MEW-AM",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("ASUS",	"MEW-VM",		0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("ASUS",	"OPLX-M",		0, NULL, "Untested board enable."),
-	B("ASUS",	"P2B",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
-	B("ASUS",	"P2B-D",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
-	B("ASUS",	"P2B-DS",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
-	B("ASUS",	"P2B-F",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
-	B("ASUS",	"P2B-N",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
-	B("ASUS",	"P2E-M",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
-	B("ASUS",	"P2L97-S",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
-	B("ASUS",	"P3B-F",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("ASUS",	"P4B266",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
-	B("ASUS",	"P4B266-LM",		1, "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
-	B("ASUS",	"P4B533-E",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
-	B("ASUS",	"P4C800-E Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL),
-	B("ASUS",	"P4GV-LA (Guppy)",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478", NULL),
-	B("ASUS",	"P4P800",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
-	B("ASUS",	"P4P800-E Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL),
-	B("ASUS",	"P4P800-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
-	B("ASUS",	"P4SC-E",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
-	B("ASUS",	"P4SD-LA",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
-	B("ASUS",	"P4S533-X",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
-	B("ASUS",	"P4S800-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
-	B("ASUS",	"P5A",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
-	B("ASUS",	"P5B",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
-	B("ASUS",	"P5B-Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL),
-	B("ASUS",	"P5BV-M",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
-	B("ASUS",	"P5GC-MX/1333",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL),
-	B("ASUS",	"P5GD1 Pro",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
-	B("ASUS",	"P5GD1-VM/S",		1, NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."),
-	B("ASUS",	"P5GD1(-VM)",		0, NULL, "Untested board enable."),
-	B("ASUS",	"P5GD2 Premium",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL),
-	B("ASUS",	"P5GDC Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
-	B("ASUS",	"P5GDC-V Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
-	B("ASUS",	"P5GD2/C variants",	0, NULL, "Untested board enable."),
-	B("ASUS",	"P5K-V",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
-	B("ASUS",	"P5K-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
-	B("ASUS",	"P5KC",			1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
-	B("ASUS",	"P5KPL-CM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
-	B("ASUS",	"P5L-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
-	B("ASUS",	"P5L-VM 1394",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
-	B("ASUS",	"P5LD2",		0, NULL, "Untested board enable."),
-	B("ASUS",	"P5LP-LE (Lithium-UL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
-	B("ASUS",	"P5LP-LE (Epson OEM)",	1, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
-	B("ASUS",	"P5LP-LE",		0, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),
-	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Needs a board enable (http://patchwork.coreboot.org/patch/3298/)."),
-	B("ASUS",	"P5N-D",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
-	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
-	B("ASUS",	"P5N32-E SLI",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
-	B("ASUS",	"P5N7A-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
-	B("ASUS",	"P5ND2-SLI Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
-	B("ASUS",	"P5PE-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
-	B("ASUS",	"P5QPL-AM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
-	B("ASUS",	"P5VD1-X",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
-	B("ASUS",	"P6T SE",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
-	B("ASUS",	"P6T Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
-	B("ASUS",	"P6T Deluxe V2",	1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL),
-	B("ASUS",	"P7H57D-V EVO",		1, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL),
-	B("ASUS",	"P7H55-M LX",		0, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
-	B("ASUS",	"P8B-E/4L",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8B WS",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8H61 PRO",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8H61-M LE/USB3",	0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8H67-M PRO",		0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8P67 (rev. 3.1)",	0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8Z68-V PRO",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
-	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
-	B("BCOM",	"WinNET100",		1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
-	B("Bifferos",	"Bifferboard",		1, "http://bifferos.co.uk/", NULL),
-	B("Biostar",	"N68S3+",		1, NULL, NULL),
-	B("Biostar",	"M6TBA",		0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("Biostar",	"M7NCD Pro",		1, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
-	B("Biostar",	"P4M80-M4",		1, "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
-	B("Biostar",	"TA780G M2+",		1, "http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344", NULL),
-	B("Boser",	"HS-6637",		0, "http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."),
-	B("Congatec",	"conga-X852",		1, "http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
-	B("Dell",	"OptiPlex GX1",		1, "http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL),
-	B("Dell",	"PowerEdge 1850",	1, "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL),
-	B("DFI",	"855GME-MGF",		0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
-	B("DFI",	"Blood-Iron P35 T2RL",	1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
-	B("Elitegroup",	"GeForce6100SM-M ",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
-	B("Elitegroup", "GF7100PVT-M3 (V1.0)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
-	B("Elitegroup",	"K7S5A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
-	B("Elitegroup",	"K7S6A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
-	B("Elitegroup", "K7SEM (V1.0A)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
-	B("Elitegroup",	"K7VTA3",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
-	B("Elitegroup",	"P4M800PRO-M (V1.0A, V2.0)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
-	B("Elitegroup", "P4VXMS (V1.0A)",	1, NULL, NULL),
-	B("Elitegroup",	"P6IWP-Fe",		1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
-	B("Elitegroup",	"P6VAP-A+",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
-	B("Elitegroup", "RS485M-M",		1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0", NULL),
-	B("Emerson",	"ATCA-7360",		1, "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx", NULL),
-	B("EPoX",	"EP-8K5A2",		1, "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
-	B("EPoX",	"EP-8NPA7I",		1, "http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
-	B("EPoX",	"EP-9NPA7I",		1, "http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
-	B("EPoX",	"EP-8RDA3+",		1, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
-	B("EPoX",	"EP-BX3",		1, "http://www.epox.com/product.asp?ID=EP-BX3", NULL),
-	B("EVGA",	"132-CK-NF78",		1, "http://www.evga.com/articles/385.asp", NULL),
-	B("EVGA",	"270-WS-W555-A2 (Classified SR-2)", 1, "http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
-	B("FIC",	"VA-502",		0, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
-	B("Foxconn",	"6150K8MD-8EKRSH",	1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157", NULL),
-	B("Foxconn",	"A6VMX",		1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346", NULL),
-	B("Foxconn",	"P4M800P7MA-RS2",	1, "http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138", NULL),
-	B("Freetech",	"P6F91i",		1, "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html", NULL),
-	B("Fujitsu-Siemens", "ESPRIMO P5915",	1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm", "Mainboard model is D2312-A2."),
-	B("GIGABYTE",	"GA-2761GXDK",		1, "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/", NULL),
-	B("GIGABYTE",	"GA-6BXC",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
-	B("GIGABYTE",	"GA-6BXDU",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
-	B("GIGABYTE",	"GA-6IEM",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
-	B("GIGABYTE",	"GA-6VXE7+",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
-	B("GIGABYTE",	"GA-6ZMA",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
-	B("GIGABYTE",	"GA-MA785GMT-UD2H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
-	B("GIGABYTE",	"GA-770TA-UD3",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
-	B("GIGABYTE",	"GA-7DXR",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
-	B("GIGABYTE",	"GA-7VT600",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
-	B("GIGABYTE",	"GA-7ZM",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
-	B("GIGABYTE",	"GA-880GMA-USB3 (rev. 3.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
-	B("GIGABYTE",	"GA-8I945GZME-RH",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
-	B("GIGABYTE",	"GA-8IP775",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
-	B("GIGABYTE",	"GA-8IRML",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
-	B("GIGABYTE",	"GA-8PE667 Ultra 2",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
-	B("GIGABYTE",	"GA-8SIMLH",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
-	B("GIGABYTE",	"GA-945PL-S3P (rev. 6.6)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
-	B("GIGABYTE",	"GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
-	B("GIGABYTE",	"GA-965P-DS4",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
-	B("GIGABYTE",	"GA-EP31-DS3L (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
-	B("GIGABYTE",	"GA-EP35-DS3L",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
-	B("GIGABYTE",	"GA-EX58-UD4P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
-	B("GIGABYTE",	"GA-K8N-SLI",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
-	B("GIGABYTE",	"GA-K8N51GMF",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
-	B("GIGABYTE",	"GA-K8N51GMF-9",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
-	B("GIGABYTE",	"GA-K8NS Pro-939",	0, "http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."),
-	B("GIGABYTE",	"GA-M57SLI-S4",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
-	B("GIGABYTE",	"GA-M61P-S3",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
-	B("GIGABYTE",	"GA-M720-US3",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
-	B("GIGABYTE",	"GA-MA69VM-S2",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
-	B("GIGABYTE",	"GA-MA74GM-S2H (rev. 3.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
-	B("GIGABYTE",	"GA-MA770-UD3 (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
-	B("GIGABYTE",	"GA-MA770T-UD3P",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
-	B("GIGABYTE",	"GA-MA780G-UD3H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
-	B("GIGABYTE",	"GA-MA78G-DS3H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
-	B("GIGABYTE",	"GA-MA78GM-S2H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */
-	B("GIGABYTE",	"GA-MA78GPM-DS2H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
-	B("GIGABYTE",	"GA-MA790FX-DQ6",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
-	B("GIGABYTE",	"GA-MA790GP-DS4H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
-	B("GIGABYTE",	"GA-MA790XT-UD4P (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
-	B("GIGABYTE",	"GA-P55A-UD4 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
-	B("GIGABYTE",	"GA-P67A-UD3P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
-	B("GIGABYTE",	"GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL),
-	B("GIGABYTE",	"GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL),
-	B("GIGABYTE",	"GA-Z68MX-UD2H-B (rev. 1.3)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
-	B("GIGABYTE",	"GA-Z68XP-UD3 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
-	B("HP",		"e-Vectra P2706T",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
-	B("HP",		"ProLiant DL145 G3",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
-	B("HP",		"ProLiant DL165 G6",	1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
-	B("HP",		"ProLiant N40L",	1, NULL, NULL),
-	B("HP",		"Puffer2-UL8E",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
-	B("HP",		"dc7800",		0, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1", "ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor, locked ME region."),
-	B("HP",		"Vectra VL400",		1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
-	B("HP",		"Vectra VL420 SFF",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
-	B("HP",		"xw4400 (0A68h)",	0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
-	B("HP",		"xw9400",		1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454", "Boot block is write protected unless the solder points next to F2 are shorted."),
-	B("IBASE",	"MB899",		1, "http://www.ibase-i.com.tw/2009/mb899.html", NULL),
-	B("IBM",	"x3455",		1, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
-	B("IEI",	"PICOe-9452",		1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
-	B("Intel",	"D201GLY",		1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
-	B("Intel",	"D425KT",		0, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
-	B("Intel",	"D865GLC",		0, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
-	B("Intel",	"DG45ID",		0, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
-	B("Intel",	"DH67CF",		0, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
-	B("Intel",	"EP80759",		1, NULL, NULL),
-	B("Intel",	"Foxhollow",		1, NULL, "Intel reference board."),
-	B("Intel",	"Greencity",		1, NULL, "Intel reference board."),
-	B("Intel",	"SE440BX-2",		0, "http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard", "Probably won't work, see http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
-	B("IWILL",	"DK8-HTX",		1, "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98", NULL),
-	B("Jetway",	"J-7BXAN",		1, "http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
-	B("Jetway",	"J7F4K1G5D-PB",		1, "http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D", NULL),
-	B("Kontron",	"986LCD-M",		1, "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html", NULL),
-	B("Lanner",	"EM-8510C",		1, NULL, NULL),
-	B("Lex",	"CV700A",		1, "http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
-	B("Mitac",	"6513WU",		1, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm", NULL),
-	B("MSC",	"Q7-TCTC",		1, "http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html", NULL),
-	B("MSI",	"MS-6153",		1, "http://www.msi.com/product/mb/MS-6153.html", NULL),
-	B("MSI",	"MS-6156",		1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm", NULL),
-	B("MSI",	"MS-6163 (MS-6163 Pro)",1, "http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
-	B("MSI",	"MS-6178",		0, "http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
-	B("MSI",	"MS-6330 (K7T Turbo)",	1, "http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
-	B("MSI",	"MS-6391 (845 Pro4)",	1, "http://www.msi.com/product/mb/845-Pro4.html", NULL),
-	B("MSI",	"MS-6561 (745 Ultra)",	1, "http://www.msi.com/product/mb/745-Ultra.html", NULL),
-	B("MSI",	"MS-6566 (845 Ultra-C)",1, "http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
-	B("MSI",	"MS-6570 (K7N2)",	1, "http://www.msi.com/product/mb/K7N2.html", NULL),
-	B("MSI",	"MS-6577 (Xenon)",	1, "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843", "This is an OEM board from HP, the HP name is Xenon."),
-	B("MSI",	"MS-6590 (KT4 Ultra)",	1, "http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
-	B("MSI",	"MS-6702E (K8T Neo2-F)",1, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
-	B("MSI",	"MS-6712 (KT4V)",	1, "http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
-	B("MSI",	"MS-6787 (P4MAM-V/P4MAM-L)", 1, "http://www.msi.com/service/search/?kw=6787&type=product", NULL),
-	B("MSI",	"MS-7005 (651M-L)",	1, "http://www.msi.com/product/mb/651M-L.html", NULL),
-	B("MSI",	"MS-7025 (K8N Neo2 Platinum)", 1, "http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
-	B("MSI",	"MS-7046",		1, "http://www.heimir.de/ms7046/", NULL),
-	B("MSI",	"MS-7061 (KM4M-V/KM4AM-V)", 1, "http://www.msi.com/service/search/?kw=7061&type=product", NULL),
-	B("MSI",	"MS-7065",		1, "http://browse.geekbench.ca/geekbench2/view/53114", NULL),
-	B("MSI",	"MS-7135 (K8N Neo3)",	1, "http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
-	B("MSI",	"MS-7142 (K8MM-V)",	1, "http://www.msi.com/product/mb/K8MM-V.html", NULL),
-	B("MSI",	"MS-7168 (Orion)",	1, "http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart", NULL),
-	B("MSI",	"MS-7207 (K8NGM2-L)",	1, "http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
-	B("MSI",	"MS-7211 (PM8M3-V)",	1, "http://www.msi.com/product/mb/PM8M3-V.html", NULL),
-	B("MSI",	"MS-7236 (945PL Neo3)",	1, "http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
-	B("MSI",	"MS-7253 (K9VGM-V)",	1, "http://www.msi.com/product/mb/K9VGM-V.html", NULL),
-	B("MSI",	"MS-7255 (P4M890M)",	1, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
-	B("MSI",	"MS-7260 (K9N Neo PCB 1.0)", 0, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
-	B("MSI",	"MS-7309 (K9N6PGM2-V2)", 1, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
-	B("MSI",	"MS-7312 (K9MM-V)",	1, "http://www.msi.com/product/mb/K9MM-V.html", NULL),
-	B("MSI",	"MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
-	B("MSI",	"MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
-	B("MSI",	"MS-7369 (K9N Neo V2)", 1, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
-	B("MSI",	"MS-7376 (K9A2 Platinum V1)", 1, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
-	B("MSI",	"MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
-	B("MSI",	"MS-7529 (G31TM-P21)",  1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
-	B("MSI",	"MS-7548 (Aspen-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
-	B("MSI",	"MS-7596 (785GM-E51)",  1, "http://www.msi.com/product/mb/785GM-E51.html", NULL),
-	B("MSI",	"MS-7599 (870-C45)",	1, "http://www.msi.com/product/mb/870-C45.html", NULL),
-	B("MSI",	"MS-7613 (Iona-GL8E)",	0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("MSI",	"MS-7635 (H55M-ED55)",	0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("MSI",	"MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
-	B("MSI",	"MS-7642 (890GXM-G65)",	1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
-	B("MSI",	"MS-7676 (H67MA-ED55(B3))", 1, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
-	B("MSI",	"MS-7696 (A75MA-G55)",	1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
-	B("MSI",	"MS-7698 (E350IA-E45)",	1, "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
-	B("NEC",	"PowerMate 2000",	1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
-	B("Nokia",	"IP530",		1, NULL, NULL),
-	B("PCCHIPS ",	"M598LMR (V9.0)",	1, NULL, NULL),
-	B("PCCHIPS ",	"M863G (V5.1A)",	1, "http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0", NULL),
-	B("PC Engines",	"Alix.1c",		1, "http://pcengines.ch/alix1c.htm", NULL),
-	B("PC Engines",	"Alix.2c2",		1, "http://pcengines.ch/alix2c2.htm", NULL),
-	B("PC Engines",	"Alix.2c3",		1, "http://pcengines.ch/alix2c3.htm", NULL),
-	B("PC Engines",	"Alix.2d3",		1, "http://pcengines.ch/alix2d3.htm", NULL),
-	B("PC Engines",	"Alix.3c3",		1, "http://pcengines.ch/alix3c3.htm", NULL),
-	B("PC Engines",	"Alix.3d3",		1, "http://pcengines.ch/alix3d3.htm", NULL),
-	B("PC Engines",	"Alix.6f2",		1, "http://pcengines.ch/alix6f2.htm", NULL),
-	B("PC Engines",	"WRAP.2E",		1, "http://pcengines.ch/wrap2e1.htm", NULL),
-	B("Portwell",	"PEB-4700VLA",		1, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
-	B("RCA",	"RM4100",		1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
-	B("Samsung",	"Polaris 32",		1, NULL, NULL),
-	B("Shuttle",	"AK31",			1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
-	B("Shuttle",	"AK38N",		1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
-	B("Shuttle",	"AV11V30",		1, NULL, NULL),
-	B("Shuttle",	"AV18E2",		1, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
-	B("Shuttle",	"FD37",			1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
-	B("Shuttle",	"FH67",			1, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
-	B("Shuttle",	"FN25",			1, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
-	B("Shuttle",	"X50/X50(B)",		1, "http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
-	B("Soyo",	"SY-5VD",		0, "http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("Soyo",	"SY-6BA+ III",		1, "http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
-	B("Soyo",	"SY-7VCA",		1, "http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html", NULL),
-	B("Sun",	"Blade x6250",		1, "http://www.sun.com/servers/blades/x6250/", NULL),
-	B("Sun",	"Fire x4150",		0, "http://www.sun.com/servers/x64/x4150/", "No public report found. May work now."),
-	B("Sun",	"Fire x4200",		0, "http://www.sun.com/servers/entry/x4200/", "No public report found. May work now."),
-	B("Sun",	"Fire x4540",		0, "http://www.sun.com/servers/x64/x4540/", "No public report found. May work now."),
-	B("Sun",	"Fire x4600",		0, "http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."),
-	B("Sun",	"Ultra 40 M2",		1, "http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html", NULL),
-	B("Supermicro",	"H8QC8",		1, "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL),
-	B("Supermicro", "X5DP8-G2",		1, "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL),
-	B("Supermicro", "X7DBT-INF",		1, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
-	B("Supermicro", "X7SPA-HF",		1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
-	B("Supermicro", "X8DT3",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
-	B("Supermicro", "X8DTE-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
-	B("Supermicro", "X8DTH-6F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
-	B("Supermicro",	"X8DTT-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
-	B("Supermicro",	"X8DTT-HIBQF",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
-	B("Supermicro",	"X8DTU-6TF+",		0, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("Supermicro",	"X8DTU-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
-	B("Supermicro",	"X8SIE(-F)",		0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
-	B("Supermicro",	"X8STi",		1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
-	B("Supermicro",	"X9SCA-F",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("Supermicro",	"X9SCL",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("T-Online",	"S-100",		1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
-	B("Tekram",	"P6Pro-A5",		1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
-	B("Termtek",	"TK-3370 (Rev:2.5B)",	1, NULL, NULL),
-	B("Thomson",	"IP1000",		1, "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
-	B("TriGem",	"Anaheim-3",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
-	B("TriGem",	"Lomita",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
-	B("Tyan",	"S5375-1U (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
-	B("Tyan",	"S1846 (Tsunami ATX)",	1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
-	B("Tyan",	"S2466 (Tiger MPX)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
-	B("Tyan",	"S2498 (Tomcat K7M)",	1, "http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
-	B("Tyan",	"S2723 (Tiger i7501)",	1, "http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
-	B("Tyan",	"S2881 (Thunder K8SR)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
-	B("Tyan",	"S2882 (Thunder K8S Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
-	B("Tyan",	"S2882-D (Thunder K8SD Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
-	B("Tyan",	"S2891 (Thunder K8SRE)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
-	B("Tyan",	"S2892 (Thunder K8SE)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
-	B("Tyan",	"S2895 (Thunder K8WE)",	1, "http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
-	B("Tyan",	"S2912 (Thunder n3600R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
-	B("Tyan",	"S2915 (Thunder n6650W)", 1, "http://tyan.com/product_board_detail.aspx?pid=163", NULL),
-	B("Tyan",	"S2915-E (Thunder n6650W)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041", NULL),
-	B("Tyan",	"S2933 (Thunder n3600S)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL),
-	B("Tyan",	"S3095 (Tomcat i945GM)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
-	B("Tyan",	"S3992 (Thunder h2000M)", 1, "http://tyan.com/product_board_detail.aspx?pid=235", NULL),
-	B("Tyan",	"S5180 (Toledo i965R)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
-	B("Tyan",	"S5191 (Toledo i3000R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
-	B("Tyan",	"S5197 (Toledo i3010W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
-	B("Tyan",	"S5211 (Toledo i3210W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
-	B("Tyan",	"S5211-1U (Toledo i3200R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
-	B("Tyan",	"S5220 (Toledo q35T)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
-	B("Tyan",	"S5375 (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
-	B("Tyan",	"S5376 (Tempest i5100W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=605", "Both S5376G2NR and S5376WAG2NR should work."),
-	B("Tyan",	"S5377 (Tempest i5100T)", 1, "http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017", NULL),
-	B("Tyan",	"S5382 (Tempest i5000PW)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
-	B("Tyan",	"S5397 (Tempest i5400PW)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
-	B("VIA",	"EPIA M/MII/...",	1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202", NULL), /* EPIA-MII link for now */
-	B("VIA",	"EPIA SP",		1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261", NULL),
-	B("VIA",	"EPIA-CN",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400", NULL),
-	B("VIA",	"EPIA EK",		1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420", NULL),
-	B("VIA",	"EPIA-EX15000G",	1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450", NULL),
-	B("VIA",	"EPIA-LN",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473", NULL),
-	B("VIA",	"EPIA-M700",		1, "http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700", NULL),
-	B("VIA",	"EPIA-N/NL",		1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221", NULL), /* EPIA-N link for now */
-	B("VIA",	"EPIA-NX15000G",	1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470", NULL),
-	B("VIA",	"NAB74X0",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590", NULL),
-	B("VIA",	"pc2500e",		1, "http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp", NULL),
-	B("VIA",	"PC3500G",		1, "http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp", NULL),
-	B("VIA",	"VB700X",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490", NULL),
-	B("ZOTAC",	"Fusion-ITX WiFi (FUSION350-A-E)", 1, NULL, NULL),
-	B("ZOTAC",	"GeForce 8200",		1, "http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92", NULL),
-	B("ZOTAC",	"H67-ITX WiFi (H67ITX-C-E)", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ZOTAC",	"ZBOX HD-ID11",		1, "http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75", NULL),
+	B("A-Trend",	"ATC-6220",				OK,	"http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
+	B("abit",	"A-S78H",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
+	B("abit",	"AN-M2",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
+	B("abit",	"AV8",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
+	B("abit",	"AX8",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
+	B("abit",	"BM6",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
+	B("abit",	"Fatal1ty F-I90HD",			OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
+	B("abit",	"IC7",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
+	B("abit",	"IP35",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
+	B("abit",	"IP35 Pro",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL),
+	B("abit",	"IS-10",				BAD,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", "Reported by deejkuba at aol.com to flashrom at coreboot.org, no public archive. Missing board enable and/or M50FW040 unlocking. May work now."),
+	B("abit",	"KN8 Ultra",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra", NULL),
+	B("abit",	"NF-M2 nView",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
+	B("abit",	"NF-M2S",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2", NULL),
+	B("abit",	"NF7-S",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
+	B("abit",	"VA6",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6", NULL),
+	B("abit",	"VT6X4",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
+	B("Acorp",	"6A815EPD",				OK,	"http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
+	B("Advantech",	"PCM-5820",				OK,	"http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
+	B("agami",	"Aruma",				OK,	"http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
+	B("Albatron",	"PM266A Pro",				OK,	"http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
+	B("AOpen",	"i945GMx-VFX",				OK,	NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
+	B("AOpen",	"vKM400Am-S",				OK,	"http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
+	B("Artec Group","DBE61",				OK,	"http://wiki.thincan.org/DBE61", NULL),
+	B("Artec Group","DBE62",				OK,	"http://wiki.thincan.org/DBE62", NULL),
+	B("ASI",	"MB-5BLMP",				OK,	"http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."),
+	B("ASRock",	"775i65G",				OK,	"http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
+	B("ASRock",	"890GX Extreme3",			OK,	"http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
+	B("ASRock",	"939A785GMH/128M",			OK,	"http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
+	B("ASRock",	"A330GC",				OK,	"http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
+	B("ASRock",	"A770CrossFire",			OK,	"http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
+	B("ASRock",	"ALiveNF6G-DVI",			OK,	"http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
+	B("ASRock",	"AM2NF6G-VSTA",				OK,	"http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
+	B("ASRock",	"ConRoeXFire-eSATA2",			OK,	"http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
+	B("ASRock",	"K7S41",				OK,	"http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
+	B("ASRock",	"K7S41GX",				OK,	"http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
+	B("ASRock",	"K7VT4A+",				BAD,	"http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
+	B("ASRock",	"K8S8X",				OK,	"http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
+	B("ASRock",	"M3A790GXH/128M",			OK,	"http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
+	B("ASRock",	"P4i65GV",				OK,	"http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
+	B("ASUS",	"A7N8X Deluxe",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
+	B("ASUS",	"A7N8X-E Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
+	B("ASUS",	"A7N8X-VM/400",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
+	B("ASUS",	"A7V133",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
+	B("ASUS",	"A7V333",				OK,	"ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
+	B("ASUS",	"A7V400-MX",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
+	B("ASUS",	"A7V600-X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
+	B("ASUS",	"A7V8X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
+	B("ASUS",	"A7V8X-MX",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
+	B("ASUS",	"A7V8X-MX SE",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
+	B("ASUS",	"A7V8X-X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
+	B("ASUS",	"A8M2N-LA (NodusM3-GL8E)",		OK,	"http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
+	B("ASUS",	"A8N-E",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
+	B("ASUS",	"A8N-LA (Nagami-GL8E)",			OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
+	B("ASUS",	"A8N-SLI",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
+	B("ASUS",	"A8N-SLI Deluxe",			NT,	NULL, "Untested board enable."),
+	B("ASUS",	"A8N-SLI Premium",			OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
+	B("ASUS",	"A8N-VM",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
+	B("ASUS",	"A8N-VM CSM",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
+	B("ASUS",	"A8NE-FM/S",				OK,	"http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM", NULL),
+	B("ASUS",	"A8V Deluxe",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
+	B("ASUS",	"A8V-E Deluxe",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
+	B("ASUS",	"A8V-E SE",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
+	B("ASUS",	"Crosshair II Formula",			OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
+	B("ASUS",	"Crosshair IV Extreme",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
+	B("ASUS",	"E35M1-I DELUXE",			OK,	"http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
+	B("ASUS",	"K8N",					OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
+	B("ASUS",	"K8V",					OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
+	B("ASUS",	"K8V SE Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
+	B("ASUS",	"K8V-X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
+	B("ASUS",	"K8V-X SE",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
+	B("ASUS",	"KFSN4-DRE/SAS",			OK,	"http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL),
+	B("ASUS",	"M2A-MX",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
+	B("ASUS",	"M2A-VM (HDMI)",			OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
+	B("ASUS",	"M2N32-SLI Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
+	B("ASUS",	"M2N-E",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
+	B("ASUS",	"M2N-E SLI",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
+	B("ASUS",	"M2N-SLI Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
+	B("ASUS",	"M2NBP-VM CSM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
+	B("ASUS",	"M2NPV-VM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
+	B("ASUS",	"M2V",					OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
+	B("ASUS",	"M2V-MX",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
+	B("ASUS",	"M3A",					OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
+	B("ASUS",	"M3A76-CM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
+	B("ASUS",	"M3A78-EM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
+	B("ASUS",	"M3N78-VM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
+	B("ASUS",	"M4A78-EM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
+	B("ASUS",	"M4A785TD-M EVO",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
+	B("ASUS",	"M4A785TD-V EVO",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
+	B("ASUS",	"M4A78LT-M LE",				OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
+	B("ASUS",	"M4A79T Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
+	B("ASUS",	"M4A87TD/USB3",				OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
+	B("ASUS",	"M4A89GTD PRO",				OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
+	B("ASUS",	"M4N78 PRO",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
+	B("ASUS",	"M5A99X EVO",				OK,	"http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
+	B("ASUS",	"MEW-AM",				BAD,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("ASUS",	"MEW-VM",				BAD,	"http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("ASUS",	"OPLX-M",				NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P2B",					OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
+	B("ASUS",	"P2B-D",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
+	B("ASUS",	"P2B-DS",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
+	B("ASUS",	"P2B-F",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
+	B("ASUS",	"P2B-N",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
+	B("ASUS",	"P2E-M",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
+	B("ASUS",	"P2L97-S",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
+	B("ASUS",	"P3B-F",				BAD,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("ASUS",	"P4B266",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
+	B("ASUS",	"P4B266-LM",				OK,	"http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
+	B("ASUS",	"P4B533-E",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
+	B("ASUS",	"P4C800-E Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL),
+	B("ASUS",	"P4GV-LA (Guppy)",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478", NULL),
+	B("ASUS",	"P4P800",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
+	B("ASUS",	"P4P800-E Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL),
+	B("ASUS",	"P4P800-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
+	B("ASUS",	"P4SC-E",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
+	B("ASUS",	"P4SD-LA",				OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
+	B("ASUS",	"P4S533-X",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
+	B("ASUS",	"P4S800-MX",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
+	B("ASUS",	"P5A",					OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
+	B("ASUS",	"P5B",					OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
+	B("ASUS",	"P5B-Deluxe",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL),
+	B("ASUS",	"P5BV-M",				BAD,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
+	B("ASUS",	"P5GC-MX/1333",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL),
+	B("ASUS",	"P5GD1 Pro",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
+	B("ASUS",	"P5GD1-VM/S",				OK,	NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."),
+	B("ASUS",	"P5GD1(-VM)",				NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P5GD2 Premium",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL),
+	B("ASUS",	"P5GDC Deluxe",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
+	B("ASUS",	"P5GDC-V Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
+	B("ASUS",	"P5GD2/C variants",			NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P5K-V",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
+	B("ASUS",	"P5K-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
+	B("ASUS",	"P5KC",					OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
+	B("ASUS",	"P5KPL-CM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
+	B("ASUS",	"P5L-MX",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
+	B("ASUS",	"P5L-VM 1394",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
+	B("ASUS",	"P5LD2",				NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P5LP-LE (Lithium-UL8E)",		OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
+	B("ASUS",	"P5LP-LE (Epson OEM)",			OK,	NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
+	B("ASUS",	"P5LP-LE",				BAD,	NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),
+	B("ASUS",	"P5N-D",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
+	B("ASUS",	"P5N-E SLI",				NT,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
+	B("ASUS",	"P5N32-E SLI",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
+	B("ASUS",	"P5N7A-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
+	B("ASUS",	"P5ND2-SLI Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
+	B("ASUS",	"P5PE-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
+	B("ASUS",	"P5QPL-AM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
+	B("ASUS",	"P5VD1-X",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
+	B("ASUS",	"P6T SE",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
+	B("ASUS",	"P6T Deluxe",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
+	B("ASUS",	"P6T Deluxe V2",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL),
+	B("ASUS",	"P7H57D-V EVO",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL),
+	B("ASUS",	"P7H55-M LX",				BAD,	NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
+	B("ASUS",	"P8B-E/4L",				BAD,	NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8B WS",				BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H61 PRO",				BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H61-M LE/USB3",			BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H67-M PRO",				BAD,	NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8P67 (rev. 3.1)",			BAD,	NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8Z68-V PRO",				BAD,	NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"Z8NA-D6C",				OK,	"http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
+	B("ASUS",	"Z8PE-D12",				OK,	"http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
+	B("BCOM",	"WinNET100",				OK,	"http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
+	B("Bifferos",	"Bifferboard",				OK,	"http://bifferos.co.uk/", NULL),
+	B("Biostar",	"N68S3+",				OK,	NULL, NULL),
+	B("Biostar",	"M6TBA",				BAD,	"ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("Biostar",	"M7NCD Pro",				OK,	"http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
+	B("Biostar",	"P4M80-M4",				OK,	"http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
+	B("Biostar",	"TA780G M2+",				OK,	"http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344", NULL),
+	B("Boser",	"HS-6637",				BAD,	"http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."),
+	B("Congatec",	"conga-X852",				OK,	"http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
+	B("Dell",	"OptiPlex GX1",				OK,	"http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL),
+	B("Dell",	"PowerEdge 1850",			OK,	"http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL),
+	B("DFI",	"855GME-MGF",				BAD,	"http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
+	B("DFI",	"Blood-Iron P35 T2RL",			OK,	"http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
+	B("Elitegroup",	"GeForce6100SM-M ",			OK,	"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
+	B("Elitegroup", "GF7100PVT-M3 (V1.0)",			OK,	"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
+	B("Elitegroup",	"K7S5A",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
+	B("Elitegroup",	"K7S6A",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
+	B("Elitegroup", "K7SEM (V1.0A)",			OK,	"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
+	B("Elitegroup",	"K7VTA3",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
+	B("Elitegroup",	"P4M800PRO-M (V1.0A, V2.0)",		OK,	"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
+	B("Elitegroup", "P4VXMS (V1.0A)",			OK,	NULL, NULL),
+	B("Elitegroup",	"P6IWP-Fe",				OK,	"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
+	B("Elitegroup",	"P6VAP-A+",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
+	B("Elitegroup", "RS485M-M",				OK,	"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0", NULL),
+	B("Emerson",	"ATCA-7360",				OK,	"http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx", NULL),
+	B("EPoX",	"EP-8K5A2",				OK,	"http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
+	B("EPoX",	"EP-8NPA7I",				OK,	"http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
+	B("EPoX",	"EP-9NPA7I",				OK,	"http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
+	B("EPoX",	"EP-8RDA3+",				OK,	"http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
+	B("EPoX",	"EP-BX3",				OK,	"http://www.epox.com/product.asp?ID=EP-BX3", NULL),
+	B("EVGA",	"132-CK-NF78",				OK,	"http://www.evga.com/articles/385.asp", NULL),
+	B("EVGA",	"270-WS-W555-A2 (Classified SR-2)",	OK,	"http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
+	B("FIC",	"VA-502",				BAD,	"ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
+	B("Foxconn",	"6150K8MD-8EKRSH",			OK,	"http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157", NULL),
+	B("Foxconn",	"A6VMX",				OK,	"http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346", NULL),
+	B("Foxconn",	"P4M800P7MA-RS2",			OK,	"http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138", NULL),
+	B("Freetech",	"P6F91i",				OK,	"http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html", NULL),
+	B("Fujitsu-Siemens", "ESPRIMO P5915",			OK,	"http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm", "Mainboard model is D2312-A2."),
+	B("GIGABYTE",	"GA-2761GXDK",				OK,	"http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/", NULL),
+	B("GIGABYTE",	"GA-6BXC",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
+	B("GIGABYTE",	"GA-6BXDU",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
+	B("GIGABYTE",	"GA-6IEM",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
+	B("GIGABYTE",	"GA-6VXE7+",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
+	B("GIGABYTE",	"GA-6ZMA",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
+	B("GIGABYTE",	"GA-MA785GMT-UD2H (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
+	B("GIGABYTE",	"GA-770TA-UD3",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
+	B("GIGABYTE",	"GA-7DXR",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
+	B("GIGABYTE",	"GA-7VT600",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
+	B("GIGABYTE",	"GA-7ZM",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
+	B("GIGABYTE",	"GA-880GMA-USB3 (rev. 3.1)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
+	B("GIGABYTE",	"GA-8I945GZME-RH",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
+	B("GIGABYTE",	"GA-8IP775",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
+	B("GIGABYTE",	"GA-8IRML",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
+	B("GIGABYTE",	"GA-8PE667 Ultra 2",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
+	B("GIGABYTE",	"GA-8SIMLH",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
+	B("GIGABYTE",	"GA-945PL-S3P (rev. 6.6)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
+	B("GIGABYTE",	"GA-965GM-S2 (rev. 2.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
+	B("GIGABYTE",	"GA-965P-DS4",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
+	B("GIGABYTE",	"GA-EP31-DS3L (rev. 2.1)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
+	B("GIGABYTE",	"GA-EP35-DS3L",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
+	B("GIGABYTE",	"GA-EX58-UD4P",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
+	B("GIGABYTE",	"GA-K8N-SLI",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
+	B("GIGABYTE",	"GA-K8N51GMF",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
+	B("GIGABYTE",	"GA-K8N51GMF-9",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
+	B("GIGABYTE",	"GA-K8NS Pro-939",			NT,	"http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."),
+	B("GIGABYTE",	"GA-M57SLI-S4",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
+	B("GIGABYTE",	"GA-M61P-S3",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
+	B("GIGABYTE",	"GA-M720-US3",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
+	B("GIGABYTE",	"GA-MA69VM-S2",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
+	B("GIGABYTE",	"GA-MA74GM-S2H (rev. 3.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
+	B("GIGABYTE",	"GA-MA770-UD3 (rev. 2.1)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
+	B("GIGABYTE",	"GA-MA770T-UD3P",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
+	B("GIGABYTE",	"GA-MA780G-UD3H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
+	B("GIGABYTE",	"GA-MA78G-DS3H (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
+	B("GIGABYTE",	"GA-MA78GM-S2H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */
+	B("GIGABYTE",	"GA-MA78GPM-DS2H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
+	B("GIGABYTE",	"GA-MA790FX-DQ6",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
+	B("GIGABYTE",	"GA-MA790GP-DS4H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
+	B("GIGABYTE",	"GA-MA790XT-UD4P (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
+	B("GIGABYTE",	"GA-P55A-UD4 (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
+	B("GIGABYTE",	"GA-P67A-UD3P",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
+	B("GIGABYTE",	"GA-X58A-UD7 (rev. 2.0)",		OK,	NULL, NULL),
+	B("GIGABYTE",	"GA-X58A-UDR3 (rev. 2.0)",		OK,	NULL, NULL),
+	B("GIGABYTE",	"GA-Z68MX-UD2H-B (rev. 1.3)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
+	B("GIGABYTE",	"GA-Z68XP-UD3 (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
+	B("HP",		"e-Vectra P2706T",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
+	B("HP",		"ProLiant DL145 G3",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
+	B("HP",		"ProLiant DL165 G6",			OK,	"http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
+	B("HP",		"ProLiant N40L",			OK,	NULL, NULL),
+	B("HP",		"Puffer2-UL8E",				OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
+	B("HP",		"dc7800",				BAD,	"http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1", "ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor, locked ME region."),
+	B("HP",		"Vectra VL400",				OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
+	B("HP",		"Vectra VL420 SFF",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
+	B("HP",		"xw4400 (0A68h)",			BAD,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
+	B("HP",		"xw9400",				OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454", "Boot block is write protected unless the solder points next to F2 are shorted."),
+	B("IBASE",	"MB899",				OK,	"http://www.ibase-i.com.tw/2009/mb899.html", NULL),
+	B("IBM",	"x3455",				OK,	"http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
+	B("IEI",	"PICOe-9452",				OK,	"http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
+	B("Intel",	"D201GLY",				OK,	"http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
+	B("Intel",	"D425KT",				BAD,	"http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
+	B("Intel",	"D865GLC",				BAD,	NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
+	B("Intel",	"DG45ID",				BAD,	"http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
+	B("Intel",	"DH67CF",				BAD,	NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
+	B("Intel",	"EP80759",				OK,	NULL, NULL),
+	B("Intel",	"Foxhollow",				OK,	NULL, "Intel reference board."),
+	B("Intel",	"Greencity",				OK,	NULL, "Intel reference board."),
+	B("Intel",	"SE440BX-2",				BAD,	"http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard", "Probably won't work, see http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
+	B("IWILL",	"DK8-HTX",				OK,	"http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98", NULL),
+	B("Jetway",	"J-7BXAN",				OK,	"http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
+	B("Jetway",	"J7F4K1G5D-PB",				OK,	"http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D", NULL),
+	B("Kontron",	"986LCD-M",				OK,	"http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html", NULL),
+	B("Lanner",	"EM-8510C",				OK,	NULL, NULL),
+	B("Lex",	"CV700A",				OK,	"http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
+	B("Mitac",	"6513WU",				OK,	"http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm", NULL),
+	B("MSC",	"Q7-TCTC",				OK,	"http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html", NULL),
+	B("MSI",	"MS-6153",				OK,	"http://www.msi.com/product/mb/MS-6153.html", NULL),
+	B("MSI",	"MS-6156",				OK,	"http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm", NULL),
+	B("MSI",	"MS-6163 (MS-6163 Pro)",		OK, "http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
+	B("MSI",	"MS-6178",				BAD,	"http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+	B("MSI",	"MS-6330 (K7T Turbo)",			OK,	"http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
+	B("MSI",	"MS-6391 (845 Pro4)",			OK,	"http://www.msi.com/product/mb/845-Pro4.html", NULL),
+	B("MSI",	"MS-6561 (745 Ultra)",			OK,	"http://www.msi.com/product/mb/745-Ultra.html", NULL),
+	B("MSI",	"MS-6566 (845 Ultra-C)",		OK, "http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
+	B("MSI",	"MS-6570 (K7N2)",			OK,	"http://www.msi.com/product/mb/K7N2.html", NULL),
+	B("MSI",	"MS-6577 (Xenon)",			OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843", "This is an OEM board from HP, the HP name is Xenon."),
+	B("MSI",	"MS-6590 (KT4 Ultra)",			OK,	"http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
+	B("MSI",	"MS-6702E (K8T Neo2-F)",		OK, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
+	B("MSI",	"MS-6712 (KT4V)",			OK,	"http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
+	B("MSI",	"MS-6787 (P4MAM-V/P4MAM-L)",		OK,	"http://www.msi.com/service/search/?kw=6787&type=product", NULL),
+	B("MSI",	"MS-7005 (651M-L)",			OK,	"http://www.msi.com/product/mb/651M-L.html", NULL),
+	B("MSI",	"MS-7025 (K8N Neo2 Platinum)",		OK,	"http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
+	B("MSI",	"MS-7046",				OK,	"http://www.heimir.de/ms7046/", NULL),
+	B("MSI",	"MS-7061 (KM4M-V/KM4AM-V)",		OK,	"http://www.msi.com/service/search/?kw=7061&type=product", NULL),
+	B("MSI",	"MS-7065",				OK,	"http://browse.geekbench.ca/geekbench2/view/53114", NULL),
+	B("MSI",	"MS-7135 (K8N Neo3)",			OK,	"http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
+	B("MSI",	"MS-7142 (K8MM-V)",			OK,	"http://www.msi.com/product/mb/K8MM-V.html", NULL),
+	B("MSI",	"MS-7168 (Orion)",			OK,	"http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart", NULL),
+	B("MSI",	"MS-7207 (K8NGM2-L)",			OK,	"http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
+	B("MSI",	"MS-7211 (PM8M3-V)",			OK,	"http://www.msi.com/product/mb/PM8M3-V.html", NULL),
+	B("MSI",	"MS-7236 (945PL Neo3)",			OK,	"http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
+	B("MSI",	"MS-7253 (K9VGM-V)",			OK,	"http://www.msi.com/product/mb/K9VGM-V.html", NULL),
+	B("MSI",	"MS-7255 (P4M890M)",			OK,	"http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
+	B("MSI",	"MS-7260 (K9N Neo PCB 1.0)",		BAD,	"http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+	B("MSI",	"MS-7309 (K9N6PGM2-V2)",		OK,	"http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
+	B("MSI",	"MS-7312 (K9MM-V)",			OK,	"http://www.msi.com/product/mb/K9MM-V.html", NULL),
+	B("MSI",	"MS-7345 (P35 Neo2-FIR)",		OK,	"http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
+	B("MSI",	"MS-7368 (K9AG Neo2-Digital)",		OK,	"http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
+	B("MSI",	"MS-7369 (K9N Neo V2)",			OK,	"http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
+	B("MSI",	"MS-7376 (K9A2 Platinum V1)",		OK,	"http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
+	B("MSI",	"MS-7529 (G31M3-L(S) V2)",		OK,	"http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
+	B("MSI",	"MS-7529 (G31TM-P21)",			OK,	"http://www.msi.com/product/mb/G31TM-P21.html", NULL),
+	B("MSI",	"MS-7548 (Aspen-GL8E)",			OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
+	B("MSI",	"MS-7596 (785GM-E51)",			OK,	"http://www.msi.com/product/mb/785GM-E51.html", NULL),
+	B("MSI",	"MS-7599 (870-C45)",			OK,	"http://www.msi.com/product/mb/870-C45.html", NULL),
+	B("MSI",	"MS-7613 (Iona-GL8E)",			BAD,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("MSI",	"MS-7635 (H55M-ED55)",			BAD,	"http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("MSI",	"MS-7640 (890FXA-GD70)",		OK, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
+	B("MSI",	"MS-7642 (890GXM-G65)",			OK,	"http://www.msi.com/product/mb/890GXM-G65.html", NULL),
+	B("MSI",	"MS-7676 (H67MA-ED55(B3))",		OK,	"http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
+	B("MSI",	"MS-7696 (A75MA-G55)",			OK,	"http://www.msi.com/product/mb/A75MA-G55.html", NULL),
+	B("MSI",	"MS-7698 (E350IA-E45)",			OK,	"http://www.msi.com/product/mb/E350IA-E45.html", NULL),
+	B("NEC",	"PowerMate 2000",			OK,	"http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
+	B("Nokia",	"IP530",				OK,	NULL, NULL),
+	B("PCCHIPS ",	"M598LMR (V9.0)",			OK,	NULL, NULL),
+	B("PCCHIPS ",	"M863G (V5.1A)",			OK,	"http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0", NULL),
+	B("PC Engines",	"Alix.1c",				OK,	"http://pcengines.ch/alix1c.htm", NULL),
+	B("PC Engines",	"Alix.2c2",				OK,	"http://pcengines.ch/alix2c2.htm", NULL),
+	B("PC Engines",	"Alix.2c3",				OK,	"http://pcengines.ch/alix2c3.htm", NULL),
+	B("PC Engines",	"Alix.2d3",				OK,	"http://pcengines.ch/alix2d3.htm", NULL),
+	B("PC Engines",	"Alix.3c3",				OK,	"http://pcengines.ch/alix3c3.htm", NULL),
+	B("PC Engines",	"Alix.3d3",				OK,	"http://pcengines.ch/alix3d3.htm", NULL),
+	B("PC Engines",	"Alix.6f2",				OK,	"http://pcengines.ch/alix6f2.htm", NULL),
+	B("PC Engines",	"WRAP.2E",				OK,	"http://pcengines.ch/wrap2e1.htm", NULL),
+	B("Portwell",	"PEB-4700VLA",				OK,	"http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
+	B("RCA",	"RM4100",				OK,	"http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
+	B("Samsung",	"Polaris 32",				OK,	NULL, NULL),
+	B("Shuttle",	"AK31",					OK,	"http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
+	B("Shuttle",	"AK38N",				OK,	"http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
+	B("Shuttle",	"AV11V30",				OK,	NULL, NULL),
+	B("Shuttle",	"AV18E2",				OK,	"http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
+	B("Shuttle",	"FD37",					OK,	"http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
+	B("Shuttle",	"FH67",					OK,	"http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
+	B("Shuttle",	"FN25",					OK,	"http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
+	B("Shuttle",	"X50/X50(B)",				OK,	"http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
+	B("Soyo",	"SY-5VD",				BAD,	"http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("Soyo",	"SY-6BA+ III",				OK,	"http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
+	B("Soyo",	"SY-7VCA",				OK,	"http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html", NULL),
+	B("Sun",	"Blade x6250",				OK,	"http://www.sun.com/servers/blades/x6250/", NULL),
+	B("Sun",	"Fire x4150",				BAD,	"http://www.sun.com/servers/x64/x4150/", "No public report found. May work now."),
+	B("Sun",	"Fire x4200",				BAD,	"http://www.sun.com/servers/entry/x4200/", "No public report found. May work now."),
+	B("Sun",	"Fire x4540",				BAD,	"http://www.sun.com/servers/x64/x4540/", "No public report found. May work now."),
+	B("Sun",	"Fire x4600",				BAD,	"http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."),
+	B("Sun",	"Ultra 40 M2",				OK,	"http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html", NULL),
+	B("Supermicro",	"H8QC8",				OK,	"http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL),
+	B("Supermicro", "X5DP8-G2",				OK,	"http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL),
+	B("Supermicro", "X7DBT-INF",				OK,	"http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
+	B("Supermicro", "X7SPA-HF",				OK,	"http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
+	B("Supermicro", "X8DT3",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
+	B("Supermicro", "X8DTE-F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
+	B("Supermicro", "X8DTH-6F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
+	B("Supermicro",	"X8DTT-F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
+	B("Supermicro",	"X8DTT-HIBQF",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
+	B("Supermicro",	"X8DTU-6TF+",				BAD,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("Supermicro",	"X8DTU-F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
+	B("Supermicro",	"X8SIE(-F)",				BAD,	"http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
+	B("Supermicro",	"X8STi",				OK,	"http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
+	B("Supermicro",	"X9SCA-F",				BAD,	"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("Supermicro",	"X9SCL",				BAD,	"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("T-Online",	"S-100",				OK,	"http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
+	B("Tekram",	"P6Pro-A5",				OK,	"http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
+	B("Termtek",	"TK-3370 (Rev:2.5B)",			OK,	NULL, NULL),
+	B("Thomson",	"IP1000",				OK,	"http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
+	B("TriGem",	"Anaheim-3",				OK,	"http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
+	B("TriGem",	"Lomita",				OK,	"http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
+	B("Tyan",	"S5375-1U (Tempest i5100X)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
+	B("Tyan",	"S1846 (Tsunami ATX)",			OK,	"http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
+	B("Tyan",	"S2466 (Tiger MPX)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
+	B("Tyan",	"S2498 (Tomcat K7M)",			OK,	"http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
+	B("Tyan",	"S2723 (Tiger i7501)",			OK,	"http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
+	B("Tyan",	"S2881 (Thunder K8SR)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
+	B("Tyan",	"S2882 (Thunder K8S Pro)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
+	B("Tyan",	"S2882-D (Thunder K8SD Pro)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
+	B("Tyan",	"S2891 (Thunder K8SRE)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
+	B("Tyan",	"S2892 (Thunder K8SE)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
+	B("Tyan",	"S2895 (Thunder K8WE)",			OK,	"http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
+	B("Tyan",	"S2912 (Thunder n3600R)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
+	B("Tyan",	"S2915 (Thunder n6650W)",		OK,	"http://tyan.com/product_board_detail.aspx?pid=163", NULL),
+	B("Tyan",	"S2915-E (Thunder n6650W)",		OK,	"http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041", NULL),
+	B("Tyan",	"S2933 (Thunder n3600S)",		OK,	"http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL),
+	B("Tyan",	"S3095 (Tomcat i945GM)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
+	B("Tyan",	"S3992 (Thunder h2000M)",		OK,	"http://tyan.com/product_board_detail.aspx?pid=235", NULL),
+	B("Tyan",	"S5180 (Toledo i965R)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
+	B("Tyan",	"S5191 (Toledo i3000R)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
+	B("Tyan",	"S5197 (Toledo i3010W)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
+	B("Tyan",	"S5211 (Toledo i3210W)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
+	B("Tyan",	"S5211-1U (Toledo i3200R)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
+	B("Tyan",	"S5220 (Toledo q35T)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
+	B("Tyan",	"S5375 (Tempest i5100X)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
+	B("Tyan",	"S5376 (Tempest i5100W)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=605", "Both S5376G2NR and S5376WAG2NR should work."),
+	B("Tyan",	"S5377 (Tempest i5100T)",		OK,	"http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017", NULL),
+	B("Tyan",	"S5382 (Tempest i5000PW)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
+	B("Tyan",	"S5397 (Tempest i5400PW)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
+	B("VIA",	"EPIA M/MII/...",			OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202", NULL), /* EPIA-MII link for now */
+	B("VIA",	"EPIA SP",				OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261", NULL),
+	B("VIA",	"EPIA-CN",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400", NULL),
+	B("VIA",	"EPIA EK",				OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420", NULL),
+	B("VIA",	"EPIA-EX15000G",			OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450", NULL),
+	B("VIA",	"EPIA-LN",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473", NULL),
+	B("VIA",	"EPIA-M700",				OK,	"http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700", NULL),
+	B("VIA",	"EPIA-N/NL",				OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221", NULL), /* EPIA-N link for now */
+	B("VIA",	"EPIA-NX15000G",			OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470", NULL),
+	B("VIA",	"NAB74X0",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590", NULL),
+	B("VIA",	"pc2500e",				OK,	"http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp", NULL),
+	B("VIA",	"PC3500G",				OK,	"http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp", NULL),
+	B("VIA",	"VB700X",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490", NULL),
+	B("ZOTAC",	"Fusion-ITX WiFi (FUSION350-A-E)",	OK,	NULL, NULL),
+	B("ZOTAC",	"GeForce 8200",				OK,	"http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92", NULL),
+	B("ZOTAC",	"H67-ITX WiFi (H67ITX-C-E)",		BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ZOTAC",	"ZBOX HD-ID11",				OK,	"http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75", NULL),
 #endif
 
 	{},
@@ -990,19 +989,19 @@ const struct board_info boards_known[] = {
 /* Please keep this list alphabetically ordered by vendor/board. */
 const struct board_info laptops_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
-	B("Acer",	"Aspire 1520",		1, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
-	B("Acer",	"Aspire One",		0, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
-	B("ASUS",	"A8Jm",			1, NULL, NULL),
-	B("ASUS",	"Eee PC 701 4G",	0, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
-	B("ASUS",	"M6Ne",			0, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
-	B("Clevo",	"P150HM",		0, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("Dell",	"Latitude CPi A366XT",	0, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
-	B("HP/Compaq",	"nx9005",		0, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
-	B("HP/Compaq",	"nx9010",		0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
-	B("IBM/Lenovo",	"Thinkpad T40p",	0, "http://www.thinkwiki.org/wiki/Category:T40p", NULL),
-	B("IBM/Lenovo",	"Thinkpad T410s",	0, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
-	B("IBM/Lenovo",	"240",			0, "http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
-	B("Lenovo",	"3000 V100 TF05Cxx",	1, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
+	B("Acer",	"Aspire 1520",		OK,	"http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
+	B("Acer",	"Aspire One",		BAD,	NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
+	B("ASUS",	"A8Jm",			OK,	NULL, NULL),
+	B("ASUS",	"Eee PC 701 4G",	BAD,	"http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
+	B("ASUS",	"M6Ne",			NT, 	"http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
+	B("Clevo",	"P150HM",		BAD,	"http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("Dell",	"Latitude CPi A366XT",	BAD,	"http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
+	B("HP/Compaq",	"nx9005",		BAD,	"http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
+	B("HP/Compaq",	"nx9010",		BAD,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
+	B("IBM/Lenovo",	"Thinkpad T40p",	BAD,	"http://www.thinkwiki.org/wiki/Category:T40p", NULL),
+	B("IBM/Lenovo",	"Thinkpad T410s",	BAD,	"http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
+	B("IBM/Lenovo",	"240",			BAD,	"http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
+	B("Lenovo",	"3000 V100 TF05Cxx",	OK,	"http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
 #endif
 
 	{},
diff --git a/print_wiki.c b/print_wiki.c
index a8c9d76..58f1612 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -133,9 +133,9 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 	const struct board_match *b = board_matches;
 
 	for (i = 0; boards[i].vendor != NULL; i++) {
-		if (boards[i].working)
+		if (boards[i].working == OK)
 			boardcount_good++;
-		else
+		if (boards[i].working == BAD)
 			boardcount_bad++;
 	}
 
@@ -168,7 +168,8 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 		       b[k].lb_vendor ? b[k].lb_vendor : "",
 		       b[k].lb_vendor ? ":" : "",
 		       b[k].lb_vendor ? b[k].lb_part : "",
-		       (boards[i].working) ? "OK" : "No");
+		       (boards[i].working == OK) ? "OK" :
+		       (boards[i].working == NT) ? "?3" : "No");
 
 		if (boards[i].note) {
 			printf("<sup>%d</sup>\n", num_notes + 1);
diff --git a/programmer.h b/programmer.h
index 240e1af..64efb40 100644
--- a/programmer.h
+++ b/programmer.h
@@ -192,7 +192,7 @@ extern const struct board_match board_matches[];
 struct board_info {
 	const char *vendor;
 	const char *name;
-	const int working;
+	enum test_state working;
 #ifdef CONFIG_PRINT_WIKI
 	const char *url;
 	const char *note;
@@ -217,7 +217,7 @@ extern struct pci_dev *pcidev_dev;
 struct pcidev_status {
 	uint16_t vendor_id;
 	uint16_t device_id;
-	int status;
+	enum test_state status;
 	const char *vendor_name;
 	const char *device_name;
 };
@@ -415,7 +415,7 @@ extern const struct pcidev_status ata_hpt[];
 struct usbdev_status {
 	uint16_t vendor_id;
 	uint16_t device_id;
-	int status;
+	enum test_state status;
 	const char *vendor_name;
 	const char *device_name;
 };
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Mon Feb 20 00:46:21 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 20 Feb 2012 00:46:21 +0100
Subject: [flashrom] FAILED: AXIOMTEK PICO821 REV:A2-RC
In-Reply-To: <CACoR2_fBW2=1pa7MszpctK7FFdUGEYcbK0ZyXnm8GJGf2D7ujQ@mail.gmail.com>
References: <CACoR2_fBW2=1pa7MszpctK7FFdUGEYcbK0ZyXnm8GJGf2D7ujQ@mail.gmail.com>
Message-ID: <201202192345.q1JNjTh8031721@mail2.student.tuwien.ac.at>

On Thu, 9 Feb 2012 16:51:13 +0100
"Recovery.se" <info at recovery.se> wrote:

> Hello
> 
> I'm very pleased with flashrom! Hovever we have a problem erasing.
> I can work around it by running erase (flashrom -E) sevral times and
> then flash with (flashrom -w <rom>).
> 
> When I run errase the falure posision moves forward
> 
> ..
> "ERASE FAILED at 0x00030000!"
> "ERASE FAILED at 0x00040000!"
> "ERASE FAILED at 0x000ef000!"
> ...
> 
> Regards
> Eric Eriksson
> Recovery.se

Hello Eric,

as far as i have been educated by my colleagues this is due to faulty
flash chips and we can't do much, but stupidly retry a few times if we
notice such a behavior. We may include such functionally sometime in
the future... until then i think you need to handle it as you already
did.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Mon Feb 20 17:07:45 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 20 Feb 2012 17:07:45 +0100
Subject: [flashrom] [PATCH] dummyflasher.c: add support for SFDP by adding a
	new emulator chip: W25Q64CV
Message-ID: <1329754065-11954-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

TODO:
 - how should the SFDP data be supplied/selected by the user?
   - option A (suggested one): add a default table with a legit complete table and
     a programmer option to use a binary file instead.
   - option B: add multiple legit and invalid tables to cover most useful test cases
     and add a programmer option to select which table should be used.
   - option C: some combination of A and B
 - Manpage

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 dummyflasher.c |   90 +++++++++++++++++++++++++++++++++++++++++++++++++++-----
 1 files changed, 82 insertions(+), 8 deletions(-)

diff --git a/dummyflasher.c b/dummyflasher.c
index afe0518..6d8b9a2 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -45,6 +45,7 @@ enum emu_chip {
 	EMULATE_ST_M25P10_RES,
 	EMULATE_SST_SST25VF040_REMS,
 	EMULATE_SST_SST25VF032B,
+	EMULATE_WINBOND_W25Q64CV,
 };
 static enum emu_chip emu_chip = EMULATE_NONE;
 static char *emu_persistent_image = NULL;
@@ -61,6 +62,40 @@ unsigned char spi_blacklist[256];
 unsigned char spi_ignorelist[256];
 int spi_blacklist_size = 0;
 int spi_ignorelist_size = 0;
+
+/* legit intel version */
+/*
+static const uint8_t const sfdp_table[256] = {
+	0x53, 0x46, 0x44, 0x50, // @0x00
+	0x00, 0x01, 0x00, 0xFF, // @0x04
+	0x00, 0x00, 0x01, 0x04, // @0x08: len = 4 instead of 9
+	0x14, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x14 instead of 0x80
+	0xFF, 0xFF, 0xFF, 0xFF, // @0x10
+	0xE5, 0x20, 0xF1, 0xFF, // @0x14
+	0xFF, 0xFF, 0xFF, 0x03, // @0x18
+	0x44, 0xEB, 0x08, 0x6B, // @0x1C
+	0x08, 0x3B, 0x80, 0xBB, // @0x20
+	
+};
+*/
+/* legit complete table */
+static const uint8_t const sfdp_table[256] = {
+	0x53, 0x46, 0x44, 0x50, // @0x00
+	0x00, 0x01, 0x00, 0xFF, // @0x04
+	0x00, 0x00, 0x01, 0x09, // @0x08
+	0x14, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x14 instead of 0x80
+	0xFF, 0xFF, 0xFF, 0xFF, // @0x10
+	0xE5, 0x20, 0xF1, 0xFF, // @0x14
+	0xFF, 0xFF, 0xFF, 0x03, // @0x18
+	0x44, 0xEB, 0x08, 0x6B, // @0x1C
+	0x08, 0x3B, 0x80, 0xBB, // @0x20
+	0xEE, 0xFF, 0xFF, 0xFF, // @0x24
+	0xFF, 0xFF, 0x00, 0x00, // @0x28
+	0xFF, 0xFF, 0x00, 0x00, // @0x2C
+	0x0C, 0x20, 0x0F, 0x52, // @0x30
+	0x10, 0xD8, 0x00, 0x00, // @0x34
+};
+
 #endif
 #endif
 
@@ -296,6 +331,19 @@ int dummy_init(void)
 		msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "
 			 "write)\n");
 	}
+	if (!strcmp(tmp, "W25Q64CV")) {
+		emu_chip = EMULATE_WINBOND_W25Q64CV;
+		emu_chip_size = 8 * 1024 * 1024;
+		emu_max_byteprogram_size = 256;
+		emu_max_aai_size = 0;
+		emu_jedec_se_size = 4 * 1024;
+		emu_jedec_be_52_size = 32 * 1024;
+		emu_jedec_be_d8_size = 64 * 1024;
+		emu_jedec_ce_60_size = emu_chip_size;
+		emu_jedec_ce_c7_size = emu_chip_size;
+		msg_pdbg("Emulating Winbond W25Q64CV SPI flash chip (RDID, "
+			 "SFDP)\n");
+	}
 #endif
 	if (emu_chip == EMULATE_NONE) {
 		msg_perr("Invalid chip specified for emulation: %s\n", tmp);
@@ -471,15 +519,26 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 			readarr[1] = 0x44;
 		break;
 	case JEDEC_RDID:
-		if (emu_chip != EMULATE_SST_SST25VF032B)
+		switch (emu_chip) {
+		case EMULATE_SST_SST25VF032B:
+			if (readcnt > 0)
+				readarr[0] = 0xbf;
+			if (readcnt > 1)
+				readarr[1] = 0x25;
+			if (readcnt > 2)
+				readarr[2] = 0x4a;
 			break;
-		/* Respond with SST_SST25VF032B. */
-		if (readcnt > 0)
-			readarr[0] = 0xbf;
-		if (readcnt > 1)
-			readarr[1] = 0x25;
-		if (readcnt > 2)
-			readarr[2] = 0x4a;
+		case EMULATE_WINBOND_W25Q64CV:
+			if (readcnt > 0)
+				readarr[0] = 0xef;
+			if (readcnt > 1)
+				readarr[1] = 0x40;
+			if (readcnt > 2)
+				readarr[2] = 0x17;
+			break;
+		default: /* ignore */
+			break;
+		}
 		break;
 	case JEDEC_RDSR:
 		memset(readarr, 0, readcnt);
@@ -629,6 +688,20 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 		/* emu_jedec_ce_c7_size is emu_chip_size. */
 		memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size);
 		break;
+	case JEDEC_SFDP:
+		if (emu_chip != EMULATE_WINBOND_W25Q64CV)
+			break;
+		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
+		/*
+		 * FIXME: There is one dummy byte (i.e. 8 clock cycles) to be
+		 * transferred after the address. Since we can not observe the
+		 * clock, we would need to check for appropriate writecnt and/or
+		 * readcnt and recalculate the parameters below.
+		 */
+		/* FIXME: this could be more sophisticated. */
+		memcpy(readarr, sfdp_table + offs,
+		       min(sizeof(sfdp_table) - offs, readcnt));
+		break;
 	default:
 		/* No special response. */
 		break;
@@ -657,6 +730,7 @@ static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
 	case EMULATE_ST_M25P10_RES:
 	case EMULATE_SST_SST25VF040_REMS:
 	case EMULATE_SST_SST25VF032B:
+	case EMULATE_WINBOND_W25Q64CV:
 		if (emulate_spi_chip_response(writecnt, readcnt, writearr,
 					      readarr)) {
 			msg_pdbg("Invalid command sent to flash chip!\n");
-- 
1.7.1



From vidwer at gmail.com  Mon Feb 20 18:17:58 2012
From: vidwer at gmail.com (Idwer Vollering)
Date: Mon, 20 Feb 2012 18:17:58 +0100
Subject: [flashrom] [PATCH 2/5] Introduce and use enum test_state
In-Reply-To: <1329683217-31150-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329683217-31150-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <CAPp9OrkjCg-pEEvhgDHZfoZYRO7zWFuKYan6LyNoBk8qWAL2ww@mail.gmail.com>

2012/2/19 Stefan Tauner <stefan.tauner at student.tuwien.ac.at>:
> Previously boards in the wiki were tagged either as working or as known
> bad. But we added support to various boards via board enables that were
> then never tested because the owners have not reported back. This can
> now be tagged with NT and is shown appropriately.
>
> Also, the underlying data structure indicating state was converted from
> macros to an enum while preserving original integer values.
>
> Because all lines specifying supported boards and laptops were touched
> anyway, this patch also re-indents them.
>
> ---
> TODO: change other occurrences to use it. ?wanted to get feedack first.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
> ?flash.h ? ? ?| ? ?7 +-
> ?print.c ? ? ?| ?869 +++++++++++++++++++++++++++++-----------------------------
> ?print_wiki.c | ? ?7 +-
> ?programmer.h | ? ?6 +-
> ?4 files changed, 446 insertions(+), 443 deletions(-)
>
> diff --git a/flash.h b/flash.h
> index 0dac13d..4d0d79b 100644
> --- a/flash.h
> +++ b/flash.h
> @@ -251,8 +251,11 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, i
> ?int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
> ?int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
>
> -#define OK 0
> -#define NT 1 ? ?/* Not tested */
> +enum test_state {
> + ? ? ? OK = 0,
> + ? ? ? NT = 1, /* Not tested */
> + ? ? ? BAD

BAD = -1 ?

> +};
>
> ?/* Something happened that shouldn't happen, but we can go on. */
> ?#define ERROR_NONFATAL 0x100
> diff --git a/print.c b/print.c
> index f0c701e..6969551 100644
> --- a/print.c
> +++ b/print.c
> @@ -560,428 +560,427 @@ void print_supported(void)
> ?/* Please keep this list alphabetically ordered by vendor/board. */
> ?const struct board_info boards_known[] = {
> ?#if defined(__i386__) || defined(__x86_64__)
> - ? ? ? B("A-Trend", ? ?"ATC-6220", ? ? ? ? ? ? 1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
> - ? ? ? B("abit", ? ? ? "A-S78H", ? ? ? ? ? ? ? 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
> - ? ? ? B("abit", ? ? ? "AN-M2", ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
> - ? ? ? B("abit", ? ? ? "AV8", ? ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
> - ? ? ? B("abit", ? ? ? "AX8", ? ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
> - ? ? ? B("abit", ? ? ? "BM6", ? ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
> - ? ? ? B("abit", ? ? ? "Fatal1ty F-I90HD", ? ? 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
> - ? ? ? B("abit", ? ? ? "IC7", ? ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
> - ? ? ? B("abit", ? ? ? "IP35", ? ? ? ? ? ? ? ? 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
> - ? ? ? B("abit", ? ? ? "IP35 Pro", ? ? ? ? ? ? 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL),
> - ? ? ? B("abit", ? ? ? "IS-10", ? ? ? ? ? ? ? ?0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", "Reported by deejkuba at aol.com to flashrom at coreboot.org, no public archive. Missing board enable and/or M50FW040 unlocking. May work now."),
> - ? ? ? B("abit", ? ? ? "KN8 Ultra", ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra", NULL),
> - ? ? ? B("abit", ? ? ? "NF-M2 nView", ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
> - ? ? ? B("abit", ? ? ? "NF-M2S", ? ? ? ? ? ? ? 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2", NULL),
> - ? ? ? B("abit", ? ? ? "NF7-S", ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
> - ? ? ? B("abit", ? ? ? "VA6", ? ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6", NULL),
> - ? ? ? B("abit", ? ? ? "VT6X4", ? ? ? ? ? ? ? ?1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
> - ? ? ? B("Acorp", ? ? ?"6A815EPD", ? ? ? ? ? ? 1, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
> - ? ? ? B("Advantech", ?"PCM-5820", ? ? ? ? ? ? 1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
> - ? ? ? B("agami", ? ? ?"Aruma", ? ? ? ? ? ? ? ?1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
> - ? ? ? B("Albatron", ? "PM266A Pro", ? ? ? ? ? 1, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
> - ? ? ? B("AOpen", ? ? ?"i945GMx-VFX", ? ? ? ? ?1, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
> - ? ? ? B("AOpen", ? ? ?"vKM400Am-S", ? ? ? ? ? 1, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
> - ? ? ? B("Artec Group","DBE61", ? ? ? ? ? ? ? ?1, "http://wiki.thincan.org/DBE61", NULL),
> - ? ? ? B("Artec Group","DBE62", ? ? ? ? ? ? ? ?1, "http://wiki.thincan.org/DBE62", NULL),
> - ? ? ? B("ASI", ? ? ? ?"MB-5BLMP", ? ? ? ? ? ? 1, "http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."),
> - ? ? ? B("ASRock", ? ? "775i65G", ? ? ? ? ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
> - ? ? ? B("ASRock", ? ? "890GX Extreme3", ? ? ? 1, "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
> - ? ? ? B("ASRock", ? ? "939A785GMH/128M", ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
> - ? ? ? B("ASRock", ? ? "A330GC", ? ? ? ? ? ? ? 1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
> - ? ? ? B("ASRock", ? ? "A770CrossFire", ? ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
> - ? ? ? B("ASRock", ? ? "ALiveNF6G-DVI", ? ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
> - ? ? ? B("ASRock", ? ? "AM2NF6G-VSTA", ? ? ? ? 1, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
> - ? ? ? B("ASRock", ? ? "ConRoeXFire-eSATA2", ? 1, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
> - ? ? ? B("ASRock", ? ? "K7S41", ? ? ? ? ? ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
> - ? ? ? B("ASRock", ? ? "K7S41GX", ? ? ? ? ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
> - ? ? ? B("ASRock", ? ? "K7VT4A+", ? ? ? ? ? ? ?0, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
> - ? ? ? B("ASRock", ? ? "K8S8X", ? ? ? ? ? ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
> - ? ? ? B("ASRock", ? ? "M3A790GXH/128M", ? ? ? 1, "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
> - ? ? ? B("ASRock", ? ? "P4i65GV", ? ? ? ? ? ? ?1, "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7N8X Deluxe", ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7N8X-E Deluxe", ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7N8X-VM/400", ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V133", ? ? ? ? ? ? ? 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V333", ? ? ? ? ? ? ? 1, "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V400-MX", ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V600-X", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V8X", ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V8X-MX", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V8X-MX SE", ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A7V8X-X", ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8M2N-LA (NodusM3-GL8E)", 1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
> - ? ? ? B("ASUS", ? ? ? "A8N-E", ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8N-LA (Nagami-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
> - ? ? ? B("ASUS", ? ? ? "A8N-SLI", ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8N-SLI Deluxe", ? ? ? 0, NULL, "Untested board enable."),
> - ? ? ? B("ASUS", ? ? ? "A8N-SLI Premium", ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8N-VM", ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8N-VM CSM", ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8NE-FM/S", ? ? ? ? ? ?1, "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8V Deluxe", ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8V-E Deluxe", ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "A8V-E SE", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
> - ? ? ? B("ASUS", ? ? ? "Crosshair II Formula", 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
> - ? ? ? B("ASUS", ? ? ? "Crosshair IV Extreme", 1, "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
> - ? ? ? B("ASUS", ? ? ? "E35M1-I DELUXE", ? ? ? 1, "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
> - ? ? ? B("ASUS", ? ? ? "K8N", ? ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
> - ? ? ? B("ASUS", ? ? ? "K8V", ? ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
> - ? ? ? B("ASUS", ? ? ? "K8V SE Deluxe", ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "K8V-X", ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "K8V-X SE", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
> - ? ? ? B("ASUS", ? ? ? "KFSN4-DRE/SAS", ? ? ? ?1, "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2A-MX", ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2A-VM (HDMI)", ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2N32-SLI Deluxe", ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2N-E", ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
> - ? ? ? B("ASUS", ? ? ? "M2N-E SLI", ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2N-SLI Deluxe", ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2NBP-VM CSM", ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2NPV-VM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2V", ? ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M2V-MX", ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M3A", ? ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M3A76-CM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M3A78-EM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M3N78-VM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4A78-EM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4A785TD-M EVO", ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4A785TD-V EVO", ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4A78LT-M LE", ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4A79T Deluxe", ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4A87TD/USB3", ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4A89GTD PRO", ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M4N78 PRO", ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
> - ? ? ? B("ASUS", ? ? ? "M5A99X EVO", ? ? ? ? ? 1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
> - ? ? ? B("ASUS", ? ? ? "MEW-AM", ? ? ? ? ? ? ? 0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> - ? ? ? B("ASUS", ? ? ? "MEW-VM", ? ? ? ? ? ? ? 0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> - ? ? ? B("ASUS", ? ? ? "OPLX-M", ? ? ? ? ? ? ? 0, NULL, "Untested board enable."),
> - ? ? ? B("ASUS", ? ? ? "P2B", ? ? ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P2B-D", ? ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P2B-DS", ? ? ? ? ? ? ? 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P2B-F", ? ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P2B-N", ? ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P2E-M", ? ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P2L97-S", ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P3B-F", ? ? ? ? ? ? ? ?0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> - ? ? ? B("ASUS", ? ? ? "P4B266", ? ? ? ? ? ? ? 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4B266-LM", ? ? ? ? ? ?1, "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4B533-E", ? ? ? ? ? ? 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4C800-E Deluxe", ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4GV-LA (Guppy)", ? ? ?1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4P800", ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4P800-E Deluxe", ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4P800-VM", ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4SC-E", ? ? ? ? ? ? ? 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
> - ? ? ? B("ASUS", ? ? ? "P4SD-LA", ? ? ? ? ? ? ?1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4S533-X", ? ? ? ? ? ? 1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P4S800-MX", ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5A", ? ? ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5B", ? ? ? ? ? ? ? ? ?1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5B-Deluxe", ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5BV-M", ? ? ? ? ? ? ? 0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
> - ? ? ? B("ASUS", ? ? ? "P5GC-MX/1333", ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5GD1 Pro", ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5GD1-VM/S", ? ? ? ? ? 1, NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."),
> - ? ? ? B("ASUS", ? ? ? "P5GD1(-VM)", ? ? ? ? ? 0, NULL, "Untested board enable."),
> - ? ? ? B("ASUS", ? ? ? "P5GD2 Premium", ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5GDC Deluxe", ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5GDC-V Deluxe", ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5GD2/C variants", ? ? 0, NULL, "Untested board enable."),
> - ? ? ? B("ASUS", ? ? ? "P5K-V", ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5K-VM", ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5KC", ? ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5KPL-CM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5L-MX", ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5L-VM 1394", ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5LD2", ? ? ? ? ? ? ? ?0, NULL, "Untested board enable."),
> - ? ? ? B("ASUS", ? ? ? "P5LP-LE (Lithium-UL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
> - ? ? ? B("ASUS", ? ? ? "P5LP-LE (Epson OEM)", ?1, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
> - ? ? ? B("ASUS", ? ? ? "P5LP-LE", ? ? ? ? ? ? ?0, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),
> - ? ? ? B("ASUS", ? ? ? "P5N-E SLI", ? ? ? ? ? ?0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Needs a board enable (http://patchwork.coreboot.org/patch/3298/)."),
> - ? ? ? B("ASUS", ? ? ? "P5N-D", ? ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5N-E SLI", ? ? ? ? ? ?0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
> - ? ? ? B("ASUS", ? ? ? "P5N32-E SLI", ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5N7A-VM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5ND2-SLI Deluxe", ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5PE-VM", ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5QPL-AM", ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P5VD1-X", ? ? ? ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P6T SE", ? ? ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P6T Deluxe", ? ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P6T Deluxe V2", ? ? ? ?1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P7H57D-V EVO", ? ? ? ? 1, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL),
> - ? ? ? B("ASUS", ? ? ? "P7H55-M LX", ? ? ? ? ? 0, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
> - ? ? ? B("ASUS", ? ? ? "P8B-E/4L", ? ? ? ? ? ? 0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ASUS", ? ? ? "P8B WS", ? ? ? ? ? ? ? 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ASUS", ? ? ? "P8H61 PRO", ? ? ? ? ? ?0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ASUS", ? ? ? "P8H61-M LE/USB3", ? ? ?0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ASUS", ? ? ? "P8H67-M PRO", ? ? ? ? ?0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ASUS", ? ? ? "P8P67 (rev. 3.1)", ? ? 0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ASUS", ? ? ? "P8Z68-V PRO", ? ? ? ? ?0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ASUS", ? ? ? "Z8NA-D6C", ? ? ? ? ? ? 1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
> - ? ? ? B("ASUS", ? ? ? "Z8PE-D12", ? ? ? ? ? ? 1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
> - ? ? ? B("BCOM", ? ? ? "WinNET100", ? ? ? ? ? ?1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
> - ? ? ? B("Bifferos", ? "Bifferboard", ? ? ? ? ?1, "http://bifferos.co.uk/", NULL),
> - ? ? ? B("Biostar", ? ?"N68S3+", ? ? ? ? ? ? ? 1, NULL, NULL),
> - ? ? ? B("Biostar", ? ?"M6TBA", ? ? ? ? ? ? ? ?0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> - ? ? ? B("Biostar", ? ?"M7NCD Pro", ? ? ? ? ? ?1, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
> - ? ? ? B("Biostar", ? ?"P4M80-M4", ? ? ? ? ? ? 1, "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
> - ? ? ? B("Biostar", ? ?"TA780G M2+", ? ? ? ? ? 1, "http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344", NULL),
> - ? ? ? B("Boser", ? ? ?"HS-6637", ? ? ? ? ? ? ?0, "http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."),
> - ? ? ? B("Congatec", ? "conga-X852", ? ? ? ? ? 1, "http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
> - ? ? ? B("Dell", ? ? ? "OptiPlex GX1", ? ? ? ? 1, "http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL),
> - ? ? ? B("Dell", ? ? ? "PowerEdge 1850", ? ? ? 1, "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL),
> - ? ? ? B("DFI", ? ? ? ?"855GME-MGF", ? ? ? ? ? 0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
> - ? ? ? B("DFI", ? ? ? ?"Blood-Iron P35 T2RL", ?1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
> - ? ? ? B("Elitegroup", "GeForce6100SM-M ", ? ? 1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
> - ? ? ? B("Elitegroup", "GF7100PVT-M3 (V1.0)", ?1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "K7S5A", ? ? ? ? ? ? ? ?1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "K7S6A", ? ? ? ? ? ? ? ?1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "K7SEM (V1.0A)", ? ? ? ?1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "K7VTA3", ? ? ? ? ? ? ? 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "P4VXMS (V1.0A)", ? ? ? 1, NULL, NULL),
> - ? ? ? B("Elitegroup", "P6IWP-Fe", ? ? ? ? ? ? 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "P6VAP-A+", ? ? ? ? ? ? 1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
> - ? ? ? B("Elitegroup", "RS485M-M", ? ? ? ? ? ? 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0", NULL),
> - ? ? ? B("Emerson", ? ?"ATCA-7360", ? ? ? ? ? ?1, "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx", NULL),
> - ? ? ? B("EPoX", ? ? ? "EP-8K5A2", ? ? ? ? ? ? 1, "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
> - ? ? ? B("EPoX", ? ? ? "EP-8NPA7I", ? ? ? ? ? ?1, "http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
> - ? ? ? B("EPoX", ? ? ? "EP-9NPA7I", ? ? ? ? ? ?1, "http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
> - ? ? ? B("EPoX", ? ? ? "EP-8RDA3+", ? ? ? ? ? ?1, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
> - ? ? ? B("EPoX", ? ? ? "EP-BX3", ? ? ? ? ? ? ? 1, "http://www.epox.com/product.asp?ID=EP-BX3", NULL),
> - ? ? ? B("EVGA", ? ? ? "132-CK-NF78", ? ? ? ? ?1, "http://www.evga.com/articles/385.asp", NULL),
> - ? ? ? B("EVGA", ? ? ? "270-WS-W555-A2 (Classified SR-2)", 1, "http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
> - ? ? ? B("FIC", ? ? ? ?"VA-502", ? ? ? ? ? ? ? 0, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
> - ? ? ? B("Foxconn", ? ?"6150K8MD-8EKRSH", ? ? ?1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157", NULL),
> - ? ? ? B("Foxconn", ? ?"A6VMX", ? ? ? ? ? ? ? ?1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346", NULL),
> - ? ? ? B("Foxconn", ? ?"P4M800P7MA-RS2", ? ? ? 1, "http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138", NULL),
> - ? ? ? B("Freetech", ? "P6F91i", ? ? ? ? ? ? ? 1, "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html", NULL),
> - ? ? ? B("Fujitsu-Siemens", "ESPRIMO P5915", ? 1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm", "Mainboard model is D2312-A2."),
> - ? ? ? B("GIGABYTE", ? "GA-2761GXDK", ? ? ? ? ?1, "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-6BXC", ? ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-6BXDU", ? ? ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-6IEM", ? ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-6VXE7+", ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-6ZMA", ? ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA785GMT-UD2H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-770TA-UD3", ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-7DXR", ? ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-7VT600", ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-7ZM", ? ? ? ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
> - ? ? ? B("GIGABYTE", ? "GA-880GMA-USB3 (rev. 3.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-8I945GZME-RH", ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-8IP775", ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-8IRML", ? ? ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-8PE667 Ultra 2", ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-8SIMLH", ? ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-945PL-S3P (rev. 6.6)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-965P-DS4", ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-EP31-DS3L (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-EP35-DS3L", ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-EX58-UD4P", ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-K8N-SLI", ? ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-K8N51GMF", ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-K8N51GMF-9", ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-K8NS Pro-939", ? ? ?0, "http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."),
> - ? ? ? B("GIGABYTE", ? "GA-M57SLI-S4", ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-M61P-S3", ? ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-M720-US3", ? ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA69VM-S2", ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA74GM-S2H (rev. 3.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA770-UD3 (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA770T-UD3P", ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA780G-UD3H", ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA78G-DS3H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA78GM-S2H", ? ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */
> - ? ? ? B("GIGABYTE", ? "GA-MA78GPM-DS2H", ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA790FX-DQ6", ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA790GP-DS4H", ? ? ?1, "http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-MA790XT-UD4P (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-P55A-UD4 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-P67A-UD3P", ? ? ? ? 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL),
> - ? ? ? B("GIGABYTE", ? "GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL),
> - ? ? ? B("GIGABYTE", ? "GA-Z68MX-UD2H-B (rev. 1.3)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
> - ? ? ? B("GIGABYTE", ? "GA-Z68XP-UD3 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
> - ? ? ? B("HP", ? ? ? ? "e-Vectra P2706T", ? ? ?1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
> - ? ? ? B("HP", ? ? ? ? "ProLiant DL145 G3", ? ?1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
> - ? ? ? B("HP", ? ? ? ? "ProLiant DL165 G6", ? ?1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
> - ? ? ? B("HP", ? ? ? ? "ProLiant N40L", ? ? ? ?1, NULL, NULL),
> - ? ? ? B("HP", ? ? ? ? "Puffer2-UL8E", ? ? ? ? 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
> - ? ? ? B("HP", ? ? ? ? "dc7800", ? ? ? ? ? ? ? 0, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1", "ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor, locked ME region."),
> - ? ? ? B("HP", ? ? ? ? "Vectra VL400", ? ? ? ? 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
> - ? ? ? B("HP", ? ? ? ? "Vectra VL420 SFF", ? ? 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
> - ? ? ? B("HP", ? ? ? ? "xw4400 (0A68h)", ? ? ? 0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
> - ? ? ? B("HP", ? ? ? ? "xw9400", ? ? ? ? ? ? ? 1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454", "Boot block is write protected unless the solder points next to F2 are shorted."),
> - ? ? ? B("IBASE", ? ? ?"MB899", ? ? ? ? ? ? ? ?1, "http://www.ibase-i.com.tw/2009/mb899.html", NULL),
> - ? ? ? B("IBM", ? ? ? ?"x3455", ? ? ? ? ? ? ? ?1, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
> - ? ? ? B("IEI", ? ? ? ?"PICOe-9452", ? ? ? ? ? 1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
> - ? ? ? B("Intel", ? ? ?"D201GLY", ? ? ? ? ? ? ?1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
> - ? ? ? B("Intel", ? ? ?"D425KT", ? ? ? ? ? ? ? 0, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
> - ? ? ? B("Intel", ? ? ?"D865GLC", ? ? ? ? ? ? ?0, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
> - ? ? ? B("Intel", ? ? ?"DG45ID", ? ? ? ? ? ? ? 0, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
> - ? ? ? B("Intel", ? ? ?"DH67CF", ? ? ? ? ? ? ? 0, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
> - ? ? ? B("Intel", ? ? ?"EP80759", ? ? ? ? ? ? ?1, NULL, NULL),
> - ? ? ? B("Intel", ? ? ?"Foxhollow", ? ? ? ? ? ?1, NULL, "Intel reference board."),
> - ? ? ? B("Intel", ? ? ?"Greencity", ? ? ? ? ? ?1, NULL, "Intel reference board."),
> - ? ? ? B("Intel", ? ? ?"SE440BX-2", ? ? ? ? ? ?0, "http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard", "Probably won't work, see http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
> - ? ? ? B("IWILL", ? ? ?"DK8-HTX", ? ? ? ? ? ? ?1, "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98", NULL),
> - ? ? ? B("Jetway", ? ? "J-7BXAN", ? ? ? ? ? ? ?1, "http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
> - ? ? ? B("Jetway", ? ? "J7F4K1G5D-PB", ? ? ? ? 1, "http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D", NULL),
> - ? ? ? B("Kontron", ? ?"986LCD-M", ? ? ? ? ? ? 1, "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html", NULL),
> - ? ? ? B("Lanner", ? ? "EM-8510C", ? ? ? ? ? ? 1, NULL, NULL),
> - ? ? ? B("Lex", ? ? ? ?"CV700A", ? ? ? ? ? ? ? 1, "http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
> - ? ? ? B("Mitac", ? ? ?"6513WU", ? ? ? ? ? ? ? 1, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm", NULL),
> - ? ? ? B("MSC", ? ? ? ?"Q7-TCTC", ? ? ? ? ? ? ?1, "http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6153", ? ? ? ? ? ? ?1, "http://www.msi.com/product/mb/MS-6153.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6156", ? ? ? ? ? ? ?1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6163 (MS-6163 Pro)",1, "http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6178", ? ? ? ? ? ? ?0, "http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
> - ? ? ? B("MSI", ? ? ? ?"MS-6330 (K7T Turbo)", ?1, "http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6391 (845 Pro4)", ? 1, "http://www.msi.com/product/mb/845-Pro4.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6561 (745 Ultra)", ?1, "http://www.msi.com/product/mb/745-Ultra.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6566 (845 Ultra-C)",1, "http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6570 (K7N2)", ? ? ? 1, "http://www.msi.com/product/mb/K7N2.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6577 (Xenon)", ? ? ?1, "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843", "This is an OEM board from HP, the HP name is Xenon."),
> - ? ? ? B("MSI", ? ? ? ?"MS-6590 (KT4 Ultra)", ?1, "http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6702E (K8T Neo2-F)",1, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6712 (KT4V)", ? ? ? 1, "http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-6787 (P4MAM-V/P4MAM-L)", 1, "http://www.msi.com/service/search/?kw=6787&type=product", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7005 (651M-L)", ? ? 1, "http://www.msi.com/product/mb/651M-L.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7025 (K8N Neo2 Platinum)", 1, "http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7046", ? ? ? ? ? ? ?1, "http://www.heimir.de/ms7046/", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7061 (KM4M-V/KM4AM-V)", 1, "http://www.msi.com/service/search/?kw=7061&type=product", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7065", ? ? ? ? ? ? ?1, "http://browse.geekbench.ca/geekbench2/view/53114", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7135 (K8N Neo3)", ? 1, "http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7142 (K8MM-V)", ? ? 1, "http://www.msi.com/product/mb/K8MM-V.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7168 (Orion)", ? ? ?1, "http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7207 (K8NGM2-L)", ? 1, "http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7211 (PM8M3-V)", ? ?1, "http://www.msi.com/product/mb/PM8M3-V.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7236 (945PL Neo3)", 1, "http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7253 (K9VGM-V)", ? ?1, "http://www.msi.com/product/mb/K9VGM-V.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7255 (P4M890M)", ? ?1, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7260 (K9N Neo PCB 1.0)", 0, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
> - ? ? ? B("MSI", ? ? ? ?"MS-7309 (K9N6PGM2-V2)", 1, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7312 (K9MM-V)", ? ? 1, "http://www.msi.com/product/mb/K9MM-V.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7369 (K9N Neo V2)", 1, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7376 (K9A2 Platinum V1)", 1, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7529 (G31TM-P21)", ?1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7548 (Aspen-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7596 (785GM-E51)", ?1, "http://www.msi.com/product/mb/785GM-E51.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7599 (870-C45)", ? ?1, "http://www.msi.com/product/mb/870-C45.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7613 (Iona-GL8E)", ?0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("MSI", ? ? ? ?"MS-7635 (H55M-ED55)", ?0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("MSI", ? ? ? ?"MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7642 (890GXM-G65)", 1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7676 (H67MA-ED55(B3))", 1, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
> - ? ? ? B("MSI", ? ? ? ?"MS-7696 (A75MA-G55)", ?1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
> - ? ? ? B("MSI", ? ? ? ?"MS-7698 (E350IA-E45)", 1, "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
> - ? ? ? B("NEC", ? ? ? ?"PowerMate 2000", ? ? ? 1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
> - ? ? ? B("Nokia", ? ? ?"IP530", ? ? ? ? ? ? ? ?1, NULL, NULL),
> - ? ? ? B("PCCHIPS ", ? "M598LMR (V9.0)", ? ? ? 1, NULL, NULL),
> - ? ? ? B("PCCHIPS ", ? "M863G (V5.1A)", ? ? ? ?1, "http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0", NULL),
> - ? ? ? B("PC Engines", "Alix.1c", ? ? ? ? ? ? ?1, "http://pcengines.ch/alix1c.htm", NULL),
> - ? ? ? B("PC Engines", "Alix.2c2", ? ? ? ? ? ? 1, "http://pcengines.ch/alix2c2.htm", NULL),
> - ? ? ? B("PC Engines", "Alix.2c3", ? ? ? ? ? ? 1, "http://pcengines.ch/alix2c3.htm", NULL),
> - ? ? ? B("PC Engines", "Alix.2d3", ? ? ? ? ? ? 1, "http://pcengines.ch/alix2d3.htm", NULL),
> - ? ? ? B("PC Engines", "Alix.3c3", ? ? ? ? ? ? 1, "http://pcengines.ch/alix3c3.htm", NULL),
> - ? ? ? B("PC Engines", "Alix.3d3", ? ? ? ? ? ? 1, "http://pcengines.ch/alix3d3.htm", NULL),
> - ? ? ? B("PC Engines", "Alix.6f2", ? ? ? ? ? ? 1, "http://pcengines.ch/alix6f2.htm", NULL),
> - ? ? ? B("PC Engines", "WRAP.2E", ? ? ? ? ? ? ?1, "http://pcengines.ch/wrap2e1.htm", NULL),
> - ? ? ? B("Portwell", ? "PEB-4700VLA", ? ? ? ? ?1, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
> - ? ? ? B("RCA", ? ? ? ?"RM4100", ? ? ? ? ? ? ? 1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
> - ? ? ? B("Samsung", ? ?"Polaris 32", ? ? ? ? ? 1, NULL, NULL),
> - ? ? ? B("Shuttle", ? ?"AK31", ? ? ? ? ? ? ? ? 1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
> - ? ? ? B("Shuttle", ? ?"AK38N", ? ? ? ? ? ? ? ?1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
> - ? ? ? B("Shuttle", ? ?"AV11V30", ? ? ? ? ? ? ?1, NULL, NULL),
> - ? ? ? B("Shuttle", ? ?"AV18E2", ? ? ? ? ? ? ? 1, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
> - ? ? ? B("Shuttle", ? ?"FD37", ? ? ? ? ? ? ? ? 1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
> - ? ? ? B("Shuttle", ? ?"FH67", ? ? ? ? ? ? ? ? 1, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
> - ? ? ? B("Shuttle", ? ?"FN25", ? ? ? ? ? ? ? ? 1, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
> - ? ? ? B("Shuttle", ? ?"X50/X50(B)", ? ? ? ? ? 1, "http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
> - ? ? ? B("Soyo", ? ? ? "SY-5VD", ? ? ? ? ? ? ? 0, "http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> - ? ? ? B("Soyo", ? ? ? "SY-6BA+ III", ? ? ? ? ?1, "http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
> - ? ? ? B("Soyo", ? ? ? "SY-7VCA", ? ? ? ? ? ? ?1, "http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html", NULL),
> - ? ? ? B("Sun", ? ? ? ?"Blade x6250", ? ? ? ? ?1, "http://www.sun.com/servers/blades/x6250/", NULL),
> - ? ? ? B("Sun", ? ? ? ?"Fire x4150", ? ? ? ? ? 0, "http://www.sun.com/servers/x64/x4150/", "No public report found. May work now."),
> - ? ? ? B("Sun", ? ? ? ?"Fire x4200", ? ? ? ? ? 0, "http://www.sun.com/servers/entry/x4200/", "No public report found. May work now."),
> - ? ? ? B("Sun", ? ? ? ?"Fire x4540", ? ? ? ? ? 0, "http://www.sun.com/servers/x64/x4540/", "No public report found. May work now."),
> - ? ? ? B("Sun", ? ? ? ?"Fire x4600", ? ? ? ? ? 0, "http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."),
> - ? ? ? B("Sun", ? ? ? ?"Ultra 40 M2", ? ? ? ? ?1, "http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html", NULL),
> - ? ? ? B("Supermicro", "H8QC8", ? ? ? ? ? ? ? ?1, "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL),
> - ? ? ? B("Supermicro", "X5DP8-G2", ? ? ? ? ? ? 1, "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL),
> - ? ? ? B("Supermicro", "X7DBT-INF", ? ? ? ? ? ?1, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
> - ? ? ? B("Supermicro", "X7SPA-HF", ? ? ? ? ? ? 1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
> - ? ? ? B("Supermicro", "X8DT3", ? ? ? ? ? ? ? ?1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
> - ? ? ? B("Supermicro", "X8DTE-F", ? ? ? ? ? ? ?1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
> - ? ? ? B("Supermicro", "X8DTH-6F", ? ? ? ? ? ? 1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
> - ? ? ? B("Supermicro", "X8DTT-F", ? ? ? ? ? ? ?1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
> - ? ? ? B("Supermicro", "X8DTT-HIBQF", ? ? ? ? ?1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
> - ? ? ? B("Supermicro", "X8DTU-6TF+", ? ? ? ? ? 0, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("Supermicro", "X8DTU-F", ? ? ? ? ? ? ?1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
> - ? ? ? B("Supermicro", "X8SIE(-F)", ? ? ? ? ? ?0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
> - ? ? ? B("Supermicro", "X8STi", ? ? ? ? ? ? ? ?1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
> - ? ? ? B("Supermicro", "X9SCA-F", ? ? ? ? ? ? ?0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("Supermicro", "X9SCL", ? ? ? ? ? ? ? ?0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("T-Online", ? "S-100", ? ? ? ? ? ? ? ?1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
> - ? ? ? B("Tekram", ? ? "P6Pro-A5", ? ? ? ? ? ? 1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
> - ? ? ? B("Termtek", ? ?"TK-3370 (Rev:2.5B)", ? 1, NULL, NULL),
> - ? ? ? B("Thomson", ? ?"IP1000", ? ? ? ? ? ? ? 1, "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
> - ? ? ? B("TriGem", ? ? "Anaheim-3", ? ? ? ? ? ?1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
> - ? ? ? B("TriGem", ? ? "Lomita", ? ? ? ? ? ? ? 1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5375-1U (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
> - ? ? ? B("Tyan", ? ? ? "S1846 (Tsunami ATX)", ?1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2466 (Tiger MPX)", ? ?1, "http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2498 (Tomcat K7M)", ? 1, "http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2723 (Tiger i7501)", ?1, "http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2881 (Thunder K8SR)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2882 (Thunder K8S Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2882-D (Thunder K8SD Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2891 (Thunder K8SRE)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2892 (Thunder K8SE)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2895 (Thunder K8WE)", 1, "http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2912 (Thunder n3600R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2915 (Thunder n6650W)", 1, "http://tyan.com/product_board_detail.aspx?pid=163", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2915-E (Thunder n6650W)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041", NULL),
> - ? ? ? B("Tyan", ? ? ? "S2933 (Thunder n3600S)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL),
> - ? ? ? B("Tyan", ? ? ? "S3095 (Tomcat i945GM)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
> - ? ? ? B("Tyan", ? ? ? "S3992 (Thunder h2000M)", 1, "http://tyan.com/product_board_detail.aspx?pid=235", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5180 (Toledo i965R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5191 (Toledo i3000R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5197 (Toledo i3010W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5211 (Toledo i3210W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5211-1U (Toledo i3200R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5220 (Toledo q35T)", ?1, "http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5375 (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5376 (Tempest i5100W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=605", "Both S5376G2NR and S5376WAG2NR should work."),
> - ? ? ? B("Tyan", ? ? ? "S5377 (Tempest i5100T)", 1, "http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5382 (Tempest i5000PW)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
> - ? ? ? B("Tyan", ? ? ? "S5397 (Tempest i5400PW)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
> - ? ? ? B("VIA", ? ? ? ?"EPIA M/MII/...", ? ? ? 1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202", NULL), /* EPIA-MII link for now */
> - ? ? ? B("VIA", ? ? ? ?"EPIA SP", ? ? ? ? ? ? ?1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261", NULL),
> - ? ? ? B("VIA", ? ? ? ?"EPIA-CN", ? ? ? ? ? ? ?1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400", NULL),
> - ? ? ? B("VIA", ? ? ? ?"EPIA EK", ? ? ? ? ? ? ?1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420", NULL),
> - ? ? ? B("VIA", ? ? ? ?"EPIA-EX15000G", ? ? ? ?1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450", NULL),
> - ? ? ? B("VIA", ? ? ? ?"EPIA-LN", ? ? ? ? ? ? ?1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473", NULL),
> - ? ? ? B("VIA", ? ? ? ?"EPIA-M700", ? ? ? ? ? ?1, "http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700", NULL),
> - ? ? ? B("VIA", ? ? ? ?"EPIA-N/NL", ? ? ? ? ? ?1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221", NULL), /* EPIA-N link for now */
> - ? ? ? B("VIA", ? ? ? ?"EPIA-NX15000G", ? ? ? ?1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470", NULL),
> - ? ? ? B("VIA", ? ? ? ?"NAB74X0", ? ? ? ? ? ? ?1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590", NULL),
> - ? ? ? B("VIA", ? ? ? ?"pc2500e", ? ? ? ? ? ? ?1, "http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp", NULL),
> - ? ? ? B("VIA", ? ? ? ?"PC3500G", ? ? ? ? ? ? ?1, "http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp", NULL),
> - ? ? ? B("VIA", ? ? ? ?"VB700X", ? ? ? ? ? ? ? 1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490", NULL),
> - ? ? ? B("ZOTAC", ? ? ?"Fusion-ITX WiFi (FUSION350-A-E)", 1, NULL, NULL),
> - ? ? ? B("ZOTAC", ? ? ?"GeForce 8200", ? ? ? ? 1, "http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92", NULL),
> - ? ? ? B("ZOTAC", ? ? ?"H67-ITX WiFi (H67ITX-C-E)", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("ZOTAC", ? ? ?"ZBOX HD-ID11", ? ? ? ? 1, "http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75", NULL),
> + ? ? ? B("A-Trend", ? ?"ATC-6220", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
> + ? ? ? B("abit", ? ? ? "A-S78H", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
> + ? ? ? B("abit", ? ? ? "AN-M2", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
> + ? ? ? B("abit", ? ? ? "AV8", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
> + ? ? ? B("abit", ? ? ? "AX8", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
> + ? ? ? B("abit", ? ? ? "BM6", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
> + ? ? ? B("abit", ? ? ? "Fatal1ty F-I90HD", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
> + ? ? ? B("abit", ? ? ? "IC7", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
> + ? ? ? B("abit", ? ? ? "IP35", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
> + ? ? ? B("abit", ? ? ? "IP35 Pro", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL),
> + ? ? ? B("abit", ? ? ? "IS-10", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", "Reported by deejkuba at aol.com to flashrom at coreboot.org, no public archive. Missing board enable and/or M50FW040 unlocking. May work now."),
> + ? ? ? B("abit", ? ? ? "KN8 Ultra", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra", NULL),
> + ? ? ? B("abit", ? ? ? "NF-M2 nView", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
> + ? ? ? B("abit", ? ? ? "NF-M2S", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2", NULL),
> + ? ? ? B("abit", ? ? ? "NF7-S", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
> + ? ? ? B("abit", ? ? ? "VA6", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6", NULL),
> + ? ? ? B("abit", ? ? ? "VT6X4", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
> + ? ? ? B("Acorp", ? ? ?"6A815EPD", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
> + ? ? ? B("Advantech", ?"PCM-5820", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
> + ? ? ? B("agami", ? ? ?"Aruma", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
> + ? ? ? B("Albatron", ? "PM266A Pro", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
> + ? ? ? B("AOpen", ? ? ?"i945GMx-VFX", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
> + ? ? ? B("AOpen", ? ? ?"vKM400Am-S", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
> + ? ? ? B("Artec Group","DBE61", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://wiki.thincan.org/DBE61", NULL),
> + ? ? ? B("Artec Group","DBE62", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://wiki.thincan.org/DBE62", NULL),
> + ? ? ? B("ASI", ? ? ? ?"MB-5BLMP", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."),
> + ? ? ? B("ASRock", ? ? "775i65G", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
> + ? ? ? B("ASRock", ? ? "890GX Extreme3", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
> + ? ? ? B("ASRock", ? ? "939A785GMH/128M", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
> + ? ? ? B("ASRock", ? ? "A330GC", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
> + ? ? ? B("ASRock", ? ? "A770CrossFire", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
> + ? ? ? B("ASRock", ? ? "ALiveNF6G-DVI", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
> + ? ? ? B("ASRock", ? ? "AM2NF6G-VSTA", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
> + ? ? ? B("ASRock", ? ? "ConRoeXFire-eSATA2", ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
> + ? ? ? B("ASRock", ? ? "K7S41", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
> + ? ? ? B("ASRock", ? ? "K7S41GX", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
> + ? ? ? B("ASRock", ? ? "K7VT4A+", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
> + ? ? ? B("ASRock", ? ? "K8S8X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
> + ? ? ? B("ASRock", ? ? "M3A790GXH/128M", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
> + ? ? ? B("ASRock", ? ? "P4i65GV", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7N8X Deluxe", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7N8X-E Deluxe", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7N8X-VM/400", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V133", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V333", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V400-MX", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V600-X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V8X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V8X-MX", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V8X-MX SE", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A7V8X-X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8M2N-LA (NodusM3-GL8E)", ? ? ? ? ? ? ?OK, ? ? "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
> + ? ? ? B("ASUS", ? ? ? "A8N-E", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8N-LA (Nagami-GL8E)", ? ? ? ? ? ? ? ? OK, ? ? "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
> + ? ? ? B("ASUS", ? ? ? "A8N-SLI", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8N-SLI Deluxe", ? ? ? ? ? ? ? ? ? ? ? NT, ? ? NULL, "Untested board enable."),
> + ? ? ? B("ASUS", ? ? ? "A8N-SLI Premium", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8N-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8N-VM CSM", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8NE-FM/S", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8V Deluxe", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8V-E Deluxe", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "A8V-E SE", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
> + ? ? ? B("ASUS", ? ? ? "Crosshair II Formula", ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
> + ? ? ? B("ASUS", ? ? ? "Crosshair IV Extreme", ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
> + ? ? ? B("ASUS", ? ? ? "E35M1-I DELUXE", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
> + ? ? ? B("ASUS", ? ? ? "K8N", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
> + ? ? ? B("ASUS", ? ? ? "K8V", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
> + ? ? ? B("ASUS", ? ? ? "K8V SE Deluxe", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "K8V-X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "K8V-X SE", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
> + ? ? ? B("ASUS", ? ? ? "KFSN4-DRE/SAS", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2A-MX", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2A-VM (HDMI)", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2N32-SLI Deluxe", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2N-E", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
> + ? ? ? B("ASUS", ? ? ? "M2N-E SLI", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2N-SLI Deluxe", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2NBP-VM CSM", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2NPV-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2V", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M2V-MX", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M3A", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M3A76-CM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M3A78-EM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M3N78-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4A78-EM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4A785TD-M EVO", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4A785TD-V EVO", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4A78LT-M LE", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4A79T Deluxe", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4A87TD/USB3", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4A89GTD PRO", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M4N78 PRO", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
> + ? ? ? B("ASUS", ? ? ? "M5A99X EVO", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
> + ? ? ? B("ASUS", ? ? ? "MEW-AM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> + ? ? ? B("ASUS", ? ? ? "MEW-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> + ? ? ? B("ASUS", ? ? ? "OPLX-M", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? NT, ? ? NULL, "Untested board enable."),
> + ? ? ? B("ASUS", ? ? ? "P2B", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P2B-D", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P2B-DS", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P2B-F", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P2B-N", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P2E-M", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P2L97-S", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P3B-F", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> + ? ? ? B("ASUS", ? ? ? "P4B266", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4B266-LM", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4B533-E", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4C800-E Deluxe", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4GV-LA (Guppy)", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4P800", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4P800-E Deluxe", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4P800-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4SC-E", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
> + ? ? ? B("ASUS", ? ? ? "P4SD-LA", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4S533-X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P4S800-MX", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5A", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5B", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5B-Deluxe", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5BV-M", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
> + ? ? ? B("ASUS", ? ? ? "P5GC-MX/1333", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5GD1 Pro", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5GD1-VM/S", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."),
> + ? ? ? B("ASUS", ? ? ? "P5GD1(-VM)", ? ? ? ? ? ? ? ? ? ? ? ? ? NT, ? ? NULL, "Untested board enable."),
> + ? ? ? B("ASUS", ? ? ? "P5GD2 Premium", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5GDC Deluxe", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5GDC-V Deluxe", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5GD2/C variants", ? ? ? ? ? ? ? ? ? ? NT, ? ? NULL, "Untested board enable."),
> + ? ? ? B("ASUS", ? ? ? "P5K-V", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5K-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5KC", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5KPL-CM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5L-MX", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5L-VM 1394", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5LD2", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?NT, ? ? NULL, "Untested board enable."),
> + ? ? ? B("ASUS", ? ? ? "P5LP-LE (Lithium-UL8E)", ? ? ? ? ? ? ? OK, ? ? "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
> + ? ? ? B("ASUS", ? ? ? "P5LP-LE (Epson OEM)", ? ? ? ? ? ? ? ? ?OK, ? ? NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
> + ? ? ? B("ASUS", ? ? ? "P5LP-LE", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),
> + ? ? ? B("ASUS", ? ? ? "P5N-D", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5N-E SLI", ? ? ? ? ? ? ? ? ? ? ? ? ? ?NT, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
> + ? ? ? B("ASUS", ? ? ? "P5N32-E SLI", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5N7A-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5ND2-SLI Deluxe", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5PE-VM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5QPL-AM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P5VD1-X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P6T SE", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P6T Deluxe", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P6T Deluxe V2", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P7H57D-V EVO", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL),
> + ? ? ? B("ASUS", ? ? ? "P7H55-M LX", ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
> + ? ? ? B("ASUS", ? ? ? "P8B-E/4L", ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ASUS", ? ? ? "P8B WS", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ASUS", ? ? ? "P8H61 PRO", ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ASUS", ? ? ? "P8H61-M LE/USB3", ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ASUS", ? ? ? "P8H67-M PRO", ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ASUS", ? ? ? "P8P67 (rev. 3.1)", ? ? ? ? ? ? ? ? ? ? BAD, ? ?NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ASUS", ? ? ? "P8Z68-V PRO", ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ASUS", ? ? ? "Z8NA-D6C", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
> + ? ? ? B("ASUS", ? ? ? "Z8PE-D12", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
> + ? ? ? B("BCOM", ? ? ? "WinNET100", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
> + ? ? ? B("Bifferos", ? "Bifferboard", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://bifferos.co.uk/", NULL),
> + ? ? ? B("Biostar", ? ?"N68S3+", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("Biostar", ? ?"M6TBA", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> + ? ? ? B("Biostar", ? ?"M7NCD Pro", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
> + ? ? ? B("Biostar", ? ?"P4M80-M4", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
> + ? ? ? B("Biostar", ? ?"TA780G M2+", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344", NULL),
> + ? ? ? B("Boser", ? ? ?"HS-6637", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."),
> + ? ? ? B("Congatec", ? "conga-X852", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
> + ? ? ? B("Dell", ? ? ? "OptiPlex GX1", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL),
> + ? ? ? B("Dell", ? ? ? "PowerEdge 1850", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL),
> + ? ? ? B("DFI", ? ? ? ?"855GME-MGF", ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
> + ? ? ? B("DFI", ? ? ? ?"Blood-Iron P35 T2RL", ? ? ? ? ? ? ? ? ?OK, ? ? "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
> + ? ? ? B("Elitegroup", "GeForce6100SM-M ", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
> + ? ? ? B("Elitegroup", "GF7100PVT-M3 (V1.0)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "K7S5A", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "K7S6A", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "K7SEM (V1.0A)", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "K7VTA3", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", ? ? ? ? ? ?OK, ? ? "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "P4VXMS (V1.0A)", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("Elitegroup", "P6IWP-Fe", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "P6VAP-A+", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
> + ? ? ? B("Elitegroup", "RS485M-M", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0", NULL),
> + ? ? ? B("Emerson", ? ?"ATCA-7360", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx", NULL),
> + ? ? ? B("EPoX", ? ? ? "EP-8K5A2", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
> + ? ? ? B("EPoX", ? ? ? "EP-8NPA7I", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
> + ? ? ? B("EPoX", ? ? ? "EP-9NPA7I", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
> + ? ? ? B("EPoX", ? ? ? "EP-8RDA3+", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
> + ? ? ? B("EPoX", ? ? ? "EP-BX3", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.epox.com/product.asp?ID=EP-BX3", NULL),
> + ? ? ? B("EVGA", ? ? ? "132-CK-NF78", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.evga.com/articles/385.asp", NULL),
> + ? ? ? B("EVGA", ? ? ? "270-WS-W555-A2 (Classified SR-2)", ? ? OK, ? ? "http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
> + ? ? ? B("FIC", ? ? ? ?"VA-502", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
> + ? ? ? B("Foxconn", ? ?"6150K8MD-8EKRSH", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157", NULL),
> + ? ? ? B("Foxconn", ? ?"A6VMX", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346", NULL),
> + ? ? ? B("Foxconn", ? ?"P4M800P7MA-RS2", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138", NULL),
> + ? ? ? B("Freetech", ? "P6F91i", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html", NULL),
> + ? ? ? B("Fujitsu-Siemens", "ESPRIMO P5915", ? ? ? ? ? ? ? ? ? OK, ? ? "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm", "Mainboard model is D2312-A2."),
> + ? ? ? B("GIGABYTE", ? "GA-2761GXDK", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-6BXC", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-6BXDU", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-6IEM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-6VXE7+", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-6ZMA", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA785GMT-UD2H (rev. 1.0)", ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-770TA-UD3", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-7DXR", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-7VT600", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-7ZM", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
> + ? ? ? B("GIGABYTE", ? "GA-880GMA-USB3 (rev. 3.1)", ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-8I945GZME-RH", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-8IP775", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-8IRML", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-8PE667 Ultra 2", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-8SIMLH", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-945PL-S3P (rev. 6.6)", ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-965GM-S2 (rev. 2.0)", ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-965P-DS4", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-EP31-DS3L (rev. 2.1)", ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-EP35-DS3L", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-EX58-UD4P", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-K8N-SLI", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-K8N51GMF", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-K8N51GMF-9", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-K8NS Pro-939", ? ? ? ? ? ? ? ? ? ? ?NT, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."),
> + ? ? ? B("GIGABYTE", ? "GA-M57SLI-S4", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-M61P-S3", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-M720-US3", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA69VM-S2", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA74GM-S2H (rev. 3.0)", ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA770-UD3 (rev. 2.1)", ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA770T-UD3P", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA780G-UD3H", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA78G-DS3H (rev. 1.0)", ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA78GM-S2H", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */
> + ? ? ? B("GIGABYTE", ? "GA-MA78GPM-DS2H", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA790FX-DQ6", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA790GP-DS4H", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-MA790XT-UD4P (rev. 1.0)", ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-P55A-UD4 (rev. 1.0)", ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-P67A-UD3P", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-X58A-UD7 (rev. 2.0)", ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("GIGABYTE", ? "GA-X58A-UDR3 (rev. 2.0)", ? ? ? ? ? ? ?OK, ? ? NULL, NULL),
> + ? ? ? B("GIGABYTE", ? "GA-Z68MX-UD2H-B (rev. 1.3)", ? ? ? ? ? OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
> + ? ? ? B("GIGABYTE", ? "GA-Z68XP-UD3 (rev. 1.0)", ? ? ? ? ? ? ?OK, ? ? "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
> + ? ? ? B("HP", ? ? ? ? "e-Vectra P2706T", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
> + ? ? ? B("HP", ? ? ? ? "ProLiant DL145 G3", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
> + ? ? ? B("HP", ? ? ? ? "ProLiant DL165 G6", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
> + ? ? ? B("HP", ? ? ? ? "ProLiant N40L", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? NULL, NULL),
> + ? ? ? B("HP", ? ? ? ? "Puffer2-UL8E", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
> + ? ? ? B("HP", ? ? ? ? "dc7800", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1", "ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor, locked ME region."),
> + ? ? ? B("HP", ? ? ? ? "Vectra VL400", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
> + ? ? ? B("HP", ? ? ? ? "Vectra VL420 SFF", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
> + ? ? ? B("HP", ? ? ? ? "xw4400 (0A68h)", ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
> + ? ? ? B("HP", ? ? ? ? "xw9400", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454", "Boot block is write protected unless the solder points next to F2 are shorted."),
> + ? ? ? B("IBASE", ? ? ?"MB899", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.ibase-i.com.tw/2009/mb899.html", NULL),
> + ? ? ? B("IBM", ? ? ? ?"x3455", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
> + ? ? ? B("IEI", ? ? ? ?"PICOe-9452", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
> + ? ? ? B("Intel", ? ? ?"D201GLY", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
> + ? ? ? B("Intel", ? ? ?"D425KT", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
> + ? ? ? B("Intel", ? ? ?"D865GLC", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
> + ? ? ? B("Intel", ? ? ?"DG45ID", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
> + ? ? ? B("Intel", ? ? ?"DH67CF", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
> + ? ? ? B("Intel", ? ? ?"EP80759", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? NULL, NULL),
> + ? ? ? B("Intel", ? ? ?"Foxhollow", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? NULL, "Intel reference board."),
> + ? ? ? B("Intel", ? ? ?"Greencity", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? NULL, "Intel reference board."),
> + ? ? ? B("Intel", ? ? ?"SE440BX-2", ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard", "Probably won't work, see http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
> + ? ? ? B("IWILL", ? ? ?"DK8-HTX", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98", NULL),
> + ? ? ? B("Jetway", ? ? "J-7BXAN", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
> + ? ? ? B("Jetway", ? ? "J7F4K1G5D-PB", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D", NULL),
> + ? ? ? B("Kontron", ? ?"986LCD-M", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html", NULL),
> + ? ? ? B("Lanner", ? ? "EM-8510C", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("Lex", ? ? ? ?"CV700A", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
> + ? ? ? B("Mitac", ? ? ?"6513WU", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm", NULL),
> + ? ? ? B("MSC", ? ? ? ?"Q7-TCTC", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6153", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/MS-6153.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6156", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6163 (MS-6163 Pro)", ? ? ? ? ? ? ? ?OK, "http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6178", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
> + ? ? ? B("MSI", ? ? ? ?"MS-6330 (K7T Turbo)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6391 (845 Pro4)", ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/845-Pro4.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6561 (745 Ultra)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/745-Ultra.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6566 (845 Ultra-C)", ? ? ? ? ? ? ? ?OK, "http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6570 (K7N2)", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/K7N2.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6577 (Xenon)", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843", "This is an OEM board from HP, the HP name is Xenon."),
> + ? ? ? B("MSI", ? ? ? ?"MS-6590 (KT4 Ultra)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6702E (K8T Neo2-F)", ? ? ? ? ? ? ? ?OK, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6712 (KT4V)", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-6787 (P4MAM-V/P4MAM-L)", ? ? ? ? ? ?OK, ? ? "http://www.msi.com/service/search/?kw=6787&type=product", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7005 (651M-L)", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/651M-L.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7025 (K8N Neo2 Platinum)", ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7046", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.heimir.de/ms7046/", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7061 (KM4M-V/KM4AM-V)", ? ? ? ? ? ? OK, ? ? "http://www.msi.com/service/search/?kw=7061&type=product", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7065", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://browse.geekbench.ca/geekbench2/view/53114", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7135 (K8N Neo3)", ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7142 (K8MM-V)", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/K8MM-V.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7168 (Orion)", ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7207 (K8NGM2-L)", ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7211 (PM8M3-V)", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/PM8M3-V.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7236 (945PL Neo3)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7253 (K9VGM-V)", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/K9VGM-V.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7255 (P4M890M)", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7260 (K9N Neo PCB 1.0)", ? ? ? ? ? ?BAD, ? ?"http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
> + ? ? ? B("MSI", ? ? ? ?"MS-7309 (K9N6PGM2-V2)", ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7312 (K9MM-V)", ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/K9MM-V.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7345 (P35 Neo2-FIR)", ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7368 (K9AG Neo2-Digital)", ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7369 (K9N Neo V2)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7376 (K9A2 Platinum V1)", ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7529 (G31M3-L(S) V2)", ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7529 (G31TM-P21)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7548 (Aspen-GL8E)", ? ? ? ? ? ? ? ? OK, ? ? "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7596 (785GM-E51)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/785GM-E51.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7599 (870-C45)", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/870-C45.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7613 (Iona-GL8E)", ? ? ? ? ? ? ? ? ?BAD, ? ?"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("MSI", ? ? ? ?"MS-7635 (H55M-ED55)", ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("MSI", ? ? ? ?"MS-7640 (890FXA-GD70)", ? ? ? ? ? ? ? ?OK, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7642 (890GXM-G65)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7676 (H67MA-ED55(B3))", ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
> + ? ? ? B("MSI", ? ? ? ?"MS-7696 (A75MA-G55)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
> + ? ? ? B("MSI", ? ? ? ?"MS-7698 (E350IA-E45)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
> + ? ? ? B("NEC", ? ? ? ?"PowerMate 2000", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
> + ? ? ? B("Nokia", ? ? ?"IP530", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? NULL, NULL),
> + ? ? ? B("PCCHIPS ", ? "M598LMR (V9.0)", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("PCCHIPS ", ? "M863G (V5.1A)", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0", NULL),
> + ? ? ? B("PC Engines", "Alix.1c", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://pcengines.ch/alix1c.htm", NULL),
> + ? ? ? B("PC Engines", "Alix.2c2", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pcengines.ch/alix2c2.htm", NULL),
> + ? ? ? B("PC Engines", "Alix.2c3", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pcengines.ch/alix2c3.htm", NULL),
> + ? ? ? B("PC Engines", "Alix.2d3", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pcengines.ch/alix2d3.htm", NULL),
> + ? ? ? B("PC Engines", "Alix.3c3", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pcengines.ch/alix3c3.htm", NULL),
> + ? ? ? B("PC Engines", "Alix.3d3", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pcengines.ch/alix3d3.htm", NULL),
> + ? ? ? B("PC Engines", "Alix.6f2", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pcengines.ch/alix6f2.htm", NULL),
> + ? ? ? B("PC Engines", "WRAP.2E", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://pcengines.ch/wrap2e1.htm", NULL),
> + ? ? ? B("Portwell", ? "PEB-4700VLA", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
> + ? ? ? B("RCA", ? ? ? ?"RM4100", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
> + ? ? ? B("Samsung", ? ?"Polaris 32", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("Shuttle", ? ?"AK31", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
> + ? ? ? B("Shuttle", ? ?"AK38N", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
> + ? ? ? B("Shuttle", ? ?"AV11V30", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? NULL, NULL),
> + ? ? ? B("Shuttle", ? ?"AV18E2", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
> + ? ? ? B("Shuttle", ? ?"FD37", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
> + ? ? ? B("Shuttle", ? ?"FH67", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
> + ? ? ? B("Shuttle", ? ?"FN25", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
> + ? ? ? B("Shuttle", ? ?"X50/X50(B)", ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
> + ? ? ? B("Soyo", ? ? ? "SY-5VD", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
> + ? ? ? B("Soyo", ? ? ? "SY-6BA+ III", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
> + ? ? ? B("Soyo", ? ? ? "SY-7VCA", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html", NULL),
> + ? ? ? B("Sun", ? ? ? ?"Blade x6250", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.sun.com/servers/blades/x6250/", NULL),
> + ? ? ? B("Sun", ? ? ? ?"Fire x4150", ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.sun.com/servers/x64/x4150/", "No public report found. May work now."),
> + ? ? ? B("Sun", ? ? ? ?"Fire x4200", ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.sun.com/servers/entry/x4200/", "No public report found. May work now."),
> + ? ? ? B("Sun", ? ? ? ?"Fire x4540", ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.sun.com/servers/x64/x4540/", "No public report found. May work now."),
> + ? ? ? B("Sun", ? ? ? ?"Fire x4600", ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."),
> + ? ? ? B("Sun", ? ? ? ?"Ultra 40 M2", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html", NULL),
> + ? ? ? B("Supermicro", "H8QC8", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL),
> + ? ? ? B("Supermicro", "X5DP8-G2", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL),
> + ? ? ? B("Supermicro", "X7DBT-INF", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
> + ? ? ? B("Supermicro", "X7SPA-HF", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
> + ? ? ? B("Supermicro", "X8DT3", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
> + ? ? ? B("Supermicro", "X8DTE-F", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
> + ? ? ? B("Supermicro", "X8DTH-6F", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
> + ? ? ? B("Supermicro", "X8DTT-F", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
> + ? ? ? B("Supermicro", "X8DTT-HIBQF", ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
> + ? ? ? B("Supermicro", "X8DTU-6TF+", ? ? ? ? ? ? ? ? ? ? ? ? ? BAD, ? ?"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("Supermicro", "X8DTU-F", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
> + ? ? ? B("Supermicro", "X8SIE(-F)", ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
> + ? ? ? B("Supermicro", "X8STi", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
> + ? ? ? B("Supermicro", "X9SCA-F", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("Supermicro", "X9SCL", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("T-Online", ? "S-100", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
> + ? ? ? B("Tekram", ? ? "P6Pro-A5", ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
> + ? ? ? B("Termtek", ? ?"TK-3370 (Rev:2.5B)", ? ? ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("Thomson", ? ?"IP1000", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
> + ? ? ? B("TriGem", ? ? "Anaheim-3", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
> + ? ? ? B("TriGem", ? ? "Lomita", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5375-1U (Tempest i5100X)", ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
> + ? ? ? B("Tyan", ? ? ? "S1846 (Tsunami ATX)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2466 (Tiger MPX)", ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2498 (Tomcat K7M)", ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2723 (Tiger i7501)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2881 (Thunder K8SR)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2882 (Thunder K8S Pro)", ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2882-D (Thunder K8SD Pro)", ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2891 (Thunder K8SRE)", ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2892 (Thunder K8SE)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2895 (Thunder K8WE)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2912 (Thunder n3600R)", ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2915 (Thunder n6650W)", ? ? ? ? ? ? ? OK, ? ? "http://tyan.com/product_board_detail.aspx?pid=163", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2915-E (Thunder n6650W)", ? ? ? ? ? ? OK, ? ? "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041", NULL),
> + ? ? ? B("Tyan", ? ? ? "S2933 (Thunder n3600S)", ? ? ? ? ? ? ? OK, ? ? "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL),
> + ? ? ? B("Tyan", ? ? ? "S3095 (Tomcat i945GM)", ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
> + ? ? ? B("Tyan", ? ? ? "S3992 (Thunder h2000M)", ? ? ? ? ? ? ? OK, ? ? "http://tyan.com/product_board_detail.aspx?pid=235", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5180 (Toledo i965R)", ? ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5191 (Toledo i3000R)", ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5197 (Toledo i3010W)", ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5211 (Toledo i3210W)", ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5211-1U (Toledo i3200R)", ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5220 (Toledo q35T)", ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5375 (Tempest i5100X)", ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5376 (Tempest i5100W)", ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=605", "Both S5376G2NR and S5376WAG2NR should work."),
> + ? ? ? B("Tyan", ? ? ? "S5377 (Tempest i5100T)", ? ? ? ? ? ? ? OK, ? ? "http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5382 (Tempest i5000PW)", ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
> + ? ? ? B("Tyan", ? ? ? "S5397 (Tempest i5400PW)", ? ? ? ? ? ? ?OK, ? ? "http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
> + ? ? ? B("VIA", ? ? ? ?"EPIA M/MII/...", ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202", NULL), /* EPIA-MII link for now */
> + ? ? ? B("VIA", ? ? ? ?"EPIA SP", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261", NULL),
> + ? ? ? B("VIA", ? ? ? ?"EPIA-CN", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400", NULL),
> + ? ? ? B("VIA", ? ? ? ?"EPIA EK", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420", NULL),
> + ? ? ? B("VIA", ? ? ? ?"EPIA-EX15000G", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450", NULL),
> + ? ? ? B("VIA", ? ? ? ?"EPIA-LN", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473", NULL),
> + ? ? ? B("VIA", ? ? ? ?"EPIA-M700", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700", NULL),
> + ? ? ? B("VIA", ? ? ? ?"EPIA-N/NL", ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221", NULL), /* EPIA-N link for now */
> + ? ? ? B("VIA", ? ? ? ?"EPIA-NX15000G", ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470", NULL),
> + ? ? ? B("VIA", ? ? ? ?"NAB74X0", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590", NULL),
> + ? ? ? B("VIA", ? ? ? ?"pc2500e", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp", NULL),
> + ? ? ? B("VIA", ? ? ? ?"PC3500G", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?OK, ? ? "http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp", NULL),
> + ? ? ? B("VIA", ? ? ? ?"VB700X", ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490", NULL),
> + ? ? ? B("ZOTAC", ? ? ?"Fusion-ITX WiFi (FUSION350-A-E)", ? ? ?OK, ? ? NULL, NULL),
> + ? ? ? B("ZOTAC", ? ? ?"GeForce 8200", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92", NULL),
> + ? ? ? B("ZOTAC", ? ? ?"H67-ITX WiFi (H67ITX-C-E)", ? ? ? ? ? ?BAD, ? ?NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("ZOTAC", ? ? ?"ZBOX HD-ID11", ? ? ? ? ? ? ? ? ? ? ? ? OK, ? ? "http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75", NULL),
> ?#endif
>
> ? ? ? ?{},
> @@ -990,19 +989,19 @@ const struct board_info boards_known[] = {
> ?/* Please keep this list alphabetically ordered by vendor/board. */
> ?const struct board_info laptops_known[] = {
> ?#if defined(__i386__) || defined(__x86_64__)
> - ? ? ? B("Acer", ? ? ? "Aspire 1520", ? ? ? ? ?1, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
> - ? ? ? B("Acer", ? ? ? "Aspire One", ? ? ? ? ? 0, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
> - ? ? ? B("ASUS", ? ? ? "A8Jm", ? ? ? ? ? ? ? ? 1, NULL, NULL),
> - ? ? ? B("ASUS", ? ? ? "Eee PC 701 4G", ? ? ? ?0, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
> - ? ? ? B("ASUS", ? ? ? "M6Ne", ? ? ? ? ? ? ? ? 0, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
> - ? ? ? B("Clevo", ? ? ?"P150HM", ? ? ? ? ? ? ? 0, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> - ? ? ? B("Dell", ? ? ? "Latitude CPi A366XT", ?0, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
> - ? ? ? B("HP/Compaq", ?"nx9005", ? ? ? ? ? ? ? 0, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
> - ? ? ? B("HP/Compaq", ?"nx9010", ? ? ? ? ? ? ? 0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
> - ? ? ? B("IBM/Lenovo", "Thinkpad T40p", ? ? ? ?0, "http://www.thinkwiki.org/wiki/Category:T40p", NULL),
> - ? ? ? B("IBM/Lenovo", "Thinkpad T410s", ? ? ? 0, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
> - ? ? ? B("IBM/Lenovo", "240", ? ? ? ? ? ? ? ? ?0, "http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
> - ? ? ? B("Lenovo", ? ? "3000 V100 TF05Cxx", ? ?1, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
> + ? ? ? B("Acer", ? ? ? "Aspire 1520", ? ? ? ? ?OK, ? ? "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
> + ? ? ? B("Acer", ? ? ? "Aspire One", ? ? ? ? ? BAD, ? ?NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
> + ? ? ? B("ASUS", ? ? ? "A8Jm", ? ? ? ? ? ? ? ? OK, ? ? NULL, NULL),
> + ? ? ? B("ASUS", ? ? ? "Eee PC 701 4G", ? ? ? ?BAD, ? ?"http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
> + ? ? ? B("ASUS", ? ? ? "M6Ne", ? ? ? ? ? ? ? ? NT, ? ? "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
> + ? ? ? B("Clevo", ? ? ?"P150HM", ? ? ? ? ? ? ? BAD, ? ?"http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
> + ? ? ? B("Dell", ? ? ? "Latitude CPi A366XT", ?BAD, ? ?"http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
> + ? ? ? B("HP/Compaq", ?"nx9005", ? ? ? ? ? ? ? BAD, ? ?"http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
> + ? ? ? B("HP/Compaq", ?"nx9010", ? ? ? ? ? ? ? BAD, ? ?"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
> + ? ? ? B("IBM/Lenovo", "Thinkpad T40p", ? ? ? ?BAD, ? ?"http://www.thinkwiki.org/wiki/Category:T40p", NULL),
> + ? ? ? B("IBM/Lenovo", "Thinkpad T410s", ? ? ? BAD, ? ?"http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
> + ? ? ? B("IBM/Lenovo", "240", ? ? ? ? ? ? ? ? ?BAD, ? ?"http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
> + ? ? ? B("Lenovo", ? ? "3000 V100 TF05Cxx", ? ?OK, ? ? "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
> ?#endif
>
> ? ? ? ?{},
> diff --git a/print_wiki.c b/print_wiki.c
> index a8c9d76..58f1612 100644
> --- a/print_wiki.c
> +++ b/print_wiki.c
> @@ -133,9 +133,9 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
> ? ? ? ?const struct board_match *b = board_matches;
>
> ? ? ? ?for (i = 0; boards[i].vendor != NULL; i++) {
> - ? ? ? ? ? ? ? if (boards[i].working)
> + ? ? ? ? ? ? ? if (boards[i].working == OK)
> ? ? ? ? ? ? ? ? ? ? ? ?boardcount_good++;
> - ? ? ? ? ? ? ? else
> + ? ? ? ? ? ? ? if (boards[i].working == BAD)
> ? ? ? ? ? ? ? ? ? ? ? ?boardcount_bad++;
> ? ? ? ?}
>
> @@ -168,7 +168,8 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
> ? ? ? ? ? ? ? ? ? ? ? b[k].lb_vendor ? b[k].lb_vendor : "",
> ? ? ? ? ? ? ? ? ? ? ? b[k].lb_vendor ? ":" : "",
> ? ? ? ? ? ? ? ? ? ? ? b[k].lb_vendor ? b[k].lb_part : "",
> - ? ? ? ? ? ? ? ? ? ? ?(boards[i].working) ? "OK" : "No");
> + ? ? ? ? ? ? ? ? ? ? ?(boards[i].working == OK) ? "OK" :
> + ? ? ? ? ? ? ? ? ? ? ?(boards[i].working == NT) ? "?3" : "No");
>
> ? ? ? ? ? ? ? ?if (boards[i].note) {
> ? ? ? ? ? ? ? ? ? ? ? ?printf("<sup>%d</sup>\n", num_notes + 1);
> diff --git a/programmer.h b/programmer.h
> index 240e1af..64efb40 100644
> --- a/programmer.h
> +++ b/programmer.h
> @@ -192,7 +192,7 @@ extern const struct board_match board_matches[];
> ?struct board_info {
> ? ? ? ?const char *vendor;
> ? ? ? ?const char *name;
> - ? ? ? const int working;
> + ? ? ? enum test_state working;
> ?#ifdef CONFIG_PRINT_WIKI
> ? ? ? ?const char *url;
> ? ? ? ?const char *note;
> @@ -217,7 +217,7 @@ extern struct pci_dev *pcidev_dev;
> ?struct pcidev_status {
> ? ? ? ?uint16_t vendor_id;
> ? ? ? ?uint16_t device_id;
> - ? ? ? int status;
> + ? ? ? enum test_state status;
> ? ? ? ?const char *vendor_name;
> ? ? ? ?const char *device_name;
> ?};
> @@ -415,7 +415,7 @@ extern const struct pcidev_status ata_hpt[];
> ?struct usbdev_status {
> ? ? ? ?uint16_t vendor_id;
> ? ? ? ?uint16_t device_id;
> - ? ? ? int status;
> + ? ? ? enum test_state status;
> ? ? ? ?const char *vendor_name;
> ? ? ? ?const char *device_name;
> ?};
> --
> 1.7.1
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom


From vidwer at gmail.com  Mon Feb 20 18:18:18 2012
From: vidwer at gmail.com (Idwer Vollering)
Date: Mon, 20 Feb 2012 18:18:18 +0100
Subject: [flashrom] [PATCH 1/5] print_wiki.c: count pci devices and
	cleanup
In-Reply-To: <1329683217-31150-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329683217-31150-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <CAPp9OrmAsHNY-szFGSc4n0uuki2RSEorHDVDBw6kNc-HuLu6bw@mail.gmail.com>

Can you incorporate this too?

$ svn diff pcidev.c
Index: pcidev.c
===================================================================
--- pcidev.c    (revision 1504)
+++ pcidev.c    (working copy)
@@ -244,7 +244,6 @@
 {
        int i;

-       msg_pinfo("PCI devices:\n");
        for (i = 0; devs[i].vendor_name != NULL; i++) {
                msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
                          devs[i].device_name, devs[i].vendor_id,


$ svn diff print.c
Index: print.c
===================================================================
--- print.c     (revision 1504)
+++ print.c     (working copy)
@@ -422,6 +422,21 @@
 }
 #endif

+#if CONFIG_FT2232_SPI == 1
+void print_supported_usbdevs(const struct usbdev_status *devs)
+{
+       int i;
+
+       msg_pinfo("USB devices:\n");
+       for (i = 0; devs[i].vendor_name != NULL; i++) {
+               msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
+                         devs[i].device_name, devs[i].vendor_id,
+                         devs[i].device_id,
+                         (devs[i].status == NT) ? " (untested)" : "");
+       }
+}
+#endif
+
 void print_supported(void)
 {
        print_supported_chips();
@@ -444,42 +459,42 @@
        msg_ginfo("Dummy device, does nothing and logs all accesses\n");
 #endif
 #if CONFIG_NIC3COM == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_NIC3COM].name);
        print_supported_pcidevs(nics_3com);
 #endif
 #if CONFIG_NICREALTEK == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_NICREALTEK].name);
        print_supported_pcidevs(nics_realtek);
 #endif
 #if CONFIG_NICNATSEMI == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_NICNATSEMI].name);
        print_supported_pcidevs(nics_natsemi);
 #endif
 #if CONFIG_GFXNVIDIA == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI/AGP devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_GFXNVIDIA].name);
        print_supported_pcidevs(gfx_nvidia);
 #endif
 #if CONFIG_DRKAISER == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_DRKAISER].name);
        print_supported_pcidevs(drkaiser_pcidev);
 #endif
 #if CONFIG_SATASII == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_SATASII].name);
        print_supported_pcidevs(satas_sii);
 #endif
 #if CONFIG_ATAHPT == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_ATAHPT].name);
        print_supported_pcidevs(ata_hpt);
 #endif
 #if CONFIG_FT2232_SPI == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported USB devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_FT2232_SPI].name);
        print_supported_usbdevs(devs_ft2232spi);
 #endif
@@ -487,16 +502,17 @@
        msg_ginfo("\nSupported devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_SERPROG].name);
        /* FIXME */
-       msg_ginfo("All programmer devices speaking the serprog protocol\n");
+//     msg_ginfo("All programmer devices speaking the serprog protocol\n");
+       msg_ginfo("All programmer devices speaking the %s protocol\n",
programmer_table[PROGRAMMER_SERPROG].name);
 #endif
 #if CONFIG_BUSPIRATE_SPI == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported USB devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_BUSPIRATE_SPI].name);
        /* FIXME */
        msg_ginfo("Dangerous Prototypes Bus Pirate\n");
 #endif
 #if CONFIG_DEDIPROG == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported USB devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_DEDIPROG].name);
        /* FIXME */
        msg_ginfo("Dediprog SF100\n");
@@ -508,22 +524,22 @@
        msg_ginfo("RayeR parallel port programmer\n");
 #endif
 #if CONFIG_NICINTEL == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_NICINTEL].name);
        print_supported_pcidevs(nics_intel);
 #endif
 #if CONFIG_NICINTEL_SPI == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_NICINTEL_SPI].name);
        print_supported_pcidevs(nics_intel_spi);
 #endif
 #if CONFIG_OGP_SPI == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_OGP_SPI].name);
        print_supported_pcidevs(ogp_spi);
 #endif
 #if CONFIG_SATAMV == 1
-       msg_ginfo("\nSupported devices for the %s programmer:\n",
+       msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
               programmer_table[PROGRAMMER_SATAMV].name);
        print_supported_pcidevs(satas_mv);
 #endif
@@ -545,428 +561,427 @@
 /* Please keep this list alphabetically ordered by vendor/board. */
 const struct board_info boards_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
-       B("A-Trend",    "ATC-6220",             1,
"http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
-       B("abit",       "A-S78H",               1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2",
NULL),
-       B("abit",       "AN-M2",                1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2",
NULL),
-       B("abit",       "AV8",                  1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8",
NULL),
-       B("abit",       "AX8",                  1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8",
NULL),
-       B("abit",       "BM6",                  1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370",
NULL),
-       B("abit",       "Fatal1ty F-I90HD",     1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775",
NULL),
-       B("abit",       "IC7",                  1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478",
NULL),
-       B("abit",       "IP35",                 1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35",
NULL),
-       B("abit",       "IP35 Pro",             1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro",
NULL),
-       B("abit",       "IS-10",                0,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478",
"Reported by deejkuba at aol.com to flashrom at coreboot.org, no public
archive. Missing board enable and/or M50FW040 unlocking. May work
now."),
-       B("abit",       "KN8 Ultra",            1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra",
NULL),
-       B("abit",       "NF-M2 nView",          1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView",
NULL),
-       B("abit",       "NF-M2S",               1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2",
NULL),
-       B("abit",       "NF7-S",                1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S",
NULL),
-       B("abit",       "VA6",                  1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6",
NULL),
-       B("abit",       "VT6X4",                1,
"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4",
NULL),
-       B("Acorp",      "6A815EPD",             1,
"http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp",
NULL),
-       B("Advantech",  "PCM-5820",             1,
"http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
-       B("agami",      "Aruma",                1,
"http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series",
NULL),
-       B("Albatron",   "PM266A Pro",           1,
"http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56",
NULL), /* FIXME */
-       B("AOpen",      "i945GMx-VFX",          1, NULL, "This is
(also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with
designation D2544-B1)."),
-       B("AOpen",      "vKM400Am-S",           1,
"http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
-       B("Artec Group","DBE61",                1,
"http://wiki.thincan.org/DBE61", NULL),
-       B("Artec Group","DBE62",                1,
"http://wiki.thincan.org/DBE62", NULL),
-       B("ASI",        "MB-5BLMP",             1,
"http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III
thin client."),
-       B("ASRock",     "775i65G",              1,
"http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
-       B("ASRock",     "890GX Extreme3",       1,
"http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
-       B("ASRock",     "939A785GMH/128M",      1,
"http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
-       B("ASRock",     "A330GC",               1,
"http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
-       B("ASRock",     "A770CrossFire",        1,
"http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
-       B("ASRock",     "ALiveNF6G-DVI",        1,
"http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
-       B("ASRock",     "AM2NF6G-VSTA",         1,
"http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
-       B("ASRock",     "ConRoeXFire-eSATA2",   1,
"http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2",
NULL),
-       B("ASRock",     "K7S41",                1,
"http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
-       B("ASRock",     "K7S41GX",              1,
"http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
-       B("ASRock",     "K7VT4A+",              0,
"http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip
found, probably due to flash translation.
http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
-       B("ASRock",     "K8S8X",                1,
"http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
-       B("ASRock",     "M3A790GXH/128M",       1,
"http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
-       B("ASRock",     "P4i65GV",              1,
"http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
-       B("ASUS",       "A7N8X Deluxe",         1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
-       B("ASUS",       "A7N8X-E Deluxe",       1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
-       B("ASUS",       "A7N8X-VM/400",         1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
-       B("ASUS",       "A7V133",               1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
-       B("ASUS",       "A7V333",               1,
"ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
-       B("ASUS",       "A7V400-MX",            1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
-       B("ASUS",       "A7V600-X",             1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
-       B("ASUS",       "A7V8X",                1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
-       B("ASUS",       "A7V8X-MX",             1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
-       B("ASUS",       "A7V8X-MX SE",          1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
-       B("ASUS",       "A7V8X-X",              1,
"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
-       B("ASUS",       "A8M2N-LA (NodusM3-GL8E)", 1,
"http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en",
"This is an OEM board from HP, the HP name is NodusM3-GL8E."),
-       B("ASUS",       "A8N-E",                1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
-       B("ASUS",       "A8N-LA (Nagami-GL8E)", 1,
"http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en",
"This is an OEM board from HP, the HP name is Nagami-GL8E."),
-       B("ASUS",       "A8N-SLI",              1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
-       B("ASUS",       "A8N-SLI Deluxe",       0, NULL, "Untested
board enable."),
-       B("ASUS",       "A8N-SLI Premium",      1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/",
NULL),
-       B("ASUS",       "A8N-VM",               1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
-       B("ASUS",       "A8N-VM CSM",           1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
-       B("ASUS",       "A8NE-FM/S",            1,
"http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM",
NULL),
-       B("ASUS",       "A8V Deluxe",           1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
-       B("ASUS",       "A8V-E Deluxe",         1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
-       B("ASUS",       "A8V-E SE",             1,
"http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See
http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
-       B("ASUS",       "Crosshair II Formula", 1,
"http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/",
NULL),
-       B("ASUS",       "Crosshair IV Extreme", 1,
"http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/",
NULL),
-       B("ASUS",       "E35M1-I DELUXE",       1,
"http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/",
NULL),
-       B("ASUS",       "K8N",                  1,
"http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
-       B("ASUS",       "K8V",                  1,
"http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
-       B("ASUS",       "K8V SE Deluxe",        1,
"http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/",
NULL),
-       B("ASUS",       "K8V-X",                1,
"http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
-       B("ASUS",       "K8V-X SE",             1,
"http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
-       B("ASUS",       "KFSN4-DRE/SAS",        1,
"http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/",
NULL),
-       B("ASUS",       "M2A-MX",               1,
"http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
-       B("ASUS",       "M2A-VM (HDMI)",        1,
"http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
-       B("ASUS",       "M2N32-SLI Deluxe",     1,
"http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/",
NULL),
-       B("ASUS",       "M2N-E",                1,
"http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine
doesn't come up again after flashing, try resetting the NVRAM(CMOS).
The MAC address of the onboard network card will change to the value
stored in the new image, so backup the old address first. See
http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
-       B("ASUS",       "M2N-E SLI",            1,
"http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
-       B("ASUS",       "M2N-SLI Deluxe",       1,
"http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
-       B("ASUS",       "M2NBP-VM CSM",         1,
"http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
-       B("ASUS",       "M2NPV-VM",             1,
"http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
-       B("ASUS",       "M2V",                  1,
"http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
-       B("ASUS",       "M2V-MX",               1,
"http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
-       B("ASUS",       "M3A",                  1,
"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
-       B("ASUS",       "M3A76-CM",             1,
"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
-       B("ASUS",       "M3A78-EM",             1,
"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
-       B("ASUS",       "M3N78-VM",             1,
"http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
-       B("ASUS",       "M4A78-EM",             1,
"http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
-       B("ASUS",       "M4A785TD-M EVO",       1,
"http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
-       B("ASUS",       "M4A785TD-V EVO",       1,
"http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
-       B("ASUS",       "M4A78LT-M LE",         1,
"http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
-       B("ASUS",       "M4A79T Deluxe",        1,
"http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
-       B("ASUS",       "M4A87TD/USB3",         1,
"http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
-       B("ASUS",       "M4A89GTD PRO",         1,
"http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
-       B("ASUS",       "M4N78 PRO",            1,
"http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
-       B("ASUS",       "M5A99X EVO",           1,
"http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
-       B("ASUS",       "MEW-AM",               0,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public
report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work
now."),
-       B("ASUS",       "MEW-VM",               0,
"http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No
public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May
work now."),
-       B("ASUS",       "OPLX-M",               0, NULL, "Untested
board enable."),
-       B("ASUS",       "P2B",                  1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
-       B("ASUS",       "P2B-D",                1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
-       B("ASUS",       "P2B-DS",               1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
-       B("ASUS",       "P2B-F",                1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
-       B("ASUS",       "P2B-N",                1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
-       B("ASUS",       "P2E-M",                1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
-       B("ASUS",       "P2L97-S",              1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
-       B("ASUS",       "P3B-F",                0,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public
report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work
now."),
-       B("ASUS",       "P4B266",               1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
-       B("ASUS",       "P4B266-LM",            1,
"http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
-       B("ASUS",       "P4B533-E",             1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
-       B("ASUS",       "P4C800-E Deluxe",      1,
"http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/",
NULL),
-       B("ASUS",       "P4GV-LA (Guppy)",      1,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478",
NULL),
-       B("ASUS",       "P4P800",               1,
"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
-       B("ASUS",       "P4P800-E Deluxe",      1,
"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/",
NULL),
-       B("ASUS",       "P4P800-VM",            1,
"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
-       B("ASUS",       "P4SC-E",               1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS
Terminator P4 533 barebone system"),
-       B("ASUS",       "P4SD-LA",              1,
"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505",
NULL),
-       B("ASUS",       "P4S533-X",             1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
-       B("ASUS",       "P4S800-MX",            1,
"http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
-       B("ASUS",       "P5A",                  1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
-       B("ASUS",       "P5B",                  1,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
-       B("ASUS",       "P5B-Deluxe",           1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/",
NULL),
-       B("ASUS",       "P5BV-M",               0,
"ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by
Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to
flashrom at coreboot.org, no public archive. Missing board enable and/or
SST49LF008A unlocking. May work now."),
-       B("ASUS",       "P5GC-MX/1333",         1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/",
NULL),
-       B("ASUS",       "P5GD1 Pro",            1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
-       B("ASUS",       "P5GD1-VM/S",           1, NULL, "This is an
OEM board from FSC. Although flashrom supports it and can probably not
distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS
does not support the FSC variants completely."),
-       B("ASUS",       "P5GD1(-VM)",           0, NULL, "Untested
board enable."),
-       B("ASUS",       "P5GD2 Premium",        1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/",
NULL),
-       B("ASUS",       "P5GDC Deluxe",         1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/",
NULL),
-       B("ASUS",       "P5GDC-V Deluxe",       1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/",
NULL),
-       B("ASUS",       "P5GD2/C variants",     0, NULL, "Untested
board enable."),
-       B("ASUS",       "P5K-V",                1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
-       B("ASUS",       "P5K-VM",               1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
-       B("ASUS",       "P5KC",                 1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
-       B("ASUS",       "P5KPL-CM",             1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
-       B("ASUS",       "P5L-MX",               1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
-       B("ASUS",       "P5L-VM 1394",          1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/",
NULL),
-       B("ASUS",       "P5LD2",                0, NULL, "Untested
board enable."),
-       B("ASUS",       "P5LP-LE (Lithium-UL8E)", 1,
"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887",
"This is an OEM board from HP."),
-       B("ASUS",       "P5LP-LE (Epson OEM)",  1, NULL, "This is an
OEM board from Epson (e.g. Endeavor MT7700)."),
-       B("ASUS",       "P5LP-LE",              0, NULL, "This
designation is used for OEM boards from HP, Epson and maybe others.
The HP names vary and not all of them have been tested yet. Please
report any success or failure, thanks."),
-       B("ASUS",       "P5N-E SLI",            0,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Needs
a board enable (http://patchwork.coreboot.org/patch/3298/)."),
-       B("ASUS",       "P5N-D",                1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
-       B("ASUS",       "P5N-E SLI",            0,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/",
"Untested board enable."),
-       B("ASUS",       "P5N32-E SLI",          1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/",
NULL),
-       B("ASUS",       "P5N7A-VM",             1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
-       B("ASUS",       "P5ND2-SLI Deluxe",     1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/",
NULL),
-       B("ASUS",       "P5PE-VM",              1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
-       B("ASUS",       "P5QPL-AM",             1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
-       B("ASUS",       "P5VD1-X",              1,
"http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
-       B("ASUS",       "P6T SE",               1,
"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
-       B("ASUS",       "P6T Deluxe",           1,
"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/",
NULL),
-       B("ASUS",       "P6T Deluxe V2",        1,
"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/",
NULL),
-       B("ASUS",       "P7H57D-V EVO",         1,
"http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/",
NULL),
-       B("ASUS",       "P7H55-M LX",           0, NULL, "flashrom
works correctly, but GbE LAN is nonworking (probably due to a
missing/bogus MAC address; see
http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and
http://ubuntuforums.org/showthread.php?t=1534389 for a possible
workaround)"),
-       B("ASUS",       "P8B-E/4L",             0, NULL, "Probing
works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ASUS",       "P8B WS",               0, NULL, "Probing
works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ASUS",       "P8H61 PRO",            0, NULL, "Probing
works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ASUS",       "P8H61-M LE/USB3",      0, NULL, "Probing
works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ASUS",       "P8H67-M PRO",          0, NULL, "Probing
works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ASUS",       "P8P67 (rev. 3.1)",     0, NULL, "Probing
works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ASUS",       "P8Z68-V PRO",          0, NULL, "Probing
works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ASUS",       "Z8NA-D6C",             1,
"http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/",
NULL),
-       B("ASUS",       "Z8PE-D12",             1,
"http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/",
NULL),
-       B("BCOM",       "WinNET100",            1,
"http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin
client."),
-       B("Bifferos",   "Bifferboard",          1,
"http://bifferos.co.uk/", NULL),
-       B("Biostar",    "N68S3+",               1, NULL, NULL),
-       B("Biostar",    "M6TBA",                0,
"ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found.
Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-       B("Biostar",    "M7NCD Pro",            1,
"http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
-       B("Biostar",    "P4M80-M4",             1,
"http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
-       B("Biostar",    "TA780G M2+",           1,
"http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344",
NULL),
-       B("Boser",      "HS-6637",              0,
"http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by
Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public
archive. Missing board enable and/or F29C51002T unlocking. May work
now."),
-       B("Congatec",   "conga-X852",           1,
"http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
-       B("Dell",       "OptiPlex GX1",         1,
"http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm",
NULL),
-       B("Dell",       "PowerEdge 1850",       1,
"http://support.dell.com/support/edocs/systems/pe1850/en/index.htm",
NULL),
-       B("DFI",        "855GME-MGF",           0,
"http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433",
"Probably needs a board enable.
http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
-       B("DFI",        "Blood-Iron P35 T2RL",  1,
"http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1",
NULL),
-       B("Elitegroup", "GeForce6100SM-M ",     1,
"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24",
NULL),
-       B("Elitegroup", "GF7100PVT-M3 (V1.0)",  1,
"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0",
NULL),
-       B("Elitegroup", "K7S5A",                1,
"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0",
NULL),
-       B("Elitegroup", "K7S6A",                1,
"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0",
NULL),
-       B("Elitegroup", "K7SEM (V1.0A)",        1,
"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0",
NULL),
-       B("Elitegroup", "K7VTA3",               1,
"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0",
NULL),
-       B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)", 1,
"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0",
NULL),
-       B("Elitegroup", "P4VXMS (V1.0A)",       1, NULL, NULL),
-       B("Elitegroup", "P6IWP-Fe",             1,
"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0",
NULL),
-       B("Elitegroup", "P6VAP-A+",             1,
"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0",
NULL),
-       B("Elitegroup", "RS485M-M",             1,
"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0",
NULL),
-       B("Emerson",    "ATCA-7360",            1,
"http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx",
NULL),
-       B("EPoX",       "EP-8K5A2",             1,
"http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
-       B("EPoX",       "EP-8NPA7I",            1,
"http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
-       B("EPoX",       "EP-9NPA7I",            1,
"http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
-       B("EPoX",       "EP-8RDA3+",            1,
"http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
-       B("EPoX",       "EP-BX3",               1,
"http://www.epox.com/product.asp?ID=EP-BX3", NULL),
-       B("EVGA",       "132-CK-NF78",          1,
"http://www.evga.com/articles/385.asp", NULL),
-       B("EVGA",       "270-WS-W555-A2 (Classified SR-2)", 1,
"http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
-       B("FIC",        "VA-502",               0,
"ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public
report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI
subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
-       B("Foxconn",    "6150K8MD-8EKRSH",      1,
"http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157",
NULL),
-       B("Foxconn",    "A6VMX",                1,
"http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346",
NULL),
-       B("Foxconn",    "P4M800P7MA-RS2",       1,
"http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138",
NULL),
-       B("Freetech",   "P6F91i",               1,
"http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html",
NULL),
-       B("Fujitsu-Siemens", "ESPRIMO P5915",   1,
"http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm",
"Mainboard model is D2312-A2."),
-       B("GIGABYTE",   "GA-2761GXDK",          1,
"http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/",
NULL),
-       B("GIGABYTE",   "GA-6BXC",              1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
-       B("GIGABYTE",   "GA-6BXDU",             1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
-       B("GIGABYTE",   "GA-6IEM",              1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
-       B("GIGABYTE",   "GA-6VXE7+",            1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
-       B("GIGABYTE",   "GA-6ZMA",              1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
-       B("GIGABYTE",   "GA-MA785GMT-UD2H (rev. 1.0)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
-       B("GIGABYTE",   "GA-770TA-UD3",         1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
-       B("GIGABYTE",   "GA-7DXR",              1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
-       B("GIGABYTE",   "GA-7VT600",            1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
-       B("GIGABYTE",   "GA-7ZM",               1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works
fine if you remove jumper JP9 on the board and disable the flash
protection BIOS option."),
-       B("GIGABYTE",   "GA-880GMA-USB3 (rev. 3.1)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
-       B("GIGABYTE",   "GA-8I945GZME-RH",      1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
-       B("GIGABYTE",   "GA-8IP775",            1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
-       B("GIGABYTE",   "GA-8IRML",             1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
-       B("GIGABYTE",   "GA-8PE667 Ultra 2",    1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
-       B("GIGABYTE",   "GA-8SIMLH",            1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
-       B("GIGABYTE",   "GA-945PL-S3P (rev. 6.6)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
-       B("GIGABYTE",   "GA-965GM-S2 (rev. 2.0)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
-       B("GIGABYTE",   "GA-965P-DS4",          1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
-       B("GIGABYTE",   "GA-EP31-DS3L (rev. 2.1)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
-       B("GIGABYTE",   "GA-EP35-DS3L",         1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
-       B("GIGABYTE",   "GA-EX58-UD4P",         1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
-       B("GIGABYTE",   "GA-K8N-SLI",           1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
-       B("GIGABYTE",   "GA-K8N51GMF",          1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
-       B("GIGABYTE",   "GA-K8N51GMF-9",        1,
"http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
-       B("GIGABYTE",   "GA-K8NS Pro-939",      0,
"http://www.gigabyte.com/products/product-page.aspx?pid=1875",
"Untested board enable."),
-       B("GIGABYTE",   "GA-M57SLI-S4",         1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
-       B("GIGABYTE",   "GA-M61P-S3",           1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
-       B("GIGABYTE",   "GA-M720-US3",          1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
-       B("GIGABYTE",   "GA-MA69VM-S2",         1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
-       B("GIGABYTE",   "GA-MA74GM-S2H (rev. 3.0)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
-       B("GIGABYTE",   "GA-MA770-UD3 (rev. 2.1)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
-       B("GIGABYTE",   "GA-MA770T-UD3P",       1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
-       B("GIGABYTE",   "GA-MA780G-UD3H",       1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
-       B("GIGABYTE",   "GA-MA78G-DS3H (rev. 1.0)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
-       B("GIGABYTE",   "GA-MA78GM-S2H",        1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL),
/* TODO: Rev. 1.0, 1.1, or 2.x? */
-       B("GIGABYTE",   "GA-MA78GPM-DS2H",      1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
-       B("GIGABYTE",   "GA-MA790FX-DQ6",       1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
-       B("GIGABYTE",   "GA-MA790GP-DS4H",      1,
"http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
-       B("GIGABYTE",   "GA-MA790XT-UD4P (rev. 1.0)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
-       B("GIGABYTE",   "GA-P55A-UD4 (rev. 1.0)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
-       B("GIGABYTE",   "GA-P67A-UD3P",         1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
-       B("GIGABYTE",   "GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL),
-       B("GIGABYTE",   "GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL),
-       B("GIGABYTE",   "GA-Z68MX-UD2H-B (rev. 1.3)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
-       B("GIGABYTE",   "GA-Z68XP-UD3 (rev. 1.0)", 1,
"http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
-       B("HP",         "e-Vectra P2706T",      1,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454",
NULL),
-       B("HP",         "ProLiant DL145 G3",    1,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351",
NULL),
-       B("HP",         "ProLiant DL165 G6",    1,
"http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html",
NULL),
-       B("HP",         "ProLiant N40L",        1, NULL, NULL),
-       B("HP",         "Puffer2-UL8E",         1,
"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023",
NULL),
-       B("HP",         "dc7800",               0,
"http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1",
"ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor,
locked ME region."),
-       B("HP",         "Vectra VL400",         1,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us",
NULL),
-       B("HP",         "Vectra VL420 SFF",     1,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us",
NULL),
-       B("HP",         "xw4400 (0A68h)",       0,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230",
"ICH7 with SPI lock down, BIOS lock, flash block detection
(SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
-       B("HP",         "xw9400",               1,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454",
"Boot block is write protected unless the solder points next to F2 are
shorted."),
-       B("IBASE",      "MB899",                1,
"http://www.ibase-i.com.tw/2009/mb899.html", NULL),
-       B("IBM",        "x3455",                1,
"http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html",
NULL),
-       B("IEI",        "PICOe-9452",           1,
"http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144",
NULL),
-       B("Intel",      "D201GLY",              1,
"http://www.intel.com/support/motherboards/desktop/d201gly/index.htm",
NULL),
-       B("Intel",      "D425KT",               0,
"http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html",
"NM10 with SPI lock down, BIOS lock, see
http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
-       B("Intel",      "D865GLC",              0, NULL, "ICH5 with
BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
-       B("Intel",      "DG45ID",               0,
"http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm",
"Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME is
locked."),
-       B("Intel",      "DH67CF",               0, NULL, "H67 with
BIOS lock enable and locked ME region, see
http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
-       B("Intel",      "EP80759",              1, NULL, NULL),
-       B("Intel",      "Foxhollow",            1, NULL, "Intel
reference board."),
-       B("Intel",      "Greencity",            1, NULL, "Intel
reference board."),
-       B("Intel",      "SE440BX-2",            0,
"http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard",
"Probably won't work, see
http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
-       B("IWILL",      "DK8-HTX",              1,
"http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98",
NULL),
-       B("Jetway",     "J-7BXAN",              1,
"http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
-       B("Jetway",     "J7F4K1G5D-PB",         1,
"http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D",
NULL),
-       B("Kontron",    "986LCD-M",             1,
"http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html",
NULL),
-       B("Lanner",     "EM-8510C",             1, NULL, NULL),
-       B("Lex",        "CV700A",               1,
"http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
-       B("Mitac",      "6513WU",               1,
"http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm",
NULL),
-       B("MSC",        "Q7-TCTC",              1,
"http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html",
NULL),
-       B("MSI",        "MS-6153",              1,
"http://www.msi.com/product/mb/MS-6153.html", NULL),
-       B("MSI",        "MS-6156",              1,
"http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm",
NULL),
-       B("MSI",        "MS-6163 (MS-6163 Pro)",1,
"http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
-       B("MSI",        "MS-6178",              0,
"http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off
if you try to hot-plug the chip. However, this does '''not''' happen
if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
-       B("MSI",        "MS-6330 (K7T Turbo)",  1,
"http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
-       B("MSI",        "MS-6391 (845 Pro4)",   1,
"http://www.msi.com/product/mb/845-Pro4.html", NULL),
-       B("MSI",        "MS-6561 (745 Ultra)",  1,
"http://www.msi.com/product/mb/745-Ultra.html", NULL),
-       B("MSI",        "MS-6566 (845 Ultra-C)",1,
"http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
-       B("MSI",        "MS-6570 (K7N2)",       1,
"http://www.msi.com/product/mb/K7N2.html", NULL),
-       B("MSI",        "MS-6577 (Xenon)",      1,
"http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843",
"This is an OEM board from HP, the HP name is Xenon."),
-       B("MSI",        "MS-6590 (KT4 Ultra)",  1,
"http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
-       B("MSI",        "MS-6702E (K8T Neo2-F)",1,
"http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
-       B("MSI",        "MS-6712 (KT4V)",       1,
"http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
-       B("MSI",        "MS-6787 (P4MAM-V/P4MAM-L)", 1,
"http://www.msi.com/service/search/?kw=6787&type=product", NULL),
-       B("MSI",        "MS-7005 (651M-L)",     1,
"http://www.msi.com/product/mb/651M-L.html", NULL),
-       B("MSI",        "MS-7025 (K8N Neo2 Platinum)", 1,
"http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
-       B("MSI",        "MS-7046",              1,
"http://www.heimir.de/ms7046/", NULL),
-       B("MSI",        "MS-7061 (KM4M-V/KM4AM-V)", 1,
"http://www.msi.com/service/search/?kw=7061&type=product", NULL),
-       B("MSI",        "MS-7065",              1,
"http://browse.geekbench.ca/geekbench2/view/53114", NULL),
-       B("MSI",        "MS-7135 (K8N Neo3)",   1,
"http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
-       B("MSI",        "MS-7142 (K8MM-V)",     1,
"http://www.msi.com/product/mb/K8MM-V.html", NULL),
-       B("MSI",        "MS-7168 (Orion)",      1,
"http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart",
NULL),
-       B("MSI",        "MS-7207 (K8NGM2-L)",   1,
"http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
-       B("MSI",        "MS-7211 (PM8M3-V)",    1,
"http://www.msi.com/product/mb/PM8M3-V.html", NULL),
-       B("MSI",        "MS-7236 (945PL Neo3)", 1,
"http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
-       B("MSI",        "MS-7253 (K9VGM-V)",    1,
"http://www.msi.com/product/mb/K9VGM-V.html", NULL),
-       B("MSI",        "MS-7255 (P4M890M)",    1,
"http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
-       B("MSI",        "MS-7260 (K9N Neo PCB 1.0)", 0,
"http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly
flashrom does not work when the vendor BIOS is booted, but it ''does''
work flawlessly when the machine is booted with coreboot. Owned by Uwe
Hermann <uwe at hermann-uwe.de>."),
-       B("MSI",        "MS-7309 (K9N6PGM2-V2)", 1,
"http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
-       B("MSI",        "MS-7312 (K9MM-V)",     1,
"http://www.msi.com/product/mb/K9MM-V.html", NULL),
-       B("MSI",        "MS-7345 (P35 Neo2-FIR)", 1,
"http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
-       B("MSI",        "MS-7368 (K9AG Neo2-Digital)", 1,
"http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
-       B("MSI",        "MS-7369 (K9N Neo V2)", 1,
"http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
-       B("MSI",        "MS-7376 (K9A2 Platinum V1)", 1,
"http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
-       B("MSI",        "MS-7529 (G31M3-L(S) V2)", 1,
"http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
-       B("MSI",        "MS-7529 (G31TM-P21)",  1,
"http://www.msi.com/product/mb/G31TM-P21.html", NULL),
-       B("MSI",        "MS-7548 (Aspen-GL8E)", 1,
"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en",
NULL),
-       B("MSI",        "MS-7596 (785GM-E51)",  1,
"http://www.msi.com/product/mb/785GM-E51.html", NULL),
-       B("MSI",        "MS-7599 (870-C45)",    1,
"http://www.msi.com/product/mb/870-C45.html", NULL),
-       B("MSI",        "MS-7613 (Iona-GL8E)",  0,
"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478",
"Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME region
is locked."),
-       B("MSI",        "MS-7635 (H55M-ED55)",  0,
"http://www.msi.com/product/mb/H55M-ED55.html", "Probing works
(Winbond W25Q64, 8192 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("MSI",        "MS-7640 (890FXA-GD70)",1,
"http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
-       B("MSI",        "MS-7642 (890GXM-G65)", 1,
"http://www.msi.com/product/mb/890GXM-G65.html", NULL),
-       B("MSI",        "MS-7676 (H67MA-ED55(B3))", 1,
"http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work
fine basically, but user reported (hopefully unrelated) buggy behavior
of the board after a firmware upgrade. See
http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
-       B("MSI",        "MS-7696 (A75MA-G55)",  1,
"http://www.msi.com/product/mb/A75MA-G55.html", NULL),
-       B("MSI",        "MS-7698 (E350IA-E45)", 1,
"http://www.msi.com/product/mb/E350IA-E45.html", NULL),
-       B("NEC",        "PowerMate 2000",       1,
"http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/",
NULL),
-       B("Nokia",      "IP530",                1, NULL, NULL),
-       B("PCCHIPS ",   "M598LMR (V9.0)",       1, NULL, NULL),
-       B("PCCHIPS ",   "M863G (V5.1A)",        1,
"http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0",
NULL),
-       B("PC Engines", "Alix.1c",              1,
"http://pcengines.ch/alix1c.htm", NULL),
-       B("PC Engines", "Alix.2c2",             1,
"http://pcengines.ch/alix2c2.htm", NULL),
-       B("PC Engines", "Alix.2c3",             1,
"http://pcengines.ch/alix2c3.htm", NULL),
-       B("PC Engines", "Alix.2d3",             1,
"http://pcengines.ch/alix2d3.htm", NULL),
-       B("PC Engines", "Alix.3c3",             1,
"http://pcengines.ch/alix3c3.htm", NULL),
-       B("PC Engines", "Alix.3d3",             1,
"http://pcengines.ch/alix3d3.htm", NULL),
-       B("PC Engines", "Alix.6f2",             1,
"http://pcengines.ch/alix6f2.htm", NULL),
-       B("PC Engines", "WRAP.2E",              1,
"http://pcengines.ch/wrap2e1.htm", NULL),
-       B("Portwell",   "PEB-4700VLA",          1,
"http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA",
NULL),
-       B("RCA",        "RM4100",               1,
"http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
-       B("Samsung",    "Polaris 32",           1, NULL, NULL),
-       B("Shuttle",    "AK31",                 1,
"http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
-       B("Shuttle",    "AK38N",                1,
"http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/",
NULL),
-       B("Shuttle",    "AV11V30",              1, NULL, NULL),
-       B("Shuttle",    "AV18E2",               1,
"http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
-       B("Shuttle",    "FD37",                 1,
"http://www.shuttle.eu/products/discontinued/barebones/sd37p2/",
NULL),
-       B("Shuttle",    "FH67",                 1,
"http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
-       B("Shuttle",    "FN25",                 1,
"http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=",
NULL),
-       B("Shuttle",    "X50/X50(B)",           1,
"http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
-       B("Soyo",       "SY-5VD",               0,
"http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No
public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May
work now."),
-       B("Soyo",       "SY-6BA+ III",          1,
"http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
-       B("Soyo",       "SY-7VCA",              1,
"http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html",
NULL),
-       B("Sun",        "Blade x6250",          1,
"http://www.sun.com/servers/blades/x6250/", NULL),
-       B("Sun",        "Fire x4150",           0,
"http://www.sun.com/servers/x64/x4150/", "No public report found. May
work now."),
-       B("Sun",        "Fire x4200",           0,
"http://www.sun.com/servers/entry/x4200/", "No public report found.
May work now."),
-       B("Sun",        "Fire x4540",           0,
"http://www.sun.com/servers/x64/x4540/", "No public report found. May
work now."),
-       B("Sun",        "Fire x4600",           0,
"http://www.sun.com/servers/x64/x4600/", "No public report found. May
work now."),
-       B("Sun",        "Ultra 40 M2",          1,
"http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html",
NULL),
-       B("Supermicro", "H8QC8",                1,
"http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm",
NULL),
-       B("Supermicro", "X5DP8-G2",             1,
"http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm",
NULL),
-       B("Supermicro", "X7DBT-INF",            1,
"http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm",
NULL),
-       B("Supermicro", "X7SPA-HF",             1,
"http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y",
NULL),
-       B("Supermicro", "X8DT3",                1,
"http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm",
NULL),
-       B("Supermicro", "X8DTE-F",              1,
"http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N",
NULL),
-       B("Supermicro", "X8DTH-6F",             1,
"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm",
NULL),
-       B("Supermicro", "X8DTT-F",              1,
"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm",
NULL),
-       B("Supermicro", "X8DTT-HIBQF",          1,
"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm",
NULL),
-       B("Supermicro", "X8DTU-6TF+",           0,
"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10",
"Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
-       B("Supermicro", "X8DTU-F",              1,
"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm",
NULL),
-       B("Supermicro", "X8SIE(-F)",            0,
"http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2",
"Requires unlocking the ME although the registers are set up correctly
by the descriptor/BIOS already (tested with swseq and hwseq)."),
-       B("Supermicro", "X8STi",                1,
"http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm",
NULL),
-       B("Supermicro", "X9SCA-F",              0,
"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm",
"Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME region
is locked."),
-       B("Supermicro", "X9SCL",                0,
"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm",
"Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME region
is locked."),
-       B("T-Online",   "S-100",                1,
"http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
-       B("Tekram",     "P6Pro-A5",             1,
"http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
-       B("Termtek",    "TK-3370 (Rev:2.5B)",   1, NULL, NULL),
-       B("Thomson",    "IP1000",               1,
"http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
-       B("TriGem",     "Anaheim-3",            1,
"http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml",
NULL),
-       B("TriGem",     "Lomita",               1,
"http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml",
NULL),
-       B("Tyan",       "S5375-1U (Tempest i5100X)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
-       B("Tyan",       "S1846 (Tsunami ATX)",  1,
"http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
-       B("Tyan",       "S2466 (Tiger MPX)",    1,
"http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
-       B("Tyan",       "S2498 (Tomcat K7M)",   1,
"http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
-       B("Tyan",       "S2723 (Tiger i7501)",  1,
"http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
-       B("Tyan",       "S2881 (Thunder K8SR)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
-       B("Tyan",       "S2882 (Thunder K8S Pro)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
-       B("Tyan",       "S2882-D (Thunder K8SD Pro)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
-       B("Tyan",       "S2891 (Thunder K8SRE)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
-       B("Tyan",       "S2892 (Thunder K8SE)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
-       B("Tyan",       "S2895 (Thunder K8WE)", 1,
"http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
-       B("Tyan",       "S2912 (Thunder n3600R)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
-       B("Tyan",       "S2915 (Thunder n6650W)", 1,
"http://tyan.com/product_board_detail.aspx?pid=163", NULL),
-       B("Tyan",       "S2915-E (Thunder n6650W)", 1,
"http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041",
NULL),
-       B("Tyan",       "S2933 (Thunder n3600S)", 1,
"http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063",
NULL),
-       B("Tyan",       "S3095 (Tomcat i945GM)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
-       B("Tyan",       "S3992 (Thunder h2000M)", 1,
"http://tyan.com/product_board_detail.aspx?pid=235", NULL),
-       B("Tyan",       "S5180 (Toledo i965R)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
-       B("Tyan",       "S5191 (Toledo i3000R)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
-       B("Tyan",       "S5197 (Toledo i3010W)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
-       B("Tyan",       "S5211 (Toledo i3210W)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
-       B("Tyan",       "S5211-1U (Toledo i3200R)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
-       B("Tyan",       "S5220 (Toledo q35T)",  1,
"http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
-       B("Tyan",       "S5375 (Tempest i5100X)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
-       B("Tyan",       "S5376 (Tempest i5100W)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=605", "Both
S5376G2NR and S5376WAG2NR should work."),
-       B("Tyan",       "S5377 (Tempest i5100T)", 1,
"http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017",
NULL),
-       B("Tyan",       "S5382 (Tempest i5000PW)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
-       B("Tyan",       "S5397 (Tempest i5400PW)", 1,
"http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
-       B("VIA",        "EPIA M/MII/...",       1,
"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202",
NULL), /* EPIA-MII link for now */
-       B("VIA",        "EPIA SP",              1,
"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261",
NULL),
-       B("VIA",        "EPIA-CN",              1,
"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400",
NULL),
-       B("VIA",        "EPIA EK",              1,
"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420",
NULL),
-       B("VIA",        "EPIA-EX15000G",        1,
"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450",
NULL),
-       B("VIA",        "EPIA-LN",              1,
"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473",
NULL),
-       B("VIA",        "EPIA-M700",            1,
"http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700",
NULL),
-       B("VIA",        "EPIA-N/NL",            1,
"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221",
NULL), /* EPIA-N link for now */
-       B("VIA",        "EPIA-NX15000G",        1,
"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470",
NULL),
-       B("VIA",        "NAB74X0",              1,
"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590",
NULL),
-       B("VIA",        "pc2500e",              1,
"http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp",
NULL),
-       B("VIA",        "PC3500G",              1,
"http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp",
NULL),
-       B("VIA",        "VB700X",               1,
"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490",
NULL),
-       B("ZOTAC",      "Fusion-ITX WiFi (FUSION350-A-E)", 1, NULL, NULL),
-       B("ZOTAC",      "GeForce 8200",         1,
"http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92",
NULL),
-       B("ZOTAC",      "H67-ITX WiFi (H67ITX-C-E)", 0, NULL, "Probing
works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
-       B("ZOTAC",      "ZBOX HD-ID11",         1,
"http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75",
NULL),
+       B("A-Trend",    "ATC-6220",                             OK,
 "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
+       B("abit",       "A-S78H",                               OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2",
NULL),
+       B("abit",       "AN-M2",                                OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2",
NULL),
+       B("abit",       "AV8",                                  OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8",
NULL),
+       B("abit",       "AX8",                                  OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8",
NULL),
+       B("abit",       "BM6",                                  OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370",
NULL),
+       B("abit",       "Fatal1ty F-I90HD",                     OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775",
NULL),
+       B("abit",       "IC7",                                  OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478",
NULL),
+       B("abit",       "IP35",                                 OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35",
NULL),
+       B("abit",       "IP35 Pro",                             OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro",
NULL),
+       B("abit",       "IS-10",                                BAD,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478",
"Reported by deejkuba at aol.com to flashrom at coreboot.org, no public
archive. Missing board enable and/or M50FW040 unlocking. May work
now."),
+       B("abit",       "KN8 Ultra",                            OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra",
NULL),
+       B("abit",       "NF-M2 nView",                          OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView",
NULL),
+       B("abit",       "NF-M2S",                               OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2",
NULL),
+       B("abit",       "NF7-S",                                OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S",
NULL),
+       B("abit",       "VA6",                                  OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6",
NULL),
+       B("abit",       "VT6X4",                                OK,
 "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4",
NULL),
+       B("Acorp",      "6A815EPD",                             OK,
 "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp",
NULL),
+       B("Advantech",  "PCM-5820",                             OK,
 "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
+       B("agami",      "Aruma",                                OK,
 "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series",
NULL),
+       B("Albatron",   "PM266A Pro",                           OK,
 "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56",
NULL), /* FIXME */
+       B("AOpen",      "i945GMx-VFX",                          OK,
 NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO
Q5010 with designation D2544-B1)."),
+       B("AOpen",      "vKM400Am-S",                           OK,
 "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
+       B("Artec Group","DBE61",                                OK,
 "http://wiki.thincan.org/DBE61", NULL),
+       B("Artec Group","DBE62",                                OK,
 "http://wiki.thincan.org/DBE62", NULL),
+       B("ASI",        "MB-5BLMP",                             OK,
 "http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III
thin client."),
+       B("ASRock",     "775i65G",                              OK,
 "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
+       B("ASRock",     "890GX Extreme3",                       OK,
 "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3",
NULL),
+       B("ASRock",     "939A785GMH/128M",                      OK,
 "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
+       B("ASRock",     "A330GC",                               OK,
 "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
+       B("ASRock",     "A770CrossFire",                        OK,
 "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
+       B("ASRock",     "ALiveNF6G-DVI",                        OK,
 "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
+       B("ASRock",     "AM2NF6G-VSTA",                         OK,
 "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
+       B("ASRock",     "ConRoeXFire-eSATA2",                   OK,
 "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2",
NULL),
+       B("ASRock",     "K7S41",                                OK,
 "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
+       B("ASRock",     "K7S41GX",                              OK,
 "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
+       B("ASRock",     "K7VT4A+",                              BAD,
 "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip
found, probably due to flash translation.
http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
+       B("ASRock",     "K8S8X",                                OK,
 "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
+       B("ASRock",     "M3A790GXH/128M",                       OK,
 "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
+       B("ASRock",     "P4i65GV",                              OK,
 "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
+       B("ASUS",       "A7N8X Deluxe",                         OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
+       B("ASUS",       "A7N8X-E Deluxe",                       OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/",
NULL),
+       B("ASUS",       "A7N8X-VM/400",                         OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
+       B("ASUS",       "A7V133",                               OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
+       B("ASUS",       "A7V333",                               OK,
 "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
+       B("ASUS",       "A7V400-MX",                            OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
+       B("ASUS",       "A7V600-X",                             OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
+       B("ASUS",       "A7V8X",                                OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
+       B("ASUS",       "A7V8X-MX",                             OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
+       B("ASUS",       "A7V8X-MX SE",                          OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
+       B("ASUS",       "A7V8X-X",                              OK,
 "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
+       B("ASUS",       "A8M2N-LA (NodusM3-GL8E)",              OK,
 "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en",
"This is an OEM board from HP, the HP name is NodusM3-GL8E."),
+       B("ASUS",       "A8N-E",                                OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
+       B("ASUS",       "A8N-LA (Nagami-GL8E)",                 OK,
 "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en",
"This is an OEM board from HP, the HP name is Nagami-GL8E."),
+       B("ASUS",       "A8N-SLI",                              OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
+       B("ASUS",       "A8N-SLI Deluxe",                       NT,
 NULL, "Untested board enable."),
+       B("ASUS",       "A8N-SLI Premium",                      OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/",
NULL),
+       B("ASUS",       "A8N-VM",                               OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
+       B("ASUS",       "A8N-VM CSM",                           OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
+       B("ASUS",       "A8NE-FM/S",                            OK,
 "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM",
NULL),
+       B("ASUS",       "A8V Deluxe",                           OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
+       B("ASUS",       "A8V-E Deluxe",                         OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/",
NULL),
+       B("ASUS",       "A8V-E SE",                             OK,
 "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See
http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
+       B("ASUS",       "Crosshair II Formula",                 OK,
 "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/",
NULL),
+       B("ASUS",       "Crosshair IV Extreme",                 OK,
 "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/",
NULL),
+       B("ASUS",       "E35M1-I DELUXE",                       OK,
 "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/",
NULL),
+       B("ASUS",       "K8N",                                  OK,
 "http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
+       B("ASUS",       "K8V",                                  OK,
 "http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
+       B("ASUS",       "K8V SE Deluxe",                        OK,
 "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/",
NULL),
+       B("ASUS",       "K8V-X",                                OK,
 "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
+       B("ASUS",       "K8V-X SE",                             OK,
 "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
+       B("ASUS",       "KFSN4-DRE/SAS",                        OK,
 "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/",
NULL),
+       B("ASUS",       "M2A-MX",                               OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
+       B("ASUS",       "M2A-VM (HDMI)",                        OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
+       B("ASUS",       "M2N32-SLI Deluxe",                     OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/",
NULL),
+       B("ASUS",       "M2N-E",                                OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine
doesn't come up again after flashing, try resetting the NVRAM(CMOS).
The MAC address of the onboard network card will change to the value
stored in the new image, so backup the old address first. See
http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
+       B("ASUS",       "M2N-E SLI",                            OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
+       B("ASUS",       "M2N-SLI Deluxe",                       OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
+       B("ASUS",       "M2NBP-VM CSM",                         OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
+       B("ASUS",       "M2NPV-VM",                             OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
+       B("ASUS",       "M2V",                                  OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
+       B("ASUS",       "M2V-MX",                               OK,
 "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
+       B("ASUS",       "M3A",                                  OK,
 "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
+       B("ASUS",       "M3A76-CM",                             OK,
 "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
+       B("ASUS",       "M3A78-EM",                             OK,
 "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
+       B("ASUS",       "M3N78-VM",                             OK,
 "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
+       B("ASUS",       "M4A78-EM",                             OK,
 "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
+       B("ASUS",       "M4A785TD-M EVO",                       OK,
 "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
+       B("ASUS",       "M4A785TD-V EVO",                       OK,
 "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
+       B("ASUS",       "M4A78LT-M LE",                         OK,
 "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
+       B("ASUS",       "M4A79T Deluxe",                        OK,
 "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
+       B("ASUS",       "M4A87TD/USB3",                         OK,
 "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
+       B("ASUS",       "M4A89GTD PRO",                         OK,
 "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
+       B("ASUS",       "M4N78 PRO",                            OK,
 "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
+       B("ASUS",       "M5A99X EVO",                           OK,
 "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
+       B("ASUS",       "MEW-AM",                               BAD,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public
report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work
now."),
+       B("ASUS",       "MEW-VM",                               BAD,
 "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No
public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May
work now."),
+       B("ASUS",       "OPLX-M",                               NT,
 NULL, "Untested board enable."),
+       B("ASUS",       "P2B",                                  OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
+       B("ASUS",       "P2B-D",                                OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
+       B("ASUS",       "P2B-DS",                               OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
+       B("ASUS",       "P2B-F",                                OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
+       B("ASUS",       "P2B-N",                                OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
+       B("ASUS",       "P2E-M",                                OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
+       B("ASUS",       "P2L97-S",                              OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
+       B("ASUS",       "P3B-F",                                BAD,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public
report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work
now."),
+       B("ASUS",       "P4B266",                               OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
+       B("ASUS",       "P4B266-LM",                            OK,
 "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
+       B("ASUS",       "P4B533-E",                             OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
+       B("ASUS",       "P4C800-E Deluxe",                      OK,
 "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/",
NULL),
+       B("ASUS",       "P4GV-LA (Guppy)",                      OK,
 "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478",
NULL),
+       B("ASUS",       "P4P800",                               OK,
 "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
+       B("ASUS",       "P4P800-E Deluxe",                      OK,
 "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/",
NULL),
+       B("ASUS",       "P4P800-VM",                            OK,
 "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
+       B("ASUS",       "P4SC-E",                               OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS
Terminator P4 533 barebone system"),
+       B("ASUS",       "P4SD-LA",                              OK,
 "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505",
NULL),
+       B("ASUS",       "P4S533-X",                             OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
+       B("ASUS",       "P4S800-MX",                            OK,
 "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
+       B("ASUS",       "P5A",                                  OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
+       B("ASUS",       "P5B",                                  OK,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
+       B("ASUS",       "P5B-Deluxe",                           OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/",
NULL),
+       B("ASUS",       "P5BV-M",                               BAD,
 "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by
Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to
flashrom at coreboot.org, no public archive. Missing board enable and/or
SST49LF008A unlocking. May work now."),
+       B("ASUS",       "P5GC-MX/1333",                         OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/",
NULL),
+       B("ASUS",       "P5GD1 Pro",                            OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/",
NULL),
+       B("ASUS",       "P5GD1-VM/S",                           OK,
 NULL, "This is an OEM board from FSC. Although flashrom supports it
and can probably not distinguish it from the P5GD1-VM, please note
that the P5GD1-VM BIOS does not support the FSC variants
completely."),
+       B("ASUS",       "P5GD1(-VM)",                           NT,
 NULL, "Untested board enable."),
+       B("ASUS",       "P5GD2 Premium",                        OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/",
NULL),
+       B("ASUS",       "P5GDC Deluxe",                         OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/",
NULL),
+       B("ASUS",       "P5GDC-V Deluxe",                       OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/",
NULL),
+       B("ASUS",       "P5GD2/C variants",                     NT,
 NULL, "Untested board enable."),
+       B("ASUS",       "P5K-V",                                OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
+       B("ASUS",       "P5K-VM",                               OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
+       B("ASUS",       "P5KC",                                 OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
+       B("ASUS",       "P5KPL-CM",                             OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
+       B("ASUS",       "P5L-MX",                               OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
+       B("ASUS",       "P5L-VM 1394",                          OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/",
NULL),
+       B("ASUS",       "P5LD2",                                NT,
 NULL, "Untested board enable."),
+       B("ASUS",       "P5LP-LE (Lithium-UL8E)",               OK,
 "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887",
"This is an OEM board from HP."),
+       B("ASUS",       "P5LP-LE (Epson OEM)",                  OK,
 NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
+       B("ASUS",       "P5LP-LE",                              BAD,
 NULL, "This designation is used for OEM boards from HP, Epson and
maybe others. The HP names vary and not all of them have been tested
yet. Please report any success or failure, thanks."),
+       B("ASUS",       "P5N-D",                                OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
+       B("ASUS",       "P5N-E SLI",                            NT,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/",
"Untested board enable."),
+       B("ASUS",       "P5N32-E SLI",                          OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/",
NULL),
+       B("ASUS",       "P5N7A-VM",                             OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
+       B("ASUS",       "P5ND2-SLI Deluxe",                     OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/",
NULL),
+       B("ASUS",       "P5PE-VM",                              OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
+       B("ASUS",       "P5QPL-AM",                             OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
+       B("ASUS",       "P5VD1-X",                              OK,
 "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
+       B("ASUS",       "P6T SE",                               OK,
 "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
+       B("ASUS",       "P6T Deluxe",                           OK,
 "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/",
NULL),
+       B("ASUS",       "P6T Deluxe V2",                        OK,
 "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/",
NULL),
+       B("ASUS",       "P7H57D-V EVO",                         OK,
 "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/",
NULL),
+       B("ASUS",       "P7H55-M LX",                           BAD,
 NULL, "flashrom works correctly, but GbE LAN is nonworking (probably
due to a missing/bogus MAC address; see
http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and
http://ubuntuforums.org/showthread.php?t=1534389 for a possible
workaround)"),
+       B("ASUS",       "P8B-E/4L",                             BAD,
 NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("ASUS",       "P8B WS",                               BAD,
 NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("ASUS",       "P8H61 PRO",                            BAD,
 NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("ASUS",       "P8H61-M LE/USB3",                      BAD,
 NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("ASUS",       "P8H67-M PRO",                          BAD,
 NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of
the flash are problematic: descriptor is r/o (conforming to ICH reqs),
ME region is locked."),
+       B("ASUS",       "P8P67 (rev. 3.1)",                     BAD,
 NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of
the flash are problematic: descriptor is r/o (conforming to ICH reqs),
ME region is locked."),
+       B("ASUS",       "P8Z68-V PRO",                          BAD,
 NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("ASUS",       "Z8NA-D6C",                             OK,
 "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/",
NULL),
+       B("ASUS",       "Z8PE-D12",                             OK,
 "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/",
NULL),
+       B("BCOM",       "WinNET100",                            OK,
 "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin
client."),
+       B("Bifferos",   "Bifferboard",                          OK,
 "http://bifferos.co.uk/", NULL),
+       B("Biostar",    "N68S3+",                               OK,
 NULL, NULL),
+       B("Biostar",    "M6TBA",                                BAD,
 "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found.
Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+       B("Biostar",    "M7NCD Pro",                            OK,
 "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
+       B("Biostar",    "P4M80-M4",                             OK,
 "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
+       B("Biostar",    "TA780G M2+",                           OK,
 "http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344",
NULL),
+       B("Boser",      "HS-6637",                              BAD,
 "http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by
Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public
archive. Missing board enable and/or F29C51002T unlocking. May work
now."),
+       B("Congatec",   "conga-X852",                           OK,
 "http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
+       B("Dell",       "OptiPlex GX1",                         OK,
 "http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm",
NULL),
+       B("Dell",       "PowerEdge 1850",                       OK,
 "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm",
NULL),
+       B("DFI",        "855GME-MGF",                           BAD,
 "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433",
"Probably needs a board enable.
http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
+       B("DFI",        "Blood-Iron P35 T2RL",                  OK,
 "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1",
NULL),
+       B("Elitegroup", "GeForce6100SM-M ",                     OK,
 "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24",
NULL),
+       B("Elitegroup", "GF7100PVT-M3 (V1.0)",                  OK,
 "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0",
NULL),
+       B("Elitegroup", "K7S5A",                                OK,
 "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0",
NULL),
+       B("Elitegroup", "K7S6A",                                OK,
 "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0",
NULL),
+       B("Elitegroup", "K7SEM (V1.0A)",                        OK,
 "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0",
NULL),
+       B("Elitegroup", "K7VTA3",                               OK,
 "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0",
NULL),
+       B("Elitegroup", "P4M800PRO-M (V1.0A, V2.0)",            OK,
 "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0",
NULL),
+       B("Elitegroup", "P4VXMS (V1.0A)",                       OK,
 NULL, NULL),
+       B("Elitegroup", "P6IWP-Fe",                             OK,
 "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0",
NULL),
+       B("Elitegroup", "P6VAP-A+",                             OK,
 "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0",
NULL),
+       B("Elitegroup", "RS485M-M",                             OK,
 "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0",
NULL),
+       B("Emerson",    "ATCA-7360",                            OK,
 "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx",
NULL),
+       B("EPoX",       "EP-8K5A2",                             OK,
 "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
+       B("EPoX",       "EP-8NPA7I",                            OK,
 "http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
+       B("EPoX",       "EP-9NPA7I",                            OK,
 "http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
+       B("EPoX",       "EP-8RDA3+",                            OK,
 "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
+       B("EPoX",       "EP-BX3",                               OK,
 "http://www.epox.com/product.asp?ID=EP-BX3", NULL),
+       B("EVGA",       "132-CK-NF78",                          OK,
 "http://www.evga.com/articles/385.asp", NULL),
+       B("EVGA",       "270-WS-W555-A2 (Classified SR-2)",     OK,
 "http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
+       B("FIC",        "VA-502",                               BAD,
 "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public
report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI
subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
+       B("Foxconn",    "6150K8MD-8EKRSH",                      OK,
 "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157",
NULL),
+       B("Foxconn",    "A6VMX",                                OK,
 "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346",
NULL),
+       B("Foxconn",    "P4M800P7MA-RS2",                       OK,
 "http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138",
NULL),
+       B("Freetech",   "P6F91i",                               OK,
 "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html",
NULL),
+       B("Fujitsu-Siemens", "ESPRIMO P5915",                   OK,
 "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm",
"Mainboard model is D2312-A2."),
+       B("GIGABYTE",   "GA-2761GXDK",                          OK,
 "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/",
NULL),
+       B("GIGABYTE",   "GA-6BXC",                              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
+       B("GIGABYTE",   "GA-6BXDU",                             OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
+       B("GIGABYTE",   "GA-6IEM",                              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
+       B("GIGABYTE",   "GA-6VXE7+",                            OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
+       B("GIGABYTE",   "GA-6ZMA",                              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
+       B("GIGABYTE",   "GA-MA785GMT-UD2H (rev. 1.0)",          OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
+       B("GIGABYTE",   "GA-770TA-UD3",                         OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
+       B("GIGABYTE",   "GA-7DXR",                              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
+       B("GIGABYTE",   "GA-7VT600",                            OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
+       B("GIGABYTE",   "GA-7ZM",                               OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works
fine if you remove jumper JP9 on the board and disable the flash
protection BIOS option."),
+       B("GIGABYTE",   "GA-880GMA-USB3 (rev. 3.1)",            OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
+       B("GIGABYTE",   "GA-8I945GZME-RH",                      OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
+       B("GIGABYTE",   "GA-8IP775",                            OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
+       B("GIGABYTE",   "GA-8IRML",                             OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
+       B("GIGABYTE",   "GA-8PE667 Ultra 2",                    OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
+       B("GIGABYTE",   "GA-8SIMLH",                            OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
+       B("GIGABYTE",   "GA-945PL-S3P (rev. 6.6)",              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
+       B("GIGABYTE",   "GA-965GM-S2 (rev. 2.0)",               OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
+       B("GIGABYTE",   "GA-965P-DS4",                          OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
+       B("GIGABYTE",   "GA-EP31-DS3L (rev. 2.1)",              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
+       B("GIGABYTE",   "GA-EP35-DS3L",                         OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
+       B("GIGABYTE",   "GA-EX58-UD4P",                         OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
+       B("GIGABYTE",   "GA-K8N-SLI",                           OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
+       B("GIGABYTE",   "GA-K8N51GMF",                          OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
+       B("GIGABYTE",   "GA-K8N51GMF-9",                        OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
+       B("GIGABYTE",   "GA-K8NS Pro-939",                      NT,
 "http://www.gigabyte.com/products/product-page.aspx?pid=1875",
"Untested board enable."),
+       B("GIGABYTE",   "GA-M57SLI-S4",                         OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
+       B("GIGABYTE",   "GA-M61P-S3",                           OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
+       B("GIGABYTE",   "GA-M720-US3",                          OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
+       B("GIGABYTE",   "GA-MA69VM-S2",                         OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
+       B("GIGABYTE",   "GA-MA74GM-S2H (rev. 3.0)",             OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
+       B("GIGABYTE",   "GA-MA770-UD3 (rev. 2.1)",              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
+       B("GIGABYTE",   "GA-MA770T-UD3P",                       OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
+       B("GIGABYTE",   "GA-MA780G-UD3H",                       OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
+       B("GIGABYTE",   "GA-MA78G-DS3H (rev. 1.0)",             OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
+       B("GIGABYTE",   "GA-MA78GM-S2H",                        OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL),
/* TODO: Rev. 1.0, 1.1, or 2.x? */
+       B("GIGABYTE",   "GA-MA78GPM-DS2H",                      OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
+       B("GIGABYTE",   "GA-MA790FX-DQ6",                       OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
+       B("GIGABYTE",   "GA-MA790GP-DS4H",                      OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
+       B("GIGABYTE",   "GA-MA790XT-UD4P (rev. 1.0)",           OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
+       B("GIGABYTE",   "GA-P55A-UD4 (rev. 1.0)",               OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
+       B("GIGABYTE",   "GA-P67A-UD3P",                         OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
+       B("GIGABYTE",   "GA-X58A-UD7 (rev. 2.0)",               OK,
 NULL, NULL),
+       B("GIGABYTE",   "GA-X58A-UDR3 (rev. 2.0)",              OK,
 NULL, NULL),
+       B("GIGABYTE",   "GA-Z68MX-UD2H-B (rev. 1.3)",           OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
+       B("GIGABYTE",   "GA-Z68XP-UD3 (rev. 1.0)",              OK,
 "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
+       B("HP",         "e-Vectra P2706T",                      OK,
 "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454",
NULL),
+       B("HP",         "ProLiant DL145 G3",                    OK,
 "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351",
NULL),
+       B("HP",         "ProLiant DL165 G6",                    OK,
 "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html",
NULL),
+       B("HP",         "ProLiant N40L",                        OK,
 NULL, NULL),
+       B("HP",         "Puffer2-UL8E",                         OK,
 "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023",
NULL),
+       B("HP",         "dc7800",                               BAD,
 "http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1",
"ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor,
locked ME region."),
+       B("HP",         "Vectra VL400",                         OK,
 "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us",
NULL),
+       B("HP",         "Vectra VL420 SFF",                     OK,
 "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us",
NULL),
+       B("HP",         "xw4400 (0A68h)",                       BAD,
 "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230",
"ICH7 with SPI lock down, BIOS lock, flash block detection
(SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
+       B("HP",         "xw9400",                               OK,
 "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454",
"Boot block is write protected unless the solder points next to F2 are
shorted."),
+       B("IBASE",      "MB899",                                OK,
 "http://www.ibase-i.com.tw/2009/mb899.html", NULL),
+       B("IBM",        "x3455",                                OK,
 "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html",
NULL),
+       B("IEI",        "PICOe-9452",                           OK,
 "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144",
NULL),
+       B("Intel",      "D201GLY",                              OK,
 "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm",
NULL),
+       B("Intel",      "D425KT",                               BAD,
 "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html",
"NM10 with SPI lock down, BIOS lock, see
http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
+       B("Intel",      "D865GLC",                              BAD,
 NULL, "ICH5 with BIOS lock enable, see
http://paste.flashrom.org/view.php?id=775"),
+       B("Intel",      "DG45ID",                               BAD,
 "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm",
"Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME is
locked."),
+       B("Intel",      "DH67CF",                               BAD,
 NULL, "H67 with BIOS lock enable and locked ME region, see
http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
+       B("Intel",      "EP80759",                              OK,
 NULL, NULL),
+       B("Intel",      "Foxhollow",                            OK,
 NULL, "Intel reference board."),
+       B("Intel",      "Greencity",                            OK,
 NULL, "Intel reference board."),
+       B("Intel",      "SE440BX-2",                            BAD,
 "http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard",
"Probably won't work, see
http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
+       B("IWILL",      "DK8-HTX",                              OK,
 "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98",
NULL),
+       B("Jetway",     "J-7BXAN",                              OK,
 "http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
+       B("Jetway",     "J7F4K1G5D-PB",                         OK,
 "http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D",
NULL),
+       B("Kontron",    "986LCD-M",                             OK,
 "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html",
NULL),
+       B("Lanner",     "EM-8510C",                             OK,
 NULL, NULL),
+       B("Lex",        "CV700A",                               OK,
 "http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
+       B("Mitac",      "6513WU",                               OK,
 "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm",
NULL),
+       B("MSC",        "Q7-TCTC",                              OK,
 "http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html",
NULL),
+       B("MSI",        "MS-6153",                              OK,
 "http://www.msi.com/product/mb/MS-6153.html", NULL),
+       B("MSI",        "MS-6156",                              OK,
 "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm",
NULL),
+       B("MSI",        "MS-6163 (MS-6163 Pro)",                OK,
"http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
+       B("MSI",        "MS-6178",                              BAD,
 "http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off
if you try to hot-plug the chip. However, this does '''not''' happen
if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+       B("MSI",        "MS-6330 (K7T Turbo)",                  OK,
 "http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
+       B("MSI",        "MS-6391 (845 Pro4)",                   OK,
 "http://www.msi.com/product/mb/845-Pro4.html", NULL),
+       B("MSI",        "MS-6561 (745 Ultra)",                  OK,
 "http://www.msi.com/product/mb/745-Ultra.html", NULL),
+       B("MSI",        "MS-6566 (845 Ultra-C)",                OK,
"http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
+       B("MSI",        "MS-6570 (K7N2)",                       OK,
 "http://www.msi.com/product/mb/K7N2.html", NULL),
+       B("MSI",        "MS-6577 (Xenon)",                      OK,
 "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843",
"This is an OEM board from HP, the HP name is Xenon."),
+       B("MSI",        "MS-6590 (KT4 Ultra)",                  OK,
 "http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
+       B("MSI",        "MS-6702E (K8T Neo2-F)",                OK,
"http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
+       B("MSI",        "MS-6712 (KT4V)",                       OK,
 "http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
+       B("MSI",        "MS-6787 (P4MAM-V/P4MAM-L)",            OK,
 "http://www.msi.com/service/search/?kw=6787&type=product", NULL),
+       B("MSI",        "MS-7005 (651M-L)",                     OK,
 "http://www.msi.com/product/mb/651M-L.html", NULL),
+       B("MSI",        "MS-7025 (K8N Neo2 Platinum)",          OK,
 "http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
+       B("MSI",        "MS-7046",                              OK,
 "http://www.heimir.de/ms7046/", NULL),
+       B("MSI",        "MS-7061 (KM4M-V/KM4AM-V)",             OK,
 "http://www.msi.com/service/search/?kw=7061&type=product", NULL),
+       B("MSI",        "MS-7065",                              OK,
 "http://browse.geekbench.ca/geekbench2/view/53114", NULL),
+       B("MSI",        "MS-7135 (K8N Neo3)",                   OK,
 "http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
+       B("MSI",        "MS-7142 (K8MM-V)",                     OK,
 "http://www.msi.com/product/mb/K8MM-V.html", NULL),
+       B("MSI",        "MS-7168 (Orion)",                      OK,
 "http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart",
NULL),
+       B("MSI",        "MS-7207 (K8NGM2-L)",                   OK,
 "http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
+       B("MSI",        "MS-7211 (PM8M3-V)",                    OK,
 "http://www.msi.com/product/mb/PM8M3-V.html", NULL),
+       B("MSI",        "MS-7236 (945PL Neo3)",                 OK,
 "http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
+       B("MSI",        "MS-7253 (K9VGM-V)",                    OK,
 "http://www.msi.com/product/mb/K9VGM-V.html", NULL),
+       B("MSI",        "MS-7255 (P4M890M)",                    OK,
 "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
+       B("MSI",        "MS-7260 (K9N Neo PCB 1.0)",            BAD,
 "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html",
"Interestingly flashrom does not work when the vendor BIOS is booted,
but it ''does'' work flawlessly when the machine is booted with
coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+       B("MSI",        "MS-7309 (K9N6PGM2-V2)",                OK,
 "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
+       B("MSI",        "MS-7312 (K9MM-V)",                     OK,
 "http://www.msi.com/product/mb/K9MM-V.html", NULL),
+       B("MSI",        "MS-7345 (P35 Neo2-FIR)",               OK,
 "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
+       B("MSI",        "MS-7368 (K9AG Neo2-Digital)",          OK,
 "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
+       B("MSI",        "MS-7369 (K9N Neo V2)",                 OK,
 "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
+       B("MSI",        "MS-7376 (K9A2 Platinum V1)",           OK,
 "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
+       B("MSI",        "MS-7529 (G31M3-L(S) V2)",              OK,
 "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
+       B("MSI",        "MS-7529 (G31TM-P21)",                  OK,
 "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
+       B("MSI",        "MS-7548 (Aspen-GL8E)",                 OK,
 "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en",
NULL),
+       B("MSI",        "MS-7596 (785GM-E51)",                  OK,
 "http://www.msi.com/product/mb/785GM-E51.html", NULL),
+       B("MSI",        "MS-7599 (870-C45)",                    OK,
 "http://www.msi.com/product/mb/870-C45.html", NULL),
+       B("MSI",        "MS-7613 (Iona-GL8E)",                  BAD,
 "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478",
"Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME region
is locked."),
+       B("MSI",        "MS-7635 (H55M-ED55)",                  BAD,
 "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works
(Winbond W25Q64, 8192 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME region is
locked."),
+       B("MSI",        "MS-7640 (890FXA-GD70)",                OK,
"http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
+       B("MSI",        "MS-7642 (890GXM-G65)",                 OK,
 "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
+       B("MSI",        "MS-7676 (H67MA-ED55(B3))",             OK,
 "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work
fine basically, but user reported (hopefully unrelated) buggy behavior
of the board after a firmware upgrade. See
http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
+       B("MSI",        "MS-7696 (A75MA-G55)",                  OK,
 "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
+       B("MSI",        "MS-7698 (E350IA-E45)",                 OK,
 "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
+       B("NEC",        "PowerMate 2000",                       OK,
 "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/",
NULL),
+       B("Nokia",      "IP530",                                OK,
 NULL, NULL),
+       B("PCCHIPS ",   "M598LMR (V9.0)",                       OK,
 NULL, NULL),
+       B("PCCHIPS ",   "M863G (V5.1A)",                        OK,
 "http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0",
NULL),
+       B("PC Engines", "Alix.1c",                              OK,
 "http://pcengines.ch/alix1c.htm", NULL),
+       B("PC Engines", "Alix.2c2",                             OK,
 "http://pcengines.ch/alix2c2.htm", NULL),
+       B("PC Engines", "Alix.2c3",                             OK,
 "http://pcengines.ch/alix2c3.htm", NULL),
+       B("PC Engines", "Alix.2d3",                             OK,
 "http://pcengines.ch/alix2d3.htm", NULL),
+       B("PC Engines", "Alix.3c3",                             OK,
 "http://pcengines.ch/alix3c3.htm", NULL),
+       B("PC Engines", "Alix.3d3",                             OK,
 "http://pcengines.ch/alix3d3.htm", NULL),
+       B("PC Engines", "Alix.6f2",                             OK,
 "http://pcengines.ch/alix6f2.htm", NULL),
+       B("PC Engines", "WRAP.2E",                              OK,
 "http://pcengines.ch/wrap2e1.htm", NULL),
+       B("Portwell",   "PEB-4700VLA",                          OK,
 "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA",
NULL),
+       B("RCA",        "RM4100",                               OK,
 "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
+       B("Samsung",    "Polaris 32",                           OK,
 NULL, NULL),
+       B("Shuttle",    "AK31",                                 OK,
 "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
+       B("Shuttle",    "AK38N",                                OK,
 "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/",
NULL),
+       B("Shuttle",    "AV11V30",                              OK,
 NULL, NULL),
+       B("Shuttle",    "AV18E2",                               OK,
 "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
+       B("Shuttle",    "FD37",                                 OK,
 "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/",
NULL),
+       B("Shuttle",    "FH67",                                 OK,
 "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/",
NULL),
+       B("Shuttle",    "FN25",                                 OK,
 "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=",
NULL),
+       B("Shuttle",    "X50/X50(B)",                           OK,
 "http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
+       B("Soyo",       "SY-5VD",                               BAD,
 "http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English",
"No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>.
May work now."),
+       B("Soyo",       "SY-6BA+ III",                          OK,
 "http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
+       B("Soyo",       "SY-7VCA",                              OK,
 "http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html",
NULL),
+       B("Sun",        "Blade x6250",                          OK,
 "http://www.sun.com/servers/blades/x6250/", NULL),
+       B("Sun",        "Fire x4150",                           BAD,
 "http://www.sun.com/servers/x64/x4150/", "No public report found. May
work now."),
+       B("Sun",        "Fire x4200",                           BAD,
 "http://www.sun.com/servers/entry/x4200/", "No public report found.
May work now."),
+       B("Sun",        "Fire x4540",                           BAD,
 "http://www.sun.com/servers/x64/x4540/", "No public report found. May
work now."),
+       B("Sun",        "Fire x4600",                           BAD,
 "http://www.sun.com/servers/x64/x4600/", "No public report found. May
work now."),
+       B("Sun",        "Ultra 40 M2",                          OK,
 "http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html",
NULL),
+       B("Supermicro", "H8QC8",                                OK,
 "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm",
NULL),
+       B("Supermicro", "X5DP8-G2",                             OK,
 "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm",
NULL),
+       B("Supermicro", "X7DBT-INF",                            OK,
 "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm",
NULL),
+       B("Supermicro", "X7SPA-HF",                             OK,
 "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y",
NULL),
+       B("Supermicro", "X8DT3",                                OK,
 "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm",
NULL),
+       B("Supermicro", "X8DTE-F",                              OK,
 "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N",
NULL),
+       B("Supermicro", "X8DTH-6F",                             OK,
 "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm",
NULL),
+       B("Supermicro", "X8DTT-F",                              OK,
 "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm",
NULL),
+       B("Supermicro", "X8DTT-HIBQF",                          OK,
 "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm",
NULL),
+       B("Supermicro", "X8DTU-6TF+",                           BAD,
 "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10",
"Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("Supermicro", "X8DTU-F",                              OK,
 "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm",
NULL),
+       B("Supermicro", "X8SIE(-F)",                            BAD,
 "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2",
"Requires unlocking the ME although the registers are set up correctly
by the descriptor/BIOS already (tested with swseq and hwseq)."),
+       B("Supermicro", "X8STi",                                OK,
 "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm",
NULL),
+       B("Supermicro", "X9SCA-F",                              BAD,
 "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm",
"Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME region
is locked."),
+       B("Supermicro", "X9SCL",                                BAD,
 "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm",
"Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash
are problematic: descriptor is r/o (conforming to ICH reqs), ME region
is locked."),
+       B("T-Online",   "S-100",                                OK,
 "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
+       B("Tekram",     "P6Pro-A5",                             OK,
 "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
+       B("Termtek",    "TK-3370 (Rev:2.5B)",                   OK,
 NULL, NULL),
+       B("Thomson",    "IP1000",                               OK,
 "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
+       B("TriGem",     "Anaheim-3",                            OK,
 "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml",
NULL),
+       B("TriGem",     "Lomita",                               OK,
 "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml",
NULL),
+       B("Tyan",       "S5375-1U (Tempest i5100X)",            OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
+       B("Tyan",       "S1846 (Tsunami ATX)",                  OK,
 "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
+       B("Tyan",       "S2466 (Tiger MPX)",                    OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
+       B("Tyan",       "S2498 (Tomcat K7M)",                   OK,
 "http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
+       B("Tyan",       "S2723 (Tiger i7501)",                  OK,
 "http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
+       B("Tyan",       "S2881 (Thunder K8SR)",                 OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
+       B("Tyan",       "S2882 (Thunder K8S Pro)",              OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
+       B("Tyan",       "S2882-D (Thunder K8SD Pro)",           OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
+       B("Tyan",       "S2891 (Thunder K8SRE)",                OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
+       B("Tyan",       "S2892 (Thunder K8SE)",                 OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
+       B("Tyan",       "S2895 (Thunder K8WE)",                 OK,
 "http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
+       B("Tyan",       "S2912 (Thunder n3600R)",               OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
+       B("Tyan",       "S2915 (Thunder n6650W)",               OK,
 "http://tyan.com/product_board_detail.aspx?pid=163", NULL),
+       B("Tyan",       "S2915-E (Thunder n6650W)",             OK,
 "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041",
NULL),
+       B("Tyan",       "S2933 (Thunder n3600S)",               OK,
 "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063",
NULL),
+       B("Tyan",       "S3095 (Tomcat i945GM)",                OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
+       B("Tyan",       "S3992 (Thunder h2000M)",               OK,
 "http://tyan.com/product_board_detail.aspx?pid=235", NULL),
+       B("Tyan",       "S5180 (Toledo i965R)",                 OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
+       B("Tyan",       "S5191 (Toledo i3000R)",                OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
+       B("Tyan",       "S5197 (Toledo i3010W)",                OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
+       B("Tyan",       "S5211 (Toledo i3210W)",                OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
+       B("Tyan",       "S5211-1U (Toledo i3200R)",             OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
+       B("Tyan",       "S5220 (Toledo q35T)",                  OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
+       B("Tyan",       "S5375 (Tempest i5100X)",               OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
+       B("Tyan",       "S5376 (Tempest i5100W)",               OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=605", "Both
S5376G2NR and S5376WAG2NR should work."),
+       B("Tyan",       "S5377 (Tempest i5100T)",               OK,
 "http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017",
NULL),
+       B("Tyan",       "S5382 (Tempest i5000PW)",              OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
+       B("Tyan",       "S5397 (Tempest i5400PW)",              OK,
 "http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
+       B("VIA",        "EPIA M/MII/...",                       OK,
 "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202",
NULL), /* EPIA-MII link for now */
+       B("VIA",        "EPIA SP",                              OK,
 "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261",
NULL),
+       B("VIA",        "EPIA-CN",                              OK,
 "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400",
NULL),
+       B("VIA",        "EPIA EK",                              OK,
 "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420",
NULL),
+       B("VIA",        "EPIA-EX15000G",                        OK,
 "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450",
NULL),
+       B("VIA",        "EPIA-LN",                              OK,
 "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473",
NULL),
+       B("VIA",        "EPIA-M700",                            OK,
 "http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700",
NULL),
+       B("VIA",        "EPIA-N/NL",                            OK,
 "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221",
NULL), /* EPIA-N link for now */
+       B("VIA",        "EPIA-NX15000G",                        OK,
 "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470",
NULL),
+       B("VIA",        "NAB74X0",                              OK,
 "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590",
NULL),
+       B("VIA",        "pc2500e",                              OK,
 "http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp",
NULL),
+       B("VIA",        "PC3500G",                              OK,
 "http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp",
NULL),
+       B("VIA",        "VB700X",                               OK,
 "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490",
NULL),
+       B("ZOTAC",      "Fusion-ITX WiFi (FUSION350-A-E)",      OK,
 NULL, NULL),
+       B("ZOTAC",      "GeForce 8200",                         OK,
 "http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92",
NULL),
+       B("ZOTAC",      "H67-ITX WiFi (H67ITX-C-E)",            BAD,
 NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("ZOTAC",      "ZBOX HD-ID11",                         OK,
 "http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75",
NULL),
 #endif

        {},
@@ -975,19 +990,19 @@
 /* Please keep this list alphabetically ordered by vendor/board. */
 const struct board_info laptops_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
-       B("Acer",       "Aspire 1520",          1,
"http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml",
NULL),
-       B("Acer",       "Aspire One",           0, NULL,
"http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
-       B("ASUS",       "A8Jm",                 1, NULL, NULL),
-       B("ASUS",       "Eee PC 701 4G",        0,
"http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip
(25X40VSIG) is behind some SPI flash translation layer (likely in the
EC, the ENE KB3310)."),
-       B("ASUS",       "M6Ne",                 0,
"http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/",
"Untested board enable."),
-       B("Clevo",      "P150HM",               0,
"http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307",
"Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
-       B("Dell",       "Latitude CPi A366XT",  0,
"http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop
immediately powers off if you try to hot-swap the chip. It's not yet
tested if write/erase would work on this laptop."),
-       B("HP/Compaq",  "nx9005",               0,
"http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML",
"Shuts down when probing for a chip.
http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
-       B("HP/Compaq",  "nx9010",               0,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514",
"Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
-       B("IBM/Lenovo", "Thinkpad T40p",        0,
"http://www.thinkwiki.org/wiki/Category:T40p", NULL),
-       B("IBM/Lenovo", "Thinkpad T410s",       0,
"http://www.thinkwiki.org/wiki/Category:T410s", "Probing works
(Winbond W25X64, 8192 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME and
platform are locked."),
-       B("IBM/Lenovo", "240",                  0,
"http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially)
work at first, but one block/sector cannot be written which then
leaves you with a bricked laptop. Maybe this can be investigated and
fixed in software later."),
-       B("Lenovo",     "3000 V100 TF05Cxx",    1,
"http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop",
NULL),
+       B("Acer",       "Aspire 1520",          OK,
"http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml",
NULL),
+       B("Acer",       "Aspire One",           BAD,    NULL,
"http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
+       B("ASUS",       "A8Jm",                 OK,     NULL, NULL),
+       B("ASUS",       "Eee PC 701 4G",        BAD,
"http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip
(25X40VSIG) is behind some SPI flash translation layer (likely in the
EC, the ENE KB3310)."),
+       B("ASUS",       "M6Ne",                 NT,
"http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/",
"Untested board enable."),
+       B("Clevo",      "P150HM",               BAD,
"http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307",
"Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the
flash are problematic: descriptor is r/o (conforming to ICH reqs), ME
region is locked."),
+       B("Dell",       "Latitude CPi A366XT",  BAD,
"http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop
immediately powers off if you try to hot-swap the chip. It's not yet
tested if write/erase would work on this laptop."),
+       B("HP/Compaq",  "nx9005",               BAD,
"http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML",
"Shuts down when probing for a chip.
http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
+       B("HP/Compaq",  "nx9010",               BAD,
"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514",
"Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
+       B("IBM/Lenovo", "Thinkpad T40p",        BAD,
"http://www.thinkwiki.org/wiki/Category:T40p", NULL),
+       B("IBM/Lenovo", "Thinkpad T410s",       BAD,
"http://www.thinkwiki.org/wiki/Category:T410s", "Probing works
(Winbond W25X64, 8192 kB, SPI), but parts of the flash are
problematic: descriptor is r/o (conforming to ICH reqs), ME and
platform are locked."),
+       B("IBM/Lenovo", "240",                  BAD,
"http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially)
work at first, but one block/sector cannot be written which then
leaves you with a bricked laptop. Maybe this can be investigated and
fixed in software later."),
+       B("Lenovo",     "3000 V100 TF05Cxx",    OK,
"http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop",
NULL),
 #endif

        {},



2012/2/19 Stefan Tauner <stefan.tauner at student.tuwien.ac.at>:
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
> ?ft2232_spi.c | ? 13 -------
> ?print.c ? ? ?| ? 15 ++++++++
> ?print_wiki.c | ?106 +++++++++++++++++++++++++++++++++++++++++++---------------
> ?3 files changed, 94 insertions(+), 40 deletions(-)
>
> diff --git a/ft2232_spi.c b/ft2232_spi.c
> index 122866f..ec4934e 100644
> --- a/ft2232_spi.c
> +++ b/ft2232_spi.c
> @@ -435,17 +435,4 @@ static int ft2232_spi_send_command(struct flashctx *flash,
> ? ? ? ?return failed ? -1 : 0;
> ?}
>
> -void print_supported_usbdevs(const struct usbdev_status *devs)
> -{
> - ? ? ? int i;
> -
> - ? ? ? msg_pinfo("USB devices:\n");
> - ? ? ? for (i = 0; devs[i].vendor_name != NULL; i++) {
> - ? ? ? ? ? ? ? msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
> - ? ? ? ? ? ? ? ? ? ? ? ? devs[i].device_name, devs[i].vendor_id,
> - ? ? ? ? ? ? ? ? ? ? ? ? devs[i].device_id,
> - ? ? ? ? ? ? ? ? ? ? ? ? (devs[i].status == NT) ? " (untested)" : "");
> - ? ? ? }
> -}
> -
> ?#endif
> diff --git a/print.c b/print.c
> index 1fdeac7..f0c701e 100644
> --- a/print.c
> +++ b/print.c
> @@ -422,6 +422,21 @@ static void print_supported_boards_helper(const struct board_info *boards,
> ?}
> ?#endif
>
> +#if CONFIG_FT2232_SPI == 1
> +void print_supported_usbdevs(const struct usbdev_status *devs)
> +{
> + ? ? ? int i;
> +
> + ? ? ? msg_pinfo("USB devices:\n");
> + ? ? ? for (i = 0; devs[i].vendor_name != NULL; i++) {
> + ? ? ? ? ? ? ? msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
> + ? ? ? ? ? ? ? ? ? ? ? ? devs[i].device_name, devs[i].vendor_id,
> + ? ? ? ? ? ? ? ? ? ? ? ? devs[i].device_id,
> + ? ? ? ? ? ? ? ? ? ? ? ? (devs[i].status == NT) ? " (untested)" : "");
> + ? ? ? }
> +}
> +#endif
> +
> ?void print_supported(void)
> ?{
> ? ? ? ?print_supported_chips();
> diff --git a/print_wiki.c b/print_wiki.c
> index 377154d..a8c9d76 100644
> --- a/print_wiki.c
> +++ b/print_wiki.c
> @@ -72,10 +72,7 @@ static const char chip_th[] = "{\
> ?| Probe\n| Read\n| Erase\n| Write\n\
> ?| align=\"center\" | Min \n| align=\"center\" | Max\n\n";
>
> -static const char programmer_section[] = "\
> -\n== Supported programmers ==\n\nThis is a list \
> -of supported PCI devices flashrom can use as programmer:\n\n{| border=\"0\" \
> -valign=\"top\"\n| valign=\"top\"|\n\n{| border=\"0\" style=\"font-size: \
> +static const char programmer_th[] = "{| border=\"0\" style=\"font-size: \
> ?smaller\" valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\
> ?! align=\"left\" | Device\n! align=\"center\" | PCI IDs\n\
> ?! align=\"center\" | Status\n\n";
> @@ -126,7 +123,7 @@ static void print_supported_chipsets_wiki(int cols)
> ? ? ? ?printf("\n|}\n\n|}\n");
> ?}
>
> -static void wiki_helper(const char *devicetype, int cols,
> +static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
> ? ? ? ? ? ? ? ? ? ? ? ?const struct board_info boards[])
> ?{
> ? ? ? ?int i, j, k = 0, boardcount_good = 0, boardcount_bad = 0, color = 1;
> @@ -199,10 +196,10 @@ static void wiki_helper(const char *devicetype, int cols,
> ?static void print_supported_boards_wiki(void)
> ?{
> ? ? ? ?printf("%s", board_intro);
> - ? ? ? wiki_helper("boards", 2, boards_known);
> + ? ? ? print_supported_boards_wiki_helper("boards", 2, boards_known);
>
> ? ? ? ?printf("%s", laptop_intro);
> - ? ? ? wiki_helper("laptops", 1, laptops_known);
> + ? ? ? print_supported_boards_wiki_helper("laptops", 1, laptops_known);
> ?}
> ?#endif
>
> @@ -276,7 +273,16 @@ static void print_supported_chips_wiki(int cols)
>
> ?/* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */
> ?#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1
> -static void print_supported_pcidevs_wiki(const struct pcidev_status *devs)
> +static int count_supported_pcidevs_wiki(const struct pcidev_status *devs)
> +{
> + ? ? ? int i = 0;
> + ? ? ? unsigned int count = 0;
> + ? ? ? for (i = 0; devs[i].vendor_name != NULL; i++)
> + ? ? ? ? ? ? ? ? ? ? ? count++;
> + ? ? ? return count;
> +}
> +
> +static void print_supported_pcidevs_wiki_helper(const struct pcidev_status *devs)
> ?{
> ? ? ? ?int i = 0;
> ? ? ? ?static int c = 0;
> @@ -294,50 +300,96 @@ static void print_supported_pcidevs_wiki(const struct pcidev_status *devs)
> ?}
> ?#endif
>
> -void print_supported_wiki(void)
> +static void print_supported_pcidevs_wiki()
> ?{
> - ? ? ? time_t t = time(NULL);
> + ? ? ? unsigned int pci_count = 0;
>
> - ? ? ? printf(wiki_header, ctime(&t), flashrom_version);
> - ? ? ? print_supported_chips_wiki(2);
> -#if CONFIG_INTERNAL == 1
> - ? ? ? print_supported_chipsets_wiki(3);
> - ? ? ? print_supported_boards_wiki();
> +#if CONFIG_NIC3COM == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(nics_3com);
> +#endif
> +#if CONFIG_NICREALTEK == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(nics_realtek);
> +#endif
> +#if CONFIG_NICNATSEMI == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(nics_natsemi);
> +#endif
> +#if CONFIG_GFXNVIDIA == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(gfx_nvidia);
> +#endif
> +#if CONFIG_DRKAISER == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(drkaiser_pcidev);
> +#endif
> +#if CONFIG_SATASII == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(satas_sii);
> +#endif
> +#if CONFIG_ATAHPT == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(ata_hpt);
> +#endif
> +#if CONFIG_NICINTEL == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(nics_intel);
> +#endif
> +#if CONFIG_NICINTEL_SPI == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(nics_intel_spi);
> +#endif
> +#if CONFIG_OGP_SPI == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(ogp_spi);
> +#endif
> +#if CONFIG_SATAMV == 1
> + ? ? ? pci_count += count_supported_pcidevs_wiki(satas_mv);
> ?#endif
> - ? ? ? printf("%s", programmer_section);
> +
> + ? ? ? printf("\n== Supported programmers ==\n\nTotal amount of supported "
> + ? ? ? ? ? ? ?"PCI devices flashrom can use as programmer: '''%d'''\n\n"
> + ? ? ? ? ? ? ?"{| border=\"0\" valign=\"top\"\n| valign=\"top\"|\n\n",
> + ? ? ? ? ? ? ?pci_count);
> + ? ? ? printf("%s", programmer_th);
> +
> ?#if CONFIG_NIC3COM == 1
> - ? ? ? print_supported_pcidevs_wiki(nics_3com);
> + ? ? ? print_supported_pcidevs_wiki_helper(nics_3com);
> ?#endif
> ?#if CONFIG_NICREALTEK == 1
> - ? ? ? print_supported_pcidevs_wiki(nics_realtek);
> + ? ? ? print_supported_pcidevs_wiki_helper(nics_realtek);
> ?#endif
> ?#if CONFIG_NICNATSEMI == 1
> - ? ? ? print_supported_pcidevs_wiki(nics_natsemi);
> + ? ? ? print_supported_pcidevs_wiki_helper(nics_natsemi);
> ?#endif
> ?#if CONFIG_GFXNVIDIA == 1
> - ? ? ? print_supported_pcidevs_wiki(gfx_nvidia);
> + ? ? ? print_supported_pcidevs_wiki_helper(gfx_nvidia);
> ?#endif
> ?#if CONFIG_DRKAISER == 1
> - ? ? ? print_supported_pcidevs_wiki(drkaiser_pcidev);
> + ? ? ? print_supported_pcidevs_wiki_helper(drkaiser_pcidev);
> ?#endif
> ?#if CONFIG_SATASII == 1
> - ? ? ? print_supported_pcidevs_wiki(satas_sii);
> + ? ? ? print_supported_pcidevs_wiki_helper(satas_sii);
> ?#endif
> ?#if CONFIG_ATAHPT == 1
> - ? ? ? print_supported_pcidevs_wiki(ata_hpt);
> + ? ? ? print_supported_pcidevs_wiki_helper(ata_hpt);
> ?#endif
> ?#if CONFIG_NICINTEL == 1
> - ? ? ? print_supported_pcidevs_wiki(nics_intel);
> + ? ? ? print_supported_pcidevs_wiki_helper(nics_intel);
> ?#endif
> ?#if CONFIG_NICINTEL_SPI == 1
> - ? ? ? print_supported_pcidevs_wiki(nics_intel_spi);
> + ? ? ? print_supported_pcidevs_wiki_helper(nics_intel_spi);
> ?#endif
> ?#if CONFIG_OGP_SPI == 1
> - ? ? ? print_supported_pcidevs_wiki(ogp_spi);
> + ? ? ? print_supported_pcidevs_wiki_helper(ogp_spi);
> ?#endif
> ?#if CONFIG_SATAMV == 1
> - ? ? ? print_supported_pcidevs_wiki(satas_mv);
> + ? ? ? print_supported_pcidevs_wiki_helper(satas_mv);
> ?#endif
> ? ? ? ?printf("\n|}\n");
> ?}
>
> +void print_supported_wiki(void)
> +{
> + ? ? ? time_t t = time(NULL);
> +
> + ? ? ? printf(wiki_header, ctime(&t), flashrom_version);
> + ? ? ? print_supported_chips_wiki(2);
> +#if CONFIG_INTERNAL == 1
> + ? ? ? print_supported_chipsets_wiki(3);
> + ? ? ? print_supported_boards_wiki();
> +#endif
> + ? ? ? print_supported_pcidevs_wiki();
> +}
> +
> --
> 1.7.1
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom


From stefan.tauner at student.tuwien.ac.at  Mon Feb 20 19:31:23 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 20 Feb 2012 19:31:23 +0100
Subject: [flashrom] [PATCH 2/5] Introduce and use enum test_state
In-Reply-To: <CAPp9OrkjCg-pEEvhgDHZfoZYRO7zWFuKYan6LyNoBk8qWAL2ww@mail.gmail.com>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329683217-31150-3-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<CAPp9OrkjCg-pEEvhgDHZfoZYRO7zWFuKYan6LyNoBk8qWAL2ww@mail.gmail.com>
Message-ID: <201202201830.q1KIUVFI018280@mail2.student.tuwien.ac.at>

On Mon, 20 Feb 2012 18:17:58 +0100
Idwer Vollering <vidwer at gmail.com> wrote:

> > -#define OK 0
> > -#define NT 1 ? ?/* Not tested */
> > +enum test_state {
> > + ? ? ? OK = 0,
> > + ? ? ? NT = 1, /* Not tested */
> > + ? ? ? BAD  
> 
> BAD = -1 ?

i would prefer to leave it undefined. one point of using enums is to be
implementation-agnostic. the other values are only forced to 0/1 to not
break previously existing stuff, that relies on the values.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From vidwer at gmail.com  Mon Feb 20 19:49:06 2012
From: vidwer at gmail.com (Idwer Vollering)
Date: Mon, 20 Feb 2012 19:49:06 +0100
Subject: [flashrom] [PATCH 7/8] check if write enable is really set in
 nicintel_spi_init (and minor comment changes).
In-Reply-To: <24e35011e614961584ddaca4f32fa85e448ee57f.1300202693.git.stefan.tauner@student.tuwien.ac.at>
References: <cover.1300202693.git.stefan.tauner@student.tuwien.ac.at>
	<24e35011e614961584ddaca4f32fa85e448ee57f.1300202693.git.stefan.tauner@student.tuwien.ac.at>
Message-ID: <CAPp9Or=pNbhjQ1=xMvtBtCieBRtEL_8hA8rqDk+447_Fsc1JXg@mail.gmail.com>

2011/3/15 Stefan Tauner <stefan.tauner at student.tuwien.ac.at>:
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Adding "pci_mmio_writel(FLASH_WRITES_DISABLED, nicintel_spibar +
EECD);" right after the usage of register_shutdown() works as it
should:

Initializing nicintel_spi programmer
Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:01.0).
Requested BAR is MEM, 32bit, not prefetchable
Enabling flash write access failed.
Error: Programmer initialization failed.

Acked-by: Idwer Vollering <vidwer at gmail.com>

> ---
> ?nicintel_spi.c | ? 15 +++++++++++++--
> ?1 files changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/nicintel_spi.c b/nicintel_spi.c
> index 811ed6e..88d86af 100644
> --- a/nicintel_spi.c
> +++ b/nicintel_spi.c
> @@ -34,11 +34,14 @@
>
> ?#define MEMMAP_SIZE getpagesize()
>
> +/* EEPROM/Flash Control & Data Register */
> ?#define EECD ? 0x10
> +/* Flash Access Register */
> ?#define FLA ? ?0x1c
>
> ?/*
> ?* Register bits of EECD.
> + * Table 13-6
> ?*
> ?* Bit 04, 05: FWE (Flash Write Enable Control)
> ?* 00b = not allowed
> @@ -49,8 +52,9 @@
> ?#define FLASH_WRITES_DISABLED ?0x10 /* FWE: 10000b */
> ?#define FLASH_WRITES_ENABLED ? 0x20 /* FWE: 100000b */
>
> -/* Flash Access register bits */
> -/* Table 13-9 */
> +/* Flash Access register bits
> + * Table 13-9
> + */
> ?#define FL_SCK 0
> ?#define FL_CS ?1
> ?#define FL_SI ?2
> @@ -157,6 +161,13 @@ int nicintel_spi_init(void)
> ? ? ? ?tmp |= FLASH_WRITES_ENABLED;
> ? ? ? ?pci_mmio_writel(tmp, nicintel_spibar + EECD);
>
> + ? ? ? /* test if FWE is really set to allow writes */
> + ? ? ? tmp = pci_mmio_readl(nicintel_spibar + EECD);
> + ? ? ? if ( (tmp & FLASH_WRITES_DISABLED) || !(tmp & FLASH_WRITES_ENABLED) ) {
> + ? ? ? ? ? ? ? msg_perr("Enabling flash write access failed.\n");
> + ? ? ? ? ? ? ? return 1;
> + ? ? ? }
> +
> ? ? ? ?/* 1 usec halfperiod delay for now. */
> ? ? ? ?if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1))
> ? ? ? ? ? ? ? ?return 1;
> --
> 1.7.1
>
>
> _______________________________________________
> flashrom mailing list
> flashrom at flashrom.org
> http://www.flashrom.org/mailman/listinfo/flashrom


From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb 20 19:49:38 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 20 Feb 2012 19:49:38 +0100
Subject: [flashrom] [PATCH] dummyflasher.c: add support for SFDP by
 adding a new emulator chip: W25Q64CV
In-Reply-To: <1329754065-11954-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329754065-11954-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F4295C2.6070909@gmx.net>

Am 20.02.2012 17:07 schrieb Stefan Tauner:
> TODO:
>  - how should the SFDP data be supplied/selected by the user?
>    - option A (suggested one): add a default table with a legit complete table

Good idea.

>      and a programmer option to use a binary file instead.

I think having the file+builtin combination is overkill. Builtin should
be sufficient, unless you plan to focus more on making flashrom a
verification tool for flash vendors.

>  - Manpage
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
>  dummyflasher.c |   90 +++++++++++++++++++++++++++++++++++++++++++++++++++-----
>  1 files changed, 82 insertions(+), 8 deletions(-)
>
> diff --git a/dummyflasher.c b/dummyflasher.c
> index afe0518..6d8b9a2 100644
> --- a/dummyflasher.c
> +++ b/dummyflasher.c
> @@ -45,6 +45,7 @@ enum emu_chip {
>  	EMULATE_ST_M25P10_RES,
>  	EMULATE_SST_SST25VF040_REMS,
>  	EMULATE_SST_SST25VF032B,
> +	EMULATE_WINBOND_W25Q64CV,
>  };
>  static enum emu_chip emu_chip = EMULATE_NONE;
>  static char *emu_persistent_image = NULL;
> @@ -61,6 +62,40 @@ unsigned char spi_blacklist[256];
>  unsigned char spi_ignorelist[256];
>  int spi_blacklist_size = 0;
>  int spi_ignorelist_size = 0;
> +
> +/* legit intel version */
> +/*
> +static const uint8_t const sfdp_table[256] = {
> +	0x53, 0x46, 0x44, 0x50, // @0x00
> +	0x00, 0x01, 0x00, 0xFF, // @0x04
> +	0x00, 0x00, 0x01, 0x04, // @0x08: len = 4 instead of 9
> +	0x14, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x14 instead of 0x80
> +	0xFF, 0xFF, 0xFF, 0xFF, // @0x10
> +	0xE5, 0x20, 0xF1, 0xFF, // @0x14
> +	0xFF, 0xFF, 0xFF, 0x03, // @0x18
> +	0x44, 0xEB, 0x08, 0x6B, // @0x1C
> +	0x08, 0x3B, 0x80, 0xBB, // @0x20
> +	
> +};
> +*/
> +/* legit complete table */
> +static const uint8_t const sfdp_table[256] = {
> +	0x53, 0x46, 0x44, 0x50, // @0x00
> +	0x00, 0x01, 0x00, 0xFF, // @0x04
> +	0x00, 0x00, 0x01, 0x09, // @0x08
> +	0x14, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x14 instead of 0x80
> +	0xFF, 0xFF, 0xFF, 0xFF, // @0x10
> +	0xE5, 0x20, 0xF1, 0xFF, // @0x14
> +	0xFF, 0xFF, 0xFF, 0x03, // @0x18
> +	0x44, 0xEB, 0x08, 0x6B, // @0x1C
> +	0x08, 0x3B, 0x80, 0xBB, // @0x20
> +	0xEE, 0xFF, 0xFF, 0xFF, // @0x24
> +	0xFF, 0xFF, 0x00, 0x00, // @0x28
> +	0xFF, 0xFF, 0x00, 0x00, // @0x2C
> +	0x0C, 0x20, 0x0F, 0x52, // @0x30
> +	0x10, 0xD8, 0x00, 0x00, // @0x34
> +};
> +
>  #endif
>  #endif
>  
> @@ -296,6 +331,19 @@ int dummy_init(void)
>  		msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "
>  			 "write)\n");
>  	}
> +	if (!strcmp(tmp, "W25Q64CV")) {
> +		emu_chip = EMULATE_WINBOND_W25Q64CV;
> +		emu_chip_size = 8 * 1024 * 1024;
> +		emu_max_byteprogram_size = 256;
> +		emu_max_aai_size = 0;
> +		emu_jedec_se_size = 4 * 1024;
> +		emu_jedec_be_52_size = 32 * 1024;
> +		emu_jedec_be_d8_size = 64 * 1024;
> +		emu_jedec_ce_60_size = emu_chip_size;
> +		emu_jedec_ce_c7_size = emu_chip_size;
> +		msg_pdbg("Emulating Winbond W25Q64CV SPI flash chip (RDID, "
> +			 "SFDP)\n");
> +	}
>  #endif
>  	if (emu_chip == EMULATE_NONE) {
>  		msg_perr("Invalid chip specified for emulation: %s\n", tmp);
> @@ -471,15 +519,26 @@ static int emulate_spi_chip_response(unsigned int writecnt,
>  			readarr[1] = 0x44;
>  		break;
>  	case JEDEC_RDID:
> -		if (emu_chip != EMULATE_SST_SST25VF032B)
> +		switch (emu_chip) {
> +		case EMULATE_SST_SST25VF032B:
> +			if (readcnt > 0)
> +				readarr[0] = 0xbf;
> +			if (readcnt > 1)
> +				readarr[1] = 0x25;
> +			if (readcnt > 2)
> +				readarr[2] = 0x4a;
>  			break;
> -		/* Respond with SST_SST25VF032B. */
> -		if (readcnt > 0)
> -			readarr[0] = 0xbf;
> -		if (readcnt > 1)
> -			readarr[1] = 0x25;
> -		if (readcnt > 2)
> -			readarr[2] = 0x4a;
> +		case EMULATE_WINBOND_W25Q64CV:
> +			if (readcnt > 0)
> +				readarr[0] = 0xef;
> +			if (readcnt > 1)
> +				readarr[1] = 0x40;
> +			if (readcnt > 2)
> +				readarr[2] = 0x17;
> +			break;
> +		default: /* ignore */
> +			break;
> +		}
>  		break;
>  	case JEDEC_RDSR:
>  		memset(readarr, 0, readcnt);
> @@ -629,6 +688,20 @@ static int emulate_spi_chip_response(unsigned int writecnt,
>  		/* emu_jedec_ce_c7_size is emu_chip_size. */
>  		memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size);
>  		break;
> +	case JEDEC_SFDP:
> +		if (emu_chip != EMULATE_WINBOND_W25Q64CV)
> +			break;
> +		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
> +		/*
> +		 * FIXME: There is one dummy byte (i.e. 8 clock cycles) to be
> +		 * transferred after the address. Since we can not observe the
> +		 * clock, we would need to check for appropriate writecnt and/or
> +		 * readcnt and recalculate the parameters below.
> +		 */
> +		/* FIXME: this could be more sophisticated. */
> +		memcpy(readarr, sfdp_table + offs,
> +		       min(sizeof(sfdp_table) - offs, readcnt));

That memcpy will segfault if offs>sizeof(sfdp_table). Suggestion:
Replace the whole case statement with this (some 80 col reformatting may
be needed):

	case JEDEC_SFDP:
		int toread;
		if (emu_chip != EMULATE_WINBOND_W25Q64CV)
			break;
		if (writecnt < 4)
			break;
		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
		/* The response is shifted if more than 4 bytes are written. */
		offs += writecnt - 4;
		/* The SFDP spec suggests wraparound is allowed. */
		offs %= sizeof(sfdp_table);
		toread = min(sizeof(sfdp_table) - offs, readcnt);
		memcpy(readarr, sfdp_table + offs, toread);
		if (toread < readcnt)
			memcpy(readarr + toread, sfdp_table,
			       min(sizeof(sfdp_table),readcnt - toread));
		if (readcnt - toread > sizeof(sfdp_table))
			msg_pdbg("Reading more than SFDP table size in one "
				 "chunk, contents may be incomplete.\n"); 


> +		break;
>  	default:
>  		/* No special response. */
>  		break;
> @@ -657,6 +730,7 @@ static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
>  	case EMULATE_ST_M25P10_RES:
>  	case EMULATE_SST_SST25VF040_REMS:
>  	case EMULATE_SST_SST25VF032B:
> +	case EMULATE_WINBOND_W25Q64CV:
>  		if (emulate_spi_chip_response(writecnt, readcnt, writearr,
>  					      readarr)) {
>  			msg_pdbg("Invalid command sent to flash chip!\n");

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb 20 21:38:52 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 20 Feb 2012 21:38:52 +0100
Subject: [flashrom] [PATCH] Fix sfdp_add_uniform_eraser and its usage.
In-Reply-To: <1329678314-28564-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329610464-13264-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329678314-28564-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F42AF5C.3070508@gmx.net>

Am 19.02.2012 20:05 schrieb Stefan Tauner:
> sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it looked for
> eraser slots that have no erase functions set instead of those that have one set.
>
> Also, the special 4k opcode encoded in the first double word was tried to add
> with sfdp_add_uniform_eraser

-ENOPARSE

> although the total size of the chip was not yet
> known. This is now postponed and an additional check to sfdp_add_uniform_eraser
> is added.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
> this is the last fixup combined with what is described in the second half
> of the commit log above.
>
>  sfdp.c |   18 +++++++++++++-----
>  1 files changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/sfdp.c b/sfdp.c
> index 75dfb5f..80faeca 100644
> --- a/sfdp.c
> +++ b/sfdp.c
> @@ -78,8 +78,10 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
>  	uint32_t total_size = flash->total_size * 1024;
>  	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
>  
> -	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
> -		msg_cdbg("%s: invalid input\n", __func__);
> +	if (erasefn == NULL || total_size == 0 || block_size == 0 ||
> +	    total_size % block_size != 0) {
> +		msg_cdbg("%s: invalid input, please report to "
> +			 "flashrom at flashrom.org\n", __func__);
>  		return 1;
>  	}
>  
> @@ -89,11 +91,12 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
>  		if (eraser->eraseblocks[0].size == block_size &&
>  		    eraser->block_erase == erasefn) {
>  			msg_cdbg2("  Tried to add a duplicate block eraser: "
> -				  "%d x %d B with opcode 0x%02x\n",
> +				  "%d x %d B with opcode 0x%02x.\n",
>  				  total_size/block_size, block_size, opcode);
>  			return 1;
>  		}
> -		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
> +		if (eraser->eraseblocks[0].size != 0 ||
> +		    eraser->block_erase != NULL) {
>  			msg_cspew("  Block Eraser %d is already occupied.\n",
>  				  i);
>  			continue;
> @@ -115,6 +118,7 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
>  
>  static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
>  {
> +	uint8_t opcode_4k = 0xFF;

rename to opcode_4k_erase?


>  	uint32_t tmp32;
>  	uint8_t tmp8;
>  	uint32_t total_size; /* in bytes */
> @@ -181,7 +185,8 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
>  	}
>  
>  	if ((tmp32 & 0x3) == 0x1) {
> -		sfdp_add_uniform_eraser(flash, (tmp32 >> 8) & 0xFF, 4 * 1024);
> +		/* add the eraser later, because we don't know total_size yet */
> +		opcode_4k = (tmp32 >> 8) & 0xFF;
>  	}
>  
>  	/* 2. double word */
> @@ -204,6 +209,9 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
>  		return 1;
>  	}
>  
> +	if (opcode_4k != 0xFF)
> +		sfdp_add_uniform_eraser(flash, opcode_4k, 4 * 1024);
> +
>  	/* FIXME: double words 3-7 contain unused fast read information */
>  
>  	if (len == 4 * 4) {

How well-tested is this? I'd rather not have a fixup for the fixup.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Mon Feb 20 22:29:02 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 20 Feb 2012 22:29:02 +0100
Subject: [flashrom] [PATCH] Fix sfdp_add_uniform_eraser and its usage.
In-Reply-To: <4F42AF5C.3070508@gmx.net>
References: <4F42AF5C.3070508@gmx.net>
Message-ID: <1329773342-14828-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
looked for eraser slots that have no erase functions set instead of
those that have one set.

Postpone adding an erase function for the special 4k block erase
opcode until we know the flash chip size and add an additional check
to sfdp_add_uniform_eraser.
 # This is the 2nd commit message:

Fix the output of the parameter table contents.

This patch fixes the index used to retrieve the eraser types, which
was off one double word.

Refine some messages and add a few further debugging prints.

---
has been tested with the new emulator to be able to write successfully
and also handle some error cases as expected.

-VV output:
Probing for Unknown SFDP-capable chip, 0 kB: SFDP revision = 1.0
SFDP number of parameter headers is 1 (NPH = 0).

SFDP parameter table header 0/0:
  ID 0x00, version 1.0
  Length 36 B, Parameter Table Pointer 0x000014
Parsing JEDEC flash parameter table...
  3-Byte only addressing.
  Status register is non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR.
  Write chunk size is at least 64 B.
  Flash chip size is 8192 kB.
  Block eraser 0: 2048 x 4096 B with opcode 0x20
  Tried to add a duplicate block eraser: 2048 x 4096 B with opcode 0x20.
  Block eraser 1: 256 x 32768 B with opcode 0x52
  Block eraser 2: 128 x 65536 B with opcode 0xd8
done.

-VVV:
Probing for Unknown SFDP-capable chip, 0 kB: dummy_map: Mapping flash chip, 0x0 bytes at 0x00000000
spi_sfdp_read_sfdp_chunk: addr=0x0, len=4, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x00 0x00 reading 4 bytes: 0x53 0x46 0x44 0x50
 0x53 0x46 0x44 0x50
spi_sfdp_read_sfdp_chunk: addr=0x4, len=3, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x04 0x00 reading 3 bytes: 0x00 0x01 0x00
 0x00 0x01 0x00
SFDP revision = 1.0
SFDP number of parameter headers is 1 (NPH = 0).
spi_sfdp_read_sfdp_chunk: addr=0x8, len=8, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x08 0x00 reading 8 bytes: 0x00 0x00 0x01 0x09 0x14 0x00 0x00 0xff
 0x00 0x00 0x01 0x09 0x14 0x00 0x00 0xff

SFDP parameter table header 0/0:
  ID 0x00, version 1.0
  Length 36 B, Parameter Table Pointer 0x000014
spi_sfdp_read_sfdp_chunk: addr=0x14, len=8, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x14 0x00 reading 8 bytes: 0xe5 0x20 0xf1 0xff 0xff 0xff 0xff 0x03
 0xe5 0x20 0xf1 0xff 0xff 0xff 0xff 0x03
spi_sfdp_read_sfdp_chunk: addr=0x1c, len=8, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x1c 0x00 reading 8 bytes: 0x44 0xeb 0x08 0x6b 0x08 0x3b 0x80 0xbb
 0x44 0xeb 0x08 0x6b 0x08 0x3b 0x80 0xbb
spi_sfdp_read_sfdp_chunk: addr=0x24, len=8, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x24 0x00 reading 8 bytes: 0xee 0xff 0xff 0xff 0xff 0xff 0x00 0x00
 0xee 0xff 0xff 0xff 0xff 0xff 0x00 0x00
spi_sfdp_read_sfdp_chunk: addr=0x2c, len=8, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x2c 0x00 reading 8 bytes: 0xff 0xff 0x00 0x00 0x0c 0x20 0x0f 0x52
 0xff 0xff 0x00 0x00 0x0c 0x20 0x0f 0x52
spi_sfdp_read_sfdp_chunk: addr=0x34, len=4, data:
dummy_spi_send_command: writing 5 bytes: 0x5a 0x00 0x00 0x34 0x00 reading 4 bytes: 0x10 0xd8 0x00 0x00
 0x10 0xd8 0x00 0x00
  Parameter table contents:
    0x0000:  e5 20 f1 ff  ff ff ff 03
    0x0008:  44 eb 08 6b  08 3b 80 bb
    0x0010:  ee ff ff ff  ff ff 00 00
    0x0018:  ff ff 00 00  0c 20 0f 52
    0x0020:  10 d8 00 00
Parsing JEDEC flash parameter table...
  3-Byte only addressing.
  Status register is non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR.
  Write chunk size is at least 64 B.
  4kB erase opcode is 0x20.
  Flash chip size is 8192 kB.
  Block eraser 0: 2048 x 4096 B with opcode 0x20
   Sector Type 1 Size: 0x0c
   Sector Type 1 Opcode: 0x20
  Tried to add a duplicate block eraser: 2048 x 4096 B with opcode 0x20.
   Sector Type 2 Size: 0x0f
   Sector Type 2 Opcode: 0x52
  Block Eraser 0 is already occupied.
  Block eraser 1: 256 x 32768 B with opcode 0x52
   Sector Type 3 Size: 0x10
   Sector Type 3 Opcode: 0xd8
  Block Eraser 0 is already occupied.
  Block Eraser 1 is already occupied.
  Block eraser 2: 128 x 65536 B with opcode 0xd8
   Sector Type 4 Size: 0x00
  Sector Type 3 is unused.
done.
===
SFDP has autodetected a flash chip which is not natively supported by flashrom yet.
All standard operations (read, verify, erase and write) should work, but to support all possible features we need to add them manually.
You can help us by mailing us the output of the following command to flashrom at flashrom.org:
'flashrom -VV [plus the -p/--programmer parameter (if needed)]'
Thanks for your help!
===
Found Unknown flash chip "SFDP-capable chip" (8192 kB, SPI) on dummy.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 sfdp.c |   38 ++++++++++++++++++++++++++------------
 1 files changed, 26 insertions(+), 12 deletions(-)

diff --git a/sfdp.c b/sfdp.c
index 75dfb5f..e1897c7 100644
--- a/sfdp.c
+++ b/sfdp.c
@@ -78,8 +78,10 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 	uint32_t total_size = flash->total_size * 1024;
 	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
 
-	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
-		msg_cdbg("%s: invalid input\n", __func__);
+	if (erasefn == NULL || total_size == 0 || block_size == 0 ||
+	    total_size % block_size != 0) {
+		msg_cdbg("%s: invalid input, please report to "
+			 "flashrom at flashrom.org\n", __func__);
 		return 1;
 	}
 
@@ -89,11 +91,12 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 		if (eraser->eraseblocks[0].size == block_size &&
 		    eraser->block_erase == erasefn) {
 			msg_cdbg2("  Tried to add a duplicate block eraser: "
-				  "%d x %d B with opcode 0x%02x\n",
+				  "%d x %d B with opcode 0x%02x.\n",
 				  total_size/block_size, block_size, opcode);
 			return 1;
 		}
-		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
+		if (eraser->eraseblocks[0].size != 0 ||
+		    eraser->block_erase != NULL) {
 			msg_cspew("  Block Eraser %d is already occupied.\n",
 				  i);
 			continue;
@@ -115,6 +118,7 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 
 static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 {
+	uint8_t opcode_4k_erase = 0xFF;
 	uint32_t tmp32;
 	uint8_t tmp8;
 	uint32_t total_size; /* in bytes */
@@ -181,8 +185,11 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 	}
 
 	if ((tmp32 & 0x3) == 0x1) {
-		sfdp_add_uniform_eraser(flash, (tmp32 >> 8) & 0xFF, 4 * 1024);
-	}
+		opcode_4k_erase = (tmp32 >> 8) & 0xFF;
+		msg_cspew("  4kB erase opcode is 0x%02x.\n", opcode_4k_erase);
+		/* add the eraser later, because we don't know total_size yet */
+	} else
+		msg_cspew("  4kB erase opcode is not defined.\n");
 
 	/* 2. double word */
 	dw = 1;
@@ -204,6 +211,9 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 		return 1;
 	}
 
+	if (opcode_4k_erase != 0xFF)
+		sfdp_add_uniform_eraser(flash, opcode_4k_erase, 4 * 1024);
+
 	/* FIXME: double words 3-7 contain unused fast read information */
 
 	if (len == 4 * 4) {
@@ -213,22 +223,25 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 		goto done;
 	}
 
-	dw = 8;
+	/* 8. double word */
+	dw = 7;
 	for (j = 0; j < 4; j++) {
-		/* 8 double words from the start + 2 words for every eraser */
+		/* 8 double words from the start + 2 bytes for every eraser */
 		tmp8 = buf[(4 * dw) + (2 * j)];
+		msg_cspew("   Sector Type %d Size: 0x%02x\n", j + 1, tmp8);
 		if (tmp8 == 0) {
-			msg_cdbg2("  Block eraser %d is unused.\n", j);
+			msg_cspew("  Sector Type %d is unused.\n", j);
 			continue;
 		}
 		if (tmp8 >= 31) {
-			msg_cdbg2("  Block size of eraser %d (2^%d) is too big "
-				  "for flashrom.\n", j, tmp8);
+			msg_cspew("  Block size of Sector Type %d (2^%d) is "
+				  "too big for flashrom.\n", j, tmp8);
 			continue;
 		}
 		block_size = 1 << (tmp8); /* block_size = 2 ^ field */
 
 		tmp8 = buf[(4 * dw) + (2 * j) + 1];
+		msg_cspew("   Sector Type %d Opcode: 0x%02x\n", j + 1, tmp8);
 		sfdp_add_uniform_eraser(flash, tmp8, block_size);
 	}
 
@@ -332,7 +345,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 			if ((tmp32 % 8) == 0) {
 				msg_cspew("    0x%04x: ", tmp32);
 			}
-			msg_cspew(" %02x", buf[tmp32]);
+			msg_cspew(" %02x", tbuf[tmp32]);
 			if ((tmp32 % 8) == 7) {
 				msg_cspew("\n");
 				continue;
@@ -342,6 +355,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 				continue;
 			}
 		}
+		msg_cspew("\n");
 
 		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
 			if (hdrs[i].id != 0)
-- 
1.7.1



From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb 21 14:51:38 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 21 Feb 2012 14:51:38 +0100
Subject: [flashrom] [PATCH] Fix sfdp_add_uniform_eraser and its usage.
In-Reply-To: <1329773342-14828-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <4F42AF5C.3070508@gmx.net>
	<1329773342-14828-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F43A16A.3020907@gmx.net>

Please use "Fix SFDP probing" as commit message headline and commit the
whole batch of SFDP bugfixes in one commit once the patch is fixed.

Am 20.02.2012 22:29 schrieb Stefan Tauner:
> sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
> looked for eraser slots that have no erase functions set instead of
> those that have one set.
>
> Postpone adding an erase function for the special 4k block erase
> opcode until we know the flash chip size.
> Check for zero chip size in sfdp_add_uniform_eraser.
>
> Fix the output of the parameter table contents.
>
> This patch fixes the index used to retrieve the eraser types, which
> was off one double word.

For me it looks like this part of the patch introduced a new bug.


> Refine some messages and add a few further debugging prints.
>
> ---
> has been tested with the new emulator to be able to write successfully
> and also handle some error cases as expected.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> ---
>  sfdp.c |   38 ++++++++++++++++++++++++++------------
>  1 files changed, 26 insertions(+), 12 deletions(-)
>
> diff --git a/sfdp.c b/sfdp.c
> index 75dfb5f..e1897c7 100644
> --- a/sfdp.c
> +++ b/sfdp.c
> @@ -213,22 +223,25 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
>  		goto done;
>  	}
>  
> -	dw = 8;
> +	/* 8. double word */
> +	dw = 7;
>  	for (j = 0; j < 4; j++) {
> -		/* 8 double words from the start + 2 words for every eraser */
> +		/* 8 double words from the start + 2 bytes for every eraser */
>  		tmp8 = buf[(4 * dw) + (2 * j)];

8 double words from the start is 32 bytes from the start. Last time I
checked, 7*4 was not 32.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Tue Feb 21 18:04:21 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 21 Feb 2012 18:04:21 +0100
Subject: [flashrom] [PATCH] Fix sfdp_add_uniform_eraser and its usage.
In-Reply-To: <4F43A16A.3020907@gmx.net>
References: <4F42AF5C.3070508@gmx.net>
	<1329773342-14828-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F43A16A.3020907@gmx.net>
Message-ID: <201202211703.q1LH3V68013112@mail2.student.tuwien.ac.at>

On Tue, 21 Feb 2012 14:51:38 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Please use "Fix SFDP probing" as commit message headline and commit the
> whole batch of SFDP bugfixes in one commit once the patch is fixed.
> 
> Am 20.02.2012 22:29 schrieb Stefan Tauner:
> > sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
> > looked for eraser slots that have no erase functions set instead of
> > those that have one set.
> >
> > Postpone adding an erase function for the special 4k block erase
> > opcode until we know the flash chip size.
> > Check for zero chip size in sfdp_add_uniform_eraser.
> >
> > Fix the output of the parameter table contents.
> >
> > This patch fixes the index used to retrieve the eraser types, which
> > was off one double word.
> 
> For me it looks like this part of the patch introduced a new bug.
> 
> > -	dw = 8;
> > +	/* 8. double word */
> > +	dw = 7;
> >  	for (j = 0; j < 4; j++) {
> > -		/* 8 double words from the start + 2 words for every eraser */
> > +		/* 8 double words from the start + 2 bytes for every eraser */
> >  		tmp8 = buf[(4 * dw) + (2 * j)];
> 
> 8 double words from the start is 32 bytes from the start. Last time I
> checked, 7*4 was not 32.

Xth dw starts at (x - 1) * 4 because they start from offset 0 with the
*first* dw.
the second dw starts at (2 - 1) * 4 = 4,
3rd at (3 - 1) * 4 = 8,
?

that mistake was exactly what haunted me back then apparently. :)

the standard talks about (1-based) Xth double words, so i kept that
nomenclature, but used a 0-based offset (dw). we could leave the
existing solution, change the nomenclature (bad idea imho) or use
1-based offsets and subtract 1 before using them... no ideal solution
available imo.
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Tue Feb 21 22:08:37 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Tue, 21 Feb 2012 22:08:37 +0100
Subject: [flashrom] [PATCH] Fix sfdp_add_uniform_eraser and its usage.
In-Reply-To: <201202211703.q1LH3V68013112@mail2.student.tuwien.ac.at>
References: <4F42AF5C.3070508@gmx.net>
	<1329773342-14828-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F43A16A.3020907@gmx.net>
	<201202211703.q1LH3V68013112@mail2.student.tuwien.ac.at>
Message-ID: <4F4407D5.9010604@gmx.net>

Am 21.02.2012 18:04 schrieb Stefan Tauner:
> On Tue, 21 Feb 2012 14:51:38 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> Please use "Fix SFDP probing" as commit message headline and commit the
>> whole batch of SFDP bugfixes in one commit once the patch is fixed.
>>
>> Am 20.02.2012 22:29 schrieb Stefan Tauner:
>>> sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
>>> looked for eraser slots that have no erase functions set instead of
>>> those that have one set.
>>>
>>> Postpone adding an erase function for the special 4k block erase
>>> opcode until we know the flash chip size.
>>> Check for zero chip size in sfdp_add_uniform_eraser.
>>>
>>> Fix the output of the parameter table contents.
>>>
>>> This patch fixes the index used to retrieve the eraser types, which
>>> was off one double word.
>> For me it looks like this part of the patch introduced a new bug.
>>
>>> -	dw = 8;
>>> +	/* 8. double word */
>>> +	dw = 7;
>>>  	for (j = 0; j < 4; j++) {
>>> -		/* 8 double words from the start + 2 words for every eraser */
>>> +		/* 8 double words from the start + 2 bytes for every eraser */
>>>  		tmp8 = buf[(4 * dw) + (2 * j)];
>> 8 double words from the start is 32 bytes from the start. Last time I
>> checked, 7*4 was not 32.
> Xth dw starts at (x - 1) * 4 because they start from offset 0 with the
> *first* dw.
> the second dw starts at (2 - 1) * 4 = 4,
> 3rd at (3 - 1) * 4 = 8,
> ?
>
> that mistake was exactly what haunted me back then apparently. :)
>
> the standard talks about (1-based) Xth double words, so i kept that
> nomenclature, but used a 0-based offset (dw). we could leave the
> existing solution, change the nomenclature (bad idea imho) or use
> 1-based offsets and subtract 1 before using them... no ideal solution
> available imo.

There is a huge difference between "8 double words from the start" and
"8th double word". One of those comments is wrong, and if your
explanation is correct, the "8 double words from the start" is wrong.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From tomkel01 at gmail.com  Tue Feb 21 21:31:03 2012
From: tomkel01 at gmail.com (tom kel)
Date: Tue, 21 Feb 2012 15:31:03 -0500
Subject: [flashrom] DG965OT
Message-ID: <CAL5kM_kDOytgmt7VN-=mV4ExtOBqFzMt4Q5ZU2oSjErOBPBEHw@mail.gmail.com>

# flashrom -r backup.bin -VV
flashrom v0.9.5-r1503 on Linux 3.0-ARCH (x86_64), built with libpci 3.1.9,
GCC 4.6.2 20120120 (prerelease), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 1797M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus
= 10011 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
sh: dmidecode: command not found
dmidecode execution unsuccessful - continuing without DMI info
Found chipset "Intel ICH8DH" with PCI ID 8086:2812. Enabling flash write...
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode disabled
0xffe00000/0xffa00000 FWH decode disabled
0xffd80000/0xff980000 FWH decode disabled
0xffd00000/0xff900000 FWH decode disabled
0xffc80000/0xff880000 FWH decode disabled
0xffc00000/0xff800000 FWH decode disabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x2
WARNING: Setting 0xdc from 0x2 to 0x3 on ICH8DH failed. New value is 0x2.
Root Complex Register Block address = 0xfed1c000
GCS = 0x880464: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x1
(SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3020
0x04: 0xe008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
WARNING: SPI Configuration Lockdown activated.
Reading OPCODES... done
        OP        Type      Pre-OP
op[0]: 0x9f, read  w/o addr, none
op[1]: 0xab, read  w/  addr, none
op[2]: 0x00, read  w/o addr, none
op[3]: 0x00, read  w/o addr, none
op[4]: 0x00, read  w/o addr, none
op[5]: 0x00, read  w/o addr, none
op[6]: 0x00, read  w/o addr, none
op[7]: 0x00, read  w/o addr, none
Pre-OP 0: 0x00, Pre-OP 1: 0x00
0x06: 0x3f00 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0
0x08: 0x00003000 (FADDR)
0x50: 0x00000a0b (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b
0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region
(0x00000000-0x00000fff) is read-only.
0x58: 0x00ff0035 FREG1: BIOS region (0x00035000-0x000fffff) is read-write.
0x5C: 0x00340003 FREG2: WARNING: Management Engine region
(0x00003000-0x00034fff) is locked.
0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is
read-write.
0x64: 0x00000000 FREG4: WARNING: Platform Data region
(0x00000000-0x00000fff) is locked.
0x74: 0x00000000 (PR0 is unused)
0x78: 0x00000000 (PR1 is unused)
0x7C: 0x00000000 (PR2 is unused)
0x80: 0x00000000 (PR3 is unused)
0x84: 0x00000000 (PR4 is unused)
Please send a verbose log to flashrom at flashrom.org if this board is not
listed on
http://flashrom.org/Supported_hardware#Supported_mainboards yet.
Writes have been disabled. You can enforce write support with the
ich_spi_force programmer option, but it will most likely harm your hardware!
If you force flashrom you will get no support if something breaks.
0x90: 0x04 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0x004200 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=2, SME=0, SCF=0
0x94: 0x0000     (PREOP)
0x96: 0x0008     (OPTYPE)
0x98: 0x0000ab9f (OPMENU)
0x9C: 0x00000000 (OPMENU+4)
0xC1: 0xffffffff (VSCC)
VSCC: BES=0x3, WG=1, WSR=1, WEWS=1, EO=0xff, VCL=1

Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.
=== Content Section ===
FLVALSIG 0x0ff0a55a
FLMAP0   0x03040001
FLMAP1   0x01100206
FLMAP2   0x00000120

--- Details ---
NR          (Number of Regions):                     4
FRBA        (Flash Region Base Address):         0x040
NC          (Number of Components):                  1
FCBA        (Flash Component Base Address):      0x010
ISL         (ICH/PCH Strap Length):                  1
FISBA/FPSBA (Flash ICH/PCH Strap Base Address):  0x100
NM          (Number of Masters):                     3
FMBA        (Flash Master Base Address):         0x060
MSL/PSL     (MCH/PROC Strap Length):                 1
FMSBA       (Flash MCH/PROC Strap Base Address): 0x200

=== Component Section ===
FLCOMP   0x00300001
FLILL    0x00000000

--- Details ---
Component 1 density:             1 MB
Component 2 is not used.
Read Clock Frequency:           20 MHz
Read ID and Status Clock Freq.: 20 MHz
Write and Erase Clock Freq.:    20 MHz
Fast Read is supported.
Fast Read Clock Frequency:      33 MHz
No forbidden opcodes.

=== Region Section ===
FLREG0   0x00000000
FLREG1   0x00ff0035
FLREG2   0x00340003
FLREG3   0x00020001
FLREG4   0x00000000

--- Details ---
Region 0 (Descr.) 0x00000000 - 0x00000fff
Region 1 (BIOS  ) 0x00035000 - 0x000fffff
Region 2 (ME    ) 0x00003000 - 0x00034fff
Region 3 (GbE   ) 0x00001000 - 0x00002fff
Region 4 (Platf.) 0x00000000 - 0x00000fff

=== Master Section ===
FLMSTR1  0x0a0b0000
FLMSTR2  0x0c0d0000
FLMSTR3  0x08090218

--- Details ---
      Descr. BIOS ME GbE Platf.
BIOS    r     rw      rw
ME      r         rw  rw
GbE     r             rw

Enabling hardware sequencing because some important opcode is locked.
SPI Read Configuration: prefetching disabled, caching enabled, PROBLEMS,
continuing anyway
The following protocols are supported: FWH, Programmer-specific.
Probing for Programmer Opaque flash chip, 0 kB: Found 1 attached SPI flash
chip with a density of 1024 kB.
There is only one partition containing the whole address space (0x000000 -
0x0fffff).
There are 256 erase blocks with 4096 B each.
Found Programmer flash chip "Opaque flash chip" (1024 kB,
Programmer-specific) at physical address 0x0.
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x89, id2 0x89, id1
is normal flash content, id2 is normal flash content
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xd3, id2 0x56, id1
is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x89, id2 0x89,
id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xd3, id2 0x56,
id1 is normal flash content, id2 is normal flash content
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x89, id2
0x89, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x48, id2
0x2a, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xd3, id2
0x56, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xd3, id2 0x56, id1
is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xd3, id2 0x56, id1
is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xd3, id2 0x56, id1
is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x89, id2 0x89, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xd3, id2 0x56, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xd3, id2
0x56, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xd3, id2
0x56, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xd3, id2
0x56, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x89, id2
0x89, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xd3, id2 0x56, id1 is normal flash content, id2 is normal flash content
Found Programmer flash chip "Opaque flash chip" (1024 kB,
Programmer-specific).
Reading flash... Reading 1048576 bytes starting at 0x000000.
Transaction error between offset 0x00003000 and 0x0000303f (= 0x00003000 +
63)!
HSFS: FDONE=1, FCERR=1, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1
HSFC: FGO=0, FCYCLE=0, FDBC=63, SME=0
Read operation failed!
FAILED.
Restoring PCI config space for 00:1f:0 reg 0xdc
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120221/be41aa8e/attachment-0001.html>

From stefan.tauner at student.tuwien.ac.at  Wed Feb 22 00:14:05 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 22 Feb 2012 00:14:05 +0100
Subject: [flashrom] [PATCH] Fix SFDP probing.
In-Reply-To: <4F4407D5.9010604@gmx.net>
References: <4F4407D5.9010604@gmx.net>
Message-ID: <1329866045-5235-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
looked for eraser slots that have no erase functions set instead of
those that have one set.

Postpone adding an erase function for the special 4k block erase
opcode until we know the flash chip size and add an additional check
to sfdp_add_uniform_eraser.

Fix the output of the parameter table contents.

This patch fixes the index used to retrieve the eraser types, which
was off one double word.

Refine some messages and add a few further debugging prints.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 sfdp.c |   63 ++++++++++++++++++++++++++++++++++++++-------------------------
 1 files changed, 38 insertions(+), 25 deletions(-)

diff --git a/sfdp.c b/sfdp.c
index 75dfb5f..b2fc75f 100644
--- a/sfdp.c
+++ b/sfdp.c
@@ -78,8 +78,10 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 	uint32_t total_size = flash->total_size * 1024;
 	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
 
-	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
-		msg_cdbg("%s: invalid input\n", __func__);
+	if (erasefn == NULL || total_size == 0 || block_size == 0 ||
+	    total_size % block_size != 0) {
+		msg_cdbg("%s: invalid input, please report to "
+			 "flashrom at flashrom.org\n", __func__);
 		return 1;
 	}
 
@@ -89,11 +91,12 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 		if (eraser->eraseblocks[0].size == block_size &&
 		    eraser->block_erase == erasefn) {
 			msg_cdbg2("  Tried to add a duplicate block eraser: "
-				  "%d x %d B with opcode 0x%02x\n",
+				  "%d x %d B with opcode 0x%02x.\n",
 				  total_size/block_size, block_size, opcode);
 			return 1;
 		}
-		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
+		if (eraser->eraseblocks[0].size != 0 ||
+		    eraser->block_erase != NULL) {
 			msg_cspew("  Block Eraser %d is already occupied.\n",
 				  i);
 			continue;
@@ -115,11 +118,12 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 
 static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 {
+	uint8_t opcode_4k_erase = 0xFF;
 	uint32_t tmp32;
 	uint8_t tmp8;
 	uint32_t total_size; /* in bytes */
 	uint32_t block_size;
-	int dw, j;
+	int j;
 
 	msg_cdbg("Parsing JEDEC flash parameter table... ");
 	if (len != 9 * 4 && len != 4 * 4) {
@@ -129,11 +133,10 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 	msg_cdbg2("\n");
 	
 	/* 1. double word */
-	dw = 0;
-	tmp32 = buf[(4 * dw) + 0];
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+	tmp32 =  ((unsigned int)buf[(4 * 0) + 0]);
+	tmp32 |= ((unsigned int)buf[(4 * 0) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * 0) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * 0) + 3]) << 24;
 
 	tmp8 = (tmp32 >> 17) & 0x3;
 	switch (tmp8) {
@@ -181,15 +184,17 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 	}
 
 	if ((tmp32 & 0x3) == 0x1) {
-		sfdp_add_uniform_eraser(flash, (tmp32 >> 8) & 0xFF, 4 * 1024);
-	}
+		opcode_4k_erase = (tmp32 >> 8) & 0xFF;
+		msg_cspew("  4kB erase opcode is 0x%02x.\n", opcode_4k_erase);
+		/* add the eraser later, because we don't know total_size yet */
+	} else
+		msg_cspew("  4kB erase opcode is not defined.\n");
 
 	/* 2. double word */
-	dw = 1;
-	tmp32 = buf[(4 * dw) + 0];
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+	tmp32 =  ((unsigned int)buf[(4 * 1) + 0]);
+	tmp32 |= ((unsigned int)buf[(4 * 1) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * 1) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * 1) + 3]) << 24;
 
 	if (tmp32 & (1 << 31)) {
 		msg_cdbg("Flash chip size >= 4 Gb/512 MB not supported.\n");
@@ -204,6 +209,9 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 		return 1;
 	}
 
+	if (opcode_4k_erase != 0xFF)
+		sfdp_add_uniform_eraser(flash, opcode_4k_erase, 4 * 1024);
+
 	/* FIXME: double words 3-7 contain unused fast read information */
 
 	if (len == 4 * 4) {
@@ -213,22 +221,26 @@ static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 		goto done;
 	}
 
-	dw = 8;
+	/* 8. double word */
 	for (j = 0; j < 4; j++) {
-		/* 8 double words from the start + 2 words for every eraser */
-		tmp8 = buf[(4 * dw) + (2 * j)];
+		/* 7 double words from the start + 2 bytes for every eraser */
+		tmp8 = buf[(4 * 7) + (j * 2)];
+		msg_cspew("   Erase Sector Type %d Size: 0x%02x\n", j + 1,
+			  tmp8);
 		if (tmp8 == 0) {
-			msg_cdbg2("  Block eraser %d is unused.\n", j);
+			msg_cspew("  Erase Sector Type %d is unused.\n", j);
 			continue;
 		}
 		if (tmp8 >= 31) {
-			msg_cdbg2("  Block size of eraser %d (2^%d) is too big "
-				  "for flashrom.\n", j, tmp8);
+			msg_cdbg2("  Block size of erase Sector Type %d (2^%d) "
+				 "is too big for flashrom.\n", j, tmp8);
 			continue;
 		}
 		block_size = 1 << (tmp8); /* block_size = 2 ^ field */
 
-		tmp8 = buf[(4 * dw) + (2 * j) + 1];
+		tmp8 = buf[(4 * 7) + (j * 2) + 1];
+		msg_cspew("   Erase Sector Type %d Opcode: 0x%02x\n", j + 1,
+			  tmp8);
 		sfdp_add_uniform_eraser(flash, tmp8, block_size);
 	}
 
@@ -332,7 +344,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 			if ((tmp32 % 8) == 0) {
 				msg_cspew("    0x%04x: ", tmp32);
 			}
-			msg_cspew(" %02x", buf[tmp32]);
+			msg_cspew(" %02x", tbuf[tmp32]);
 			if ((tmp32 % 8) == 7) {
 				msg_cspew("\n");
 				continue;
@@ -342,6 +354,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 				continue;
 			}
 		}
+		msg_cspew("\n");
 
 		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
 			if (hdrs[i].id != 0)
-- 
1.7.1



From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 22 00:34:13 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 22 Feb 2012 00:34:13 +0100
Subject: [flashrom] [PATCH] Fix SFDP probing.
In-Reply-To: <1329866045-5235-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <4F4407D5.9010604@gmx.net>
	<1329866045-5235-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F4429F5.6080607@gmx.net>

Am 22.02.2012 00:14 schrieb Stefan Tauner:
> sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
> looked for eraser slots that have no erase functions set instead of
> those that have one set.
>
> Postpone adding an erase function for the special 4k block erase
> opcode until we know the flash chip size and add an additional check
> to sfdp_add_uniform_eraser.
>
> Fix the output of the parameter table contents.
>
> This patch fixes the index used to retrieve the eraser types, which
> was off one double word.
>
> Refine some messages and add a few further debugging prints.
>
> Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

I assume this has been tested with the dummy simulator.
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Wed Feb 22 01:17:06 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 22 Feb 2012 01:17:06 +0100
Subject: [flashrom] [PATCH] Fix SFDP probing.
In-Reply-To: <4F4429F5.6080607@gmx.net>
References: <4F4407D5.9010604@gmx.net>
	<1329866045-5235-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<4F4429F5.6080607@gmx.net>
Message-ID: <201202220016.q1M0GDre010320@mail2.student.tuwien.ac.at>

On Wed, 22 Feb 2012 00:34:13 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 22.02.2012 00:14 schrieb Stefan Tauner:
> > sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
> > looked for eraser slots that have no erase functions set instead of
> > those that have one set.
> >
> > Postpone adding an erase function for the special 4k block erase
> > opcode until we know the flash chip size and add an additional check
> > to sfdp_add_uniform_eraser.
> >
> > Fix the output of the parameter table contents.
> >
> > This patch fixes the index used to retrieve the eraser types, which
> > was off one double word.
> >
> > Refine some messages and add a few further debugging prints.
> >
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> 
> I assume this has been tested with the dummy simulator.
now it has been ;)
the only additional change i have made: i have indented the "It seems
like this chip supports the preliminary Intel version"?

> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

thanks, committed in r1505. let's hope we have tackled everything. :)
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Wed Feb 22 01:14:16 2012
From: svn at flashrom.org (repository service)
Date: Wed, 22 Feb 2012 01:14:16 +0100
Subject: [flashrom] [commit] r1505 - trunk
Message-ID: <E1Rzzqa-0000aS-65@ra.coresystems.de>

Author: stefanct
Date: Wed Feb 22 01:14:14 2012
New Revision: 1505
URL: http://flashrom.org/trac/flashrom/changeset/1505

Log:
Fix SFDP probing.

sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it
looked for eraser slots that have no erase functions set instead of
those that have one set.

Postpone adding an erase function for the special 4k block erase
opcode until we know the flash chip size and add an additional check
to sfdp_add_uniform_eraser.

Fix the output of the parameter table contents.

This patch fixes the index used to retrieve the eraser types, which
was off one double word.

Refine some messages and add a few further debugging prints.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/sfdp.c

Modified: trunk/sfdp.c
==============================================================================
--- trunk/sfdp.c	Sat Feb 18 03:38:36 2012	(r1504)
+++ trunk/sfdp.c	Wed Feb 22 01:14:14 2012	(r1505)
@@ -78,8 +78,10 @@
 	uint32_t total_size = flash->total_size * 1024;
 	erasefunc_t *erasefn = spi_get_erasefn_from_opcode(opcode);
 
-	if (erasefn == NULL || block_size == 0 || total_size % block_size != 0) {
-		msg_cdbg("%s: invalid input\n", __func__);
+	if (erasefn == NULL || total_size == 0 || block_size == 0 ||
+	    total_size % block_size != 0) {
+		msg_cdbg("%s: invalid input, please report to "
+			 "flashrom at flashrom.org\n", __func__);
 		return 1;
 	}
 
@@ -89,11 +91,12 @@
 		if (eraser->eraseblocks[0].size == block_size &&
 		    eraser->block_erase == erasefn) {
 			msg_cdbg2("  Tried to add a duplicate block eraser: "
-				  "%d x %d B with opcode 0x%02x\n",
+				  "%d x %d B with opcode 0x%02x.\n",
 				  total_size/block_size, block_size, opcode);
 			return 1;
 		}
-		if (eraser->eraseblocks[0].size != 0 || !eraser->block_erase) {
+		if (eraser->eraseblocks[0].size != 0 ||
+		    eraser->block_erase != NULL) {
 			msg_cspew("  Block Eraser %d is already occupied.\n",
 				  i);
 			continue;
@@ -115,11 +118,12 @@
 
 static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
 {
+	uint8_t opcode_4k_erase = 0xFF;
 	uint32_t tmp32;
 	uint8_t tmp8;
 	uint32_t total_size; /* in bytes */
 	uint32_t block_size;
-	int dw, j;
+	int j;
 
 	msg_cdbg("Parsing JEDEC flash parameter table... ");
 	if (len != 9 * 4 && len != 4 * 4) {
@@ -129,11 +133,10 @@
 	msg_cdbg2("\n");
 	
 	/* 1. double word */
-	dw = 0;
-	tmp32 = buf[(4 * dw) + 0];
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+	tmp32 =  ((unsigned int)buf[(4 * 0) + 0]);
+	tmp32 |= ((unsigned int)buf[(4 * 0) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * 0) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * 0) + 3]) << 24;
 
 	tmp8 = (tmp32 >> 17) & 0x3;
 	switch (tmp8) {
@@ -181,15 +184,17 @@
 	}
 
 	if ((tmp32 & 0x3) == 0x1) {
-		sfdp_add_uniform_eraser(flash, (tmp32 >> 8) & 0xFF, 4 * 1024);
-	}
+		opcode_4k_erase = (tmp32 >> 8) & 0xFF;
+		msg_cspew("  4kB erase opcode is 0x%02x.\n", opcode_4k_erase);
+		/* add the eraser later, because we don't know total_size yet */
+	} else
+		msg_cspew("  4kB erase opcode is not defined.\n");
 
 	/* 2. double word */
-	dw = 1;
-	tmp32 = buf[(4 * dw) + 0];
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 1]) << 8;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 2]) << 16;
-	tmp32 |= ((unsigned int)buf[(4 * dw) + 3]) << 24;
+	tmp32 =  ((unsigned int)buf[(4 * 1) + 0]);
+	tmp32 |= ((unsigned int)buf[(4 * 1) + 1]) << 8;
+	tmp32 |= ((unsigned int)buf[(4 * 1) + 2]) << 16;
+	tmp32 |= ((unsigned int)buf[(4 * 1) + 3]) << 24;
 
 	if (tmp32 & (1 << 31)) {
 		msg_cdbg("Flash chip size >= 4 Gb/512 MB not supported.\n");
@@ -204,31 +209,38 @@
 		return 1;
 	}
 
+	if (opcode_4k_erase != 0xFF)
+		sfdp_add_uniform_eraser(flash, opcode_4k_erase, 4 * 1024);
+
 	/* FIXME: double words 3-7 contain unused fast read information */
 
 	if (len == 4 * 4) {
-		msg_cdbg("It seems like this chip supports the preliminary "
+		msg_cdbg("  It seems like this chip supports the preliminary "
 			 "Intel version of SFDP, skipping processing of double "
 			 "words 3-9.\n");
 		goto done;
 	}
 
-	dw = 8;
+	/* 8. double word */
 	for (j = 0; j < 4; j++) {
-		/* 8 double words from the start + 2 words for every eraser */
-		tmp8 = buf[(4 * dw) + (2 * j)];
+		/* 7 double words from the start + 2 bytes for every eraser */
+		tmp8 = buf[(4 * 7) + (j * 2)];
+		msg_cspew("   Erase Sector Type %d Size: 0x%02x\n", j + 1,
+			  tmp8);
 		if (tmp8 == 0) {
-			msg_cdbg2("  Block eraser %d is unused.\n", j);
+			msg_cspew("  Erase Sector Type %d is unused.\n", j);
 			continue;
 		}
 		if (tmp8 >= 31) {
-			msg_cdbg2("  Block size of eraser %d (2^%d) is too big "
-				  "for flashrom.\n", j, tmp8);
+			msg_cdbg2("  Block size of erase Sector Type %d (2^%d) "
+				 "is too big for flashrom.\n", j, tmp8);
 			continue;
 		}
 		block_size = 1 << (tmp8); /* block_size = 2 ^ field */
 
-		tmp8 = buf[(4 * dw) + (2 * j) + 1];
+		tmp8 = buf[(4 * 7) + (j * 2) + 1];
+		msg_cspew("   Erase Sector Type %d Opcode: 0x%02x\n", j + 1,
+			  tmp8);
 		sfdp_add_uniform_eraser(flash, tmp8, block_size);
 	}
 
@@ -332,7 +344,7 @@
 			if ((tmp32 % 8) == 0) {
 				msg_cspew("    0x%04x: ", tmp32);
 			}
-			msg_cspew(" %02x", buf[tmp32]);
+			msg_cspew(" %02x", tbuf[tmp32]);
 			if ((tmp32 % 8) == 7) {
 				msg_cspew("\n");
 				continue;
@@ -342,6 +354,7 @@
 				continue;
 			}
 		}
+		msg_cspew("\n");
 
 		if (i == 0) { /* Mandatory JEDEC SFDP parameter table */
 			if (hdrs[i].id != 0)


From c-d.hailfinger.devel.2006 at gmx.net  Wed Feb 22 01:52:31 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Wed, 22 Feb 2012 01:52:31 +0100
Subject: [flashrom] [PATCH] Support Debian/kFreeBSD
Message-ID: <4F443C4F.40602@gmx.net>

Apparently compilation worked before I introduced the target OS check
during compilation, but it seems the generated binaries back then might
have been incorrect for Debian/kFreeBSD.

This stuff should compile and run well. Output of
flashrom -V
on a desktop PC (not a laptop) would be appreciated.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-kfreebsd_glibc/hwaccess.c
===================================================================
--- flashrom-kfreebsd_glibc/hwaccess.c	(Revision 1504)
+++ flashrom-kfreebsd_glibc/hwaccess.c	(Arbeitskopie)
@@ -40,7 +40,7 @@
 {
 }
 
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 int io_fd;
 #endif
 
@@ -52,7 +52,7 @@
 #else
 #if defined (__sun) && (defined(__i386) || defined(__amd64))
 	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
-#elif defined(__FreeBSD__) || defined (__DragonFly__)
+#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
 	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
 #else 
 	if (iopl(3) != 0) {
@@ -71,7 +71,7 @@
 
 void release_io_perms(void)
 {
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 	close(io_fd);
 #endif
 }
Index: flashrom-kfreebsd_glibc/hwaccess.h
===================================================================
--- flashrom-kfreebsd_glibc/hwaccess.h	(Revision 1504)
+++ flashrom-kfreebsd_glibc/hwaccess.h	(Arbeitskopie)
@@ -189,6 +189,7 @@
  */
 
 #if defined(__FreeBSD__) || defined(__DragonFly__)
+  /* Note that FreeBSD kernel with glibc does not have machine/cpufunc.h. */
   #include <machine/cpufunc.h>
   #define off64_t off_t
   #define lseek64 lseek
@@ -228,7 +229,7 @@
   #define INL  inportl
 
 #else
-
+  /* This is the usual glibc interface. */
   #define OUTB outb
   #define OUTW outw
   #define OUTL outl
@@ -299,12 +300,12 @@
   #endif
 #endif
 
-#if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__)
+#if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__)
 typedef struct { uint32_t hi, lo; } msr_t;
 msr_t rdmsr(int addr);
 int wrmsr(int addr, msr_t msr);
 #endif
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 /* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
 #undef rdmsr
 #undef wrmsr
Index: flashrom-kfreebsd_glibc/os.h
===================================================================
--- flashrom-kfreebsd_glibc/os.h	(Revision 1504)
+++ flashrom-kfreebsd_glibc/os.h	(Arbeitskopie)
@@ -30,6 +30,9 @@
 // FreeBSD
 #elif defined(__FreeBSD__)
 #define __FLASHROM_OS__ "FreeBSD"
+// FreeBSD with glibc-based userspace (e.g. Debian/kFreeBSD)
+#elif defined(__FreeBSD_kernel__) && defined(__GLIBC__)
+#define __FLASHROM_OS__ "FreeBSD-glibc"
 // DragonFlyBSD
 #elif defined(__DragonFly__)
 #define __FLASHROM_OS__ "DragonFlyBSD"
Index: flashrom-kfreebsd_glibc/physmap.c
===================================================================
--- flashrom-kfreebsd_glibc/physmap.c	(Revision 1504)
+++ flashrom-kfreebsd_glibc/physmap.c	(Arbeitskopie)
@@ -382,7 +382,7 @@
 	fd_msr = -1;
 }
 #else
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 #include <sys/ioctl.h>
 
 typedef struct {


-- 
http://www.hailfinger.org/



From petervaneenoo at gmail.com  Wed Feb 22 17:52:08 2012
From: petervaneenoo at gmail.com (Peter Van Eenoo)
Date: Wed, 22 Feb 2012 08:52:08 -0800
Subject: [flashrom] Biostar H61MU3
Message-ID: <CAKHXy74nB29ADvNJRT4h43402noSheik5phSgtgN7mn6hgCS8g@mail.gmail.com>

Here is the output from -V

flashrom v0.9.5-r1504 on Linux 3.2.7-1-ARCH (x86_64), built with libpci
3.1.9, GCC 4.6.2 20120120 (prerelease), little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 2394M loops per
second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1002 us, 10000 myus
= 10002 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "BIOSTAR Group"
DMI string system-product-name: "H61MU3"
DMI string system-version: "6.0"
DMI string baseboard-manufacturer: "BIOSTAR Group"
DMI string baseboard-product-name: "H61MU3"
DMI string baseboard-version: "6.0"
DMI string chassis-type: "Desktop"
Found ITE Super I/O, ID 0x8728 on port 0x2e
Found chipset "Intel H61" with PCI ID 8086:1c5c.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write...
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode enabled
0xffe00000/0xffa00000 FWH decode enabled
0xffd80000/0xff980000 FWH decode enabled
0xffd00000/0xff900000 FWH decode enabled
0xffc80000/0xff880000 FWH decode enabled
0xffc00000/0xff800000 FWH decode enabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0
Root Complex Register Block address = 0xfed1c000
GCS = 0xc24: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x6008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
Programming OPCODES...
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x00000000 (FADDR)
0x50: 0x00000a0b (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b
0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region
(0x00000000-0x00000fff) is read-only.
0x58: 0x03ff0200 FREG1: BIOS region (0x00200000-0x003fffff) is read-write.
0x5C: 0x01ff0001 FREG2: WARNING: Management Engine region
(0x00001000-0x001fffff) is locked.
Please send a verbose log to flashrom at flashrom.org if this board is not
listed on
http://flashrom.org/Supported_hardware#Supported_mainboards yet.
Writes have been disabled. You can enforce write support with the
ich_spi_force programmer option, but it will most likely harm your hardware!
If you force flashrom you will get no support if something breaks.
0x90: 0x84 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0xf84140 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=1, SME=0, SCF=0
0x94: 0x5006     (PREOP)
0x96: 0x463b     (OPTYPE)
0x98: 0x05d80302 (OPMENU)
0x9C: 0xc79f0190 (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xC4: 0x00002005 (LVSCC)
LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xC8: 0x00002005 (UVSCC)
UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xD0: 0x00000000 (FPB)

SPI Read Configuration: prefetching disabled, caching enabled, OK.
Super I/O ID 0x8728 is not on the list of flash capable controllers.
The following protocols are supported: FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Chip status register is 00
Found Eon flash chip "EN25Q32(A/B)" (4096 kB, SPI) at physical address
0xffc00000.
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0x1c, id2 0x3016
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for SST SST25LF040A, 512 kB:
program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190
on-the-fly OPCODE (0xAB) re-programmed, op-pos=2
probe_spi_res2: id1 0x15, id2 0x15
Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x15, id2 0x15
Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0x1c, id2 0x15
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0x1c, id2 0x15
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0x1c, id2 0x15
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0x1c, id2
0x3016
Probing for Unknown SFDP-capable chip, 0 kB: Invalid OPCODE 0x5a, will not
execute.
Receiving SFDP signature failed.
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0x1c, id2 0x3016
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0x1c, id2 0x3016
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0x1c, id2 0x3016
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0x1c, id2 0x3016
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0x1c, id2 0x3016
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0x1c, id2 0x3016
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1c,
id2 0x3016
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0x1c, id2 0x3016
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0x1c, id2 0x3016
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0x1c, id2 0x15
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x00, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x27, id2 0xb9, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x00, id2 0x00,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x27, id2 0xb9, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x00, id2
0x00, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x27, id2
0xb9, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x27, id2 0xb9,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x00, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x27, id2 0xb9, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x27, id2 0xb9, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x00, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0x00, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x27, id2 0xb9, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x00, id2
0x00, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x27, id2
0xb9, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Found Eon flash chip "EN25Q32(A/B)" (4096 kB, SPI).
This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to completely
clone the contents of this chip (see man page for details).
===
This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom at flashrom.org if any of the above
operations
work correctly for you with this flash part. Please include the flashrom
output with the additional -V option for all operations you tested (-V, -Vr,
-VE, -Vw), and mention which mainboard or programmer you tested.
Please mention your board in the subject line. Thanks for your help!
No operations were specified.
Restoring MMIO space at 0x7f10a27dc8a0
Restoring MMIO space at 0x7f10a27dc89c
Restoring MMIO space at 0x7f10a27dc898
Restoring MMIO space at 0x7f10a27dc896
Restoring MMIO space at 0x7f10a27dc894
Restoring PCI config space for 00:1f:0 reg 0xdc
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120222/2db4086f/attachment-0001.html>

From stefan.tauner at student.tuwien.ac.at  Wed Feb 22 21:32:32 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 22 Feb 2012 21:32:32 +0100
Subject: [flashrom] Biostar H61MU3
In-Reply-To: <CAKHXy74nB29ADvNJRT4h43402noSheik5phSgtgN7mn6hgCS8g@mail.gmail.com>
References: <CAKHXy74nB29ADvNJRT4h43402noSheik5phSgtgN7mn6hgCS8g@mail.gmail.com>
Message-ID: <201202222031.q1MKVchg016690@mail2.student.tuwien.ac.at>

On Wed, 22 Feb 2012 08:52:08 -0800
Peter Van Eenoo <petervaneenoo at gmail.com> wrote:

> Here is the output from -V
> 
> [?]
> Found Eon flash chip "EN25Q32(A/B)" (4096 kB, SPI).
> This chip may contain one-time programmable memory. flashrom cannot read
> and may never be able to write it, hence it may not be able to completely
> clone the contents of this chip (see man page for details).
> ===
> This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
> The test status of this chip may have been updated in the latest development
> version of flashrom. If you are running the latest development version,
> please email a report to flashrom at flashrom.org if any of the above
> operations
> work correctly for you with this flash part. Please include the flashrom
> output with the additional -V option for all operations you tested (-V, -Vr,
> -VE, -Vw), and mention which mainboard or programmer you tested.
> Please mention your board in the subject line. Thanks for your help!


Hello Peter,

thanks for your report!

I have added the board to our list of (un)supported boards (with an
appropriate note) and will commit that later together with other small
changes.

Can you please take a look at the board itself and verify that the flash
chip is really an Eon EN25Q32 (variant)? The chip is located near the
southbridge (heatsink) opposite of the pci slots. I can then mark the
probe operation for it as tested?
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Thu Feb 23 02:26:04 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 23 Feb 2012 02:26:04 +0100
Subject: [flashrom] [PATCH] dummyflasher.c: add support for SFDP by adding a
	new emulator chip: MX25L6436
In-Reply-To: <4F4295C2.6070909@gmx.net>
References: <4F4295C2.6070909@gmx.net>
Message-ID: <1329960364-11155-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

The chip features a complete 1.0 SFDP JEDEC flash parameter table and also a
vendor-specific extension table (defining voltages, lock bits etc).
NB: the MX25L6436 uses the same RDID as the MX25L6405.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 dummyflasher.c |   97 ++++++++++++++++++++++++++++++++++++++++++++++++++-----
 flashrom.8     |    2 +
 2 files changed, 90 insertions(+), 9 deletions(-)

On Mon, 20 Feb 2012 19:49:38 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Am 20.02.2012 17:07 schrieb Stefan Tauner:
> > TODO:
> >  - how should the SFDP data be supplied/selected by the user?
> >    - option A (suggested one): add a default table with a legit complete table
> 
> Good idea.
> 
> >      and a programmer option to use a binary file instead.
> 
> I think having the file+builtin combination is overkill. Builtin should
> be sufficient, unless you plan to focus more on making flashrom a
> verification tool for flash vendors.

some of them would need it. *cough* ;)
> > [???]
> > +	case JEDEC_SFDP:
> > +		if (emu_chip != EMULATE_WINBOND_W25Q64CV)
> > +			break;
> > +		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
> > +		/*
> > +		 * FIXME: There is one dummy byte (i.e. 8 clock cycles) to be
> > +		 * transferred after the address. Since we can not observe the
> > +		 * clock, we would need to check for appropriate writecnt and/or
> > +		 * readcnt and recalculate the parameters below.
> > +		 */
> > +		/* FIXME: this could be more sophisticated. */
> > +		memcpy(readarr, sfdp_table + offs,
> > +		       min(sizeof(sfdp_table) - offs, readcnt));
> 
> That memcpy will segfault if offs>sizeof(sfdp_table). Suggestion:
> Replace the whole case statement with this (some 80 col reformatting may
> be needed):
> 
> 	case JEDEC_SFDP:
> 		int toread;
> 		if (emu_chip != EMULATE_WINBOND_W25Q64CV)
> 			break;
> 		if (writecnt < 4)
> 			break;
> 		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
> 		/* The response is shifted if more than 4 bytes are written. */
> 		offs += writecnt - 4;

first of all... this breaks the implementation atm, because it uses
a writecnt of 5 to include the dummy byte

secondly i am not sure i understand your intention about the
shifting. i guess the following: flashrom cant cope with concurrent
write and read bytes... so you are specifying that if we write more
bytes than needed we miss the bytes read in the beginning.. which
seems fair enough.

therefor i have changed 4 to 5 in the writecnt-related lines..

> 		/* The SFDP spec suggests wraparound is allowed. */
> 		offs %= sizeof(sfdp_table);
> 		toread = min(sizeof(sfdp_table) - offs, readcnt);
> 		memcpy(readarr, sfdp_table + offs, toread);
> 		if (toread < readcnt)
> 			memcpy(readarr + toread, sfdp_table,
> 			       min(sizeof(sfdp_table),readcnt - toread));
> 		if (readcnt - toread > sizeof(sfdp_table))
> 			msg_pdbg("Reading more than SFDP table size in one "
> 				 "chunk, contents may be incomplete.\n"); 

you are trying to support wrapping around for continous reads here
(at least for the first wrap around afaics) while the specs say that
this is not allowed at all (whatever that actually means...). so i
would rather just read up to the boundary and reply 0xFF after that.
makes that patch simpler too :)

> 
> > +		break;
> >  	default:
> >  		/* No special response. */
> >  		break;
> > @@ -657,6 +730,7 @@ static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
> >  	case EMULATE_ST_M25P10_RES:
> >  	case EMULATE_SST_SST25VF040_REMS:
> >  	case EMULATE_SST_SST25VF032B:
> > +	case EMULATE_WINBOND_W25Q64CV:
> >  		if (emulate_spi_chip_response(writecnt, readcnt, writearr,
> >  					      readarr)) {
> >  			msg_pdbg("Invalid command sent to flash chip!\n");

beside that i have also changed the emulated chip to the macronix chip,
because it features a second table (that we might want to parse if it is
used by other vendors too... one can at least hope :)
it helps testing another execution path too...

diff --git a/dummyflasher.c b/dummyflasher.c
index afe0518..794a2f6 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -45,6 +45,7 @@ enum emu_chip {
 	EMULATE_ST_M25P10_RES,
 	EMULATE_SST_SST25VF040_REMS,
 	EMULATE_SST_SST25VF032B,
+	EMULATE_MACRONIX_MX25L6436,
 };
 static enum emu_chip emu_chip = EMULATE_NONE;
 static char *emu_persistent_image = NULL;
@@ -61,6 +62,33 @@ unsigned char spi_blacklist[256];
 unsigned char spi_ignorelist[256];
 int spi_blacklist_size = 0;
 int spi_ignorelist_size = 0;
+
+/* A legit complete SFDP table based on the MX25L6436E (rev. 1.8) datasheet. */
+static const uint8_t const sfdp_table[] = {
+	0x53, 0x46, 0x44, 0x50, // @0x00: SFDP signature
+	0x00, 0x01, 0x01, 0xFF, // @0x04: revision 1.0, 2 headers
+	0x00, 0x00, 0x01, 0x09, // @0x08: JEDEC SFDP header rev. 1.0, 9 DW long
+	0x1C, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x1C (instead of 0x30)
+	0xC2, 0x00, 0x01, 0x04, // @0x10: Macronix header rev. 1.0, 4 DW long
+	0x48, 0x00, 0x00, 0xFF, // @0x14: PTP1 = 0x48 (instead of 0x60)
+	0xFF, 0xFF, 0xFF, 0xFF, // @0x18: hole.
+	0xE5, 0x20, 0xC9, 0xFF, // @0x1C: SFDP parameter table start
+	0xFF, 0xFF, 0xFF, 0x03, // @0x20
+	0x00, 0xFF, 0x08, 0x6B, // @0x24
+	0x08, 0x3B, 0x00, 0xFF, // @0x28
+	0xEE, 0xFF, 0xFF, 0xFF, // @0x2C
+	0xFF, 0xFF, 0x00, 0x00, // @0x30
+	0xFF, 0xFF, 0x00, 0xFF, // @0x34
+	0x0C, 0x20, 0x0F, 0x52, // @0x38
+	0x10, 0xD8, 0x00, 0xFF, // @0x3C: SFDP parameter table end
+	0xFF, 0xFF, 0xFF, 0xFF, // @0x40: hole.
+	0xFF, 0xFF, 0xFF, 0xFF, // @0x44: hole.
+	0x00, 0x36, 0x00, 0x27, // @0x48: Macronix parameter table start
+	0xF4, 0x4F, 0xFF, 0xFF, // @0x4C
+	0xD9, 0xC8, 0xFF, 0xFF, // @0x50
+	0xFF, 0xFF, 0xFF, 0xFF, // @0x54: Macronix parameter table end
+};
+
 #endif
 #endif
 
@@ -296,6 +324,19 @@ int dummy_init(void)
 		msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "
 			 "write)\n");
 	}
+	if (!strcmp(tmp, "MX25L6436")) {
+		emu_chip = EMULATE_MACRONIX_MX25L6436;
+		emu_chip_size = 8 * 1024 * 1024;
+		emu_max_byteprogram_size = 256;
+		emu_max_aai_size = 0;
+		emu_jedec_se_size = 4 * 1024;
+		emu_jedec_be_52_size = 32 * 1024;
+		emu_jedec_be_d8_size = 64 * 1024;
+		emu_jedec_ce_60_size = emu_chip_size;
+		emu_jedec_ce_c7_size = emu_chip_size;
+		msg_pdbg("Emulating Macronix MX25L6436 SPI flash chip (RDID, "
+			 "SFDP)\n");
+	}
 #endif
 	if (emu_chip == EMULATE_NONE) {
 		msg_perr("Invalid chip specified for emulation: %s\n", tmp);
@@ -471,15 +512,26 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 			readarr[1] = 0x44;
 		break;
 	case JEDEC_RDID:
-		if (emu_chip != EMULATE_SST_SST25VF032B)
+		switch (emu_chip) {
+		case EMULATE_SST_SST25VF032B:
+			if (readcnt > 0)
+				readarr[0] = 0xbf;
+			if (readcnt > 1)
+				readarr[1] = 0x25;
+			if (readcnt > 2)
+				readarr[2] = 0x4a;
 			break;
-		/* Respond with SST_SST25VF032B. */
-		if (readcnt > 0)
-			readarr[0] = 0xbf;
-		if (readcnt > 1)
-			readarr[1] = 0x25;
-		if (readcnt > 2)
-			readarr[2] = 0x4a;
+		case EMULATE_MACRONIX_MX25L6436:
+			if (readcnt > 0)
+				readarr[0] = 0xc2;
+			if (readcnt > 1)
+				readarr[1] = 0x20;
+			if (readcnt > 2)
+				readarr[2] = 0x17;
+			break;
+		default: /* ignore */
+			break;
+		}
 		break;
 	case JEDEC_RDSR:
 		memset(readarr, 0, readcnt);
@@ -629,7 +681,33 @@ static int emulate_spi_chip_response(unsigned int writecnt,
 		/* emu_jedec_ce_c7_size is emu_chip_size. */
 		memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size);
 		break;
-	default:
+	case JEDEC_SFDP: {
+		unsigned int toread;
+		if (emu_chip != EMULATE_MACRONIX_MX25L6436)
+			break;
+		if (writecnt < 5)
+			break;
+		offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
+		/* The response is shifted if more than 4 bytes are written. */
+		offs += writecnt - 5;
+		/* The SFDP spec suggests wraparound is allowed as long as it
+		 * does not happen in a single continuous read. */
+		if (offs >= sizeof(sfdp_table)) {
+			msg_pdbg("Wrapping the start address around the SFDP "
+				 "table boundary (using 0x%x instead of 0x%x)."
+				 "\n",
+				 (unsigned int)(offs % sizeof(sfdp_table)),
+				 offs);
+			offs %= sizeof(sfdp_table);
+		}
+		toread = min(sizeof(sfdp_table) - offs, readcnt);
+		memcpy(readarr, sfdp_table + offs, toread);
+		if (toread < readcnt)
+			msg_pdbg("Crossing the SFDP table boundary in a single "
+				 "continuous chunk produces undefined results "
+				 "after that point.\n");
+		break;
+	} default:
 		/* No special response. */
 		break;
 	}
@@ -657,6 +735,7 @@ static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
 	case EMULATE_ST_M25P10_RES:
 	case EMULATE_SST_SST25VF040_REMS:
 	case EMULATE_SST_SST25VF032B:
+	case EMULATE_MACRONIX_MX25L6436:
 		if (emulate_spi_chip_response(writecnt, readcnt, writearr,
 					      readarr)) {
 			msg_pdbg("Invalid command sent to flash chip!\n");
diff --git a/flashrom.8 b/flashrom.8
index ff8ed9d..fdf1251 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -432,6 +432,8 @@ vendor):
 .sp
 .RB "* SST " SST25VF032B " SPI flash chip (RDID, AAI write)"
 .sp
+.RB "* Macronix " MX25L6436 " SPI flash chip (RDID, SFDP)"
+.sp
 Example:
 .B "flashrom -p dummy:emulate=SST25VF040.REMS"
 .TP
-- 
1.7.1

-- 
Kind regards/Mit freundlichen Gr????en, Stefan Tauner


From stefan.tauner at student.tuwien.ac.at  Thu Feb 23 02:57:25 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 23 Feb 2012 02:57:25 +0100
Subject: [flashrom] [PATCH 1/5] print_wiki.c: count pci devices and
 cleanup
In-Reply-To: <CAPp9OrmAsHNY-szFGSc4n0uuki2RSEorHDVDBw6kNc-HuLu6bw@mail.gmail.com>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<1329683217-31150-2-git-send-email-stefan.tauner@student.tuwien.ac.at>
	<CAPp9OrmAsHNY-szFGSc4n0uuki2RSEorHDVDBw6kNc-HuLu6bw@mail.gmail.com>
Message-ID: <201202230156.q1N1uQej025132@mail2.student.tuwien.ac.at>

On Mon, 20 Feb 2012 18:18:18 +0100
Idwer Vollering <vidwer at gmail.com> wrote:

> Can you incorporate this too?

thanks for the suggestions... i think i will solve this another way
though, and that is by adding a function pointer to the programmer
struct that does the printing or something like that. thanks for
pushing me there :)
but please dont post it like this in the future... either comment inline
if the changes are small or can not be expressed well in code, or just
send a complete fixup/followup patch that actually applies on top of
the patch you comment on (or instead of it). it was quite some work to
figure out what you have done and extract it from the mail even though
you explained it on IRC.
also, you confused patchwork which confused me even more :)
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From petervaneenoo at gmail.com  Thu Feb 23 04:24:03 2012
From: petervaneenoo at gmail.com (Peter Van Eenoo)
Date: Wed, 22 Feb 2012 19:24:03 -0800
Subject: [flashrom] Biostar H61MU3
In-Reply-To: <201202222031.q1MKVchg016690@mail2.student.tuwien.ac.at>
References: <CAKHXy74nB29ADvNJRT4h43402noSheik5phSgtgN7mn6hgCS8g@mail.gmail.com>
	<201202222031.q1MKVchg016690@mail2.student.tuwien.ac.at>
Message-ID: <CAKHXy751ZMkkYRHvD9=60v_UHYut8Bvz9DXk8bnSgwu9uNJKCQ@mail.gmail.com>

Hi Stefan,

I can confirm the chip is cFeon EN25Q32A

G??e aus den USA

Peter

On Wed, Feb 22, 2012 at 12:32 PM, Stefan Tauner <
stefan.tauner at student.tuwien.ac.at> wrote:

> On Wed, 22 Feb 2012 08:52:08 -0800
> Peter Van Eenoo <petervaneenoo at gmail.com> wrote:
>
> > Here is the output from -V
> >
> > [?]
> > Found Eon flash chip "EN25Q32(A/B)" (4096 kB, SPI).
> > This chip may contain one-time programmable memory. flashrom cannot read
> > and may never be able to write it, hence it may not be able to completely
> > clone the contents of this chip (see man page for details).
> > ===
> > This flash part has status UNTESTED for operations: PROBE READ ERASE
> WRITE
> > The test status of this chip may have been updated in the latest
> development
> > version of flashrom. If you are running the latest development version,
> > please email a report to flashrom at flashrom.org if any of the above
> > operations
> > work correctly for you with this flash part. Please include the flashrom
> > output with the additional -V option for all operations you tested (-V,
> -Vr,
> > -VE, -Vw), and mention which mainboard or programmer you tested.
> > Please mention your board in the subject line. Thanks for your help!
>
>
> Hello Peter,
>
> thanks for your report!
>
> I have added the board to our list of (un)supported boards (with an
> appropriate note) and will commit that later together with other small
> changes.
>
> Can you please take a look at the board itself and verify that the flash
> chip is really an Eon EN25Q32 (variant)? The chip is located near the
> southbridge (heatsink) opposite of the pci slots. I can then mark the
> probe operation for it as tested?
> --
> Kind regards/Mit freundlichen Gr??en, Stefan Tauner
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120222/388a8758/attachment.html>

From stefan.tauner at student.tuwien.ac.at  Thu Feb 23 12:51:10 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Thu, 23 Feb 2012 12:51:10 +0100
Subject: [flashrom] Biostar H61MU3
In-Reply-To: <CAKHXy751ZMkkYRHvD9=60v_UHYut8Bvz9DXk8bnSgwu9uNJKCQ@mail.gmail.com>
References: <CAKHXy74nB29ADvNJRT4h43402noSheik5phSgtgN7mn6hgCS8g@mail.gmail.com>
	<201202222031.q1MKVchg016690@mail2.student.tuwien.ac.at>
	<CAKHXy751ZMkkYRHvD9=60v_UHYut8Bvz9DXk8bnSgwu9uNJKCQ@mail.gmail.com>
Message-ID: <201202231150.q1NBoBb1006237@mail2.student.tuwien.ac.at>

On Wed, 22 Feb 2012 19:24:03 -0800
Peter Van Eenoo <petervaneenoo at gmail.com> wrote:

> I can confirm the chip is cFeon EN25Q32A

thank you, i have made the appropriate changes locally and will commit
them later.

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From c-d.hailfinger.devel.2006 at gmx.net  Fri Feb 24 01:55:24 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Fri, 24 Feb 2012 01:55:24 +0100
Subject: [flashrom] compiling flashrom for Debian/kFreeBSD
Message-ID: <4F46DFFC.3090104@gmx.net>

Hi,

[please CC me, I'm not subscribed to debian-bsd]

the package flashrom (version 0.9.5) fails to compile for
Debian/kFreeBSD. I have written a patch which should fix compilation and
hopefully also work during runtime. Compile tests and run tests (no run
tests on laptops/notebooks/servers please) would be appreciated. Just run

svn co svn://coreboot.org/flashrom/trunk flashrom
cd flashrom
curl -s http://patchwork.coreboot.org/patch/3561/raw/|patch -p1
make

A full build log would be nice to have so I can see any remaining build
issues.

If you could test if flashrom works (do NOT test flashrom on
laptops/notebooks/servers), that would be even better. Just run

flashrom -VV

which will spit out lots of diagnostic messages about your system and
detect the flash chip. No other flash accesses (besides detection) will
be performed.

Thanks for your help.

Regards,
Carl-Daniel


From rmh at debian.org  Fri Feb 24 20:14:30 2012
From: rmh at debian.org (Robert Millan)
Date: Fri, 24 Feb 2012 19:14:30 +0000
Subject: [flashrom] compiling flashrom for Debian/kFreeBSD
In-Reply-To: <4F46DFFC.3090104@gmx.net>
References: <4F46DFFC.3090104@gmx.net>
Message-ID: <CAOfDtXO9s0CsR_ksi7y1e6FnyQACPAD1qpJxGQt6K8s3_AzW1g@mail.gmail.com>

Long time no see :-)

El 24 de febrer de 2012 0:55, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> ha escrit:
> I have written a patch which should fix compilation and
> hopefully also work during runtime.

The patch works perfectly. However, some changes are gratuitous or inaccurate:

> -#elif defined(__FreeBSD__) || defined (__DragonFly__)
> +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
>  	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
>  #else
>  	if (iopl(3) != 0) {

We have both interfaces. You can keep using iopl() if you like.

>  #if defined(__FreeBSD__) || defined(__DragonFly__)
> +  /* Note that FreeBSD kernel with glibc does not have machine/cpufunc.h. */
>    #include <machine/cpufunc.h>
>    #define off64_t off_t
>    #define lseek64 lseek

Actually, we have machine/cpufunc.h (we have everything in machine/*
actually).  The off_t / lseek defines after this look dangerous though
(they collide with glibc definitions).

> A full build log would be nice to have so I can see any remaining build
> issues.

Attached (build.log).

> If you could test if flashrom works (do NOT test flashrom on
> laptops/notebooks/servers), that would be even better. Just run
>
> flashrom -VV

Attached (run.log).

> Thanks for your help.

Thanks to you for your interest.

-- 
Robert Millan
-------------- next part --------------
A non-text attachment was scrubbed...
Name: build.log
Type: application/octet-stream
Size: 29110 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120224/711489fb/attachment-0002.obj>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: run.log
Type: application/octet-stream
Size: 16538 bytes
Desc: not available
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120224/711489fb/attachment-0003.obj>

From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb 25 00:32:04 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 25 Feb 2012 00:32:04 +0100
Subject: [flashrom] [PATCH] SFDP: Fetch parameter table in a more portable
 way
Message-ID: <4F481DF4.7090904@gmx.net>

SFDP parameter table reads expect a dummy byte between written and read
data on the SPI bus. Read that dummy byte instead of writing it to be
compatible with more (all) programmer drivers.
Reduce SFDP parameter table read chunk size from 8 to 2 to handle
programmers with small readcount limits.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-sfdp_read_dummy_reduce_param_chunksize/sfdp.c
===================================================================
--- flashrom-sfdp_read_dummy_reduce_param_chunksize/sfdp.c	(Revision 1505)
+++ flashrom-sfdp_read_dummy_reduce_param_chunksize/sfdp.c	(Arbeitskopie)
@@ -19,6 +19,7 @@
 
 #include <stdint.h>
 #include <stdlib.h>
+#include <string.h>
 #include "flash.h"
 #include "spi.h"
 #include "chipdrivers.h"
@@ -26,31 +27,39 @@
 static int spi_sfdp_read_sfdp_chunk(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
 {
 	int i, ret;
+	uint8_t *newbuf;
 	const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = {
 		JEDEC_SFDP,
 		(address >> 16) & 0xff,
 		(address >> 8) & 0xff,
 		(address >> 0) & 0xff,
 		/* FIXME: the following dummy byte explodes on some programmers.
-		 * One possible workaround would be to read the dummy byte
+		 * One workaround is to read the dummy byte
 		 * instead and discard its value.
 		 */
 		0
 	};
 	msg_cspew("%s: addr=0x%x, len=%d, data:\n", __func__, address, len);
-	ret = spi_send_command(flash, sizeof(cmd), len, cmd, buf);
+	newbuf = malloc(len + 1);
+	if (!newbuf)
+		return SPI_PROGRAMMER_ERROR;
+	ret = spi_send_command(flash, sizeof(cmd) - 1, len + 1, cmd, newbuf);
+	memmove(buf, newbuf + 1, len);
+	free(newbuf);
+	if (ret)
+		return ret;
 	for (i = 0; i < len; i++)
 		msg_cspew(" 0x%02x", buf[i]);
 	msg_cspew("\n");
-	return ret;
+	return 0;
 }
 
 static int spi_sfdp_read_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
 {
-	/* FIXME: this is wrong. There are different upper bounds for the number
-	 * of bytes to read on the various programmers (even depending on the
-	 * rest of the structure of the transaction).*/
-	int maxstep = 8;
+	/* FIXME: There are different upper bounds for the number of bytes to
+	 * read on the various programmers (even depending on the rest of the
+	 * structure of the transaction). 2 is a safe bet. */
+	int maxstep = 2;
 	int ret = 0;
 	while (len > 0) {
 		int step = min(len, maxstep);


-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 00:41:56 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 00:41:56 +0100
Subject: [flashrom] [PATCH] SFDP: Fetch parameter table in a more
 portable way
In-Reply-To: <4F481DF4.7090904@gmx.net>
References: <4F481DF4.7090904@gmx.net>
Message-ID: <201202242341.q1ONfuA9006113@mail2.student.tuwien.ac.at>

On Sat, 25 Feb 2012 00:32:04 +0100
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:

> SFDP parameter table reads expect a dummy byte between written and read
> data on the SPI bus. Read that dummy byte instead of writing it to be
> compatible with more (all) programmer drivers.
> Reduce SFDP parameter table read chunk size from 8 to 2 to handle
> programmers with small readcount limits.
> 
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svn at flashrom.org  Sat Feb 25 00:49:30 2012
From: svn at flashrom.org (repository service)
Date: Sat, 25 Feb 2012 00:49:30 +0100
Subject: [flashrom] [commit] r1506 - trunk
Message-ID: <E1S14tG-00071M-Vc@ra.coresystems.de>

Author: hailfinger
Date: Sat Feb 25 00:49:30 2012
New Revision: 1506
URL: http://flashrom.org/trac/flashrom/changeset/1506

Log:
SFDP: Fetch parameter table in a more portable way

SFDP parameter table reads expect a dummy byte between written data
(opcode+address) and read data on the SPI bus. Read that dummy byte
instead of writing it to be compatible with all programmer drivers.
Reduce SFDP parameter table read chunk size from 8 to 2 to handle
programmers with small readcount limits.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/sfdp.c

Modified: trunk/sfdp.c
==============================================================================
--- trunk/sfdp.c	Wed Feb 22 01:14:14 2012	(r1505)
+++ trunk/sfdp.c	Sat Feb 25 00:49:30 2012	(r1506)
@@ -19,6 +19,7 @@
 
 #include <stdint.h>
 #include <stdlib.h>
+#include <string.h>
 #include "flash.h"
 #include "spi.h"
 #include "chipdrivers.h"
@@ -26,31 +27,39 @@
 static int spi_sfdp_read_sfdp_chunk(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
 {
 	int i, ret;
+	uint8_t *newbuf;
 	const unsigned char cmd[JEDEC_SFDP_OUTSIZE] = {
 		JEDEC_SFDP,
 		(address >> 16) & 0xff,
 		(address >> 8) & 0xff,
 		(address >> 0) & 0xff,
 		/* FIXME: the following dummy byte explodes on some programmers.
-		 * One possible workaround would be to read the dummy byte
+		 * One workaround is to read the dummy byte
 		 * instead and discard its value.
 		 */
 		0
 	};
 	msg_cspew("%s: addr=0x%x, len=%d, data:\n", __func__, address, len);
-	ret = spi_send_command(flash, sizeof(cmd), len, cmd, buf);
+	newbuf = malloc(len + 1);
+	if (!newbuf)
+		return SPI_PROGRAMMER_ERROR;
+	ret = spi_send_command(flash, sizeof(cmd) - 1, len + 1, cmd, newbuf);
+	memmove(buf, newbuf + 1, len);
+	free(newbuf);
+	if (ret)
+		return ret;
 	for (i = 0; i < len; i++)
 		msg_cspew(" 0x%02x", buf[i]);
 	msg_cspew("\n");
-	return ret;
+	return 0;
 }
 
 static int spi_sfdp_read_sfdp(struct flashctx *flash, uint32_t address, uint8_t *buf, int len)
 {
-	/* FIXME: this is wrong. There are different upper bounds for the number
-	 * of bytes to read on the various programmers (even depending on the
-	 * rest of the structure of the transaction).*/
-	int maxstep = 8;
+	/* FIXME: There are different upper bounds for the number of bytes to
+	 * read on the various programmers (even depending on the rest of the
+	 * structure of the transaction). 2 is a safe bet. */
+	int maxstep = 2;
 	int ret = 0;
 	while (len > 0) {
 		int step = min(len, maxstep);


From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb 25 01:49:44 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 25 Feb 2012 01:49:44 +0100
Subject: [flashrom] compiling flashrom for Debian/kFreeBSD
In-Reply-To: <CAOfDtXO9s0CsR_ksi7y1e6FnyQACPAD1qpJxGQt6K8s3_AzW1g@mail.gmail.com>
References: <4F46DFFC.3090104@gmx.net>
	<CAOfDtXO9s0CsR_ksi7y1e6FnyQACPAD1qpJxGQt6K8s3_AzW1g@mail.gmail.com>
Message-ID: <4F483028.5030406@gmx.net>

Hi Robert,

thanks for testing that patch!

Am 24.02.2012 20:14 schrieb Robert Millan:
> Long time no see :-)

Indeed.


> El 24 de febrer de 2012 0:55, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> ha escrit:
>> I have written a patch which should fix compilation and
>> hopefully also work during runtime.
> The patch works perfectly. However, some changes are gratuitous or inaccurate:
>
>> -#elif defined(__FreeBSD__) || defined (__DragonFly__)
>> +#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
>>  	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
>>  #else
>>  	if (iopl(3) != 0) {
> We have both interfaces. You can keep using iopl() if you like.

Hm. Is iopl(3) a feature present in the FreeBSd kernel or is it just
part of the compat layer presented by glibc?


>>  #if defined(__FreeBSD__) || defined(__DragonFly__)
>> +  /* Note that FreeBSD kernel with glibc does not have machine/cpufunc.h. */
>>    #include <machine/cpufunc.h>
>>    #define off64_t off_t
>>    #define lseek64 lseek
> Actually, we have machine/cpufunc.h (we have everything in machine/*
> actually).  The off_t / lseek defines after this look dangerous though
> (they collide with glibc definitions).

Comment has been replaced with
/* Note that FreeBSD kernel with glibc has conflicting out[bwl] definitions
 * in machine/cpufunc.h and sys/io.h. Use cpufunc.h only for plain FreeBSD.
 */


>> A full build log would be nice to have so I can see any remaining build
>> issues.
> Attached (build.log).

Looks good, and works as intended.


>> If you could test if flashrom works (do NOT test flashrom on
>> laptops/notebooks/servers), that would be even better. Just run
>>
>> flashrom -VV
> Attached (run.log).

The SFDP limitation you were hitting has been fixed a few minutes ago in
r1506 in flashrom svn.


If you have any other comments about my changes, please tell me.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb 25 00:50:18 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 25 Feb 2012 00:50:18 +0100
Subject: [flashrom] [PATCH] SFDP: Fetch parameter table in a more
 portable way
In-Reply-To: <201202242341.q1ONfuA9006113@mail2.student.tuwien.ac.at>
References: <4F481DF4.7090904@gmx.net>
	<201202242341.q1ONfuA9006113@mail2.student.tuwien.ac.at>
Message-ID: <4F48223A.3000605@gmx.net>

Am 25.02.2012 00:41 schrieb Stefan Tauner:
> On Sat, 25 Feb 2012 00:32:04 +0100
> Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>
>> SFDP parameter table reads expect a dummy byte between written and read
>> data on the SPI bus. Read that dummy byte instead of writing it to be
>> compatible with more (all) programmer drivers.
>> Reduce SFDP parameter table read chunk size from 8 to 2 to handle
>> programmers with small readcount limits.
>>
>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Thanks for the review.
Committed in r1506.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From rmh at debian.org  Sat Feb 25 11:46:51 2012
From: rmh at debian.org (Robert Millan)
Date: Sat, 25 Feb 2012 10:46:51 +0000
Subject: [flashrom] compiling flashrom for Debian/kFreeBSD
In-Reply-To: <4F483028.5030406@gmx.net>
References: <4F46DFFC.3090104@gmx.net>
	<CAOfDtXO9s0CsR_ksi7y1e6FnyQACPAD1qpJxGQt6K8s3_AzW1g@mail.gmail.com>
	<4F483028.5030406@gmx.net>
Message-ID: <CAOfDtXNG4_5_7CVRnhZU_4+7v8eiU80DM20LkWAVQqsPWorPCA@mail.gmail.com>

El 25 de febrer de 2012 0:49, Carl-Daniel Hailfinger >> El 24 de
febrer de 2012 0:55, Carl-Daniel Hailfinger
>> <c-d.hailfinger.devel.2006 at gmx.net> ha escrit:
>> We have both interfaces. You can keep using iopl() if you like.
>
> Hm. Is iopl(3) a feature present in the FreeBSd kernel or is it just
> part of the compat layer presented by glibc?

It's a library function (glibc). Just pick the one you prefer :-)

>>> ? ?#include <machine/cpufunc.h>
>>> ? ?#define off64_t off_t
>>> ? ?#define lseek64 lseek
>> Actually, we have machine/cpufunc.h (we have everything in machine/*
>> actually). ?The off_t / lseek defines after this look dangerous though
>> (they collide with glibc definitions).
>
> Comment has been replaced with
> /* Note that FreeBSD kernel with glibc has conflicting out[bwl] definitions
> ?* in machine/cpufunc.h and sys/io.h. Use cpufunc.h only for plain FreeBSD.
> ?*/

Uhm no, we removed the conflicts.  We need to allow programs to
include both headers painlessly.  Again, just pick the one you prefer.
 cpufunc.h is supposed to work, and if it doesn't it's a bug.

>>>    #define off64_t off_t

Needed because FreeBSD lacks off64_t. We have both off64_t and off_t
(both are 64-bit) so on GNU/kFreeBSD this define is harmless but not
useful.

>>>    #define lseek64 lseek

Same here.

-- 
Robert Millan


From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb 25 17:03:26 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 25 Feb 2012 17:03:26 +0100
Subject: [flashrom] compiling flashrom for Debian/kFreeBSD
In-Reply-To: <CAOfDtXNG4_5_7CVRnhZU_4+7v8eiU80DM20LkWAVQqsPWorPCA@mail.gmail.com>
References: <4F46DFFC.3090104@gmx.net>
	<CAOfDtXO9s0CsR_ksi7y1e6FnyQACPAD1qpJxGQt6K8s3_AzW1g@mail.gmail.com>
	<4F483028.5030406@gmx.net>
	<CAOfDtXNG4_5_7CVRnhZU_4+7v8eiU80DM20LkWAVQqsPWorPCA@mail.gmail.com>
Message-ID: <4F49064E.9070704@gmx.net>

Am 25.02.2012 11:46 schrieb Robert Millan:
> El 25 de febrer de 2012 0:49, Carl-Daniel Hailfinger >> El 24 de
> febrer de 2012 0:55, Carl-Daniel Hailfinger
>>> <c-d.hailfinger.devel.2006 at gmx.net> ha escrit:
>>>>    #include <machine/cpufunc.h>
>>>>    #define off64_t off_t
>>>>    #define lseek64 lseek
>>> Actually, we have machine/cpufunc.h (we have everything in machine/*
>>> actually).  The off_t / lseek defines after this look dangerous though
>>> (they collide with glibc definitions).
>> Comment has been replaced with
>> /* Note that FreeBSD kernel with glibc has conflicting out[bwl] definitions
>>  * in machine/cpufunc.h and sys/io.h. Use cpufunc.h only for plain FreeBSD.
>>  */
> Uhm no, we removed the conflicts.  We need to allow programs to
> include both headers painlessly.  Again, just pick the one you prefer.
>  cpufunc.h is supposed to work, and if it doesn't it's a bug.

Thanks for the info, I have adjusted the comment:

/* Note that Debian/kFreeBSD (FreeBSD with glibc) machine/cpufunc.h
contains out[bwl] definitions which are incompatible with FreeBSD
machine/cpufunc.h. Use machine/cpufunc.h only for plain FreeBSD. */

Background:
FreeBSD machine/cpufunc.h has outb(port,data).
Linux/glibc sys/io.h has outb(data,port).

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 21:23:40 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 21:23:40 +0100
Subject: [flashrom] [PATCH 5/5] squash! print_wiki.c fix columns calculations
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1330201420-7588-6-git-send-email-stefan.tauner@student.tuwien.ac.at>

- chips

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 print_wiki.c |   30 ++++++++++++++++++------------
 1 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/print_wiki.c b/print_wiki.c
index d55563c..43fab47 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -224,6 +224,7 @@ static void print_supported_chips_wiki(int cols)
 {
 	int i = 0, c = 1, chipcount = 0;
 	const struct flashchip *f, *old = NULL;
+	unsigned int lines_per_col;
 	uint32_t t;
 	char *s;
 	char vmax[6];
@@ -238,21 +239,28 @@ static void print_supported_chips_wiki(int cols)
 		chipcount++;
 	}
 
+	/* +1 to force the resulting number of columns to be < cols */
+	lines_per_col = chipcount / cols + ((chipcount%cols) > 0 ? 1 : 0);
+
 	printf("\n== Supported chips ==\n\nTotal amount of supported "
-	       "chips: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n"
-		"| valign=\"top\"|\n\n%s", chipcount, chip_th);
+	       "chips: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n",
+	       chipcount);
 
-	for (f = flashchips; f->name != NULL; f++, i++) {
+	for (f = flashchips; f->name != NULL; f++) {
 		/* Don't print generic entries. */
 		if (!strncmp(f->vendor, "Unknown", 7) ||
 		    !strncmp(f->vendor, "Programmer", 10) ||
 		    !strncmp(f->name, "unknown", 7))
 			continue;
 
+		if ((i % lines_per_col) == 0)
+			printf("| valign=\"top\"|\n\n%s", chip_th);
+
 		/* Alternate colors if the vendor changes. */
 		if (old != NULL && strcmp(old->vendor, f->vendor))
 			c = !c;
 
+		old = f;
 		t = f->tested;
 		s = flashbuses_to_text(f->bustype);
 		sprintf(vmin, "%0.03f", f->voltage.min / (double)1000);
@@ -276,16 +284,14 @@ static void print_supported_chips_wiki(int cols)
 		       f->voltage.min ? vmax : "N/A");
 		free(s);
 
-		/* Split table into 'cols' columns. */
-		if (i >= (chipcount / cols + 1)) {
-			printf("\n|}\n\n| valign=\"top\"|\n\n%s", chip_th);
-			i = 0;
-		}
-
-		old = f;
+		if (((i % lines_per_col) + 1) == lines_per_col)
+			printf("\n|}\n\n");
+		i++;
 	}
-
-	printf("\n|}\n\n|}\n");
+	/* end inner table if it did not fill the last column fully */
+	if (((i % lines_per_col)) > 0)
+		printf("\n|}\n\n");
+	printf("|}\n\n");
 }
 
 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 21:23:39 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 21:23:39 +0100
Subject: [flashrom] [PATCH 4/5] squash! print_wiki.c fix columns calculations
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1330201420-7588-5-git-send-email-stefan.tauner@student.tuwien.ac.at>

- boards

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 print_wiki.c |   26 ++++++++++++++++----------
 1 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/print_wiki.c b/print_wiki.c
index e0b5ff3..d55563c 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -134,11 +134,12 @@ static void print_supported_chipsets_wiki(int cols)
 static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			const struct board_info boards[])
 {
-	int i, j, k = 0, color = 1;
+	int i, k = 0, color = 1;
 	int num_notes = 0;
 	char *notes = calloc(1, 1);
 	const struct board_match *b = board_matches;
 	unsigned int boardcount = 0, boardcount_good = 0, boardcount_bad = 0;
+	unsigned int lines_per_col;
 	char tmp[900 + 1];
 
 	for (i = 0; boards[i].vendor != NULL; i++) {
@@ -149,12 +150,17 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 		boardcount++;
 	}
 
+	/* +1 to force the resulting number of columns to be < cols */
+	lines_per_col = boardcount / cols + ((boardcount%cols) > 0 ? 1 : 0);
+
 	printf("\n\nTotal amount of supported %s: '''%d'''. "
 	       "Not yet supported (i.e., known-bad): '''%d'''.\n\n"
-	       "{| border=\"0\" valign=\"top\"\n| valign=\"top\"|\n\n%s",
-	       devicetype, boardcount_good, boardcount_bad, board_th);
+	       "{| border=\"0\" valign=\"top\"\n",
+	       devicetype, boardcount_good, boardcount_bad);
 
-	for (i = 0, j = 0; boards[i].vendor != NULL; i++, j++) {
+	for (i = 0; boards[i].vendor != NULL; i++) {
+		if ((i % lines_per_col) == 0)
+			printf("| valign=\"top\"|\n\n%s", board_th);
 
 		/* Alternate colors if the vendor changes. */
 		if (i > 0 && strcmp(boards[i].vendor, boards[i - 1].vendor))
@@ -190,14 +196,14 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			printf("\n");
 		}
 
-		/* Split table in 'cols' columns. */
-		if (j >= (boardcount / cols + 1)) {
-			printf("\n|}\n\n| valign=\"top\"|\n\n%s", board_th);
-			j = 0;
-		}
+		if (((i % lines_per_col) + 1) == lines_per_col)
+			printf("\n|}\n\n");
 	}
 
-	printf("\n|}\n\n|}\n");
+	/* end inner table if it did not fill the last column fully */
+	if (((i % lines_per_col)) > 0)
+		printf("\n|}\n\n");
+	printf("\n\n|}\n");
 
 	if (num_notes > 0)
 		printf("\n<small>\n%s</small>\n", notes);
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 21:23:38 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 21:23:38 +0100
Subject: [flashrom] [PATCH 3/5] print_wiki.c fix columns calculations
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1330201420-7588-4-git-send-email-stefan.tauner@student.tuwien.ac.at>

for
- chipsets

---

i noticed that the chipset columns were not uniformly divided at all
and looked at the code in more detail... out came this series of
patches that changes all three major sections of the wiki page
similarly (hopefully to the better) and it split respectively for
easier reviewing. getting this right is not trivial due to the
possible corner cases... and it makes one cry when aware of real
programming languages ;)

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 print_wiki.c |   36 +++++++++++++++++++++++-------------
 1 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/print_wiki.c b/print_wiki.c
index 756f8d4..e0b5ff3 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -91,18 +91,26 @@ wrong (a working backup flash chip and/or good soldering skills).\n</div>\n";
 
 static void print_supported_chipsets_wiki(int cols)
 {
-	int i, j, enablescount = 0, color = 1;
+	int enablescount = 0, color = 1;
+	int i;
+	unsigned int lines_per_col;
 	const struct penable *e;
 
 	for (e = chipset_enables; e->vendor_name != NULL; e++)
 		enablescount++;
 
+	/* +1 to force the resulting number of columns to be < cols */
+	lines_per_col = enablescount / cols + ((enablescount%cols) > 0 ? 1 : 0);
+
 	printf("\n== Supported chipsets ==\n\nTotal amount of supported "
-	       "chipsets: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n| "
-	       "valign=\"top\"|\n\n%s", enablescount, chipset_th);
+	       "chipsets: '''%d'''\n\n{| border=\"0\" valign=\"top\"\n",
+	       enablescount);
 
 	e = chipset_enables;
-	for (i = 0, j = 0; e[i].vendor_name != NULL; i++, j++) {
+	for (i = 0; e[i].vendor_name != NULL; i++) {
+		if ((i % lines_per_col) == 0)
+			printf("| valign=\"top\"|\n\n%s", chipset_th);
+
 		/* Alternate colors if the vendor changes. */
 		if (i > 0 && strcmp(e[i].vendor_name, e[i - 1].vendor_name))
 			color = !color;
@@ -113,30 +121,32 @@ static void print_supported_chipsets_wiki(int cols)
 		       e[i].vendor_id, e[i].device_id,
 		       (e[i].status == OK) ? "{{OK}}" : "{{?3}}");
 
-		/* Split table in 'cols' columns. */
-		if (j >= (enablescount / cols + 1)) {
-			printf("\n|}\n\n| valign=\"top\"|\n\n%s", chipset_th);
-			j = 0;
-		}
+		if (((i % lines_per_col) + 1) == lines_per_col)
+			printf("\n|}\n\n");
 	}
 
-	printf("\n|}\n\n|}\n");
+	/* end inner table if it did not fill the last column fully */
+	if (((i % lines_per_col)) > 0)
+		printf("\n|}\n\n");
+	printf("\n\n|}\n");
 }
 
 static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			const struct board_info boards[])
 {
-	int i, j, k = 0, boardcount_good = 0, boardcount_bad = 0, color = 1;
+	int i, j, k = 0, color = 1;
 	int num_notes = 0;
 	char *notes = calloc(1, 1);
-	char tmp[900 + 1];
 	const struct board_match *b = board_matches;
+	unsigned int boardcount = 0, boardcount_good = 0, boardcount_bad = 0;
+	char tmp[900 + 1];
 
 	for (i = 0; boards[i].vendor != NULL; i++) {
 		if (boards[i].working == OK)
 			boardcount_good++;
 		if (boards[i].working == BAD)
 			boardcount_bad++;
+		boardcount++;
 	}
 
 	printf("\n\nTotal amount of supported %s: '''%d'''. "
@@ -181,7 +191,7 @@ static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 		}
 
 		/* Split table in 'cols' columns. */
-		if (j >= ((boardcount_good + boardcount_bad) / cols + 1)) {
+		if (j >= (boardcount / cols + 1)) {
 			printf("\n|}\n\n| valign=\"top\"|\n\n%s", board_th);
 			j = 0;
 		}
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 21:23:35 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 21:23:35 +0100
Subject: [flashrom] [PATCH 0/5] wiki patches 2.0
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1330201420-7588-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

previous 1/5 was heavily refined into this 2/5; 5/5 fixed

Stefan Tauner (5):
  Introduce and use enum test_state
  Refactor PCI and USB device status printing
  print_wiki.c fix columns calculations
  squash! print_wiki.c fix columns calculations
  squash! print_wiki.c fix columns calculations

 flash.h      |    7 +-
 flashrom.c   |   43 +++
 ft2232_spi.c |   13 -
 pcidev.c     |    1 -
 print.c      | 1004 +++++++++++++++++++++++++++-------------------------------
 print_wiki.c |  231 +++++++++-----
 programmer.h |   18 +-
 7 files changed, 688 insertions(+), 629 deletions(-)



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 21:23:37 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 21:23:37 +0100
Subject: [flashrom] [PATCH 2/5] Refactor PCI and USB device status printing
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1330201420-7588-3-git-send-email-stefan.tauner@student.tuwien.ac.at>

To be able to get rid of lots of #ifdefs and centralize programmer-specific
data more...
 - introduce two new fields to struct programmer_entry, namely
   enum type (OTHER, USB, PCI) and union devices (pcidev_status, usbdev_status
   or char *note).
 - use those fields to generate device listings in print.c and print_wiki.c.

Bonus: add printing of USB devices to print_wiki.c and count supported PCI
and USB devices

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flashrom.c   |   43 ++++++++++++++++++
 ft2232_spi.c |   13 ------
 pcidev.c     |    1 -
 print.c      |  135 +++++++++++++++++----------------------------------------
 print_wiki.c |  136 +++++++++++++++++++++++++++++++++++++++-------------------
 programmer.h |   12 +++++
 6 files changed, 187 insertions(+), 153 deletions(-)

diff --git a/flashrom.c b/flashrom.c
index cad043b..bf1e157 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -62,6 +62,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_INTERNAL == 1
 	{
 		.name			= "internal",
+		.type			= OTHER,
+		.devices.note		= NULL,
 		.init			= internal_init,
 		.map_flash_region	= physmap,
 		.unmap_flash_region	= physunmap,
@@ -72,6 +74,9 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_DUMMY == 1
 	{
 		.name			= "dummy",
+		.type			= OTHER,
+					/* FIXME */
+		.devices.note		= "Dummy device, does nothing and logs all accesses\n",
 		.init			= dummy_init,
 		.map_flash_region	= dummy_map,
 		.unmap_flash_region	= dummy_unmap,
@@ -82,6 +87,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_NIC3COM == 1
 	{
 		.name			= "nic3com",
+		.type			= PCI,
+		.devices.pci		= nics_3com,
 		.init			= nic3com_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -93,6 +100,8 @@ const struct programmer_entry programmer_table[] = {
 	{
 		/* This programmer works for Realtek RTL8139 and SMC 1211. */
 		.name			= "nicrealtek",
+		.type			= PCI,
+		.devices.pci		= nics_realtek,
 		//.name			= "nicsmc1211",
 		.init			= nicrealtek_init,
 		.map_flash_region	= fallback_map,
@@ -104,6 +113,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_NICNATSEMI == 1
 	{
 		.name			= "nicnatsemi",
+		.type			= PCI,
+		.devices.pci		= nics_natsemi,
 		.init			= nicnatsemi_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -114,6 +125,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_GFXNVIDIA == 1
 	{
 		.name			= "gfxnvidia",
+		.type			= PCI,
+		.devices.pci		= gfx_nvidia,
 		.init			= gfxnvidia_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -124,6 +137,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_DRKAISER == 1
 	{
 		.name			= "drkaiser",
+		.type			= PCI,
+		.devices.pci		= drkaiser_pcidev,
 		.init			= drkaiser_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -134,6 +149,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_SATASII == 1
 	{
 		.name			= "satasii",
+		.type			= PCI,
+		.devices.pci		= satas_sii,
 		.init			= satasii_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -144,6 +161,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_ATAHPT == 1
 	{
 		.name			= "atahpt",
+		.type			= PCI,
+		.devices.pci		= ata_hpt,
 		.init			= atahpt_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -154,6 +173,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_FT2232_SPI == 1
 	{
 		.name			= "ft2232_spi",
+		.type			= USB,
+		.devices.usb		= devs_ft2232spi,
 		.init			= ft2232_spi_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -164,6 +185,9 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_SERPROG == 1
 	{
 		.name			= "serprog",
+		.type			= OTHER,
+					/* FIXME */
+		.devices.note		= "All programmer devices speaking the serprog protocol\n",
 		.init			= serprog_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -174,6 +198,9 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_BUSPIRATE_SPI == 1
 	{
 		.name			= "buspirate_spi",
+		.type			= OTHER,
+					/* FIXME */
+		.devices.note		= "Dangerous Prototypes Bus Pirate\n",
 		.init			= buspirate_spi_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -184,6 +211,9 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_DEDIPROG == 1
 	{
 		.name			= "dediprog",
+		.type			= OTHER,
+					/* FIXME */
+		.devices.note		= "Dediprog SF100\n",
 		.init			= dediprog_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -194,6 +224,9 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_RAYER_SPI == 1
 	{
 		.name			= "rayer_spi",
+		.type			= OTHER,
+					/* FIXME */
+		.devices.note		= "RayeR parallel port programmer\n",
 		.init			= rayer_spi_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -204,6 +237,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_NICINTEL == 1
 	{
 		.name			= "nicintel",
+		.type			= PCI,
+		.devices.pci		= nics_intel,
 		.init			= nicintel_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -214,6 +249,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_NICINTEL_SPI == 1
 	{
 		.name			= "nicintel_spi",
+		.type			= PCI,
+		.devices.pci		= nics_intel_spi,
 		.init			= nicintel_spi_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -224,6 +261,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_OGP_SPI == 1
 	{
 		.name			= "ogp_spi",
+		.type			= PCI,
+		.devices.pci		= ogp_spi,
 		.init			= ogp_spi_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -234,6 +273,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_SATAMV == 1
 	{
 		.name			= "satamv",
+		.type			= PCI,
+		.devices.pci		= satas_mv,
 		.init			= satamv_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
@@ -244,6 +285,8 @@ const struct programmer_entry programmer_table[] = {
 #if CONFIG_LINUX_SPI == 1
 	{
 		.name			= "linux_spi",
+		.type			= OTHER,
+		.devices.note		= "Device files /dev/spidev*.*\n",
 		.init			= linux_spi_init,
 		.map_flash_region	= fallback_map,
 		.unmap_flash_region	= fallback_unmap,
diff --git a/ft2232_spi.c b/ft2232_spi.c
index 122866f..ec4934e 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -435,17 +435,4 @@ static int ft2232_spi_send_command(struct flashctx *flash,
 	return failed ? -1 : 0;
 }
 
-void print_supported_usbdevs(const struct usbdev_status *devs)
-{
-	int i;
-
-	msg_pinfo("USB devices:\n");
-	for (i = 0; devs[i].vendor_name != NULL; i++) {
-		msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
-			  devs[i].device_name, devs[i].vendor_id,
-			  devs[i].device_id,
-			  (devs[i].status == NT) ? " (untested)" : "");
-	}
-}
-
 #endif
diff --git a/pcidev.c b/pcidev.c
index e8b4dc1..6e5d0f1 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -244,7 +244,6 @@ void print_supported_pcidevs(const struct pcidev_status *devs)
 {
 	int i;
 
-	msg_pinfo("PCI devices:\n");
 	for (i = 0; devs[i].vendor_name != NULL; i++) {
 		msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
 		          devs[i].device_name, devs[i].vendor_id,
diff --git a/print.c b/print.c
index 544a846..8bab8e3 100644
--- a/print.c
+++ b/print.c
@@ -422,8 +422,24 @@ static void print_supported_boards_helper(const struct board_info *boards,
 }
 #endif
 
+#if CONFIG_FT2232_SPI == 1
+void print_supported_usbdevs(const struct usbdev_status *devs)
+{
+	int i;
+
+	msg_pinfo("USB devices:\n");
+	for (i = 0; devs[i].vendor_name != NULL; i++) {
+		msg_pinfo("%s %s [%04x:%04x]%s\n", devs[i].vendor_name,
+			  devs[i].device_name, devs[i].vendor_id,
+			  devs[i].device_id,
+			  (devs[i].status == NT) ? " (untested)" : "");
+	}
+}
+#endif
+
 void print_supported(void)
 {
+	unsigned int i;
 	print_supported_chips();
 
 	msg_ginfo("\nSupported programmers:\n");
@@ -437,101 +453,30 @@ void print_supported(void)
 	msg_ginfo("\n");
 	print_supported_boards_helper(laptops_known, "laptops");
 #endif
-#if CONFIG_DUMMY == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_DUMMY].name);
-	/* FIXME */
-	msg_ginfo("Dummy device, does nothing and logs all accesses\n");
-#endif
-#if CONFIG_NIC3COM == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_NIC3COM].name);
-	print_supported_pcidevs(nics_3com);
-#endif
-#if CONFIG_NICREALTEK == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_NICREALTEK].name);
-	print_supported_pcidevs(nics_realtek);
-#endif
-#if CONFIG_NICNATSEMI == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_NICNATSEMI].name);
-	print_supported_pcidevs(nics_natsemi);
-#endif
-#if CONFIG_GFXNVIDIA == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_GFXNVIDIA].name);
-	print_supported_pcidevs(gfx_nvidia);
-#endif
-#if CONFIG_DRKAISER == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_DRKAISER].name);
-	print_supported_pcidevs(drkaiser_pcidev);
-#endif
-#if CONFIG_SATASII == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_SATASII].name);
-	print_supported_pcidevs(satas_sii);
-#endif
-#if CONFIG_ATAHPT == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_ATAHPT].name);
-	print_supported_pcidevs(ata_hpt);
-#endif
-#if CONFIG_FT2232_SPI == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_FT2232_SPI].name);
-	print_supported_usbdevs(devs_ft2232spi);
-#endif
-#if CONFIG_SERPROG == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_SERPROG].name);
-	/* FIXME */
-	msg_ginfo("All programmer devices speaking the serprog protocol\n");
-#endif
-#if CONFIG_BUSPIRATE_SPI == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_BUSPIRATE_SPI].name);
-	/* FIXME */
-	msg_ginfo("Dangerous Prototypes Bus Pirate\n");
-#endif
-#if CONFIG_DEDIPROG == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_DEDIPROG].name);
-	/* FIXME */
-	msg_ginfo("Dediprog SF100\n");
-#endif
-#if CONFIG_RAYER_SPI == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_RAYER_SPI].name);
-	/* FIXME */
-	msg_ginfo("RayeR parallel port programmer\n");
-#endif
-#if CONFIG_NICINTEL == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_NICINTEL].name);
-	print_supported_pcidevs(nics_intel);
-#endif
-#if CONFIG_NICINTEL_SPI == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_NICINTEL_SPI].name);
-	print_supported_pcidevs(nics_intel_spi);
-#endif
-#if CONFIG_OGP_SPI == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_OGP_SPI].name);
-	print_supported_pcidevs(ogp_spi);
-#endif
-#if CONFIG_SATAMV == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_SATAMV].name);
-	print_supported_pcidevs(satas_mv);
-#endif
-#if CONFIG_LINUX_SPI == 1
-	msg_ginfo("\nSupported devices for the %s programmer:\n",
-	       programmer_table[PROGRAMMER_LINUX_SPI].name);
-	msg_ginfo("Device files /dev/spidev*.*\n");
-#endif
+	for (i = 0; i < PROGRAMMER_INVALID; i++) {
+		const struct programmer_entry prog = programmer_table[i];
+		switch (prog.type) {
+		case USB:
+			msg_ginfo("\nSupported USB devices for the %s programmer:\n",
+			          prog.name);
+			print_supported_usbdevs(prog.devices.usb);
+			break;
+		case PCI:
+			msg_ginfo("\nSupported PCI devices for the %s programmer:\n",
+			          prog.name);
+			print_supported_pcidevs(prog.devices.pci);
+			break;
+		case OTHER:
+			if (prog.devices.note == NULL)
+				break;
+			msg_ginfo("\nSupported devices for the %s programmer:\n",
+				  prog.name);
+			msg_ginfo("%s", prog.devices.note);
+			break;
+		default:
+			break;
+		}
+	}
 }
 
 #if CONFIG_INTERNAL == 1
diff --git a/print_wiki.c b/print_wiki.c
index 9a9cd83..756f8d4 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -72,12 +72,9 @@ static const char chip_th[] = "{\
 | Probe\n| Read\n| Erase\n| Write\n\
 | align=\"center\" | Min \n| align=\"center\" | Max\n\n";
 
-static const char programmer_section[] = "\
-\n== Supported programmers ==\n\nThis is a list \
-of supported PCI devices flashrom can use as programmer:\n\n{| border=\"0\" \
-valign=\"top\"\n| valign=\"top\"|\n\n{| border=\"0\" style=\"font-size: \
+static const char programmer_th[] = "{| border=\"0\" style=\"font-size: \
 smaller\" valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\
-! align=\"left\" | Device\n! align=\"center\" | PCI IDs\n\
+! align=\"left\" | Device\n! align=\"center\" | IDs\n\
 ! align=\"center\" | Status\n\n";
 
 #if CONFIG_INTERNAL == 1
@@ -126,7 +123,7 @@ static void print_supported_chipsets_wiki(int cols)
 	printf("\n|}\n\n|}\n");
 }
 
-static void wiki_helper(const char *devicetype, int cols,
+static void print_supported_boards_wiki_helper(const char *devicetype, int cols,
 			const struct board_info boards[])
 {
 	int i, j, k = 0, boardcount_good = 0, boardcount_bad = 0, color = 1;
@@ -200,10 +197,10 @@ static void wiki_helper(const char *devicetype, int cols,
 static void print_supported_boards_wiki(void)
 {
 	printf("%s", board_intro);
-	wiki_helper("boards", 2, boards_known);
+	print_supported_boards_wiki_helper("boards", 2, boards_known);
 
 	printf("%s", laptop_intro);
-	wiki_helper("laptops", 1, laptops_known);
+	print_supported_boards_wiki_helper("laptops", 1, laptops_known);
 }
 #endif
 
@@ -277,7 +274,16 @@ static void print_supported_chips_wiki(int cols)
 
 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */
 #if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1
-static void print_supported_pcidevs_wiki(const struct pcidev_status *devs)
+static int count_supported_pcidevs_wiki(const struct pcidev_status *devs)
+{
+	unsigned int count = 0;
+	unsigned int i = 0;
+	for (i = 0; devs[i].vendor_name != NULL; i++)
+			count++;
+	return count;
+}
+
+static void print_supported_pcidevs_wiki_helper(const struct pcidev_status *devs)
 {
 	int i = 0;
 	static int c = 0;
@@ -295,6 +301,82 @@ static void print_supported_pcidevs_wiki(const struct pcidev_status *devs)
 }
 #endif
 
+static int count_supported_usbdevs_wiki(const struct usbdev_status *devs)
+{
+	unsigned int count = 0;
+	unsigned int i = 0;
+	for (i = 0; devs[i].vendor_name != NULL; i++)
+			count++;
+	return count;
+}
+
+static void print_supported_usbdevs_wiki_helper(const struct usbdev_status *devs)
+{
+	int i = 0;
+	static int c = 0;
+
+	/* Alternate colors if the vendor changes. */
+	c = !c;
+
+	for (i = 0; devs[i].vendor_name != NULL; i++) {
+		printf("|- bgcolor=\"#%s\"\n| %s || %s || "
+		       "%04x:%04x || {{%s}}\n", (c) ? "eeeeee" : "dddddd",
+		       devs[i].vendor_name, devs[i].device_name,
+		       devs[i].vendor_id, devs[i].device_id,
+		       (devs[i].status == NT) ? "?3" : "OK");
+	}
+}
+
+static void print_supported_devs_wiki()
+{
+	unsigned int pci_count = 0;
+	unsigned int usb_count = 0;
+	unsigned int i;
+
+	for (i = 0; i < PROGRAMMER_INVALID; i++) {
+		const struct programmer_entry prog = programmer_table[i];
+		switch (prog.type) {
+		case USB:
+			usb_count += count_supported_usbdevs_wiki(prog.devices.usb);
+			break;
+		case PCI:
+			pci_count += count_supported_pcidevs_wiki(prog.devices.pci);
+			break;
+		case OTHER:
+		default:
+			break;
+		}
+	}
+
+	printf("\n== PCI Devices ==\n\n"
+	       "Total amount of supported PCI devices flashrom can use as a programmer: '''%d'''\n\n"
+	       "{| border=\"0\" valign=\"top\"\n| valign=\"top\"|\n\n",
+	       pci_count);
+	printf("%s", programmer_th);
+
+	for (i = 0; i < PROGRAMMER_INVALID; i++) {
+		const struct programmer_entry prog = programmer_table[i];
+		if (prog.type == PCI) {
+			print_supported_pcidevs_wiki_helper(prog.devices.pci);
+		}
+	}
+	printf("\n|}\n");
+
+	printf("\n== USB Devices ==\n\n"
+	       "Total amount of supported USB devices flashrom can use as a programmer: '''%d'''\n\n"
+	       "{| border=\"0\" valign=\"top\"\n| valign=\"top\"|\n\n",
+	       usb_count);
+	printf("%s", programmer_th);
+
+	for (i = 0; i < PROGRAMMER_INVALID; i++) {
+		const struct programmer_entry prog = programmer_table[i];
+		if (prog.type == USB) {
+			print_supported_usbdevs_wiki_helper(prog.devices.usb);
+		}
+	}
+	printf("\n|}\n");
+}
+
 void print_supported_wiki(void)
 {
 	time_t t = time(NULL);
@@ -305,40 +387,6 @@ void print_supported_wiki(void)
 	print_supported_chipsets_wiki(3);
 	print_supported_boards_wiki();
 #endif
-	printf("%s", programmer_section);
-#if CONFIG_NIC3COM == 1
-	print_supported_pcidevs_wiki(nics_3com);
-#endif
-#if CONFIG_NICREALTEK == 1
-	print_supported_pcidevs_wiki(nics_realtek);
-#endif
-#if CONFIG_NICNATSEMI == 1
-	print_supported_pcidevs_wiki(nics_natsemi);
-#endif
-#if CONFIG_GFXNVIDIA == 1
-	print_supported_pcidevs_wiki(gfx_nvidia);
-#endif
-#if CONFIG_DRKAISER == 1
-	print_supported_pcidevs_wiki(drkaiser_pcidev);
-#endif
-#if CONFIG_SATASII == 1
-	print_supported_pcidevs_wiki(satas_sii);
-#endif
-#if CONFIG_ATAHPT == 1
-	print_supported_pcidevs_wiki(ata_hpt);
-#endif
-#if CONFIG_NICINTEL == 1
-	print_supported_pcidevs_wiki(nics_intel);
-#endif
-#if CONFIG_NICINTEL_SPI == 1
-	print_supported_pcidevs_wiki(nics_intel_spi);
-#endif
-#if CONFIG_OGP_SPI == 1
-	print_supported_pcidevs_wiki(ogp_spi);
-#endif
-#if CONFIG_SATAMV == 1
-	print_supported_pcidevs_wiki(satas_mv);
-#endif
-	printf("\n|}\n");
+	print_supported_devs_wiki();
 }
 
diff --git a/programmer.h b/programmer.h
index a074662..976a44d 100644
--- a/programmer.h
+++ b/programmer.h
@@ -87,9 +87,21 @@ enum programmer {
 	PROGRAMMER_INVALID /* This must always be the last entry. */
 };
 
+enum programmer_type {
+	PCI,
+	USB,
+	OTHER,
+};
+
 struct programmer_entry {
 	const char *vendor;
 	const char *name;
+	enum programmer_type type;
+	union {
+		const struct pcidev_status *const pci;
+		const struct usbdev_status *const usb;
+		const char * const note;
+	} devices;
 
 	int (*init) (void);
 
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 21:23:36 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 21:23:36 +0100
Subject: [flashrom] [PATCH 1/5] Introduce and use enum test_state
In-Reply-To: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <1329683217-31150-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <1330201420-7588-2-git-send-email-stefan.tauner@student.tuwien.ac.at>

Previously boards in the wiki were tagged either as working or as known
bad. But we added support to various boards via board enables that were
then never tested because the owners have not reported back. This can
now be tagged with NT and is shown appropriately.

Also, the underlying data structure indicating state was converted from
macros to an enum while preserving original integer values.

Because all lines specifying supported boards and laptops were touched
anyway, this patch also re-indents them.

---
TODO: change other occurrences to use it.  wanted to get feedack first.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 flash.h      |    7 +-
 print.c      |  869 +++++++++++++++++++++++++++++-----------------------------
 print_wiki.c |    7 +-
 programmer.h |    6 +-
 4 files changed, 446 insertions(+), 443 deletions(-)

diff --git a/flash.h b/flash.h
index 0dac13d..4d0d79b 100644
--- a/flash.h
+++ b/flash.h
@@ -251,8 +251,11 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, i
 int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
 int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
 
-#define OK 0
-#define NT 1    /* Not tested */
+enum test_state {
+	OK = 0,
+	NT = 1,	/* Not tested */
+	BAD
+};
 
 /* Something happened that shouldn't happen, but we can go on. */
 #define ERROR_NONFATAL 0x100
diff --git a/print.c b/print.c
index 1fdeac7..544a846 100644
--- a/print.c
+++ b/print.c
@@ -545,428 +545,427 @@ void print_supported(void)
 /* Please keep this list alphabetically ordered by vendor/board. */
 const struct board_info boards_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
-	B("A-Trend",	"ATC-6220",		1, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
-	B("abit",	"A-S78H",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
-	B("abit",	"AN-M2",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
-	B("abit",	"AV8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
-	B("abit",	"AX8",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
-	B("abit",	"BM6",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
-	B("abit",	"Fatal1ty F-I90HD",	1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
-	B("abit",	"IC7",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
-	B("abit",	"IP35",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
-	B("abit",	"IP35 Pro",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL),
-	B("abit",	"IS-10",		0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", "Reported by deejkuba at aol.com to flashrom at coreboot.org, no public archive. Missing board enable and/or M50FW040 unlocking. May work now."),
-	B("abit",	"KN8 Ultra",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra", NULL),
-	B("abit",	"NF-M2 nView",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
-	B("abit",	"NF-M2S",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2", NULL),
-	B("abit",	"NF7-S",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
-	B("abit",	"VA6",			1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6", NULL),
-	B("abit",	"VT6X4",		1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
-	B("Acorp",	"6A815EPD",		1, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
-	B("Advantech",	"PCM-5820",		1, "http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
-	B("agami",	"Aruma",		1, "http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
-	B("Albatron",	"PM266A Pro",		1, "http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
-	B("AOpen",	"i945GMx-VFX",		1, NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
-	B("AOpen",	"vKM400Am-S",		1, "http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
-	B("Artec Group","DBE61",		1, "http://wiki.thincan.org/DBE61", NULL),
-	B("Artec Group","DBE62",		1, "http://wiki.thincan.org/DBE62", NULL),
-	B("ASI",	"MB-5BLMP",		1, "http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."),
-	B("ASRock",	"775i65G",		1, "http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
-	B("ASRock",	"890GX Extreme3",	1, "http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
-	B("ASRock",	"939A785GMH/128M",	1, "http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
-	B("ASRock",	"A330GC",		1, "http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
-	B("ASRock",	"A770CrossFire",	1, "http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
-	B("ASRock",	"ALiveNF6G-DVI",	1, "http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
-	B("ASRock",	"AM2NF6G-VSTA",		1, "http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
-	B("ASRock",	"ConRoeXFire-eSATA2",	1, "http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
-	B("ASRock",	"K7S41",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
-	B("ASRock",	"K7S41GX",		1, "http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
-	B("ASRock",	"K7VT4A+",		0, "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
-	B("ASRock",	"K8S8X",		1, "http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
-	B("ASRock",	"M3A790GXH/128M",	1, "http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
-	B("ASRock",	"P4i65GV",		1, "http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
-	B("ASUS",	"A7N8X Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
-	B("ASUS",	"A7N8X-E Deluxe",	1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
-	B("ASUS",	"A7N8X-VM/400",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
-	B("ASUS",	"A7V133",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
-	B("ASUS",	"A7V333",		1, "ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
-	B("ASUS",	"A7V400-MX",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
-	B("ASUS",	"A7V600-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
-	B("ASUS",	"A7V8X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
-	B("ASUS",	"A7V8X-MX",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
-	B("ASUS",	"A7V8X-MX SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
-	B("ASUS",	"A7V8X-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
-	B("ASUS",	"A8M2N-LA (NodusM3-GL8E)", 1, "http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
-	B("ASUS",	"A8N-E",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
-	B("ASUS",	"A8N-LA (Nagami-GL8E)",	1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
-	B("ASUS",	"A8N-SLI",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
-	B("ASUS",	"A8N-SLI Deluxe",	0, NULL, "Untested board enable."),
-	B("ASUS",	"A8N-SLI Premium",	1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
-	B("ASUS",	"A8N-VM",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
-	B("ASUS",	"A8N-VM CSM",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
-	B("ASUS",	"A8NE-FM/S",		1, "http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM", NULL),
-	B("ASUS",	"A8V Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
-	B("ASUS",	"A8V-E Deluxe",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
-	B("ASUS",	"A8V-E SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
-	B("ASUS",	"Crosshair II Formula",	1, "http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
-	B("ASUS",	"Crosshair IV Extreme",	1, "http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
-	B("ASUS",	"E35M1-I DELUXE",	1, "http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
-	B("ASUS",	"K8N",			1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
-	B("ASUS",	"K8V",			1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
-	B("ASUS",	"K8V SE Deluxe",	1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
-	B("ASUS",	"K8V-X",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
-	B("ASUS",	"K8V-X SE",		1, "http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
-	B("ASUS",	"KFSN4-DRE/SAS",	1, "http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL),
-	B("ASUS",	"M2A-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
-	B("ASUS",	"M2A-VM (HDMI)",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
-	B("ASUS",	"M2N32-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
-	B("ASUS",	"M2N-E",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
-	B("ASUS",	"M2N-E SLI",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
-	B("ASUS",	"M2N-SLI Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
-	B("ASUS",	"M2NBP-VM CSM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
-	B("ASUS",	"M2NPV-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
-	B("ASUS",	"M2V",			1, "http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
-	B("ASUS",	"M2V-MX",		1, "http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
-	B("ASUS",	"M3A",			1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
-	B("ASUS",	"M3A76-CM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
-	B("ASUS",	"M3A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
-	B("ASUS",	"M3N78-VM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
-	B("ASUS",	"M4A78-EM",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
-	B("ASUS",	"M4A785TD-M EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
-	B("ASUS",	"M4A785TD-V EVO",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
-	B("ASUS",	"M4A78LT-M LE",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
-	B("ASUS",	"M4A79T Deluxe",	1, "http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
-	B("ASUS",	"M4A87TD/USB3",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
-	B("ASUS",	"M4A89GTD PRO",		1, "http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
-	B("ASUS",	"M4N78 PRO",		1, "http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
-	B("ASUS",	"M5A99X EVO",		1, "http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
-	B("ASUS",	"MEW-AM",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("ASUS",	"MEW-VM",		0, "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("ASUS",	"OPLX-M",		0, NULL, "Untested board enable."),
-	B("ASUS",	"P2B",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
-	B("ASUS",	"P2B-D",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
-	B("ASUS",	"P2B-DS",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
-	B("ASUS",	"P2B-F",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
-	B("ASUS",	"P2B-N",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
-	B("ASUS",	"P2E-M",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
-	B("ASUS",	"P2L97-S",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
-	B("ASUS",	"P3B-F",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("ASUS",	"P4B266",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
-	B("ASUS",	"P4B266-LM",		1, "http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
-	B("ASUS",	"P4B533-E",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
-	B("ASUS",	"P4C800-E Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL),
-	B("ASUS",	"P4GV-LA (Guppy)",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478", NULL),
-	B("ASUS",	"P4P800",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
-	B("ASUS",	"P4P800-E Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL),
-	B("ASUS",	"P4P800-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
-	B("ASUS",	"P4SC-E",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
-	B("ASUS",	"P4SD-LA",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
-	B("ASUS",	"P4S533-X",		1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
-	B("ASUS",	"P4S800-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
-	B("ASUS",	"P5A",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
-	B("ASUS",	"P5B",			1, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
-	B("ASUS",	"P5B-Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL),
-	B("ASUS",	"P5BV-M",		0, "ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
-	B("ASUS",	"P5GC-MX/1333",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL),
-	B("ASUS",	"P5GD1 Pro",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
-	B("ASUS",	"P5GD1-VM/S",		1, NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."),
-	B("ASUS",	"P5GD1(-VM)",		0, NULL, "Untested board enable."),
-	B("ASUS",	"P5GD2 Premium",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL),
-	B("ASUS",	"P5GDC Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
-	B("ASUS",	"P5GDC-V Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
-	B("ASUS",	"P5GD2/C variants",	0, NULL, "Untested board enable."),
-	B("ASUS",	"P5K-V",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
-	B("ASUS",	"P5K-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
-	B("ASUS",	"P5KC",			1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
-	B("ASUS",	"P5KPL-CM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
-	B("ASUS",	"P5L-MX",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
-	B("ASUS",	"P5L-VM 1394",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
-	B("ASUS",	"P5LD2",		0, NULL, "Untested board enable."),
-	B("ASUS",	"P5LP-LE (Lithium-UL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
-	B("ASUS",	"P5LP-LE (Epson OEM)",	1, NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
-	B("ASUS",	"P5LP-LE",		0, NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),
-	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Needs a board enable (http://patchwork.coreboot.org/patch/3298/)."),
-	B("ASUS",	"P5N-D",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
-	B("ASUS",	"P5N-E SLI",		0, "http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
-	B("ASUS",	"P5N32-E SLI",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
-	B("ASUS",	"P5N7A-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
-	B("ASUS",	"P5ND2-SLI Deluxe",	1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
-	B("ASUS",	"P5PE-VM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
-	B("ASUS",	"P5QPL-AM",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
-	B("ASUS",	"P5VD1-X",		1, "http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
-	B("ASUS",	"P6T SE",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
-	B("ASUS",	"P6T Deluxe",		1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
-	B("ASUS",	"P6T Deluxe V2",	1, "http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL),
-	B("ASUS",	"P7H57D-V EVO",		1, "http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL),
-	B("ASUS",	"P7H55-M LX",		0, NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
-	B("ASUS",	"P8B-E/4L",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8B WS",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8H61 PRO",		0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8H61-M LE/USB3",	0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8H67-M PRO",		0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8P67 (rev. 3.1)",	0, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"P8Z68-V PRO",		0, NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ASUS",	"Z8NA-D6C",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
-	B("ASUS",	"Z8PE-D12",		1, "http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
-	B("BCOM",	"WinNET100",		1, "http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
-	B("Bifferos",	"Bifferboard",		1, "http://bifferos.co.uk/", NULL),
-	B("Biostar",	"N68S3+",		1, NULL, NULL),
-	B("Biostar",	"M6TBA",		0, "ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("Biostar",	"M7NCD Pro",		1, "http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
-	B("Biostar",	"P4M80-M4",		1, "http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
-	B("Biostar",	"TA780G M2+",		1, "http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344", NULL),
-	B("Boser",	"HS-6637",		0, "http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."),
-	B("Congatec",	"conga-X852",		1, "http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
-	B("Dell",	"OptiPlex GX1",		1, "http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL),
-	B("Dell",	"PowerEdge 1850",	1, "http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL),
-	B("DFI",	"855GME-MGF",		0, "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
-	B("DFI",	"Blood-Iron P35 T2RL",	1, "http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
-	B("Elitegroup",	"GeForce6100SM-M ",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
-	B("Elitegroup", "GF7100PVT-M3 (V1.0)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
-	B("Elitegroup",	"K7S5A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
-	B("Elitegroup",	"K7S6A",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
-	B("Elitegroup", "K7SEM (V1.0A)",	1, "http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
-	B("Elitegroup",	"K7VTA3",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
-	B("Elitegroup",	"P4M800PRO-M (V1.0A, V2.0)", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
-	B("Elitegroup", "P4VXMS (V1.0A)",	1, NULL, NULL),
-	B("Elitegroup",	"P6IWP-Fe",		1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
-	B("Elitegroup",	"P6VAP-A+",		1, "http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
-	B("Elitegroup", "RS485M-M",		1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0", NULL),
-	B("Emerson",	"ATCA-7360",		1, "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx", NULL),
-	B("EPoX",	"EP-8K5A2",		1, "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
-	B("EPoX",	"EP-8NPA7I",		1, "http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
-	B("EPoX",	"EP-9NPA7I",		1, "http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
-	B("EPoX",	"EP-8RDA3+",		1, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
-	B("EPoX",	"EP-BX3",		1, "http://www.epox.com/product.asp?ID=EP-BX3", NULL),
-	B("EVGA",	"132-CK-NF78",		1, "http://www.evga.com/articles/385.asp", NULL),
-	B("EVGA",	"270-WS-W555-A2 (Classified SR-2)", 1, "http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
-	B("FIC",	"VA-502",		0, "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
-	B("Foxconn",	"6150K8MD-8EKRSH",	1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157", NULL),
-	B("Foxconn",	"A6VMX",		1, "http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346", NULL),
-	B("Foxconn",	"P4M800P7MA-RS2",	1, "http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138", NULL),
-	B("Freetech",	"P6F91i",		1, "http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html", NULL),
-	B("Fujitsu-Siemens", "ESPRIMO P5915",	1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm", "Mainboard model is D2312-A2."),
-	B("GIGABYTE",	"GA-2761GXDK",		1, "http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/", NULL),
-	B("GIGABYTE",	"GA-6BXC",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
-	B("GIGABYTE",	"GA-6BXDU",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
-	B("GIGABYTE",	"GA-6IEM",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
-	B("GIGABYTE",	"GA-6VXE7+",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
-	B("GIGABYTE",	"GA-6ZMA",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
-	B("GIGABYTE",	"GA-MA785GMT-UD2H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
-	B("GIGABYTE",	"GA-770TA-UD3",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
-	B("GIGABYTE",	"GA-7DXR",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
-	B("GIGABYTE",	"GA-7VT600",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
-	B("GIGABYTE",	"GA-7ZM",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
-	B("GIGABYTE",	"GA-880GMA-USB3 (rev. 3.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
-	B("GIGABYTE",	"GA-8I945GZME-RH",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
-	B("GIGABYTE",	"GA-8IP775",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
-	B("GIGABYTE",	"GA-8IRML",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
-	B("GIGABYTE",	"GA-8PE667 Ultra 2",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
-	B("GIGABYTE",	"GA-8SIMLH",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
-	B("GIGABYTE",	"GA-945PL-S3P (rev. 6.6)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
-	B("GIGABYTE",	"GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
-	B("GIGABYTE",	"GA-965P-DS4",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
-	B("GIGABYTE",	"GA-EP31-DS3L (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
-	B("GIGABYTE",	"GA-EP35-DS3L",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
-	B("GIGABYTE",	"GA-EX58-UD4P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
-	B("GIGABYTE",	"GA-K8N-SLI",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
-	B("GIGABYTE",	"GA-K8N51GMF",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
-	B("GIGABYTE",	"GA-K8N51GMF-9",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
-	B("GIGABYTE",	"GA-K8NS Pro-939",	0, "http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."),
-	B("GIGABYTE",	"GA-M57SLI-S4",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
-	B("GIGABYTE",	"GA-M61P-S3",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
-	B("GIGABYTE",	"GA-M720-US3",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
-	B("GIGABYTE",	"GA-MA69VM-S2",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
-	B("GIGABYTE",	"GA-MA74GM-S2H (rev. 3.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
-	B("GIGABYTE",	"GA-MA770-UD3 (rev. 2.1)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
-	B("GIGABYTE",	"GA-MA770T-UD3P",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
-	B("GIGABYTE",	"GA-MA780G-UD3H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
-	B("GIGABYTE",	"GA-MA78G-DS3H (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
-	B("GIGABYTE",	"GA-MA78GM-S2H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */
-	B("GIGABYTE",	"GA-MA78GPM-DS2H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
-	B("GIGABYTE",	"GA-MA790FX-DQ6",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
-	B("GIGABYTE",	"GA-MA790GP-DS4H",	1, "http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
-	B("GIGABYTE",	"GA-MA790XT-UD4P (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
-	B("GIGABYTE",	"GA-P55A-UD4 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
-	B("GIGABYTE",	"GA-P67A-UD3P",		1, "http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
-	B("GIGABYTE",	"GA-X58A-UD7 (rev. 2.0)", 1, NULL, NULL),
-	B("GIGABYTE",	"GA-X58A-UDR3 (rev. 2.0)", 1, NULL, NULL),
-	B("GIGABYTE",	"GA-Z68MX-UD2H-B (rev. 1.3)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
-	B("GIGABYTE",	"GA-Z68XP-UD3 (rev. 1.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
-	B("HP",		"e-Vectra P2706T",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
-	B("HP",		"ProLiant DL145 G3",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
-	B("HP",		"ProLiant DL165 G6",	1, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
-	B("HP",		"ProLiant N40L",	1, NULL, NULL),
-	B("HP",		"Puffer2-UL8E",		1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
-	B("HP",		"dc7800",		0, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1", "ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor, locked ME region."),
-	B("HP",		"Vectra VL400",		1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
-	B("HP",		"Vectra VL420 SFF",	1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
-	B("HP",		"xw4400 (0A68h)",	0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
-	B("HP",		"xw9400",		1, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454", "Boot block is write protected unless the solder points next to F2 are shorted."),
-	B("IBASE",	"MB899",		1, "http://www.ibase-i.com.tw/2009/mb899.html", NULL),
-	B("IBM",	"x3455",		1, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
-	B("IEI",	"PICOe-9452",		1, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
-	B("Intel",	"D201GLY",		1, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
-	B("Intel",	"D425KT",		0, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
-	B("Intel",	"D865GLC",		0, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
-	B("Intel",	"DG45ID",		0, "http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
-	B("Intel",	"DH67CF",		0, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
-	B("Intel",	"EP80759",		1, NULL, NULL),
-	B("Intel",	"Foxhollow",		1, NULL, "Intel reference board."),
-	B("Intel",	"Greencity",		1, NULL, "Intel reference board."),
-	B("Intel",	"SE440BX-2",		0, "http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard", "Probably won't work, see http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
-	B("IWILL",	"DK8-HTX",		1, "http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98", NULL),
-	B("Jetway",	"J-7BXAN",		1, "http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
-	B("Jetway",	"J7F4K1G5D-PB",		1, "http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D", NULL),
-	B("Kontron",	"986LCD-M",		1, "http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html", NULL),
-	B("Lanner",	"EM-8510C",		1, NULL, NULL),
-	B("Lex",	"CV700A",		1, "http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
-	B("Mitac",	"6513WU",		1, "http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm", NULL),
-	B("MSC",	"Q7-TCTC",		1, "http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html", NULL),
-	B("MSI",	"MS-6153",		1, "http://www.msi.com/product/mb/MS-6153.html", NULL),
-	B("MSI",	"MS-6156",		1, "http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm", NULL),
-	B("MSI",	"MS-6163 (MS-6163 Pro)",1, "http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
-	B("MSI",	"MS-6178",		0, "http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
-	B("MSI",	"MS-6330 (K7T Turbo)",	1, "http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
-	B("MSI",	"MS-6391 (845 Pro4)",	1, "http://www.msi.com/product/mb/845-Pro4.html", NULL),
-	B("MSI",	"MS-6561 (745 Ultra)",	1, "http://www.msi.com/product/mb/745-Ultra.html", NULL),
-	B("MSI",	"MS-6566 (845 Ultra-C)",1, "http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
-	B("MSI",	"MS-6570 (K7N2)",	1, "http://www.msi.com/product/mb/K7N2.html", NULL),
-	B("MSI",	"MS-6577 (Xenon)",	1, "http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843", "This is an OEM board from HP, the HP name is Xenon."),
-	B("MSI",	"MS-6590 (KT4 Ultra)",	1, "http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
-	B("MSI",	"MS-6702E (K8T Neo2-F)",1, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
-	B("MSI",	"MS-6712 (KT4V)",	1, "http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
-	B("MSI",	"MS-6787 (P4MAM-V/P4MAM-L)", 1, "http://www.msi.com/service/search/?kw=6787&type=product", NULL),
-	B("MSI",	"MS-7005 (651M-L)",	1, "http://www.msi.com/product/mb/651M-L.html", NULL),
-	B("MSI",	"MS-7025 (K8N Neo2 Platinum)", 1, "http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
-	B("MSI",	"MS-7046",		1, "http://www.heimir.de/ms7046/", NULL),
-	B("MSI",	"MS-7061 (KM4M-V/KM4AM-V)", 1, "http://www.msi.com/service/search/?kw=7061&type=product", NULL),
-	B("MSI",	"MS-7065",		1, "http://browse.geekbench.ca/geekbench2/view/53114", NULL),
-	B("MSI",	"MS-7135 (K8N Neo3)",	1, "http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
-	B("MSI",	"MS-7142 (K8MM-V)",	1, "http://www.msi.com/product/mb/K8MM-V.html", NULL),
-	B("MSI",	"MS-7168 (Orion)",	1, "http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart", NULL),
-	B("MSI",	"MS-7207 (K8NGM2-L)",	1, "http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
-	B("MSI",	"MS-7211 (PM8M3-V)",	1, "http://www.msi.com/product/mb/PM8M3-V.html", NULL),
-	B("MSI",	"MS-7236 (945PL Neo3)",	1, "http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
-	B("MSI",	"MS-7253 (K9VGM-V)",	1, "http://www.msi.com/product/mb/K9VGM-V.html", NULL),
-	B("MSI",	"MS-7255 (P4M890M)",	1, "http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
-	B("MSI",	"MS-7260 (K9N Neo PCB 1.0)", 0, "http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
-	B("MSI",	"MS-7309 (K9N6PGM2-V2)", 1, "http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
-	B("MSI",	"MS-7312 (K9MM-V)",	1, "http://www.msi.com/product/mb/K9MM-V.html", NULL),
-	B("MSI",	"MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
-	B("MSI",	"MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
-	B("MSI",	"MS-7369 (K9N Neo V2)", 1, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
-	B("MSI",	"MS-7376 (K9A2 Platinum V1)", 1, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
-	B("MSI",	"MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
-	B("MSI",	"MS-7529 (G31TM-P21)",  1, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
-	B("MSI",	"MS-7548 (Aspen-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
-	B("MSI",	"MS-7596 (785GM-E51)",  1, "http://www.msi.com/product/mb/785GM-E51.html", NULL),
-	B("MSI",	"MS-7599 (870-C45)",	1, "http://www.msi.com/product/mb/870-C45.html", NULL),
-	B("MSI",	"MS-7613 (Iona-GL8E)",	0, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("MSI",	"MS-7635 (H55M-ED55)",	0, "http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("MSI",	"MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
-	B("MSI",	"MS-7642 (890GXM-G65)",	1, "http://www.msi.com/product/mb/890GXM-G65.html", NULL),
-	B("MSI",	"MS-7676 (H67MA-ED55(B3))", 1, "http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
-	B("MSI",	"MS-7696 (A75MA-G55)",	1, "http://www.msi.com/product/mb/A75MA-G55.html", NULL),
-	B("MSI",	"MS-7698 (E350IA-E45)",	1, "http://www.msi.com/product/mb/E350IA-E45.html", NULL),
-	B("NEC",	"PowerMate 2000",	1, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
-	B("Nokia",	"IP530",		1, NULL, NULL),
-	B("PCCHIPS ",	"M598LMR (V9.0)",	1, NULL, NULL),
-	B("PCCHIPS ",	"M863G (V5.1A)",	1, "http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0", NULL),
-	B("PC Engines",	"Alix.1c",		1, "http://pcengines.ch/alix1c.htm", NULL),
-	B("PC Engines",	"Alix.2c2",		1, "http://pcengines.ch/alix2c2.htm", NULL),
-	B("PC Engines",	"Alix.2c3",		1, "http://pcengines.ch/alix2c3.htm", NULL),
-	B("PC Engines",	"Alix.2d3",		1, "http://pcengines.ch/alix2d3.htm", NULL),
-	B("PC Engines",	"Alix.3c3",		1, "http://pcengines.ch/alix3c3.htm", NULL),
-	B("PC Engines",	"Alix.3d3",		1, "http://pcengines.ch/alix3d3.htm", NULL),
-	B("PC Engines",	"Alix.6f2",		1, "http://pcengines.ch/alix6f2.htm", NULL),
-	B("PC Engines",	"WRAP.2E",		1, "http://pcengines.ch/wrap2e1.htm", NULL),
-	B("Portwell",	"PEB-4700VLA",		1, "http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
-	B("RCA",	"RM4100",		1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
-	B("Samsung",	"Polaris 32",		1, NULL, NULL),
-	B("Shuttle",	"AK31",			1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
-	B("Shuttle",	"AK38N",		1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
-	B("Shuttle",	"AV11V30",		1, NULL, NULL),
-	B("Shuttle",	"AV18E2",		1, "http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
-	B("Shuttle",	"FD37",			1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
-	B("Shuttle",	"FH67",			1, "http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
-	B("Shuttle",	"FN25",			1, "http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
-	B("Shuttle",	"X50/X50(B)",		1, "http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
-	B("Soyo",	"SY-5VD",		0, "http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
-	B("Soyo",	"SY-6BA+ III",		1, "http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
-	B("Soyo",	"SY-7VCA",		1, "http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html", NULL),
-	B("Sun",	"Blade x6250",		1, "http://www.sun.com/servers/blades/x6250/", NULL),
-	B("Sun",	"Fire x4150",		0, "http://www.sun.com/servers/x64/x4150/", "No public report found. May work now."),
-	B("Sun",	"Fire x4200",		0, "http://www.sun.com/servers/entry/x4200/", "No public report found. May work now."),
-	B("Sun",	"Fire x4540",		0, "http://www.sun.com/servers/x64/x4540/", "No public report found. May work now."),
-	B("Sun",	"Fire x4600",		0, "http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."),
-	B("Sun",	"Ultra 40 M2",		1, "http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html", NULL),
-	B("Supermicro",	"H8QC8",		1, "http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL),
-	B("Supermicro", "X5DP8-G2",		1, "http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL),
-	B("Supermicro", "X7DBT-INF",		1, "http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
-	B("Supermicro", "X7SPA-HF",		1, "http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
-	B("Supermicro", "X8DT3",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
-	B("Supermicro", "X8DTE-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
-	B("Supermicro", "X8DTH-6F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
-	B("Supermicro",	"X8DTT-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
-	B("Supermicro",	"X8DTT-HIBQF",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
-	B("Supermicro",	"X8DTU-6TF+",		0, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("Supermicro",	"X8DTU-F",		1, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
-	B("Supermicro",	"X8SIE(-F)",		0, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
-	B("Supermicro",	"X8STi",		1, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
-	B("Supermicro",	"X9SCA-F",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("Supermicro",	"X9SCL",		0, "http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("T-Online",	"S-100",		1, "http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
-	B("Tekram",	"P6Pro-A5",		1, "http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
-	B("Termtek",	"TK-3370 (Rev:2.5B)",	1, NULL, NULL),
-	B("Thomson",	"IP1000",		1, "http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
-	B("TriGem",	"Anaheim-3",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
-	B("TriGem",	"Lomita",		1, "http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
-	B("Tyan",	"S5375-1U (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
-	B("Tyan",	"S1846 (Tsunami ATX)",	1, "http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
-	B("Tyan",	"S2466 (Tiger MPX)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
-	B("Tyan",	"S2498 (Tomcat K7M)",	1, "http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
-	B("Tyan",	"S2723 (Tiger i7501)",	1, "http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
-	B("Tyan",	"S2881 (Thunder K8SR)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
-	B("Tyan",	"S2882 (Thunder K8S Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
-	B("Tyan",	"S2882-D (Thunder K8SD Pro)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
-	B("Tyan",	"S2891 (Thunder K8SRE)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
-	B("Tyan",	"S2892 (Thunder K8SE)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
-	B("Tyan",	"S2895 (Thunder K8WE)",	1, "http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
-	B("Tyan",	"S2912 (Thunder n3600R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
-	B("Tyan",	"S2915 (Thunder n6650W)", 1, "http://tyan.com/product_board_detail.aspx?pid=163", NULL),
-	B("Tyan",	"S2915-E (Thunder n6650W)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041", NULL),
-	B("Tyan",	"S2933 (Thunder n3600S)", 1, "http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL),
-	B("Tyan",	"S3095 (Tomcat i945GM)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
-	B("Tyan",	"S3992 (Thunder h2000M)", 1, "http://tyan.com/product_board_detail.aspx?pid=235", NULL),
-	B("Tyan",	"S5180 (Toledo i965R)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
-	B("Tyan",	"S5191 (Toledo i3000R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
-	B("Tyan",	"S5197 (Toledo i3010W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
-	B("Tyan",	"S5211 (Toledo i3210W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
-	B("Tyan",	"S5211-1U (Toledo i3200R)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
-	B("Tyan",	"S5220 (Toledo q35T)",	1, "http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
-	B("Tyan",	"S5375 (Tempest i5100X)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
-	B("Tyan",	"S5376 (Tempest i5100W)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=605", "Both S5376G2NR and S5376WAG2NR should work."),
-	B("Tyan",	"S5377 (Tempest i5100T)", 1, "http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017", NULL),
-	B("Tyan",	"S5382 (Tempest i5000PW)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
-	B("Tyan",	"S5397 (Tempest i5400PW)", 1, "http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
-	B("VIA",	"EPIA M/MII/...",	1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202", NULL), /* EPIA-MII link for now */
-	B("VIA",	"EPIA SP",		1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261", NULL),
-	B("VIA",	"EPIA-CN",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400", NULL),
-	B("VIA",	"EPIA EK",		1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420", NULL),
-	B("VIA",	"EPIA-EX15000G",	1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450", NULL),
-	B("VIA",	"EPIA-LN",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473", NULL),
-	B("VIA",	"EPIA-M700",		1, "http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700", NULL),
-	B("VIA",	"EPIA-N/NL",		1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221", NULL), /* EPIA-N link for now */
-	B("VIA",	"EPIA-NX15000G",	1, "http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470", NULL),
-	B("VIA",	"NAB74X0",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590", NULL),
-	B("VIA",	"pc2500e",		1, "http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp", NULL),
-	B("VIA",	"PC3500G",		1, "http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp", NULL),
-	B("VIA",	"VB700X",		1, "http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490", NULL),
-	B("ZOTAC",	"Fusion-ITX WiFi (FUSION350-A-E)", 1, NULL, NULL),
-	B("ZOTAC",	"GeForce 8200",		1, "http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92", NULL),
-	B("ZOTAC",	"H67-ITX WiFi (H67ITX-C-E)", 0, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("ZOTAC",	"ZBOX HD-ID11",		1, "http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75", NULL),
+	B("A-Trend",	"ATC-6220",				OK,	"http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
+	B("abit",	"A-S78H",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=A-S78H&fMTYPE=Socket+AM2", NULL),
+	B("abit",	"AN-M2",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20AM2&pMODEL_NAME=AN-M2", NULL),
+	B("abit",	"AV8",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AV8", NULL),
+	B("abit",	"AX8",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=AX8", NULL),
+	B("abit",	"BM6",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=BM6&fMTYPE=Socket%20370", NULL),
+	B("abit",	"Fatal1ty F-I90HD",			OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=Fatal1ty+F-I90HD&fMTYPE=LGA775", NULL),
+	B("abit",	"IC7",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IC7&fMTYPE=Socket%20478", NULL),
+	B("abit",	"IP35",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35", NULL),
+	B("abit",	"IP35 Pro",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LGA775&pMODEL_NAME=IP35%20Pro", NULL),
+	B("abit",	"IS-10",				BAD,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=IS-10&fMTYPE=Socket+478", "Reported by deejkuba at aol.com to flashrom at coreboot.org, no public archive. Missing board enable and/or M50FW040 unlocking. May work now."),
+	B("abit",	"KN8 Ultra",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?DEFTITLE=Y&fMTYPE=Socket%20939&pMODEL_NAME=KN8%20Ultra", NULL),
+	B("abit",	"NF-M2 nView",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20AM2&pMODEL_NAME=NF-M2%20nView", NULL),
+	B("abit",	"NF-M2S",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NAME=NF-M2S&fMTYPE=Socket%20AM2", NULL),
+	B("abit",	"NF7-S",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Socket%20A&pMODEL_NAME=NF7-S", NULL),
+	B("abit",	"VA6",					OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VA6", NULL),
+	B("abit",	"VT6X4",				OK,	"http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Slot%201&pMODEL_NAME=VT6X4", NULL),
+	B("Acorp",	"6A815EPD",				OK,	"http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.asp", NULL),
+	B("Advantech",	"PCM-5820",				OK,	"http://www.emacinc.com/sbc_pc_compatible/pcm_5820.htm", NULL),
+	B("agami",	"Aruma",				OK,	"http://web.archive.org/web/20080212111524/http://www.agami.com/site/ais-6000-series", NULL),
+	B("Albatron",	"PM266A Pro",				OK,	"http://www.albatron.com.tw/English/Product/MB/pro_detail.asp?rlink=Overview&no=56", NULL), /* FIXME */
+	B("AOpen",	"i945GMx-VFX",				OK,	NULL, "This is (also?) an OEM board from FSC (used in e.g. ESPRIMO Q5010 with designation D2544-B1)."),
+	B("AOpen",	"vKM400Am-S",				OK,	"http://usa.aopen.com/products_detail.aspx?Auno=824", NULL),
+	B("Artec Group","DBE61",				OK,	"http://wiki.thincan.org/DBE61", NULL),
+	B("Artec Group","DBE62",				OK,	"http://wiki.thincan.org/DBE62", NULL),
+	B("ASI",	"MB-5BLMP",				OK,	"http://www.hojerteknik.com/winnet.htm", "Used in the IGEL WinNET III thin client."),
+	B("ASRock",	"775i65G",				OK,	"http://www.asrock.com/mb/overview.asp?Model=775i65G", NULL),
+	B("ASRock",	"890GX Extreme3",			OK,	"http://www.asrock.com/mb/overview.asp?Model=890GX%20Extreme3", NULL),
+	B("ASRock",	"939A785GMH/128M",			OK,	"http://www.asrock.com/mb/overview.asp?Model=939A785GMH/128M", NULL),
+	B("ASRock",	"A330GC",				OK,	"http://www.asrock.com/mb/overview.asp?Model=A330GC", NULL),
+	B("ASRock",	"A770CrossFire",			OK,	"http://www.asrock.com/mb/overview.asp?Model=A770CrossFire", NULL),
+	B("ASRock",	"ALiveNF6G-DVI",			OK,	"http://www.asrock.com/mb/overview.asp?Model=ALiveNF6G-DVI", NULL),
+	B("ASRock",	"AM2NF6G-VSTA",				OK,	"http://www.asrock.com/mb/overview.asp?Model=AM2NF6G-VSTA", NULL),
+	B("ASRock",	"ConRoeXFire-eSATA2",			OK,	"http://www.asrock.com/mb/overview.asp?model=conroexfire-esata2", NULL),
+	B("ASRock",	"K7S41",				OK,	"http://www.asrock.com/mb/overview.asp?Model=K7S41", NULL),
+	B("ASRock",	"K7S41GX",				OK,	"http://www.asrock.com/mb/overview.asp?Model=K7S41GX", NULL),
+	B("ASRock",	"K7VT4A+",				BAD,	"http://www.asrock.com/mb/overview.asp?Model=K7VT4A%2b", "No chip found, probably due to flash translation. http://www.flashrom.org/pipermail/flashrom/2009-August/000393.html"),
+	B("ASRock",	"K8S8X",				OK,	"http://www.asrock.com/mb/overview.asp?Model=K8S8X", NULL),
+	B("ASRock",	"M3A790GXH/128M",			OK,	"http://www.asrock.com/mb/overview.asp?Model=M3A790GXH/128M", NULL),
+	B("ASRock",	"P4i65GV",				OK,	"http://www.asrock.com/mb/overview.asp?Model=P4i65GV", NULL),
+	B("ASUS",	"A7N8X Deluxe",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8X_Deluxe/", NULL),
+	B("ASUS",	"A7N8X-E Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XE_Deluxe/", NULL),
+	B("ASUS",	"A7N8X-VM/400",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7N8XVM400/", NULL),
+	B("ASUS",	"A7V133",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/socka/kt133a/a7v133/", NULL),
+	B("ASUS",	"A7V333",				OK,	"ftp://ftp.asus.com.tw/pub/asus/mb/socka/kt333/a7v333/", NULL),
+	B("ASUS",	"A7V400-MX",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V400MX/", NULL),
+	B("ASUS",	"A7V600-X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V600X/", NULL),
+	B("ASUS",	"A7V8X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8X/", NULL),
+	B("ASUS",	"A7V8X-MX",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX/", NULL),
+	B("ASUS",	"A7V8X-MX SE",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XMX_SE/", NULL),
+	B("ASUS",	"A7V8X-X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_A/A7V8XX/", NULL),
+	B("ASUS",	"A8M2N-LA (NodusM3-GL8E)",		OK,	"http://h10010.www1.hp.com/ewfrf/wc/document?docname=c00757531&cc=us&dlc=en&lc=en", "This is an OEM board from HP, the HP name is NodusM3-GL8E."),
+	B("ASUS",	"A8N-E",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
+	B("ASUS",	"A8N-LA (Nagami-GL8E)",			OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
+	B("ASUS",	"A8N-SLI",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
+	B("ASUS",	"A8N-SLI Deluxe",			NT,	NULL, "Untested board enable."),
+	B("ASUS",	"A8N-SLI Premium",			OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
+	B("ASUS",	"A8N-VM",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
+	B("ASUS",	"A8N-VM CSM",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),
+	B("ASUS",	"A8NE-FM/S",				OK,	"http://www.hardwareschotte.de/hardware/preise/proid_1266090/preis_ASUS+A8NE-FM", NULL),
+	B("ASUS",	"A8V Deluxe",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8V_Deluxe/", NULL),
+	B("ASUS",	"A8V-E Deluxe",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_Deluxe/", NULL),
+	B("ASUS",	"A8V-E SE",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_939/A8VE_SE/", "See http://www.coreboot.org/pipermail/coreboot/2007-October/026496.html"),
+	B("ASUS",	"Crosshair II Formula",			OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/Crosshair_II_Formula/", NULL),
+	B("ASUS",	"Crosshair IV Extreme",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/Crosshair_IV_Extreme/", NULL),
+	B("ASUS",	"E35M1-I DELUXE",			OK,	"http://www.asus.com/Motherboards/AMD_CPU_on_Board/E35M1I_DELUXE/", NULL),
+	B("ASUS",	"K8N",					OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8N/", NULL),
+	B("ASUS",	"K8V",					OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8V/", NULL),
+	B("ASUS",	"K8V SE Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8V_SE_Deluxe/", NULL),
+	B("ASUS",	"K8V-X",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8VX/", NULL),
+	B("ASUS",	"K8V-X SE",				OK,	"http://www.asus.com/Motherboards/AMD_Socket_754/K8VX_SE/", NULL),
+	B("ASUS",	"KFSN4-DRE/SAS",			OK,	"http://www.asus.com/Server_Workstation/Server_Motherboards/KFSN4DRESAS/", NULL),
+	B("ASUS",	"M2A-MX",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2AMX/", NULL),
+	B("ASUS",	"M2A-VM (HDMI)",			OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2AVM/", NULL),
+	B("ASUS",	"M2N32-SLI Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2N32SLI_DeluxeWireless_Edition/", NULL),
+	B("ASUS",	"M2N-E",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NE/", "If the machine doesn't come up again after flashing, try resetting the NVRAM(CMOS). The MAC address of the onboard network card will change to the value stored in the new image, so backup the old address first. See http://www.flashrom.org/pipermail/flashrom/2009-November/000879.html"),
+	B("ASUS",	"M2N-E SLI",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NE_SLI/", NULL),
+	B("ASUS",	"M2N-SLI Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NSLI_Deluxe/", NULL),
+	B("ASUS",	"M2NBP-VM CSM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NBPVM_CSM/", NULL),
+	B("ASUS",	"M2NPV-VM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2NPVVM/", NULL),
+	B("ASUS",	"M2V",					OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2V/", NULL),
+	B("ASUS",	"M2V-MX",				OK,	"http://www.asus.com/Motherboards/AMD_AM2/M2VMX/", NULL),
+	B("ASUS",	"M3A",					OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A/", NULL),
+	B("ASUS",	"M3A76-CM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A76CM/", NULL),
+	B("ASUS",	"M3A78-EM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3A78EM/", NULL),
+	B("ASUS",	"M3N78-VM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M3N78VM/", NULL),
+	B("ASUS",	"M4A78-EM",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M4A78EM/", NULL),
+	B("ASUS",	"M4A785TD-M EVO",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A785TDM_EVO/", NULL),
+	B("ASUS",	"M4A785TD-V EVO",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A785TDV_EVO/", NULL),
+	B("ASUS",	"M4A78LT-M LE",				OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A78LTM_LE/", NULL),
+	B("ASUS",	"M4A79T Deluxe",			OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A79T_Deluxe/", NULL),
+	B("ASUS",	"M4A87TD/USB3",				OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A87TDUSB3/", NULL),
+	B("ASUS",	"M4A89GTD PRO",				OK,	"http://www.asus.com/Motherboards/AMD_AM3/M4A89GTD_PRO/", NULL),
+	B("ASUS",	"M4N78 PRO",				OK,	"http://www.asus.com/Motherboards/AMD_AM2Plus/M4N78_PRO/", NULL),
+	B("ASUS",	"M5A99X EVO",				OK,	"http://www.asus.com/Motherboards/AMD_AM3Plus/M5A99X_EVO/", NULL),
+	B("ASUS",	"MEW-AM",				BAD,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("ASUS",	"MEW-VM",				BAD,	"http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("ASUS",	"OPLX-M",				NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P2B",					OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b/", NULL),
+	B("ASUS",	"P2B-D",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
+	B("ASUS",	"P2B-DS",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-ds/", NULL),
+	B("ASUS",	"P2B-F",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-d/", NULL),
+	B("ASUS",	"P2B-N",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p2b-n/", NULL),
+	B("ASUS",	"P2E-M",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440ex/p2e-m/", NULL),
+	B("ASUS",	"P2L97-S",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440lx/p2l97-s/", NULL),
+	B("ASUS",	"P3B-F",				BAD,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("ASUS",	"P4B266",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b266/", NULL),
+	B("ASUS",	"P4B266-LM",				OK,	"http://esupport.sony.com/US/perl/swu-list.pl?mdl=PCVRX650", NULL),
+	B("ASUS",	"P4B533-E",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4b533-e/", NULL),
+	B("ASUS",	"P4C800-E Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4C800E_Deluxe/", NULL),
+	B("ASUS",	"P4GV-LA (Guppy)",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00363478", NULL),
+	B("ASUS",	"P4P800",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800/", NULL),
+	B("ASUS",	"P4P800-E Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800E_Deluxe/", NULL),
+	B("ASUS",	"P4P800-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4P800VM/", NULL),
+	B("ASUS",	"P4SC-E",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4sc-e/", "Part of ASUS Terminator P4 533 barebone system"),
+	B("ASUS",	"P4SD-LA",				OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00022505", NULL),
+	B("ASUS",	"P4S533-X",				OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock478/p4s533-x/", NULL),
+	B("ASUS",	"P4S800-MX",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_478/P4S800MX/", NULL),
+	B("ASUS",	"P5A",					OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/sock7/ali/p5a/", NULL),
+	B("ASUS",	"P5B",					OK,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B/", NULL),
+	B("ASUS",	"P5B-Deluxe",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5B_Deluxe/", NULL),
+	B("ASUS",	"P5BV-M",				BAD,	"ftp://ftp.asus.com.tw/pub/ASUS/mb/socket775/P5B-VM/", "Reported by Bernhard M. Wiedemann <bernhard at uml12d.zq1.de> to flashrom at coreboot.org, no public archive. Missing board enable and/or SST49LF008A unlocking. May work now."),
+	B("ASUS",	"P5GC-MX/1333",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GCMX1333/", NULL),
+	B("ASUS",	"P5GD1 Pro",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GD1_PRO/", NULL),
+	B("ASUS",	"P5GD1-VM/S",				OK,	NULL, "This is an OEM board from FSC. Although flashrom supports it and can probably not distinguish it from the P5GD1-VM, please note that the P5GD1-VM BIOS does not support the FSC variants completely."),
+	B("ASUS",	"P5GD1(-VM)",				NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P5GD2 Premium",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GD2_Premium/", NULL),
+	B("ASUS",	"P5GDC Deluxe",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GDC_Deluxe/", NULL),
+	B("ASUS",	"P5GDC-V Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5GDCV_Deluxe/", NULL),
+	B("ASUS",	"P5GD2/C variants",			NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P5K-V",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KV/", NULL),
+	B("ASUS",	"P5K-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KVM/", NULL),
+	B("ASUS",	"P5KC",					OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KC/", NULL),
+	B("ASUS",	"P5KPL-CM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5KPLCM/", NULL),
+	B("ASUS",	"P5L-MX",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL),
+	B("ASUS",	"P5L-VM 1394",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL),
+	B("ASUS",	"P5LD2",				NT,	NULL, "Untested board enable."),
+	B("ASUS",	"P5LP-LE (Lithium-UL8E)",		OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."),
+	B("ASUS",	"P5LP-LE (Epson OEM)",			OK,	NULL, "This is an OEM board from Epson (e.g. Endeavor MT7700)."),
+	B("ASUS",	"P5LP-LE",				BAD,	NULL, "This designation is used for OEM boards from HP, Epson and maybe others. The HP names vary and not all of them have been tested yet. Please report any success or failure, thanks."),
+	B("ASUS",	"P5N-D",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5ND/", NULL),
+	B("ASUS",	"P5N-E SLI",				NT,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5NE_SLI/", "Untested board enable."),
+	B("ASUS",	"P5N32-E SLI",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5N32E_SLI/", NULL),
+	B("ASUS",	"P5N7A-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5N7AVM/", NULL),
+	B("ASUS",	"P5ND2-SLI Deluxe",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5ND2SLI_Deluxe/", NULL),
+	B("ASUS",	"P5PE-VM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5PEVM/", NULL),
+	B("ASUS",	"P5QPL-AM",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5QPLAM/", NULL),
+	B("ASUS",	"P5VD1-X",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_775/P5VD1X/", NULL),
+	B("ASUS",	"P6T SE",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_SE/", NULL),
+	B("ASUS",	"P6T Deluxe",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe/", NULL),
+	B("ASUS",	"P6T Deluxe V2",			OK,	"http://www.asus.com/Motherboards/Intel_Socket_1366/P6T_Deluxe_V2/", NULL),
+	B("ASUS",	"P7H57D-V EVO",				OK,	"http://www.asus.com/Motherboards/Intel_Socket_1156/P7H57DV_EVO/", NULL),
+	B("ASUS",	"P7H55-M LX",				BAD,	NULL, "flashrom works correctly, but GbE LAN is nonworking (probably due to a missing/bogus MAC address; see http://www.flashrom.org/pipermail/flashrom/2011-July/007432.html and http://ubuntuforums.org/showthread.php?t=1534389 for a possible workaround)"),
+	B("ASUS",	"P8B-E/4L",				BAD,	NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8B WS",				BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H61 PRO",				BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H61-M LE/USB3",			BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8H67-M PRO",				BAD,	NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8P67 (rev. 3.1)",			BAD,	NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"P8Z68-V PRO",				BAD,	NULL, "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ASUS",	"Z8NA-D6C",				OK,	"http://www.asus.com/Server_Workstation/Server_Motherboards/Z8NAD6C/", NULL),
+	B("ASUS",	"Z8PE-D12",				OK,	"http://www.asus.com/Server_Workstation/Server_Motherboards/Z8PED12/", NULL),
+	B("BCOM",	"WinNET100",				OK,	"http://www.coreboot.org/BCOM_WINNET100", "Used in the IGEL-316 thin client."),
+	B("Bifferos",	"Bifferboard",				OK,	"http://bifferos.co.uk/", NULL),
+	B("Biostar",	"N68S3+",				OK,	NULL, NULL),
+	B("Biostar",	"M6TBA",				BAD,	"ftp://ftp.biostar-usa.com/manuals/M6TBA/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("Biostar",	"M7NCD Pro",				OK,	"http://www.biostar.com.tw/app/en/mb/content.php?S_ID=260", NULL),
+	B("Biostar",	"P4M80-M4",				OK,	"http://www.biostar-usa.com/mbdetails.asp?model=p4m80-m4", NULL),
+	B("Biostar",	"TA780G M2+",				OK,	"http://www.biostar.com.tw/app/en/t-series/content.php?S_ID=344", NULL),
+	B("Boser",	"HS-6637",				BAD,	"http://www.boser.com.tw/manual/HS-62376637v3.4.pdf", "Reported by Mark Robinson <mark at zl2tod.net> to flashrom at coreboot.org, no public archive. Missing board enable and/or F29C51002T unlocking. May work now."),
+	B("Congatec",	"conga-X852",				OK,	"http://www.congatec.com/single_news+M57715f6263d.html?&L=1", NULL),
+	B("Dell",	"OptiPlex GX1",				OK,	"http://support.dell.com/support/edocs/systems/ban_gx1/en/index.htm", NULL),
+	B("Dell",	"PowerEdge 1850",			OK,	"http://support.dell.com/support/edocs/systems/pe1850/en/index.htm", NULL),
+	B("DFI",	"855GME-MGF",				BAD,	"http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?action=e&downloadType=&windowstate=normal&mode=view&downloadFlag=false&itemId=433", "Probably needs a board enable. http://www.coreboot.org/pipermail/coreboot/2009-May/048549.html"),
+	B("DFI",	"Blood-Iron P35 T2RL",			OK,	"http://lp.lanparty.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?itemId=516&downloadFlag=false&action=1", NULL),
+	B("Elitegroup",	"GeForce6100SM-M ",			OK,	"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=685&MenuID=24", NULL),
+	B("Elitegroup", "GF7100PVT-M3 (V1.0)",			OK,	"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=853&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
+	B("Elitegroup",	"K7S5A",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=279&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
+	B("Elitegroup",	"K7S6A",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=77&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
+	B("Elitegroup", "K7SEM (V1.0A)",			OK,	"http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=229&CategoryID=1&DetailName=Specification&MenuID=24&LanID=0", NULL),
+	B("Elitegroup",	"K7VTA3",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=264&CategoryID=1&DetailName=Specification&MenuID=52&LanID=0", NULL),
+	B("Elitegroup",	"P4M800PRO-M (V1.0A, V2.0)",		OK,	"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=574&DetailName=Feature&MenuID=52&LanID=0", NULL),
+	B("Elitegroup", "P4VXMS (V1.0A)",			OK,	NULL, NULL),
+	B("Elitegroup",	"P6IWP-Fe",				OK,	"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&TypeID=3&DetailID=95&DetailName=Feature&MenuID=1&LanID=0", NULL),
+	B("Elitegroup",	"P6VAP-A+",				OK,	"http://www.ecs.com.tw/ECSWebSite/Products/ProductsDetail.aspx?detailid=117&CategoryID=1&DetailName=Specification&MenuID=1&LanID=0", NULL),
+	B("Elitegroup", "RS485M-M",				OK,	"http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?CategoryID=1&DetailID=654&DetailName=Feature&MenuID=1&LanID=0", NULL),
+	B("Emerson",	"ATCA-7360",				OK,	"http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Product1/Pages/EmbCompATCA-7360.aspx", NULL),
+	B("EPoX",	"EP-8K5A2",				OK,	"http://www.epox.com/product.asp?ID=EP-8K5A2", NULL),
+	B("EPoX",	"EP-8NPA7I",				OK,	"http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL),
+	B("EPoX",	"EP-9NPA7I",				OK,	"http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL),
+	B("EPoX",	"EP-8RDA3+",				OK,	"http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL),
+	B("EPoX",	"EP-BX3",				OK,	"http://www.epox.com/product.asp?ID=EP-BX3", NULL),
+	B("EVGA",	"132-CK-NF78",				OK,	"http://www.evga.com/articles/385.asp", NULL),
+	B("EVGA",	"270-WS-W555-A2 (Classified SR-2)",	OK,	"http://www.evga.com/products/moreInfo.asp?pn=270-WS-W555-A2", NULL),
+	B("FIC",	"VA-502",				BAD,	"ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. Seems the PCI subsystem IDs are identical with the Tekram P6Pro-A5. May work now."),
+	B("Foxconn",	"6150K8MD-8EKRSH",			OK,	"http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000157", NULL),
+	B("Foxconn",	"A6VMX",				OK,	"http://www.foxconnchannel.com/product/motherboards/detail_overview.aspx?id=en-us0000346", NULL),
+	B("Foxconn",	"P4M800P7MA-RS2",			OK,	"http://www.foxconnchannel.com/Product/Motherboards/detail_overview.aspx?id=en-us0000138", NULL),
+	B("Freetech",	"P6F91i",				OK,	"http://web.archive.org/web/20010417035034/http://www.freetech.com/prod/P6F91i.html", NULL),
+	B("Fujitsu-Siemens", "ESPRIMO P5915",			OK,	"http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/professionalpc/ESPRIMO/P/EsprimoP5915-6.htm", "Mainboard model is D2312-A2."),
+	B("GIGABYTE",	"GA-2761GXDK",				OK,	"http://www.computerbase.de/news/hardware/mainboards/amd-systeme/2007/mai/gigabyte_dtx-mainboard/", NULL),
+	B("GIGABYTE",	"GA-6BXC",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1445", NULL),
+	B("GIGABYTE",	"GA-6BXDU",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1429", NULL),
+	B("GIGABYTE",	"GA-6IEM",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1379", NULL),
+	B("GIGABYTE",	"GA-6VXE7+",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2410", NULL),
+	B("GIGABYTE",	"GA-6ZMA",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1541", NULL),
+	B("GIGABYTE",	"GA-MA785GMT-UD2H (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3156", NULL),
+	B("GIGABYTE",	"GA-770TA-UD3",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3272", NULL),
+	B("GIGABYTE",	"GA-7DXR",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1302", NULL),
+	B("GIGABYTE",	"GA-7VT600",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL),
+	B("GIGABYTE",	"GA-7ZM",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."),
+	B("GIGABYTE",	"GA-880GMA-USB3 (rev. 3.1)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3817", NULL),
+	B("GIGABYTE",	"GA-8I945GZME-RH",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2304", NULL),
+	B("GIGABYTE",	"GA-8IP775",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL),
+	B("GIGABYTE",	"GA-8IRML",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL),
+	B("GIGABYTE",	"GA-8PE667 Ultra 2",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL),
+	B("GIGABYTE",	"GA-8SIMLH",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL),
+	B("GIGABYTE",	"GA-945PL-S3P (rev. 6.6)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2541", NULL),
+	B("GIGABYTE",	"GA-965GM-S2 (rev. 2.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL),
+	B("GIGABYTE",	"GA-965P-DS4",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL),
+	B("GIGABYTE",	"GA-EP31-DS3L (rev. 2.1)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2964", NULL),
+	B("GIGABYTE",	"GA-EP35-DS3L",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL),
+	B("GIGABYTE",	"GA-EX58-UD4P",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL),
+	B("GIGABYTE",	"GA-K8N-SLI",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1928", NULL),
+	B("GIGABYTE",	"GA-K8N51GMF",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1950", NULL),
+	B("GIGABYTE",	"GA-K8N51GMF-9",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=1939", NULL),
+	B("GIGABYTE",	"GA-K8NS Pro-939",			NT,	"http://www.gigabyte.com/products/product-page.aspx?pid=1875", "Untested board enable."),
+	B("GIGABYTE",	"GA-M57SLI-S4",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2287", NULL),
+	B("GIGABYTE",	"GA-M61P-S3",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2434", NULL),
+	B("GIGABYTE",	"GA-M720-US3",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3006", NULL),
+	B("GIGABYTE",	"GA-MA69VM-S2",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2500", NULL),
+	B("GIGABYTE",	"GA-MA74GM-S2H (rev. 3.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3152", NULL),
+	B("GIGABYTE",	"GA-MA770-UD3 (rev. 2.1)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3302", NULL),
+	B("GIGABYTE",	"GA-MA770T-UD3P",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3096", NULL),
+	B("GIGABYTE",	"GA-MA780G-UD3H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3004", NULL),
+	B("GIGABYTE",	"GA-MA78G-DS3H (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2800", NULL),
+	B("GIGABYTE",	"GA-MA78GM-S2H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2758", NULL), /* TODO: Rev. 1.0, 1.1, or 2.x? */
+	B("GIGABYTE",	"GA-MA78GPM-DS2H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2859", NULL),
+	B("GIGABYTE",	"GA-MA790FX-DQ6",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2690", NULL),
+	B("GIGABYTE",	"GA-MA790GP-DS4H",			OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=2887", NULL),
+	B("GIGABYTE",	"GA-MA790XT-UD4P (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3010", NULL),
+	B("GIGABYTE",	"GA-P55A-UD4 (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3436", NULL),
+	B("GIGABYTE",	"GA-P67A-UD3P",				OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3649", NULL),
+	B("GIGABYTE",	"GA-X58A-UD7 (rev. 2.0)",		OK,	NULL, NULL),
+	B("GIGABYTE",	"GA-X58A-UDR3 (rev. 2.0)",		OK,	NULL, NULL),
+	B("GIGABYTE",	"GA-Z68MX-UD2H-B (rev. 1.3)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3854", NULL),
+	B("GIGABYTE",	"GA-Z68XP-UD3 (rev. 1.0)",		OK,	"http://www.gigabyte.com/products/product-page.aspx?pid=3892", NULL),
+	B("HP",		"e-Vectra P2706T",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
+	B("HP",		"ProLiant DL145 G3",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
+	B("HP",		"ProLiant DL165 G6",			OK,	"http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
+	B("HP",		"ProLiant N40L",			OK,	NULL, NULL),
+	B("HP",		"Puffer2-UL8E",				OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00300023", NULL),
+	B("HP",		"dc7800",				BAD,	"http://h10010.www1.hp.com/wwpc/us/en/sm/WF06a/12454-12454-64287-321860-3328898-3459241.html?dnr=1", "ICH9DO with SPI lock down, BIOS lock, PR, read-only descriptor, locked ME region."),
+	B("HP",		"Vectra VL400",				OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060658&lang=en&cc=us", NULL),
+	B("HP",		"Vectra VL420 SFF",			OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00060661&lang=en&cc=us", NULL),
+	B("HP",		"xw4400 (0A68h)",			BAD,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00775230", "ICH7 with SPI lock down, BIOS lock, flash block detection (SST25VF080B); see http://paste.flashrom.org/view.php?id=686"),
+	B("HP",		"xw9400",				OK,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=3211286&prodTypeId=12454", "Boot block is write protected unless the solder points next to F2 are shorted."),
+	B("IBASE",	"MB899",				OK,	"http://www.ibase-i.com.tw/2009/mb899.html", NULL),
+	B("IBM",	"x3455",				OK,	"http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
+	B("IEI",	"PICOe-9452",				OK,	"http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
+	B("Intel",	"D201GLY",				OK,	"http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
+	B("Intel",	"D425KT",				BAD,	"http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
+	B("Intel",	"D865GLC",				BAD,	NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
+	B("Intel",	"DG45ID",				BAD,	"http://www.intel.com/products/desktop/motherboards/dg45id/dg45id-overview.htm", "Probing works (Winbond W25x32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME is locked."),
+	B("Intel",	"DH67CF",				BAD,	NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
+	B("Intel",	"EP80759",				OK,	NULL, NULL),
+	B("Intel",	"Foxhollow",				OK,	NULL, "Intel reference board."),
+	B("Intel",	"Greencity",				OK,	NULL, "Intel reference board."),
+	B("Intel",	"SE440BX-2",				BAD,	"http://downloadcenter.intel.com/SearchResult.aspx?lang=eng&ProductFamily=Desktop+Boards&ProductLine=Discontinued+Motherboards&ProductProduct=Intel%C2%AE+SE440BX-2+Motherboard", "Probably won't work, see http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html"),
+	B("IWILL",	"DK8-HTX",				OK,	"http://web.archive.org/web/20060507170150/http://www.iwill.net/product_2.asp?p_id=98", NULL),
+	B("Jetway",	"J-7BXAN",				OK,	"http://www.jetway.com.tw/evisn/download/d7BXAS.htm", NULL),
+	B("Jetway",	"J7F4K1G5D-PB",				OK,	"http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=282&proname=J7F4K1G5D", NULL),
+	B("Kontron",	"986LCD-M",				OK,	"http://de.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/986lcdmmitx.html", NULL),
+	B("Lanner",	"EM-8510C",				OK,	NULL, NULL),
+	B("Lex",	"CV700A",				OK,	"http://www.lex.com.tw/product/CV700A-spec.htm", NULL),
+	B("Mitac",	"6513WU",				OK,	"http://web.archive.org/web/20050313054828/http://www.mitac.com/micweb/products/tyan/6513wu/6513wu.htm", NULL),
+	B("MSC",	"Q7-TCTC",				OK,	"http://www.msc-ge.com/en/produkte/com/moduls/overview/5779-www.html", NULL),
+	B("MSI",	"MS-6153",				OK,	"http://www.msi.com/product/mb/MS-6153.html", NULL),
+	B("MSI",	"MS-6156",				OK,	"http://uk.ts.fujitsu.com/rl/servicesupport/techsupport/boards/Motherboards/MicroStar/Ms6156/MS6156.htm", NULL),
+	B("MSI",	"MS-6163 (MS-6163 Pro)",		OK, "http://www.msi.com/product/mb/MS-6163-Pro.html", NULL),
+	B("MSI",	"MS-6178",				BAD,	"http://www.msi.com/product/mb/MS-6178.html", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+	B("MSI",	"MS-6330 (K7T Turbo)",			OK,	"http://www.msi.com/product/mb/K7T-Turbo.html", NULL),
+	B("MSI",	"MS-6391 (845 Pro4)",			OK,	"http://www.msi.com/product/mb/845-Pro4.html", NULL),
+	B("MSI",	"MS-6561 (745 Ultra)",			OK,	"http://www.msi.com/product/mb/745-Ultra.html", NULL),
+	B("MSI",	"MS-6566 (845 Ultra-C)",		OK, "http://www.msi.com/product/mb/845-Ultra-C.html", NULL),
+	B("MSI",	"MS-6570 (K7N2)",			OK,	"http://www.msi.com/product/mb/K7N2.html", NULL),
+	B("MSI",	"MS-6577 (Xenon)",			OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?product=90390&lc=en&cc=us&dlc=en&docname=bph07843", "This is an OEM board from HP, the HP name is Xenon."),
+	B("MSI",	"MS-6590 (KT4 Ultra)",			OK,	"http://www.msi.com/product/mb/KT4-Ultra.html", NULL),
+	B("MSI",	"MS-6702E (K8T Neo2-F)",		OK, "http://www.msi.com/product/mb/K8T-Neo2-F--FIR.html", NULL),
+	B("MSI",	"MS-6712 (KT4V)",			OK,	"http://www.msi.com/product/mb/KT4V---KT4V-L--v1-0-.html", NULL),
+	B("MSI",	"MS-6787 (P4MAM-V/P4MAM-L)",		OK,	"http://www.msi.com/service/search/?kw=6787&type=product", NULL),
+	B("MSI",	"MS-7005 (651M-L)",			OK,	"http://www.msi.com/product/mb/651M-L.html", NULL),
+	B("MSI",	"MS-7025 (K8N Neo2 Platinum)",		OK,	"http://www.msi.com/product/mb/K8N-Neo2-Platinum.html", NULL),
+	B("MSI",	"MS-7046",				OK,	"http://www.heimir.de/ms7046/", NULL),
+	B("MSI",	"MS-7061 (KM4M-V/KM4AM-V)",		OK,	"http://www.msi.com/service/search/?kw=7061&type=product", NULL),
+	B("MSI",	"MS-7065",				OK,	"http://browse.geekbench.ca/geekbench2/view/53114", NULL),
+	B("MSI",	"MS-7135 (K8N Neo3)",			OK,	"http://www.msi.com/product/mb/K8N-Neo3.html", NULL),
+	B("MSI",	"MS-7142 (K8MM-V)",			OK,	"http://www.msi.com/product/mb/K8MM-V.html", NULL),
+	B("MSI",	"MS-7168 (Orion)",			OK,	"http://support.packardbell.co.uk/uk/item/index.php?i=spec_orion&pi=platform_honeymoon_istart", NULL),
+	B("MSI",	"MS-7207 (K8NGM2-L)",			OK,	"http://www.msi.com/product/mb/K8NGM2-FID--IL--L.html", NULL),
+	B("MSI",	"MS-7211 (PM8M3-V)",			OK,	"http://www.msi.com/product/mb/PM8M3-V.html", NULL),
+	B("MSI",	"MS-7236 (945PL Neo3)",			OK,	"http://www.msi.com/product/mb/945PL-Neo3.html", NULL),
+	B("MSI",	"MS-7253 (K9VGM-V)",			OK,	"http://www.msi.com/product/mb/K9VGM-V.html", NULL),
+	B("MSI",	"MS-7255 (P4M890M)",			OK,	"http://www.msi.com/product/mb/P4M890M-L-IL.html", NULL),
+	B("MSI",	"MS-7260 (K9N Neo PCB 1.0)",		BAD,	"http://www.msi.com/product/mb/K9N-Neo--PCB-1-0-.html", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe at hermann-uwe.de>."),
+	B("MSI",	"MS-7309 (K9N6PGM2-V2)",		OK,	"http://www.msi.com/product/mb/K9N6PGM2-V2.html", NULL),
+	B("MSI",	"MS-7312 (K9MM-V)",			OK,	"http://www.msi.com/product/mb/K9MM-V.html", NULL),
+	B("MSI",	"MS-7345 (P35 Neo2-FIR)",		OK,	"http://www.msi.com/product/mb/P35-Neo2-FR---FIR.html", NULL),
+	B("MSI",	"MS-7368 (K9AG Neo2-Digital)",		OK,	"http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
+	B("MSI",	"MS-7369 (K9N Neo V2)",			OK,	"http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
+	B("MSI",	"MS-7376 (K9A2 Platinum V1)",		OK,	"http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
+	B("MSI",	"MS-7529 (G31M3-L(S) V2)",		OK,	"http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
+	B("MSI",	"MS-7529 (G31TM-P21)",			OK,	"http://www.msi.com/product/mb/G31TM-P21.html", NULL),
+	B("MSI",	"MS-7548 (Aspen-GL8E)",			OK,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
+	B("MSI",	"MS-7596 (785GM-E51)",			OK,	"http://www.msi.com/product/mb/785GM-E51.html", NULL),
+	B("MSI",	"MS-7599 (870-C45)",			OK,	"http://www.msi.com/product/mb/870-C45.html", NULL),
+	B("MSI",	"MS-7613 (Iona-GL8E)",			BAD,	"http://h10025.www1.hp.com/ewfrf/wc/document?docname=c02014355&lc=en&cc=dk&dlc=en&product=4348478", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("MSI",	"MS-7635 (H55M-ED55)",			BAD,	"http://www.msi.com/product/mb/H55M-ED55.html", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("MSI",	"MS-7640 (890FXA-GD70)",		OK, "http://www.msi.com/product/mb/890FXA-GD70.html", NULL),
+	B("MSI",	"MS-7642 (890GXM-G65)",			OK,	"http://www.msi.com/product/mb/890GXM-G65.html", NULL),
+	B("MSI",	"MS-7676 (H67MA-ED55(B3))",		OK,	"http://www.msi.com/product/mb/H67MA-ED55--B3-.html", "Seems to work fine basically, but user reported (hopefully unrelated) buggy behavior of the board after a firmware upgrade. See http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html"),
+	B("MSI",	"MS-7696 (A75MA-G55)",			OK,	"http://www.msi.com/product/mb/A75MA-G55.html", NULL),
+	B("MSI",	"MS-7698 (E350IA-E45)",			OK,	"http://www.msi.com/product/mb/E350IA-E45.html", NULL),
+	B("NEC",	"PowerMate 2000",			OK,	"http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
+	B("Nokia",	"IP530",				OK,	NULL, NULL),
+	B("PCCHIPS ",	"M598LMR (V9.0)",			OK,	NULL, NULL),
+	B("PCCHIPS ",	"M863G (V5.1A)",			OK,	"http://www.pcchips.com.tw/PCCWebSite/Products/ProductsDetail.aspx?CategoryID=1&DetailID=343&DetailName=Feature&MenuID=1&LanID=0", NULL),
+	B("PC Engines",	"Alix.1c",				OK,	"http://pcengines.ch/alix1c.htm", NULL),
+	B("PC Engines",	"Alix.2c2",				OK,	"http://pcengines.ch/alix2c2.htm", NULL),
+	B("PC Engines",	"Alix.2c3",				OK,	"http://pcengines.ch/alix2c3.htm", NULL),
+	B("PC Engines",	"Alix.2d3",				OK,	"http://pcengines.ch/alix2d3.htm", NULL),
+	B("PC Engines",	"Alix.3c3",				OK,	"http://pcengines.ch/alix3c3.htm", NULL),
+	B("PC Engines",	"Alix.3d3",				OK,	"http://pcengines.ch/alix3d3.htm", NULL),
+	B("PC Engines",	"Alix.6f2",				OK,	"http://pcengines.ch/alix6f2.htm", NULL),
+	B("PC Engines",	"WRAP.2E",				OK,	"http://pcengines.ch/wrap2e1.htm", NULL),
+	B("Portwell",	"PEB-4700VLA",				OK,	"http://www.portwell.com/products/detail.asp?CUSTCHAR1=PEB-4700VLA", NULL),
+	B("RCA",	"RM4100",				OK,	"http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL),
+	B("Samsung",	"Polaris 32",				OK,	NULL, NULL),
+	B("Shuttle",	"AK31",					OK,	"http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL),
+	B("Shuttle",	"AK38N",				OK,	"http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL),
+	B("Shuttle",	"AV11V30",				OK,	NULL, NULL),
+	B("Shuttle",	"AV18E2",				OK,	"http://www.shuttle.eu/_archive/older/de/av18.htm", NULL),
+	B("Shuttle",	"FD37",					OK,	"http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
+	B("Shuttle",	"FH67",					OK,	"http://www.shuttle.eu/products/mini-pc/sh67h3/specification/", NULL),
+	B("Shuttle",	"FN25",					OK,	"http://www.shuttle.eu/products/discontinued/barebones/sn25p/?0=", NULL),
+	B("Shuttle",	"X50/X50(B)",				OK,	"http://au.shuttle.com/product_detail_spec.jsp?PI=1241", NULL),
+	B("Soyo",	"SY-5VD",				BAD,	"http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English", "No public report found. Owned by Uwe Hermann <uwe at hermann-uwe.de>. May work now."),
+	B("Soyo",	"SY-6BA+ III",				OK,	"http://www.motherboard.cz/mb/soyo/SY-6BA+III.htm", NULL),
+	B("Soyo",	"SY-7VCA",				OK,	"http://www.tomshardware.com/reviews/12-socket-370-motherboards,196-15.html", NULL),
+	B("Sun",	"Blade x6250",				OK,	"http://www.sun.com/servers/blades/x6250/", NULL),
+	B("Sun",	"Fire x4150",				BAD,	"http://www.sun.com/servers/x64/x4150/", "No public report found. May work now."),
+	B("Sun",	"Fire x4200",				BAD,	"http://www.sun.com/servers/entry/x4200/", "No public report found. May work now."),
+	B("Sun",	"Fire x4540",				BAD,	"http://www.sun.com/servers/x64/x4540/", "No public report found. May work now."),
+	B("Sun",	"Fire x4600",				BAD,	"http://www.sun.com/servers/x64/x4600/", "No public report found. May work now."),
+	B("Sun",	"Ultra 40 M2",				OK,	"http://download.oracle.com/docs/cd/E19127-01/ultra40.ws/820-0123-13/intro.html", NULL),
+	B("Supermicro",	"H8QC8",				OK,	"http://www.supermicro.com/Aplus/motherboard/Opteron/nforce/H8QC8.cfm", NULL),
+	B("Supermicro", "X5DP8-G2",				OK,	"http://www.supermicro.com/products/motherboard/Xeon/E7501/X5DP8-G2.cfm", NULL),
+	B("Supermicro", "X7DBT-INF",				OK,	"http://www.supermicro.com/products/motherboard/Xeon1333/5000P/X7DBT-INF.cfm", NULL),
+	B("Supermicro", "X7SPA-HF",				OK,	"http://www.supermicro.com/products/motherboard/ATOM/ICH9/X7SPA.cfm?typ=H&IPMI=Y", NULL),
+	B("Supermicro", "X8DT3",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DT3.cfm", NULL),
+	B("Supermicro", "X8DTE-F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DT6-F.cfm?IPMI=Y&SAS=N", NULL),
+	B("Supermicro", "X8DTH-6F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTH-6F.cfm", NULL),
+	B("Supermicro",	"X8DTT-F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-F.cfm", NULL),
+	B("Supermicro",	"X8DTT-HIBQF",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
+	B("Supermicro",	"X8DTU-6TF+",				BAD,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("Supermicro",	"X8DTU-F",				OK,	"http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
+	B("Supermicro",	"X8SIE(-F)",				BAD,	"http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
+	B("Supermicro",	"X8STi",				OK,	"http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
+	B("Supermicro",	"X9SCA-F",				BAD,	"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCA-F.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("Supermicro",	"X9SCL",				BAD,	"http://www.supermicro.com/products/motherboard/Xeon/C202_C204/X9SCL.cfm", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("T-Online",	"S-100",				OK,	"http://wiki.freifunk-hannover.de/T-Online_S_100", NULL),
+	B("Tekram",	"P6Pro-A5",				OK,	"http://www.motherboard.cz/mb/tekram/P6Pro-A5.htm", NULL),
+	B("Termtek",	"TK-3370 (Rev:2.5B)",			OK,	NULL, NULL),
+	B("Thomson",	"IP1000",				OK,	"http://www.settoplinux.org/index.php?title=Thomson_IP1000", NULL),
+	B("TriGem",	"Anaheim-3",				OK,	"http://www.e4allupgraders.info/dir1/motherboards/socket370/anaheim3.shtml", NULL),
+	B("TriGem",	"Lomita",				OK,	"http://www.e4allupgraders.info/dir1/motherboards/socket370/lomita.shtml", NULL),
+	B("Tyan",	"S5375-1U (Tempest i5100X)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=610", NULL),
+	B("Tyan",	"S1846 (Tsunami ATX)",			OK,	"http://www.tyan.com/archive/products/html/tsunamiatx.html", NULL),
+	B("Tyan",	"S2466 (Tiger MPX)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=461", NULL),
+	B("Tyan",	"S2498 (Tomcat K7M)",			OK,	"http://www.tyan.com/archive/products/html/tomcatk7m.html", NULL),
+	B("Tyan",	"S2723 (Tiger i7501)",			OK,	"http://www.tyan.com/archive/products/html/tigeri7501.html", NULL),
+	B("Tyan",	"S2881 (Thunder K8SR)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=115", NULL),
+	B("Tyan",	"S2882 (Thunder K8S Pro)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=121", NULL),
+	B("Tyan",	"S2882-D (Thunder K8SD Pro)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=127", NULL),
+	B("Tyan",	"S2891 (Thunder K8SRE)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=144", NULL),
+	B("Tyan",	"S2892 (Thunder K8SE)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=145", NULL),
+	B("Tyan",	"S2895 (Thunder K8WE)",			OK,	"http://www.tyan.com/archive/products/html/thunderk8we.html", NULL),
+	B("Tyan",	"S2912 (Thunder n3600R)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=157", NULL),
+	B("Tyan",	"S2915 (Thunder n6650W)",		OK,	"http://tyan.com/product_board_detail.aspx?pid=163", NULL),
+	B("Tyan",	"S2915-E (Thunder n6650W)",		OK,	"http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=541&SKU=600000041", NULL),
+	B("Tyan",	"S2933 (Thunder n3600S)",		OK,	"http://tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=478&SKU=600000063", NULL),
+	B("Tyan",	"S3095 (Tomcat i945GM)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=181", NULL),
+	B("Tyan",	"S3992 (Thunder h2000M)",		OK,	"http://tyan.com/product_board_detail.aspx?pid=235", NULL),
+	B("Tyan",	"S5180 (Toledo i965R)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=456", NULL),
+	B("Tyan",	"S5191 (Toledo i3000R)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=343", NULL),
+	B("Tyan",	"S5197 (Toledo i3010W)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=349", NULL),
+	B("Tyan",	"S5211 (Toledo i3210W)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=591", NULL),
+	B("Tyan",	"S5211-1U (Toledo i3200R)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=593", NULL),
+	B("Tyan",	"S5220 (Toledo q35T)",			OK,	"http://www.tyan.com/product_board_detail.aspx?pid=597", NULL),
+	B("Tyan",	"S5375 (Tempest i5100X)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=566", NULL),
+	B("Tyan",	"S5376 (Tempest i5100W)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=605", "Both S5376G2NR and S5376WAG2NR should work."),
+	B("Tyan",	"S5377 (Tempest i5100T)",		OK,	"http://www.tyan.com/product_SKU_spec.aspx?ProductType=MB&pid=642&SKU=600000017", NULL),
+	B("Tyan",	"S5382 (Tempest i5000PW)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=439", NULL),
+	B("Tyan",	"S5397 (Tempest i5400PW)",		OK,	"http://www.tyan.com/product_board_detail.aspx?pid=560", NULL),
+	B("VIA",	"EPIA M/MII/...",			OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=202", NULL), /* EPIA-MII link for now */
+	B("VIA",	"EPIA SP",				OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=261", NULL),
+	B("VIA",	"EPIA-CN",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=400", NULL),
+	B("VIA",	"EPIA EK",				OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?motherboard_id=420", NULL),
+	B("VIA",	"EPIA-EX15000G",			OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=450", NULL),
+	B("VIA",	"EPIA-LN",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=473", NULL),
+	B("VIA",	"EPIA-M700",				OK,	"http://via.com.tw/servlet/downloadSvl?motherboard_id=670&download_file_id=3700", NULL),
+	B("VIA",	"EPIA-N/NL",				OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=221", NULL), /* EPIA-N link for now */
+	B("VIA",	"EPIA-NX15000G",			OK,	"http://www.via.com.tw/en/products/embedded/ProductDetail.jsp?productLine=1&motherboard_id=470", NULL),
+	B("VIA",	"NAB74X0",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=590", NULL),
+	B("VIA",	"pc2500e",				OK,	"http://www.via.com.tw/en/initiatives/empowered/pc2500_mainboard/index.jsp", NULL),
+	B("VIA",	"PC3500G",				OK,	"http://www.via.com.tw/en/initiatives/empowered/pc3500_mainboard/index.jsp", NULL),
+	B("VIA",	"VB700X",				OK,	"http://www.via.com.tw/en/products/mainboards/motherboards.jsp?motherboard_id=490", NULL),
+	B("ZOTAC",	"Fusion-ITX WiFi (FUSION350-A-E)",	OK,	NULL, NULL),
+	B("ZOTAC",	"GeForce 8200",				OK,	"http://pden.zotac.com/index.php?page=shop.product_details&product_id=129&category_id=92", NULL),
+	B("ZOTAC",	"H67-ITX WiFi (H67ITX-C-E)",		BAD,	NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("ZOTAC",	"ZBOX HD-ID11",				OK,	"http://pdde.zotac.com/index.php?page=shop.product_details&product_id=240&category_id=75", NULL),
 #endif
 
 	{},
@@ -975,19 +974,19 @@ const struct board_info boards_known[] = {
 /* Please keep this list alphabetically ordered by vendor/board. */
 const struct board_info laptops_known[] = {
 #if defined(__i386__) || defined(__x86_64__)
-	B("Acer",	"Aspire 1520",		1, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
-	B("Acer",	"Aspire One",		0, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
-	B("ASUS",	"A8Jm",			1, NULL, NULL),
-	B("ASUS",	"Eee PC 701 4G",	0, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
-	B("ASUS",	"M6Ne",			0, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
-	B("Clevo",	"P150HM",		0, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
-	B("Dell",	"Latitude CPi A366XT",	0, "http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
-	B("HP/Compaq",	"nx9005",		0, "http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
-	B("HP/Compaq",	"nx9010",		0, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
-	B("IBM/Lenovo",	"Thinkpad T40p",	0, "http://www.thinkwiki.org/wiki/Category:T40p", NULL),
-	B("IBM/Lenovo",	"Thinkpad T410s",	0, "http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
-	B("IBM/Lenovo",	"240",			0, "http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
-	B("Lenovo",	"3000 V100 TF05Cxx",	1, "http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
+	B("Acer",	"Aspire 1520",		OK,	"http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
+	B("Acer",	"Aspire One",		BAD,	NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
+	B("ASUS",	"A8Jm",			OK,	NULL, NULL),
+	B("ASUS",	"Eee PC 701 4G",	BAD,	"http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
+	B("ASUS",	"M6Ne",			NT, 	"http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
+	B("Clevo",	"P150HM",		BAD,	"http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
+	B("Dell",	"Latitude CPi A366XT",	BAD,	"http://www.coreboot.org/Dell_Latitude_CPi_A366XT", "The laptop immediately powers off if you try to hot-swap the chip. It's not yet tested if write/erase would work on this laptop."),
+	B("HP/Compaq",	"nx9005",		BAD,	"http://h18000.www1.hp.com/products/quickspecs/11602_na/11602_na.HTML", "Shuts down when probing for a chip. http://www.flashrom.org/pipermail/flashrom/2010-May/003321.html"),
+	B("HP/Compaq",	"nx9010",		BAD,	"http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us&objectID=c00348514", "Hangs upon '''flashrom -V''' (needs hard power-cycle then)."),
+	B("IBM/Lenovo",	"Thinkpad T40p",	BAD,	"http://www.thinkwiki.org/wiki/Category:T40p", NULL),
+	B("IBM/Lenovo",	"Thinkpad T410s",	BAD,	"http://www.thinkwiki.org/wiki/Category:T410s", "Probing works (Winbond W25X64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME and platform are locked."),
+	B("IBM/Lenovo",	"240",			BAD,	"http://www.stanford.edu/~bresnan//tp240.html", "Seems to (partially) work at first, but one block/sector cannot be written which then leaves you with a bricked laptop. Maybe this can be investigated and fixed in software later."),
+	B("Lenovo",	"3000 V100 TF05Cxx",	OK,	"http://www5.pc.ibm.com/europe/products.nsf/products?openagent&brand=Lenovo3000Notebook&series=Lenovo+3000+V+Series#viewallmodelstop", NULL),
 #endif
 
 	{},
diff --git a/print_wiki.c b/print_wiki.c
index 377154d..9a9cd83 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -136,9 +136,9 @@ static void wiki_helper(const char *devicetype, int cols,
 	const struct board_match *b = board_matches;
 
 	for (i = 0; boards[i].vendor != NULL; i++) {
-		if (boards[i].working)
+		if (boards[i].working == OK)
 			boardcount_good++;
-		else
+		if (boards[i].working == BAD)
 			boardcount_bad++;
 	}
 
@@ -171,7 +171,8 @@ static void wiki_helper(const char *devicetype, int cols,
 		       b[k].lb_vendor ? b[k].lb_vendor : "",
 		       b[k].lb_vendor ? ":" : "",
 		       b[k].lb_vendor ? b[k].lb_part : "",
-		       (boards[i].working) ? "OK" : "No");
+		       (boards[i].working == OK) ? "OK" :
+		       (boards[i].working == NT) ? "?3" : "No");
 
 		if (boards[i].note) {
 			printf("<sup>%d</sup>\n", num_notes + 1);
diff --git a/programmer.h b/programmer.h
index 240e1af..a074662 100644
--- a/programmer.h
+++ b/programmer.h
@@ -192,7 +192,7 @@ extern const struct board_match board_matches[];
 struct board_info {
 	const char *vendor;
 	const char *name;
-	const int working;
+	const enum test_state working;
 #ifdef CONFIG_PRINT_WIKI
 	const char *url;
 	const char *note;
@@ -217,7 +217,7 @@ extern struct pci_dev *pcidev_dev;
 struct pcidev_status {
 	uint16_t vendor_id;
 	uint16_t device_id;
-	int status;
+	const enum test_state status;
 	const char *vendor_name;
 	const char *device_name;
 };
@@ -415,7 +415,7 @@ extern const struct pcidev_status ata_hpt[];
 struct usbdev_status {
 	uint16_t vendor_id;
 	uint16_t device_id;
-	int status;
+	const enum test_state status;
 	const char *vendor_name;
 	const char *device_name;
 };
-- 
1.7.1



From stefan.tauner at student.tuwien.ac.at  Sat Feb 25 22:18:13 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sat, 25 Feb 2012 22:18:13 +0100
Subject: [flashrom] [PATCH] Check for duplicate -i arguments.
In-Reply-To: <201201120038.q0C0cqWD024128@mail2.student.tuwien.ac.at>
References: <201201120038.q0C0cqWD024128@mail2.student.tuwien.ac.at>
Message-ID: <1330204693-9688-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

And a tiny cleanup.
---
./flashrom -p dummy:emulate=M25P10.RES  -c M25P10 -i blub -i blub
flashrom v0.9.5-r1505 on Linux 2.6.35-32-generic (x86_64), built with libpci 3.1.7, GCC 4.4.5, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Duplicate region name: "blub".
Please run "flashrom --help" for usage info.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 layout.c |   30 +++++++++++++++++++++++-------
 1 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/layout.c b/layout.c
index 90d3cce..293ae8b 100644
--- a/layout.c
+++ b/layout.c
@@ -201,6 +201,17 @@ int read_romlayout(char *name)
 }
 #endif
 
+/* returns the index of the entry (or a negative value if it is not found) */
+int find_include_arg(const char *const name)
+{
+	unsigned int i;
+	for (i = 0; i < num_include_args; i++) {
+		if (!strcmp(include_args[i], name))
+			return i;
+	}
+	return -1;
+}
+
 /* register an include argument (-i) for later processing */
 int register_include_arg(char *name)
 {
@@ -214,6 +225,11 @@ int register_include_arg(char *name)
 		return 1;
 	}
 
+	if (find_include_arg(name) != -1) {
+		msg_gerr("Duplicate region name: \"%s\".\n", name);
+		return 1;
+	}
+
 	include_args[num_include_args] = name;
 	num_include_args++;
 	return 0;
@@ -250,15 +266,15 @@ int process_include_args(void)
 	if (num_include_args == 0)
 		return 0;
 
+	if (!romimages) {
+		msg_gerr("Region requested (with -i \"%s\"), "
+			 "but no layout data is available.\n",
+			 include_args[0]);
+		return 1;
+	}
+
 	for (i = 0; i < num_include_args; i++) {
 		/* User has specified an area, but no layout file is loaded. */
-		if (!romimages) {
-			msg_gerr("Region requested (with -i \"%s\"), "
-				 "but no layout data is available.\n",
-				 include_args[i]);
-			return 1;
-		}
-
 		if (find_romentry(include_args[i]) < 0) {
 			msg_gerr("Invalid region specified: \"%s\"\n",
 				 include_args[i]);
-- 
1.7.1



From svn at flashrom.org  Sat Feb 25 23:50:23 2012
From: svn at flashrom.org (repository service)
Date: Sat, 25 Feb 2012 23:50:23 +0100
Subject: [flashrom] [commit] r1507 - trunk
Message-ID: <E1S1QRb-0006UQ-Dv@ra.coresystems.de>

Author: hailfinger
Date: Sat Feb 25 23:50:21 2012
New Revision: 1507
URL: http://flashrom.org/trac/flashrom/changeset/1507

Log:
Support Debian/kFreeBSD

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Tested-by: Robert Millan <rmh at debian.org>
Tested-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Modified:
   trunk/hwaccess.c
   trunk/hwaccess.h
   trunk/os.h
   trunk/physmap.c

Modified: trunk/hwaccess.c
==============================================================================
--- trunk/hwaccess.c	Sat Feb 25 00:49:30 2012	(r1506)
+++ trunk/hwaccess.c	Sat Feb 25 23:50:21 2012	(r1507)
@@ -40,7 +40,7 @@
 {
 }
 
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 int io_fd;
 #endif
 
@@ -52,7 +52,7 @@
 #else
 #if defined (__sun) && (defined(__i386) || defined(__amd64))
 	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
-#elif defined(__FreeBSD__) || defined (__DragonFly__)
+#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
 	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
 #else 
 	if (iopl(3) != 0) {
@@ -71,7 +71,7 @@
 
 void release_io_perms(void)
 {
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 	close(io_fd);
 #endif
 }

Modified: trunk/hwaccess.h
==============================================================================
--- trunk/hwaccess.h	Sat Feb 25 00:49:30 2012	(r1506)
+++ trunk/hwaccess.h	Sat Feb 25 23:50:21 2012	(r1507)
@@ -189,6 +189,10 @@
  */
 
 #if defined(__FreeBSD__) || defined(__DragonFly__)
+  /* Note that Debian/kFreeBSD (FreeBSD kernel with glibc) has conflicting
+   * out[bwl] definitions in machine/cpufunc.h and sys/io.h at least in some
+   * versions. Use machine/cpufunc.h only for plain FreeBSD/DragonFlyBSD.
+   */
   #include <machine/cpufunc.h>
   #define off64_t off_t
   #define lseek64 lseek
@@ -228,7 +232,7 @@
   #define INL  inportl
 
 #else
-
+  /* This is the usual glibc interface. */
   #define OUTB outb
   #define OUTW outw
   #define OUTL outl
@@ -299,12 +303,12 @@
   #endif
 #endif
 
-#if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__)
+#if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__FreeBSD_kernel__) && !defined(__DragonFly__) && !defined(__LIBPAYLOAD__)
 typedef struct { uint32_t hi, lo; } msr_t;
 msr_t rdmsr(int addr);
 int wrmsr(int addr, msr_t msr);
 #endif
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 /* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
 #undef rdmsr
 #undef wrmsr

Modified: trunk/os.h
==============================================================================
--- trunk/os.h	Sat Feb 25 00:49:30 2012	(r1506)
+++ trunk/os.h	Sat Feb 25 23:50:21 2012	(r1507)
@@ -30,6 +30,9 @@
 // FreeBSD
 #elif defined(__FreeBSD__)
 #define __FLASHROM_OS__ "FreeBSD"
+// FreeBSD with glibc-based userspace (e.g. Debian/kFreeBSD)
+#elif defined(__FreeBSD_kernel__) && defined(__GLIBC__)
+#define __FLASHROM_OS__ "FreeBSD-glibc"
 // DragonFlyBSD
 #elif defined(__DragonFly__)
 #define __FLASHROM_OS__ "DragonFlyBSD"

Modified: trunk/physmap.c
==============================================================================
--- trunk/physmap.c	Sat Feb 25 00:49:30 2012	(r1506)
+++ trunk/physmap.c	Sat Feb 25 23:50:21 2012	(r1507)
@@ -382,7 +382,7 @@
 	fd_msr = -1;
 }
 #else
-#if defined(__FreeBSD__) || defined(__DragonFly__)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
 #include <sys/ioctl.h>
 
 typedef struct {


From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb 25 23:52:51 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 25 Feb 2012 23:52:51 +0100
Subject: [flashrom] compiling flashrom for Debian/kFreeBSD
In-Reply-To: <4F49064E.9070704@gmx.net>
References: <4F46DFFC.3090104@gmx.net>
	<CAOfDtXO9s0CsR_ksi7y1e6FnyQACPAD1qpJxGQt6K8s3_AzW1g@mail.gmail.com>
	<4F483028.5030406@gmx.net>
	<CAOfDtXNG4_5_7CVRnhZU_4+7v8eiU80DM20LkWAVQqsPWorPCA@mail.gmail.com>
	<4F49064E.9070704@gmx.net>
Message-ID: <4F496643.3060008@gmx.net>

Am 25.02.2012 17:03 schrieb Carl-Daniel Hailfinger:
> Am 25.02.2012 11:46 schrieb Robert Millan:
>> El 25 de febrer de 2012 0:49, Carl-Daniel Hailfinger >> El 24 de
>> febrer de 2012 0:55, Carl-Daniel Hailfinger
>>>> <c-d.hailfinger.devel.2006 at gmx.net> ha escrit:
>>>>>    #include <machine/cpufunc.h>
>>>>>    #define off64_t off_t
>>>>>    #define lseek64 lseek
>>>> Actually, we have machine/cpufunc.h (we have everything in machine/*
>>>> actually).  The off_t / lseek defines after this look dangerous though
>>>> (they collide with glibc definitions).
>>> Comment has been replaced with
>>> /* Note that FreeBSD kernel with glibc has conflicting out[bwl] definitions
>>>  * in machine/cpufunc.h and sys/io.h. Use cpufunc.h only for plain FreeBSD.
>>>  */
>> Uhm no, we removed the conflicts.  We need to allow programs to
>> include both headers painlessly.  Again, just pick the one you prefer.
>>  cpufunc.h is supposed to work, and if it doesn't it's a bug.
> Thanks for the info, I have adjusted the comment:
>
> /* Note that Debian/kFreeBSD (FreeBSD with glibc) machine/cpufunc.h
> contains out[bwl] definitions which are incompatible with FreeBSD
> machine/cpufunc.h. Use machine/cpufunc.h only for plain FreeBSD. */
>
> Background:
> FreeBSD machine/cpufunc.h has outb(port,data).
> Linux/glibc sys/io.h has outb(data,port).

Thanks for your tests. The patch has been committed in r1507 to flashrom
svn.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Sat Feb 25 23:54:27 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sat, 25 Feb 2012 23:54:27 +0100
Subject: [flashrom] [PATCH] Support Debian/kFreeBSD
In-Reply-To: <4F443C4F.40602@gmx.net>
References: <4F443C4F.40602@gmx.net>
Message-ID: <4F4966A3.1040701@gmx.net>

Am 22.02.2012 01:52 schrieb Carl-Daniel Hailfinger:
> Apparently compilation worked before I introduced the target OS check
> during compilation, but it seems the generated binaries back then might
> have been incorrect for Debian/kFreeBSD.
>
> This stuff should compile and run well. Output of
> flashrom -V
> on a desktop PC (not a laptop) would be appreciated.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

A patch with slightly changed comments was
Tested-by: Robert Millan <rmh at debian.org>
Tested-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
and committed in r1507.
(self-ack because it was tested by others and it's a build fix)

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Sun Feb 26 00:37:19 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 26 Feb 2012 00:37:19 +0100
Subject: [flashrom] [PATCH] flashrom 0.9.5.1
Message-ID: <4F4970AF.3020103@gmx.net>

Increase flashrom release number to 0.9.5.1

Informal ack by Stefan Tauner on IRC:
01:03 <stefanct> with the kfreebsd patch in, 0.9.5.1 is acked by me
too in case i am not around tomorrow...

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Index: flashrom-0.9.5.1-release/Makefile
===================================================================
--- flashrom-0.9.5.1-release/Makefile	(Revision 1507)
+++ flashrom-0.9.5.1-release/Makefile	(Arbeitskopie)
@@ -277,7 +277,7 @@
 # will not require subversion. The downloadable snapshots are already exported.
 SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown)
 
-RELEASE := 0.9.5
+RELEASE := 0.9.5.1
 VERSION := $(RELEASE)-r$(SVNVERSION)
 RELEASENAME ?= $(VERSION)
 


-- 
http://www.hailfinger.org/



From svn at flashrom.org  Sun Feb 26 00:39:29 2012
From: svn at flashrom.org (repository service)
Date: Sun, 26 Feb 2012 00:39:29 +0100
Subject: [flashrom] [commit] r1508 - trunk
Message-ID: <E1S1RD7-0007GR-IK@ra.coresystems.de>

Author: hailfinger
Date: Sun Feb 26 00:39:29 2012
New Revision: 1508
URL: http://flashrom.org/trac/flashrom/changeset/1508

Log:
Increase flashrom release number to 0.9.5.1

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Modified:
   trunk/Makefile

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile	Sat Feb 25 23:50:21 2012	(r1507)
+++ trunk/Makefile	Sun Feb 26 00:39:29 2012	(r1508)
@@ -277,7 +277,7 @@
 # will not require subversion. The downloadable snapshots are already exported.
 SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/\([0-9]*\).*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown)
 
-RELEASE := 0.9.5
+RELEASE := 0.9.5.1
 VERSION := $(RELEASE)-r$(SVNVERSION)
 RELEASENAME ?= $(VERSION)
 


From svn at flashrom.org  Sun Feb 26 00:40:16 2012
From: svn at flashrom.org (repository service)
Date: Sun, 26 Feb 2012 00:40:16 +0100
Subject: [flashrom] [commit] r1509 - tags/flashrom-0.9.5.1
Message-ID: <E1S1RDs-0007hb-Uq@ra.coresystems.de>

Author: hailfinger
Date: Sun Feb 26 00:40:16 2012
New Revision: 1509
URL: http://flashrom.org/trac/flashrom/changeset/1509

Log:
Tag flashrom 0.9.5.1

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Added:
   tags/flashrom-0.9.5.1/
      - copied from r1508, trunk/


From c-d.hailfinger.devel.2006 at gmx.net  Sun Feb 26 00:47:25 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Sun, 26 Feb 2012 00:47:25 +0100
Subject: [flashrom] [PATCH] flashrom 0.9.5.1
In-Reply-To: <4F4970AF.3020103@gmx.net>
References: <4F4970AF.3020103@gmx.net>
Message-ID: <4F49730D.3030702@gmx.net>

Am 26.02.2012 00:37 schrieb Carl-Daniel Hailfinger:
> Increase flashrom release number to 0.9.5.1
>
> Informal ack by Stefan Tauner on IRC:
> 01:03 <stefanct> with the kfreebsd patch in, 0.9.5.1 is acked by me
> too in case i am not around tomorrow...
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> Acked-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

Committed in r1508.
0.9.5.1 release tagged in r1509.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From stefan.tauner at student.tuwien.ac.at  Sun Feb 26 02:05:52 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Sun, 26 Feb 2012 02:05:52 +0100
Subject: [flashrom] [PATCH] Make struct flashchip a field in struct flashctx
	instead of a complete copy.
In-Reply-To: <4EFF7680.9040506@gmx.net>
References: <4EFF7680.9040506@gmx.net>
Message-ID: <1330218352-32388-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

---
This is not tested very thoroughly, but it compiles and writing the dummy works.
Most of the transformation is quite obvious and painless (well, it was no pleasure,
so i would rather not rebase this often. :)
I have introduced dedicated struct flashchip variables where the functions use the
chip field a lot and some of those (not) introduced variables may be debatable,
but one gets at least a feeling how the code would look like with this change.

One major FIXME is: the code allocates "the new field" while probing and copies
the data from the *const* struct flashchip in the flashchips.c array into it.
We need to free that sometime... it is probably obvious (scope of fill_flash), but i
have not looked into it yet and this is my reminder.

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
---
 82802ab.c      |   12 +++---
 cli_classic.c  |   23 ++++++-----
 flash.h        |   28 ++------------
 flashrom.c     |  114 ++++++++++++++++++++++++++++---------------------------
 ichspi.c       |   12 +++---
 it87spi.c      |   20 +++++-----
 jedec.c        |   43 +++++++++++----------
 layout.c       |    2 +-
 m29f400bt.c    |    4 +-
 pm49fl00x.c    |    8 ++--
 programmer.h   |    2 +-
 sfdp.c         |    6 +-
 spi.c          |    6 +-
 spi25.c        |   48 ++++++++++++-----------
 sst28sf040.c   |    2 +-
 sst49lfxxxc.c  |    2 +-
 sst_fwhub.c    |    6 +-
 stm50flw0x0x.c |    4 +-
 w29ee011.c     |    6 +-
 w39.c          |    8 ++--
 20 files changed, 171 insertions(+), 185 deletions(-)

diff --git a/82802ab.c b/82802ab.c
index 79e157a..608995d 100644
--- a/82802ab.c
+++ b/82802ab.c
@@ -44,7 +44,7 @@ int probe_82802ab(struct flashctx *flash)
 {
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2, flashcontent1, flashcontent2;
-	int shifted = (flash->feature_bits & FEATURE_ADDR_SHIFTED) != 0;
+	int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) != 0;
 
 	/* Reset to get a clean state */
 	chip_writeb(flash, 0xFF, bios);
@@ -80,10 +80,10 @@ int probe_82802ab(struct flashctx *flash)
 		msg_cdbg(", id2 is normal flash content");
 
 	msg_cdbg("\n");
-	if (id1 != flash->manufacture_id || id2 != flash->model_id)
+	if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id)
 		return 0;
 
-	if (flash->feature_bits & FEATURE_REGISTERMAP)
+	if (flash->chip->feature_bits & FEATURE_REGISTERMAP)
 		map_flash_registers(flash);
 
 	return 1;
@@ -112,7 +112,7 @@ int unlock_82802ab(struct flashctx *flash)
 	int i;
 	//chipaddr wrprotect = flash->virtual_registers + page + 2;
 
-	for (i = 0; i < flash->total_size * 1024; i+= flash->page_size)
+	for (i = 0; i < flash->chip->total_size * 1024; i+= flash->chip->page_size)
 		chip_writeb(flash, 0, flash->virtual_registers + i + 2);
 
 	return 0;
@@ -181,7 +181,7 @@ int unlock_28f004s5(struct flashctx *flash)
 	}
 
 	/* Read block lock-bits */
-	for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) {
+	for (i = 0; i < flash->chip->total_size * 1024; i+= (64 * 1024)) {
 		bcfg = chip_readb(flash, bios + i + 2); // read block lock config
 		msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un");
 		if (bcfg) {
@@ -234,7 +234,7 @@ int unlock_lh28f008bjt(struct flashctx *flash)
 	}
 
 	/* Read block lock-bits, 8 * 8 KB + 15 * 64 KB */
-	for (i = 0; i < flash->total_size * 1024;
+	for (i = 0; i < flash->chip->total_size * 1024;
 	     i += (i >= (64 * 1024) ? 64 * 1024 : 8 * 1024)) {
 		bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */
 		msg_cdbg("block lock at %06x is %slocked!\n", i,
diff --git a/cli_classic.c b/cli_classic.c
index 972043b..4bce7d7 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -166,6 +166,7 @@ int main(int argc, char *argv[])
 	const struct flashchip *flash;
 	struct flashctx flashes[3];
 	struct flashctx *fill_flash;
+	const struct flashchip *chip;
 	const char *name;
 	int namelen, opt, i, j;
 	int startchip = -1, chipcount = 0, option_index = 0, force = 0;
@@ -441,11 +442,13 @@ int main(int argc, char *argv[])
 		}
 	}
 
+	fill_flash = &flashes[0];
+	chip = fill_flash->chip;
 	if (chipcount > 1) {
 		printf("Multiple flash chips were detected: \"%s\"",
-			flashes[0].name);
+			chip->name);
 		for (i = 1; i < chipcount; i++)
-			printf(", \"%s\"", flashes[i].name);
+			printf(", \"%s\"", flashes[i].chip->name);
 		printf("\nPlease specify which chip to use with the "
 		       "-c <chipname> option.\n");
 		ret = 1;
@@ -464,7 +467,7 @@ int main(int argc, char *argv[])
 			/* This loop just counts compatible controllers. */
 			for (j = 0; j < registered_programmer_count; j++) {
 				pgm = &registered_programmers[j];
-				if (pgm->buses_supported & flashes[0].bustype)
+				if (pgm->buses_supported & chip->bustype)
 					compatible_programmers++;
 			}
 			if (compatible_programmers > 1)
@@ -491,19 +494,17 @@ int main(int argc, char *argv[])
 		goto out_shutdown;
 	} else if (!chip_to_probe) {
 		/* repeat for convenience when looking at foreign logs */
-		tempstr = flashbuses_to_text(flashes[0].bustype);
+		tempstr = flashbuses_to_text(chip->bustype);
 		msg_gdbg("Found %s flash chip \"%s\" (%d kB, %s).\n",
-			 flashes[0].vendor, flashes[0].name,
-			 flashes[0].total_size, tempstr);
+			 chip->vendor, chip->name,
+			 chip->total_size, tempstr);
 		free(tempstr);
 	}
 
-	fill_flash = &flashes[0];
-
-	check_chip_supported(fill_flash);
+	check_chip_supported(chip);
 
-	size = fill_flash->total_size * 1024;
-	if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->bustype, size) &&
+	size = chip->total_size * 1024;
+	if (check_max_decode(fill_flash->pgm->buses_supported & chip->bustype, size) &&
 	    (!force)) {
 		fprintf(stderr, "Chip is too big for this programmer "
 			"(-V gives details). Use --force to override.\n");
diff --git a/flash.h b/flash.h
index 0dac13d..ed64512 100644
--- a/flash.h
+++ b/flash.h
@@ -87,6 +87,7 @@ enum chipbustype {
 #define FEATURE_WRSR_EITHER	(FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
 
 struct flashctx;
+typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
 
 struct flashchip {
 	const char *vendor;
@@ -135,7 +136,7 @@ struct flashchip {
 		} eraseblocks[NUM_ERASEREGIONS];
 		/* a block_erase function should try to erase one block of size
 		 * 'blocklen' at address 'blockaddr' and return 0 on success. */
-		int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
+		erasefunc_t *block_erase;
 	} block_erasers[NUM_ERASEFUNCTIONS];
 
 	int (*printlock) (struct flashctx *flash);
@@ -148,35 +149,14 @@ struct flashchip {
 	} voltage;
 };
 
-/* struct flashctx must always contain struct flashchip at the beginning. */
 struct flashctx {
-	const char *vendor;
-	const char *name;
-	enum chipbustype bustype;
-	uint32_t manufacture_id;
-	uint32_t model_id;
-	int total_size;
-	int page_size;
-	int feature_bits;
-	uint32_t tested;
-	int (*probe) (struct flashctx *flash);
-	int probe_timing;
-	struct block_eraser block_erasers[NUM_ERASEFUNCTIONS];
-	int (*printlock) (struct flashctx *flash);
-	int (*unlock) (struct flashctx *flash);
-	int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
-	struct voltage voltage;
-	/* struct flashchip ends here. */
-	
+	struct flashchip *chip;
 	chipaddr virtual_memory;
 	/* Some flash devices have an additional register space. */
 	chipaddr virtual_registers;
 	struct registered_programmer *pgm;
 };
 
-typedef int (erasefunc_t)(struct flashctx *flash, unsigned int addr, unsigned int blocklen);
-
 #define TEST_UNTESTED	0
 
 #define TEST_OK_PROBE	(1 << 0)
@@ -295,7 +275,7 @@ int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 int register_include_arg(char *name);
 int process_include_args(void);
 int read_romlayout(char *name);
-int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
+int handle_romentries(const struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents);
 
 /* spi.c */
 struct spi_command {
diff --git a/flashrom.c b/flashrom.c
index cad043b..0b6cca3 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -265,7 +265,7 @@ struct shutdown_func_data {
  */
 static int may_register_shutdown = 0;
 
-static int check_block_eraser(const struct flashctx *flash, int k, int log);
+static int check_block_eraser(const struct flashchip *flash, int k, int log);
 
 /* Register a function to be executed on programmer shutdown.
  * The advantage over atexit() is that you can supply a void pointer which will
@@ -404,7 +404,7 @@ void programmer_delay(int usecs)
 
 void map_flash_registers(struct flashctx *flash)
 {
-	size_t size = flash->total_size * 1024;
+	size_t size = flash->chip->total_size * 1024;
 	/* Flash registers live 4 MByte below the flash. */
 	/* FIXME: This is incorrect for nonstandard flashbase. */
 	flash->virtual_registers = (chipaddr)programmer_map_flash_region("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size);
@@ -522,7 +522,7 @@ char *extract_programmer_param(const char *param_name)
 }
 
 /* Returns the number of well-defined erasers for a chip. */
-static unsigned int count_usable_erasers(const struct flashctx *flash)
+static unsigned int count_usable_erasers(const struct flashchip *flash)
 {
 	unsigned int usable_erasefunctions = 0;
 	int k;
@@ -561,6 +561,7 @@ int check_erased_range(struct flashctx *flash, unsigned int start,
 int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start,
 		 unsigned int len, const char *message)
 {
+	const struct flashchip *chip = flash->chip;
 	unsigned int i;
 	uint8_t *readbuf = malloc(len);
 	int ret = 0, failcount = 0;
@@ -568,7 +569,7 @@ int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start,
 	if (!len)
 		goto out_free;
 
-	if (!flash->read) {
+	if (!chip->read) {
 		msg_cerr("ERROR: flashrom has no read function for this flash chip.\n");
 		return 1;
 	}
@@ -577,17 +578,17 @@ int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start,
 		exit(1);
 	}
 
-	if (start + len > flash->total_size * 1024) {
+	if (start + len > chip->total_size * 1024) {
 		msg_gerr("Error: %s called with start 0x%x + len 0x%x >"
 			" total_size 0x%x\n", __func__, start, len,
-			flash->total_size * 1024);
+			chip->total_size * 1024);
 		ret = -1;
 		goto out_free;
 	}
 	if (!message)
 		message = "VERIFY";
 
-	ret = flash->read(flash, readbuf, start, len);
+	ret = chip->read(flash, readbuf, start, len);
 	if (ret) {
 		msg_gerr("Verification impossible because read failed "
 			 "at 0x%x (len 0x%x)\n", start, len);
@@ -941,32 +942,38 @@ int check_max_decode(enum chipbustype buses, uint32_t size)
 int probe_flash(struct registered_programmer *pgm, int startchip,
 		struct flashctx *fill_flash, int force)
 {
-	const struct flashchip *flash;
+	const struct flashchip *chip;
 	unsigned long base = 0;
 	char location[64];
 	uint32_t size;
 	enum chipbustype buses_common;
 	char *tmp;
 
-	for (flash = flashchips + startchip; flash && flash->name; flash++) {
-		if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0)
+	for (chip = flashchips + startchip; chip && chip->name; chip++) {
+		if (chip_to_probe && strcmp(chip->name, chip_to_probe) != 0)
 			continue;
-		buses_common = pgm->buses_supported & flash->bustype;
+		buses_common = pgm->buses_supported & chip->bustype;
 		if (!buses_common)
 			continue;
 		msg_gdbg("Probing for %s %s, %d kB: ",
-			     flash->vendor, flash->name, flash->total_size);
-		if (!flash->probe && !force) {
+			     chip->vendor, chip->name, chip->total_size);
+		if (!chip->probe && !force) {
 			msg_gdbg("failed! flashrom has no probe function for "
 				 "this flash chip.\n");
 			continue;
 		}
 
-		size = flash->total_size * 1024;
+		size = chip->total_size * 1024;
 		check_max_decode(buses_common, size);
 
 		/* Start filling in the dynamic data. */
-		memcpy(fill_flash, flash, sizeof(struct flashchip));
+		/* FIXME: when to free? */
+		fill_flash->chip = malloc(sizeof(struct flashchip));
+		if (fill_flash->chip == NULL) {
+			msg_gerr("%s: out of memory.\n", __func__);
+			return -1;
+		}
+		memcpy(fill_flash->chip, chip, sizeof(struct flashchip));
 		fill_flash->pgm = pgm;
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
@@ -975,7 +982,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip,
 		if (force)
 			break;
 
-		if (fill_flash->probe(fill_flash) != 1)
+		if (chip->probe(fill_flash) != 1)
 			goto notfound;
 
 		/* If this is the first chip found, accept it.
@@ -985,11 +992,11 @@ int probe_flash(struct registered_programmer *pgm, int startchip,
 		 * one for this programmer interface and thus no other chip has
 		 * been found on this interface.
 		 */
-		if (startchip == 0 && fill_flash->model_id == SFDP_DEVICE_ID) {
+		if (startchip == 0 && chip->model_id == SFDP_DEVICE_ID) {
 			msg_cinfo("===\n"
 				  "SFDP has autodetected a flash chip which is "
 				  "not natively supported by flashrom yet.\n");
-			if (count_usable_erasers(fill_flash) == 0)
+			if (count_usable_erasers(chip) == 0)
 				msg_cinfo("The standard operations read and "
 					  "verify should work, but to support "
 					  "erase, write and all other "
@@ -1010,15 +1017,15 @@ int probe_flash(struct registered_programmer *pgm, int startchip,
 		}
 
 		if (startchip == 0 ||
-		    ((fill_flash->model_id != GENERIC_DEVICE_ID) &&
-		     (fill_flash->model_id != SFDP_DEVICE_ID)))
+		    ((chip->model_id != GENERIC_DEVICE_ID) &&
+		     (chip->model_id != SFDP_DEVICE_ID)))
 			break;
 
 notfound:
 		programmer_unmap_flash_region((void *)fill_flash->virtual_memory, size);
 	}
 
-	if (!flash || !flash->name)
+	if (!chip || !chip->name)
 		return -1;
 
 #if CONFIG_INTERNAL == 1
@@ -1028,27 +1035,27 @@ notfound:
 #endif
 		snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name);
 
-	tmp = flashbuses_to_text(flash->bustype);
+	tmp = flashbuses_to_text(chip->bustype);
 	msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) %s.\n",
-		  force ? "Assuming" : "Found", fill_flash->vendor,
-		  fill_flash->name, fill_flash->total_size, tmp, location);
+		  force ? "Assuming" : "Found", chip->vendor,
+		  chip->name, chip->total_size, tmp, location);
 	free(tmp);
 
 	/* Flash registers will not be mapped if the chip was forced. Lock info
 	 * may be stored in registers, so avoid lock info printing.
 	 */
 	if (!force)
-		if (fill_flash->printlock)
-			fill_flash->printlock(fill_flash);
+		if (chip->printlock)
+			chip->printlock(fill_flash);
 
 	/* Return position of matching chip. */
-	return flash - flashchips;
+	return chip - flashchips;
 }
 
 int verify_flash(struct flashctx *flash, uint8_t *buf)
 {
 	int ret;
-	unsigned int total_size = flash->total_size * 1024;
+	unsigned int total_size = flash->chip->total_size * 1024;
 
 	msg_cinfo("Verifying flash... ");
 
@@ -1121,7 +1128,7 @@ int write_buf_to_file(unsigned char *buf, unsigned long size,
 
 int read_flash_to_file(struct flashctx *flash, const char *filename)
 {
-	unsigned long size = flash->total_size * 1024;
+	unsigned long size = flash->chip->total_size * 1024;
 	unsigned char *buf = calloc(size, sizeof(char));
 	int ret = 0;
 
@@ -1131,12 +1138,12 @@ int read_flash_to_file(struct flashctx *flash, const char *filename)
 		msg_cinfo("FAILED.\n");
 		return 1;
 	}
-	if (!flash->read) {
+	if (!flash->chip->read) {
 		msg_cerr("No read function available for this flash chip.\n");
 		ret = 1;
 		goto out_free;
 	}
-	if (flash->read(flash, buf, 0, size)) {
+	if (flash->chip->read(flash, buf, 0, size)) {
 		msg_cerr("Read operation failed!\n");
 		ret = 1;
 		goto out_free;
@@ -1257,7 +1264,7 @@ static int erase_and_write_block_helper(struct flashctx *flash,
 		if (!writecount++)
 			msg_cdbg("W");
 		/* Needs the partial write function signature. */
-		ret = flash->write(flash, newcontents + starthere,
+		ret = flash->chip->write(flash, newcontents + starthere,
 				   start + starthere, lenhere);
 		if (ret)
 			return ret;
@@ -1284,7 +1291,7 @@ static int walk_eraseregions(struct flashctx *flash, int erasefunction,
 	int i, j;
 	unsigned int start = 0;
 	unsigned int len;
-	struct block_eraser eraser = flash->block_erasers[erasefunction];
+	struct block_eraser eraser = flash->chip->block_erasers[erasefunction];
 
 	for (i = 0; i < NUM_ERASEREGIONS; i++) {
 		/* count==0 for all automatically initialized array
@@ -1308,7 +1315,7 @@ static int walk_eraseregions(struct flashctx *flash, int erasefunction,
 	return 0;
 }
 
-static int check_block_eraser(const struct flashctx *flash, int k, int log)
+static int check_block_eraser(const struct flashchip *flash, int k, int log)
 {
 	struct block_eraser eraser = flash->block_erasers[k];
 
@@ -1335,10 +1342,12 @@ static int check_block_eraser(const struct flashctx *flash, int k, int log)
 int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
 			  uint8_t *newcontents)
 {
-	int k, ret = 1;
+	int ret = 1;
+	const struct flashchip *chip = flash->chip;
+	unsigned long size = chip->total_size * 1024;
+	unsigned int usable_erasefunctions = count_usable_erasers(chip);
+	int k;
 	uint8_t *curcontents;
-	unsigned long size = flash->total_size * 1024;
-	unsigned int usable_erasefunctions = count_usable_erasers(flash);
 
 	msg_cinfo("Erasing and writing flash chip... ");
 	curcontents = malloc(size);
@@ -1357,7 +1366,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
 			break;
 		}
 		msg_cdbg("Trying erase function %i... ", k);
-		if (check_block_eraser(flash, k, 1))
+		if (check_block_eraser(chip, k, 1))
 			continue;
 		usable_erasefunctions--;
 		ret = walk_eraseregions(flash, k, &erase_and_write_block_helper,
@@ -1375,7 +1384,7 @@ int erase_and_write_flash(struct flashctx *flash, uint8_t *oldcontents,
 		 * in non-verbose mode.
 		 */
 		msg_cinfo("Reading current flash chip contents... ");
-		if (flash->read(flash, curcontents, 0, size)) {
+		if (chip->read(flash, curcontents, 0, size)) {
 			/* Now we are truly screwed. Read failed as well. */
 			msg_cerr("Can't read anymore! Aborting.\n");
 			/* We have no idea about the flash chip contents, so
@@ -1550,14 +1559,6 @@ int selfcheck(void)
 		msg_gerr("Flashchips table miscompilation!\n");
 		ret = 1;
 	}
-	/* Check that virtual_memory in struct flashctx is placed directly
-	 * after the members copied from struct flashchip.
-	 */
-	if (sizeof(struct flashchip) !=
-	    offsetof(struct flashctx, virtual_memory)) {
-		msg_gerr("struct flashctx broken!\n");
-		ret = 1;
-	}
 	for (flash = flashchips; flash && flash->name; flash++)
 		if (selfcheck_eraseblocks(flash))
 			ret = 1;
@@ -1583,7 +1584,7 @@ int selfcheck(void)
 	return ret;
 }
 
-void check_chip_supported(const struct flashctx *flash)
+void check_chip_supported(const struct flashchip *flash)
 {
 	if (flash->feature_bits & FEATURE_OTP) {
 		msg_cdbg("This chip may contain one-time programmable memory. "
@@ -1642,7 +1643,7 @@ void check_chip_supported(const struct flashctx *flash)
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(struct flashctx *flash, int force, int read_it,
+int chip_safety_check(const struct flashchip *flash, int force, int read_it,
 		      int write_it, int erase_it, int verify_it)
 {
 	if (!programmer_may_write && (write_it || erase_it)) {
@@ -1710,9 +1711,10 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	uint8_t *oldcontents;
 	uint8_t *newcontents;
 	int ret = 0;
-	unsigned long size = flash->total_size * 1024;
+	const struct flashchip *chip = flash->chip;
+	unsigned long size = chip->total_size * 1024;
 
-	if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) {
+	if (chip_safety_check(chip, force, read_it, write_it, erase_it, verify_it)) {
 		msg_cerr("Aborting.\n");
 		ret = 1;
 		goto out_nofree;
@@ -1721,8 +1723,8 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	/* Given the existence of read locks, we want to unlock for read,
 	 * erase and write.
 	 */
-	if (flash->unlock)
-		flash->unlock(flash);
+	if (chip->unlock)
+		chip->unlock(flash);
 
 	if (read_it) {
 		ret = read_flash_to_file(flash, filename);
@@ -1782,7 +1784,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 	 * takes time as well.
 	 */
 	msg_cinfo("Reading old flash chip contents... ");
-	if (flash->read(flash, oldcontents, 0, size)) {
+	if (chip->read(flash, oldcontents, 0, size)) {
 		ret = 1;
 		msg_cinfo("FAILED.\n");
 		goto out;
@@ -1791,7 +1793,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 
 	// This should be moved into each flash part's code to do it 
 	// cleanly. This does the job.
-	handle_romentries(flash, oldcontents, newcontents);
+	handle_romentries(chip, oldcontents, newcontents);
 
 	// ////////////////////////////////////////////////////////////
 
@@ -1799,7 +1801,7 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it,
 		if (erase_and_write_flash(flash, oldcontents, newcontents)) {
 			msg_cerr("Uh oh. Erase/write failed. Checking if "
 				 "anything changed.\n");
-			if (!flash->read(flash, newcontents, 0, size)) {
+			if (!chip->read(flash, newcontents, 0, size)) {
 				if (!memcmp(oldcontents, newcontents, size)) {
 					msg_cinfo("Good. It seems nothing was "
 						  "changed.\n");
diff --git a/ichspi.c b/ichspi.c
index 403d763..fd0c56f 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1191,9 +1191,9 @@ static int ich_hwseq_probe(struct flashctx *flash)
 	else
 		msg_cdbg(" with a");
 	msg_cdbg(" density of %d kB.\n", total_size / 1024);
-	flash->total_size = total_size / 1024;
+	flash->chip->total_size = total_size / 1024;
 
-	eraser = &(flash->block_erasers[0]);
+	eraser = &(flash->chip->block_erasers[0]);
 	boundary = (REGREAD32(ICH9_REG_FPB) & FPB_FPBA) << 12;
 	size_high = total_size - boundary;
 	erase_size_high = ich_hwseq_get_erase_block_size(boundary);
@@ -1226,7 +1226,7 @@ static int ich_hwseq_probe(struct flashctx *flash)
 		msg_cdbg("In that range are %d erase blocks with %d B each.\n",
 			 size_high / erase_size_high, erase_size_high);
 	}
-	flash->tested = TEST_OK_PREW;
+	flash->chip->tested = TEST_OK_PREW;
 	return 1;
 }
 
@@ -1254,7 +1254,7 @@ static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr,
 		return -1;
 	}
 
-	if (addr + len > flash->total_size * 1024) {
+	if (addr + len > flash->chip->total_size * 1024) {
 		msg_perr("Request to erase some inaccessible memory address(es)"
 			 " (addr=0x%x, len=%d). "
 			 "Not erasing anything.\n", addr, len);
@@ -1286,7 +1286,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
 	uint16_t timeout = 100 * 60;
 	uint8_t block_len;
 
-	if (addr + len > flash->total_size * 1024) {
+	if (addr + len > flash->chip->total_size * 1024) {
 		msg_perr("Request to read from an inaccessible memory address "
 			 "(addr=0x%x, len=%d).\n", addr, len);
 		return -1;
@@ -1324,7 +1324,7 @@ static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf,
 	uint16_t timeout = 100 * 60;
 	uint8_t block_len;
 
-	if (addr + len > flash->total_size * 1024) {
+	if (addr + len > flash->chip->total_size * 1024) {
 		msg_perr("Request to write to an inaccessible memory address "
 			 "(addr=0x%x, len=%d).\n", addr, len);
 		return -1;
diff --git a/it87spi.c b/it87spi.c
index f089d78..4abea02 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -329,7 +329,7 @@ static int it8716f_spi_page_program(struct flashctx *flash, uint8_t *buf,
 	/* FIXME: The command below seems to be redundant or wrong. */
 	OUTB(0x06, it8716f_flashport + 1);
 	OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
-	for (i = 0; i < flash->page_size; i++)
+	for (i = 0; i < flash->chip->page_size; i++)
 		chip_writeb(flash, buf[i], bios + start + i);
 	OUTB(0, it8716f_flashport);
 	/* Wait until the Write-In-Progress bit is cleared.
@@ -353,7 +353,7 @@ static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 	 * the mainboard does not use IT87 SPI translation. This should be done
 	 * via a programmer parameter for the internal programmer.
 	 */
-	if ((flash->total_size * 1024 > 512 * 1024)) {
+	if ((flash->chip->total_size * 1024 > 512 * 1024)) {
 		spi_read_chunked(flash, buf, start, len, 3);
 	} else {
 		read_memmapped(flash, buf, start, len);
@@ -365,6 +365,7 @@ static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
 				      unsigned int start, unsigned int len)
 {
+	const struct flashchip *chip = flash->chip;
 	/*
 	 * IT8716F only allows maximum of 512 kb SPI chip size for memory
 	 * mapped access. It also can't write more than 1+3+256 bytes at once,
@@ -375,28 +376,27 @@ static int it8716f_spi_chip_write_256(struct flashctx *flash, uint8_t *buf,
 	 * the mainboard does not use IT87 SPI translation. This should be done
 	 * via a programmer parameter for the internal programmer.
 	 */
-	if ((flash->total_size * 1024 > 512 * 1024) ||
-	    (flash->page_size > 256)) {
+	if ((chip->total_size * 1024 > 512 * 1024) || (chip->page_size > 256)) {
 		spi_chip_write_1(flash, buf, start, len);
 	} else {
 		unsigned int lenhere;
 
-		if (start % flash->page_size) {
+		if (start % chip->page_size) {
 			/* start to the end of the page or to start + len,
 			 * whichever is smaller.
 			 */
-			lenhere = min(len, flash->page_size - start % flash->page_size);
+			lenhere = min(len, chip->page_size - start % chip->page_size);
 			spi_chip_write_1(flash, buf, start, lenhere);
 			start += lenhere;
 			len -= lenhere;
 			buf += lenhere;
 		}
 
-		while (len >= flash->page_size) {
+		while (len >= chip->page_size) {
 			it8716f_spi_page_program(flash, buf, start);
-			start += flash->page_size;
-			len -= flash->page_size;
-			buf += flash->page_size;
+			start += chip->page_size;
+			len -= chip->page_size;
+			buf += chip->page_size;
 		}
 		if (len)
 			spi_chip_write_1(flash, buf, start, len);
diff --git a/jedec.c b/jedec.c
index 69c0c0c..5c549a2 100644
--- a/jedec.c
+++ b/jedec.c
@@ -93,7 +93,7 @@ void data_polling_jedec(const struct flashctx *flash, chipaddr dst,
 		msg_cdbg("%s: excessive loops, i=0x%x\n", __func__, i);
 }
 
-static unsigned int getaddrmask(struct flashctx *flash)
+static unsigned int getaddrmask(const struct flashchip *flash)
 {
 	switch (flash->feature_bits & FEATURE_ADDR_MASK) {
 	case FEATURE_ADDR_FULL:
@@ -124,16 +124,17 @@ static void start_program_jedec_common(struct flashctx *flash,
 static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
+	const struct flashchip *chip = flash->chip;
 	uint8_t id1, id2;
 	uint32_t largeid1, largeid2;
 	uint32_t flashcontent1, flashcontent2;
 	int probe_timing_enter, probe_timing_exit;
 
-	if (flash->probe_timing > 0) 
-		probe_timing_enter = probe_timing_exit = flash->probe_timing;
-	else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */
+	if (chip->probe_timing > 0)
+		probe_timing_enter = probe_timing_exit = chip->probe_timing;
+	else if (chip->probe_timing == TIMING_ZERO) { /* No delay. */
 		probe_timing_enter = probe_timing_exit = 0;
-	} else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */
+	} else if (chip->probe_timing == TIMING_FIXME) { /* == _IGNORED */
 		msg_cdbg("Chip lacks correct probe timing information, "
 			     "using default 10mS/40uS. ");
 		probe_timing_enter = 10000;
@@ -151,7 +152,7 @@ static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
 	if (probe_timing_enter)
 		programmer_delay(probe_timing_enter);
 	/* Reset chip to a clean slate */
-	if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
+	if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
 	{
 		chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 		if (probe_timing_exit)
@@ -194,7 +195,7 @@ static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
 	}
 
 	/* Issue JEDEC Product ID Exit command */
-	if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
+	if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET)
 	{
 		chip_writeb(flash, 0xAA, bios + (0x5555 & mask));
 		if (probe_timing_exit)
@@ -231,10 +232,10 @@ static int probe_jedec_common(struct flashctx *flash, unsigned int mask)
 		msg_cdbg(", id2 is normal flash content");
 
 	msg_cdbg("\n");
-	if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id)
+	if (largeid1 != chip->manufacture_id || largeid2 != chip->model_id)
 		return 0;
 
-	if (flash->feature_bits & FEATURE_REGISTERMAP)
+	if (chip->feature_bits & FEATURE_REGISTERMAP)
 		map_flash_registers(flash);
 
 	return 1;
@@ -245,7 +246,7 @@ static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page,
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
-	if(flash->probe_timing != TIMING_ZERO)
+	if(flash->chip->probe_timing != TIMING_ZERO)
 	        delay_us = 10;
 
 	/*  Issue the Sector Erase command   */
@@ -275,7 +276,7 @@ static int erase_block_jedec_common(struct flashctx *flash, unsigned int block,
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
-	if(flash->probe_timing != TIMING_ZERO)
+	if(flash->chip->probe_timing != TIMING_ZERO)
 	        delay_us = 10;
 
 	/*  Issue the Sector Erase command   */
@@ -304,7 +305,7 @@ static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask)
 {
 	chipaddr bios = flash->virtual_memory;
 	int delay_us = 0;
-	if(flash->probe_timing != TIMING_ZERO)
+	if(flash->chip->probe_timing != TIMING_ZERO)
 	        delay_us = 10;
 
 	/*  Issue the JEDEC Chip Erase command   */
@@ -366,7 +367,7 @@ int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start,
 	chipaddr olddst;
 	unsigned int mask;
 
-	mask = getaddrmask(flash);
+	mask = getaddrmask(flash->chip);
 
 	olddst = dst;
 	for (i = 0; i < len; i++) {
@@ -390,7 +391,7 @@ int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src,
 	chipaddr d = dst;
 	unsigned int mask;
 
-	mask = getaddrmask(flash);
+	mask = getaddrmask(flash->chip);
 
 retry:
 	/* Issue JEDEC Start Program command */
@@ -438,7 +439,7 @@ int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start,
 	 * write_jedec have page_size set to max_writechunk_size, so
 	 * we're OK for now.
 	 */
-	unsigned int page_size = flash->page_size;
+	unsigned int page_size = flash->chip->page_size;
 
 	/* Warning: This loop has a very unusual condition and body.
 	 * The loop needs to go through each page with at least one affected
@@ -469,8 +470,8 @@ int erase_chip_block_jedec(struct flashctx *flash, unsigned int addr,
 {
 	unsigned int mask;
 
-	mask = getaddrmask(flash);
-	if ((addr != 0) || (blocksize != flash->total_size * 1024)) {
+	mask = getaddrmask(flash->chip);
+	if ((addr != 0) || (blocksize != flash->chip->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
 			__func__);
 		return -1;
@@ -482,7 +483,7 @@ int probe_jedec(struct flashctx *flash)
 {
 	unsigned int mask;
 
-	mask = getaddrmask(flash);
+	mask = getaddrmask(flash->chip);
 	return probe_jedec_common(flash, mask);
 }
 
@@ -491,7 +492,7 @@ int erase_sector_jedec(struct flashctx *flash, unsigned int page,
 {
 	unsigned int mask;
 
-	mask = getaddrmask(flash);
+	mask = getaddrmask(flash->chip);
 	return erase_sector_jedec_common(flash, page, size, mask);
 }
 
@@ -500,7 +501,7 @@ int erase_block_jedec(struct flashctx *flash, unsigned int page,
 {
 	unsigned int mask;
 
-	mask = getaddrmask(flash);
+	mask = getaddrmask(flash->chip);
 	return erase_block_jedec_common(flash, page, size, mask);
 }
 
@@ -508,6 +509,6 @@ int erase_chip_jedec(struct flashctx *flash)
 {
 	unsigned int mask;
 
-	mask = getaddrmask(flash);
+	mask = getaddrmask(flash->chip);
 	return erase_chip_jedec_common(flash, mask);
 }
diff --git a/layout.c b/layout.c
index 90d3cce..f0f7a6f 100644
--- a/layout.c
+++ b/layout.c
@@ -302,7 +302,7 @@ romlayout_t *get_next_included_romentry(unsigned int start)
 	return best_entry;
 }
 
-int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents)
+int handle_romentries(const struct flashchip *flash, uint8_t *oldcontents, uint8_t *newcontents)
 {
 	unsigned int start = 0;
 	romlayout_t *entry;
diff --git a/m29f400bt.c b/m29f400bt.c
index c9d8a40..8f0329e 100644
--- a/m29f400bt.c
+++ b/m29f400bt.c
@@ -81,7 +81,7 @@ int probe_m29f400bt(struct flashctx *flash)
 
 	msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
 
-	if (id1 == flash->manufacture_id && id2 == flash->model_id)
+	if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id)
 		return 1;
 
 	return 0;
@@ -130,7 +130,7 @@ int block_erase_m29f400bt(struct flashctx *flash, unsigned int start,
 int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address,
 			       unsigned int blocklen)
 {
-	if ((address != 0) || (blocklen != flash->total_size * 1024)) {
+	if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
 			__func__);
 		return -1;
diff --git a/pm49fl00x.c b/pm49fl00x.c
index 42db2aa..fe28d2b 100644
--- a/pm49fl00x.c
+++ b/pm49fl00x.c
@@ -40,14 +40,14 @@ static void write_lockbits_49fl00x(const struct flashctx *flash,
 
 int unlock_49fl00x(struct flashctx *flash)
 {
-	write_lockbits_49fl00x(flash, flash->total_size * 1024, 0,
-			       flash->page_size);
+	write_lockbits_49fl00x(flash, flash->chip->total_size * 1024, 0,
+			       flash->chip->page_size);
 	return 0;
 }
 
 int lock_49fl00x(struct flashctx *flash)
 {
-	write_lockbits_49fl00x(flash, flash->total_size * 1024, 1,
-			       flash->page_size);
+	write_lockbits_49fl00x(flash, flash->chip->total_size * 1024, 1,
+			       flash->chip->page_size);
 	return 0;
 }
diff --git a/programmer.h b/programmer.h
index 240e1af..3ef262c 100644
--- a/programmer.h
+++ b/programmer.h
@@ -458,7 +458,7 @@ struct decode_sizes {
 extern struct decode_sizes max_rom_decode;
 extern int programmer_may_write;
 extern unsigned long flashbase;
-void check_chip_supported(const struct flashctx *flash);
+void check_chip_supported(const struct flashchip *flash);
 int check_max_decode(enum chipbustype buses, uint32_t size);
 char *extract_programmer_param(const char *param_name);
 
diff --git a/sfdp.c b/sfdp.c
index 123c982..1781949 100644
--- a/sfdp.c
+++ b/sfdp.c
@@ -72,7 +72,7 @@ struct sfdp_tbl_hdr {
 	uint32_t ptp; /* 24b pointer */
 };
 
-static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint32_t block_size)
+static int sfdp_add_uniform_eraser(struct flashchip *flash, uint8_t opcode, uint32_t block_size)
 {
 	int i;
 	uint32_t total_size = flash->total_size * 1024;
@@ -116,7 +116,7 @@ static int sfdp_add_uniform_eraser(struct flashctx *flash, uint8_t opcode, uint3
 	return 1;
 }
 
-static int sfdp_fill_flash(struct flashctx *flash, uint8_t *buf, uint16_t len)
+static int sfdp_fill_flash(struct flashchip *flash, uint8_t *buf, uint16_t len)
 {
 	uint8_t opcode_4k_erase = 0xFF;
 	uint32_t tmp32;
@@ -370,7 +370,7 @@ int probe_spi_sfdp(struct flashctx *flash)
 				msg_cdbg("Length of the mandatory JEDEC SFDP "
 					 "parameter table is wrong (%d B), "
 					 "skipping it.\n", len);
-			} else if (sfdp_fill_flash(flash, tbuf, len) == 0)
+			} else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0)
 				ret = 1;
 		}
 		free(tbuf);
diff --git a/spi.c b/spi.c
index b2d3eb0..56d88df 100644
--- a/spi.c
+++ b/spi.c
@@ -111,16 +111,16 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
 	 * means 0xffffff, the highest unsigned 24bit number.
 	 */
 	addrbase = spi_get_valid_read_addr(flash);
-	if (addrbase + flash->total_size * 1024 > (1 << 24)) {
+	if (addrbase + flash->chip->total_size * 1024 > (1 << 24)) {
 		msg_perr("Flash chip size exceeds the allowed access window. ");
 		msg_perr("Read will probably fail.\n");
 		/* Try to get the best alignment subject to constraints. */
-		addrbase = (1 << 24) - flash->total_size * 1024;
+		addrbase = (1 << 24) - flash->chip->total_size * 1024;
 	}
 	/* Check if alignment is native (at least the largest power of two which
 	 * is a factor of the mapped size of the chip).
 	 */
-	if (ffs(flash->total_size * 1024) > (ffs(addrbase) ? : 33)) {
+	if (ffs(flash->chip->total_size * 1024) > (ffs(addrbase) ? : 33)) {
 		msg_perr("Flash chip is not aligned natively in the allowed "
 			 "access window.\n");
 		msg_perr("Read will probably return garbage.\n");
diff --git a/spi25.c b/spi25.c
index b7e8189..2accb6d 100644
--- a/spi25.c
+++ b/spi25.c
@@ -117,6 +117,7 @@ int spi_write_disable(struct flashctx *flash)
 
 static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
 {
+	const struct flashchip *chip = flash->chip;
 	unsigned char readarr[4];
 	uint32_t id1;
 	uint32_t id2;
@@ -147,7 +148,7 @@ static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
 
 	msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
 
-	if (id1 == flash->manufacture_id && id2 == flash->model_id) {
+	if (id1 == chip->manufacture_id && id2 == chip->model_id) {
 		/* Print the status register to tell the
 		 * user about possible write protection.
 		 */
@@ -157,12 +158,11 @@ static int probe_spi_rdid_generic(struct flashctx *flash, int bytes)
 	}
 
 	/* Test if this is a pure vendor match. */
-	if (id1 == flash->manufacture_id &&
-	    GENERIC_DEVICE_ID == flash->model_id)
+	if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id)
 		return 1;
 
 	/* Test if there is any vendor ID. */
-	if (GENERIC_MANUF_ID == flash->manufacture_id &&
+	if (GENERIC_MANUF_ID == chip->manufacture_id &&
 	    id1 != 0xff)
 		return 1;
 
@@ -198,6 +198,7 @@ int probe_spi_rdid4(struct flashctx *flash)
 
 int probe_spi_rems(struct flashctx *flash)
 {
+	const struct flashchip *chip = flash->chip;
 	unsigned char readarr[JEDEC_REMS_INSIZE];
 	uint32_t id1, id2;
 
@@ -210,7 +211,7 @@ int probe_spi_rems(struct flashctx *flash)
 
 	msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2);
 
-	if (id1 == flash->manufacture_id && id2 == flash->model_id) {
+	if (id1 == chip->manufacture_id && id2 == chip->model_id) {
 		/* Print the status register to tell the
 		 * user about possible write protection.
 		 */
@@ -220,12 +221,11 @@ int probe_spi_rems(struct flashctx *flash)
 	}
 
 	/* Test if this is a pure vendor match. */
-	if (id1 == flash->manufacture_id &&
-	    GENERIC_DEVICE_ID == flash->model_id)
+	if (id1 == chip->manufacture_id && GENERIC_DEVICE_ID == chip->model_id)
 		return 1;
 
 	/* Test if there is any vendor ID. */
-	if (GENERIC_MANUF_ID == flash->manufacture_id &&
+	if (GENERIC_MANUF_ID == chip->manufacture_id &&
 	    id1 != 0xff)
 		return 1;
 
@@ -267,7 +267,7 @@ int probe_spi_res1(struct flashctx *flash)
 
 	msg_cdbg("%s: id 0x%x\n", __func__, id2);
 
-	if (id2 != flash->model_id)
+	if (id2 != flash->chip->model_id)
 		return 0;
 
 	/* Print the status register to tell the
@@ -291,7 +291,7 @@ int probe_spi_res2(struct flashctx *flash)
 
 	msg_cdbg("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2);
 
-	if (id1 != flash->manufacture_id || id2 != flash->model_id)
+	if (id1 != flash->chip->manufacture_id || id2 != flash->chip->model_id)
 		return 0;
 
 	/* Print the status register to tell the
@@ -416,22 +416,23 @@ void spi_prettyprint_status_register_sst25vf040b(uint8_t status)
 
 int spi_prettyprint_status_register(struct flashctx *flash)
 {
+	const struct flashchip *chip = flash->chip;
 	uint8_t status;
 
 	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
-	switch (flash->manufacture_id) {
+	switch (chip->manufacture_id) {
 	case ST_ID:
-		if (((flash->model_id & 0xff00) == 0x2000) ||
-		    ((flash->model_id & 0xff00) == 0x2500))
+		if (((chip->model_id & 0xff00) == 0x2000) ||
+		    ((chip->model_id & 0xff00) == 0x2500))
 			spi_prettyprint_status_register_st_m25p(status);
 		break;
 	case MACRONIX_ID:
-		if ((flash->model_id & 0xff00) == 0x2000)
+		if ((chip->model_id & 0xff00) == 0x2000)
 			spi_prettyprint_status_register_st_m25p(status);
 		break;
 	case SST_ID:
-		switch (flash->model_id) {
+		switch (chip->model_id) {
 		case 0x2541:
 			spi_prettyprint_status_register_sst25vf016(status);
 			break;
@@ -701,7 +702,7 @@ int spi_block_erase_20(struct flashctx *flash, unsigned int addr,
 int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
 		       unsigned int blocklen)
 {
-	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
+	if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
 			__func__);
 		return -1;
@@ -712,7 +713,7 @@ int spi_block_erase_60(struct flashctx *flash, unsigned int addr,
 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
 		       unsigned int blocklen)
 {
-	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
+	if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
 			__func__);
 		return -1;
@@ -862,16 +863,17 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status)
 
 int spi_write_status_register(struct flashctx *flash, int status)
 {
+	struct flashchip *chip = flash->chip;
 	int ret = 1;
 
-	if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
+	if (!(chip->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
 		msg_cdbg("Missing status register write definition, assuming "
 			 "EWSR is needed\n");
-		flash->feature_bits |= FEATURE_WRSR_EWSR;
+		chip->feature_bits |= FEATURE_WRSR_EWSR;
 	}
-	if (flash->feature_bits & FEATURE_WRSR_WREN)
+	if (chip->feature_bits & FEATURE_WRSR_WREN)
 		ret = spi_write_status_register_wren(flash, status);
-	if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR))
+	if (ret && (chip->feature_bits & FEATURE_WRSR_EWSR))
 		ret = spi_write_status_register_ewsr(flash, status);
 	return ret;
 }
@@ -1012,7 +1014,7 @@ int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
 {
 	int rc = 0;
 	unsigned int i, j, starthere, lenhere, toread;
-	unsigned int page_size = flash->page_size;
+	unsigned int page_size = flash->chip->page_size;
 
 	/* Warning: This loop has a very unusual condition and body.
 	 * The loop needs to go through each page with at least one affected
@@ -1057,7 +1059,7 @@ int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start,
 	 * spi_chip_write_256 have page_size set to max_writechunk_size, so
 	 * we're OK for now.
 	 */
-	unsigned int page_size = flash->page_size;
+	unsigned int page_size = flash->chip->page_size;
 
 	/* Warning: This loop has a very unusual condition and body.
 	 * The loop needs to go through each page with at least one affected
diff --git a/sst28sf040.c b/sst28sf040.c
index a9a740c..52e4256 100644
--- a/sst28sf040.c
+++ b/sst28sf040.c
@@ -119,7 +119,7 @@ static int erase_28sf040(struct flashctx *flash)
 int erase_chip_28sf040(struct flashctx *flash, unsigned int addr,
 		       unsigned int blocklen)
 {
-	if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
+	if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
 		msg_cerr("%s called with incorrect arguments\n",
 			__func__);
 		return -1;
diff --git a/sst49lfxxxc.c b/sst49lfxxxc.c
index 37f0628..bb21559 100644
--- a/sst49lfxxxc.c
+++ b/sst49lfxxxc.c
@@ -38,7 +38,7 @@ static int write_lockbits_block_49lfxxxc(struct flashctx *flash,
 static int write_lockbits_49lfxxxc(struct flashctx *flash, unsigned char bits)
 {
 	chipaddr registers = flash->virtual_registers;
-	unsigned int i, left = flash->total_size * 1024;
+	unsigned int i, left = flash->chip->total_size * 1024;
 	unsigned long address;
 
 	msg_cdbg("\nbios=0x%08lx\n", registers);
diff --git a/sst_fwhub.c b/sst_fwhub.c
index c802a33..a440a20 100644
--- a/sst_fwhub.c
+++ b/sst_fwhub.c
@@ -31,7 +31,7 @@ static int check_sst_fwhub_block_lock(struct flashctx *flash, int offset)
 
 	blockstatus = chip_readb(flash, registers + offset + 2);
 	msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ",
-		     offset, flash->page_size, blockstatus);
+		     offset, flash->chip->page_size, blockstatus);
 	switch (blockstatus & 0x3) {
 	case 0x0:
 		msg_cdbg("full access\n");
@@ -72,7 +72,7 @@ int printlock_sst_fwhub(struct flashctx *flash)
 {
 	int i;
 
-	for (i = 0; i < flash->total_size * 1024; i += flash->page_size)
+	for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size)
 		check_sst_fwhub_block_lock(flash, i);
 
 	return 0;
@@ -82,7 +82,7 @@ int unlock_sst_fwhub(struct flashctx *flash)
 {
 	int i, ret=0;
 
-	for (i = 0; i < flash->total_size * 1024; i += flash->page_size)
+	for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size)
 	{
 		if (clear_sst_fwhub_block_lock(flash, i))
 		{
diff --git a/stm50flw0x0x.c b/stm50flw0x0x.c
index 9b6443e..e6c7c05 100644
--- a/stm50flw0x0x.c
+++ b/stm50flw0x0x.c
@@ -54,7 +54,7 @@ static int unlock_block_stm50flw0x0x(struct flashctx *flash, int offset)
 	/* Check, if it's is a top/bottom-block with 4k-sectors. */
 	/* TODO: What about the other types? */
 	if ((offset == 0) ||
-	    (offset == (flash->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000))
+	    (offset == (flash->chip->model_id == ST_M50FLW080A ? 0xE0000 : 0x10000))
 	    || (offset == 0xF0000)) {
 
 		// unlock each 4k-sector
@@ -85,7 +85,7 @@ int unlock_stm50flw0x0x(struct flashctx *flash)
 {
 	int i;
 
-	for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) {
+	for (i = 0; i < flash->chip->total_size * 1024; i+= flash->chip->page_size) {
 		if(unlock_block_stm50flw0x0x(flash, i)) {
 			msg_cerr("UNLOCK FAILED!\n");
 			return -1;
diff --git a/w29ee011.c b/w29ee011.c
index d2af23d..4df4687 100644
--- a/w29ee011.c
+++ b/w29ee011.c
@@ -29,11 +29,11 @@ int probe_w29ee011(struct flashctx *flash)
 	chipaddr bios = flash->virtual_memory;
 	uint8_t id1, id2;
 
-	if (!chip_to_probe || strcmp(chip_to_probe, flash->name)) {
+	if (!chip_to_probe || strcmp(chip_to_probe, flash->chip->name)) {
 		msg_cdbg("Old Winbond W29* probe method disabled because "
 			 "the probing sequence puts the AMIC A49LF040A in "
 			 "a funky state. Use 'flashrom -c %s' if you "
-			 "have a board with such a chip.\n", flash->name);
+			 "have a board with such a chip.\n", flash->chip->name);
 		return 0;
 	}
 
@@ -65,7 +65,7 @@ int probe_w29ee011(struct flashctx *flash)
 
 	msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
 
-	if (id1 == flash->manufacture_id && id2 == flash->model_id)
+	if (id1 == flash->chip->manufacture_id && id2 == flash->chip->model_id)
 		return 1;
 
 	return 0;
diff --git a/w39.c b/w39.c
index e6dc8de..2bf7228 100644
--- a/w39.c
+++ b/w39.c
@@ -138,11 +138,11 @@ static int printlock_w39_common(struct flashctx *flash, unsigned int offset)
 
 static int printlock_w39_fwh(struct flashctx *flash)
 {
-	unsigned int i, total_size = flash->total_size * 1024;
+	unsigned int i, total_size = flash->chip->total_size * 1024;
 	int ret = 0;
 	
 	/* Print lock status of the complete chip */
-	for (i = 0; i < total_size; i += flash->page_size)
+	for (i = 0; i < total_size; i += flash->chip->page_size)
 		ret |= printlock_w39_fwh_block(flash, i);
 
 	return ret;
@@ -150,10 +150,10 @@ static int printlock_w39_fwh(struct flashctx *flash)
 
 static int unlock_w39_fwh(struct flashctx *flash)
 {
-	unsigned int i, total_size = flash->total_size * 1024;
+	unsigned int i, total_size = flash->chip->total_size * 1024;
 	
 	/* Unlock the complete chip */
-	for (i = 0; i < total_size; i += flash->page_size)
+	for (i = 0; i < total_size; i += flash->chip->page_size)
 		if (unlock_w39_fwh_block(flash, i))
 			return -1;
 
-- 
1.7.1



From juergen.trapp at alice.de  Sun Feb 26 20:38:36 2012
From: juergen.trapp at alice.de (=?iso-8859-1?Q?J=FCrgen_Trapp?=)
Date: Sun, 26 Feb 2012 20:38:36 +0100
Subject: [flashrom] flashrom with HP XW9300
Message-ID: <5B9632B43753F047BE43BF138DCF777401F3B075@HSNMST02V05.hsn.alice-dsl.net>

Hi,

i have a problem with flash writing under HP XW9300.
I will use coreboot.rom with the board and i have a error (see attachments: output_flashrom_write)

Thank you for help.


J?rgen
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120226/f4a41a81/attachment-0001.html>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: flashrom_VV.txt
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120226/f4a41a81/attachment-0002.txt>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: output_flashrom_write.txt
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120226/f4a41a81/attachment-0003.txt>

From gurken.papst at gmail.com  Sun Feb 26 22:46:25 2012
From: gurken.papst at gmail.com (Gurken Papst)
Date: Sun, 26 Feb 2012 21:46:25 +0000
Subject: [flashrom] Test report Biostar M7VIQ - Chip not detected
Message-ID: <CAK2gj8oLbnB7oE=Jb7ku+srJzK13YF+3kjGve9n-rWAhjewQTA@mail.gmail.com>

Winbond W49F002U flash chip is not detected on a Biostar M7VIQ.
Detection and reading flash works using UniFlash 1.40. Writing
untested.

Output of flashrom -V:
flashrom v0.9.5-r1503 on Linux 2.6.39.3 (i686), built with libpci
3.1.8, GCC 4.6.2, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 832M loops
per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1007 us,
10000 myus = 10169 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: " "
DMI string system-product-name: " "
DMI string system-version: " "
DMI string baseboard-manufacturer: " "
DMI string baseboard-product-name: "KM266-8235"
DMI string baseboard-version: " "
DMI string chassis-type: "Desktop"
Found chipset "VIA VT8235" with PCI ID 1106:3177. Enabling flash write... OK.
The following protocols are supported: Non-SPI.
Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29F002(N)BB, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29F002(N)BT, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29F016D, 2048 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMD Am29F040B, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMD Am29F080B, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMD Am29LV001BB, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV001BT, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV002BB, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV002BT, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for AMD Am29LV004BB, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMD Am29LV004BT, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMD Am29LV008BB, 1024 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for AMD Am29LV008BT, 1024 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for AMD Am29LV040B, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMD Am29LV081B, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMIC A29002B, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for AMIC A29002T, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for AMIC A29040B, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Atmel AT29C512, 64 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Atmel AT29C010A, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT29C020, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT29C040A, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Atmel AT49BV512, 64 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Atmel AT49F020, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT49F002(N), 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT49F002(N)T, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Catalyst CAT28F512, 64 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Bright BM29F040, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for EMST F49B002UA, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Eon EN29F010, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for Eon EN29F002(A)(N)B, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Eon EN29F002(A)(N)T, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Fujitsu MBM29F004BC, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Fujitsu MBM29F004TC, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Fujitsu MBM29F400BC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for Fujitsu MBM29F400TC, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for Hyundai HY29F002T, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Hyundai HY29F002B, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Hyundai HY29F040A, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Intel 28F001BN/BX-B, 128 kB: probe_jedec_common: id1 0xd6,
id2 0x52, id1 is normal flash content, id2 is normal flash content
Probing for Intel 28F001BN/BX-T, 128 kB: probe_jedec_common: id1 0xd6,
id2 0x52, id1 is normal flash content, id2 is normal flash content
Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: probe_82802ab: id1
0x25, id2 0x5a, id1 is normal flash content, id2 is normal flash
content
Probing for Intel 28F008S3/S5/SC, 512 kB: probe_82802ab: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: probe_82802ab: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: probe_82802ab: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: probe_82802ab: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: probe_82802ab: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for Macronix MX29F001B, 128 kB: probe_jedec_common: id1 0xd6,
id2 0x52, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX29F001T, 128 kB: probe_jedec_common: id1 0xd6,
id2 0x52, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX29F002(N)B, 256 kB: probe_jedec_common: id1
0x25, id2 0x5a, id1 is normal flash content, id2 is normal flash
content
Probing for Macronix MX29F002(N)T, 256 kB: probe_jedec_common: id1
0x25, id2 0x5a, id1 is normal flash content, id2 is normal flash
content
Probing for Macronix MX29F040, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Macronix MX29LV040, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for MoselVitelic V29C51000B, 64 kB: probe_jedec_common: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for MoselVitelic V29C51000T, 64 kB: probe_jedec_common: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for MoselVitelic V29C51400B, 512 kB: probe_jedec_common: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for MoselVitelic V29C51400T, 512 kB: probe_jedec_common: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for MoselVitelic V29LC51000, 64 kB: probe_jedec_common: id1
0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2
is normal flash content
Probing for MoselVitelic V29LC51001, 128 kB: probe_jedec_common: id1
0xd6, id2 0x52, id1 is normal flash content, id2 is normal flash
content
Probing for MoselVitelic V29LC51002, 256 kB: probe_jedec_common: id1
0x25, id2 0x5a, id1 is normal flash content, id2 is normal flash
content
Probing for PMC Pm29F002T, 256 kB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm29F002B, 256 kB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm39LV010, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm39LV020, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm39LV040, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Sharp LH28F008BJT-BTLZ1, 1024 kB: probe_82802ab: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST28SF040A, 512 kB: probe_82802ab: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST29EE010, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for SST SST29LE010, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for SST SST29EE020A, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for SST SST29LE020, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for SST SST39SF512, 64 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST39SF010A, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for SST SST39SF020A, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for SST SST39SF040, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST39VF512, 64 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST39VF080, 1024 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing
information, using default 10mS/40uS. probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for ST M29F002B, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for ST M29F002T/NT, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for ST M29F040B, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for ST M29F400BB, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for ST M29F400BT, 512 kB: probe_m29f400bt: id1 0xff, id2 0xff
Probing for ST M29W010B, 128 kB: probe_jedec_common: id1 0xd6, id2
0x52, id1 is normal flash content, id2 is normal flash content
Probing for ST M29W040B, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for ST M29W512B, 64 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x25, id2 0x5a,
id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB:
probe_jedec_common: id1 0xd6, id2 0x52, id1 is normal flash content,
id2 is normal flash content
Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB:
probe_jedec_common: id1 0xd6, id2 0x52, id1 is normal flash content,
id2 is normal flash content
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB:
probe_jedec_common: id1 0x25, id2 0x5a, id1 is normal flash content,
id2 is normal flash content
Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB:
probe_jedec_common: id1 0x25, id2 0x5a, id1 is normal flash content,
id2 is normal flash content
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB:
probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is
normal flash content, id2 is normal flash content
Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB:
probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is
normal flash content, id2 is normal flash content
Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB:
probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is
normal flash content, id2 is normal flash content
Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB:
probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is
normal flash content, id2 is normal flash content
Probing for TI TMS29F002RB, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for TI TMS29F002RT, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012-old, 128 kB:
Old Winbond W29* probe method disabled because the probing sequence
puts the AMIC A49LF040A in a funky state. Use 'flashrom -c
W29C010(M)/W29C011A/W29EE011/W29EE012-old' if you have a board with
such a chip.
Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB:
probe_jedec_common: id1 0xd6, id2 0x52, id1 is normal flash content,
id2 is normal flash content
Probing for Winbond W29C020(C)/W29C022, 256 kB: probe_jedec_common:
id1 0x25, id2 0x5a, id1 is normal flash content, id2 is normal flash
content
Probing for Winbond W29C040/P, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39L040, 512 kB: probe_jedec_common: id1 0xff, id2
0xff, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W49F002U/N, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49F020, 256 kB: probe_jedec_common: id1 0x25, id2
0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x25,
id2 0x5a, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff,
id2 0xff, id1 parity violation, id1 is normal flash content, id2 is
normal flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common:
id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content,
id2 is normal flash content
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
Restoring PCI config space for 00:11:0 reg 0x40
Restoring PCI config space for 00:11:0 reg 0x41

Output of lspci -nnvvxxx:
00:00.0 Host bridge [0600]: VIA Technologies, Inc. VT8375
[KM266/KL266] Host Bridge [1106:3116]
	Subsystem: VIA Technologies, Inc. VT8375 [KM266/KL266] Host Bridge [1106:3116]
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort+ >SERR- <PERR- INTx-
	Latency: 8
	Region 0: Memory at e8000000 (32-bit, prefetchable) [size=64M]
	Capabilities: [a0] AGP version 2.0
		Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit-
FW- AGP3- Rate=x1,x2,x4
		Command: RQ=1 ArqSz=0 Cal=0 SBA- AGP+ GART64- 64bit- FW- Rate=x4
	Capabilities: [c0] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: agpgart-via
00: 06 11 16 31 06 00 30 22 00 00 00 06 00 08 00 00
10: 08 00 00 e8 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 16 31
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 18 88 80 82 44 00 20 18 99 88 80 82 44 00 00
50: e0 00 00 02 c0 04 50 50 ee 00 20 40 50 50 50 50
60: 0a 2a 00 20 e6 99 02 2e de 0d 43 50 c4 05 00 00
70: 82 c8 00 01 01 01 10 00 01 00 00 00 00 00 02 12
80: 0f 61 00 00 c0 00 00 00 03 00 cd 35 00 00 00 00
90: 17 a3 6b ea 4f 1c 08 19 11 33 00 00 61 11 01 00
a0: 02 c0 20 00 07 02 00 1f 04 01 00 00 2f 02 04 00
b0: 78 ac 18 9b 80 00 00 00 88 00 00 00 00 00 20 00
c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 1a 00 00 01 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 01 13 00 00 00 00 00 00 00 00

00:01.0 PCI bridge [0604]: VIA Technologies, Inc. VT8633 [Apollo
Pro266 AGP] [1106:b091] (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort+ >SERR- <PERR- INTx-
	Latency: 0
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
	Memory behind bridge: ec000000-edffffff
	Prefetchable memory behind bridge: e0000000-e7ffffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [80] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
00: 06 11 91 b0 07 01 30 22 00 00 04 06 00 00 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 00 00
20: 00 ec f0 ed 00 e0 f0 e7 00 00 00 00 00 00 00 00
30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 0c 00
40: 81 c0 00 44 24 72 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 00 02 02 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:10.0 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI
USB 1.1 Controller [1106:3038] (rev 80) (prog-if 00 [UHCI])
	Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 32, Cache Line Size: 32 bytes
	Interrupt: pin A routed to IRQ 21
	Region 4: I/O ports at d000 [size=32]
	Capabilities: [80] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: uhci_hcd
00: 06 11 38 30 07 00 10 02 80 00 03 0c 08 20 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 d0 00 00 00 00 00 00 00 00 00 00 06 11 38 30
30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 01 00 00
40: 40 10 07 00 00 00 00 00 00 0b 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00

00:10.1 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI
USB 1.1 Controller [1106:3038] (rev 80) (prog-if 00 [UHCI])
	Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 32, Cache Line Size: 32 bytes
	Interrupt: pin B routed to IRQ 21
	Region 4: I/O ports at d400 [size=32]
	Capabilities: [80] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: uhci_hcd
00: 06 11 38 30 07 00 10 02 80 00 03 0c 08 20 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 d4 00 00 00 00 00 00 00 00 00 00 06 11 38 30
30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00
40: 40 10 07 00 00 00 00 00 00 0b 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00

00:10.2 USB Controller [0c03]: VIA Technologies, Inc. VT82xxxxx UHCI
USB 1.1 Controller [1106:3038] (rev 80) (prog-if 00 [UHCI])
	Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller [1106:3038]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 32, Cache Line Size: 32 bytes
	Interrupt: pin C routed to IRQ 21
	Region 4: I/O ports at d800 [size=32]
	Capabilities: [80] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: uhci_hcd
00: 06 11 38 30 07 00 10 02 80 00 03 0c 08 20 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 d8 00 00 00 00 00 00 00 00 00 00 06 11 38 30
30: 00 00 00 00 80 00 00 00 00 00 00 00 05 03 00 00
40: 40 10 03 00 00 00 00 00 00 0b 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00

00:10.3 USB Controller [0c03]: VIA Technologies, Inc. USB 2.0
[1106:3104] (rev 82) (prog-if 20 [EHCI])
	Subsystem: VIA Technologies, Inc. USB 2.0 [1106:3104]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 32, Cache Line Size: 32 bytes
	Interrupt: pin D routed to IRQ 21
	Region 0: Memory at ee000000 (32-bit, non-prefetchable) [size=256]
	Capabilities: [80] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: ehci_hcd
00: 06 11 04 31 17 00 10 02 82 20 03 0c 08 20 00 00
10: 00 00 00 ee 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 04 31
30: 00 00 00 00 80 00 00 00 00 00 00 00 03 04 00 00
40: 00 00 03 00 00 00 00 00 a0 10 00 09 00 00 00 00
50: 00 5a 00 80 00 00 00 00 04 0b 88 88 53 88 00 00
60: 20 20 01 00 00 00 00 00 01 00 00 00 00 00 08 c0
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00

00:11.0 ISA bridge [0601]: VIA Technologies, Inc. VT8235 ISA Bridge [1106:3177]
	Subsystem: VIA Technologies, Inc. VT8235 ISA Bridge [1106:3177]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping+ SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Capabilities: [c0] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
00: 06 11 77 31 87 00 10 02 00 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 77 31
30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00
40: 54 7f f8 0b 00 00 00 00 0c 20 00 00 04 00 0a 08
50: 81 1d 09 00 00 20 22 20 43 00 00 00 00 00 00 00
60: 00 00 f0 40 00 00 08 04 00 00 00 00 00 00 00 00
70: 06 11 77 31 00 00 00 00 00 00 00 00 20 00 00 00
80: 20 84 59 00 fa 10 00 00 01 40 00 00 da 00 00 00
90: 00 1f f9 88 a4 40 00 00 00 be 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 01 50 01 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 08 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 05 00 00 00 00 00 00 00 00 00

00:11.1 IDE interface [0101]: VIA Technologies, Inc.
VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE [1106:0571]
(rev 06) (prog-if 8a [Master SecP PriP])
	Subsystem: VIA Technologies, Inc.
VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE
[1106:0571]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 32
	Interrupt: pin A routed to IRQ 20
	Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8]
	Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1]
	Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8]
	Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1]
	Region 4: I/O ports at dc00 [size=16]
	Capabilities: [c0] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: pata_via
00: 06 11 71 05 07 00 90 02 06 8a 01 01 00 20 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 dc 00 00 00 00 00 00 00 00 00 00 06 11 71 05
30: 00 00 00 00 c0 00 00 00 00 00 00 00 ff 01 00 00
40: 0b f2 09 05 18 1c c0 00 20 20 99 99 ff 00 20 a8
50: e6 e6 17 17 0c 03 00 00 a8 a8 a8 a8 00 00 00 00
60: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00
70: 02 01 00 00 00 00 00 00 02 01 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 d0 dd 35 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 06 00 71 05 06 11 71 05 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 07 00 00 00 00 00 00 00 00 00

00:11.5 Multimedia audio controller [0401]: VIA Technologies, Inc.
VT8233/A/8235/8237 AC97 Audio Controller [1106:3059] (rev 50)
	Subsystem: VIA Technologies, Inc. K7VT2 motherboard [1106:4161]
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin C routed to IRQ 22
	Region 0: I/O ports at e000 [size=256]
	Capabilities: [c0] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: VIA 82xx Audio
00: 06 11 59 30 01 00 10 02 50 00 01 04 00 00 00 00
10: 01 e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 61 41
30: 00 00 00 00 c0 00 00 00 00 00 00 00 05 03 00 00
40: 01 cc 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 01 00 02 06 00 00 00 00 00 00 00 00 00 00 00 00
d0: 01 00 02 06 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:12.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6102
[Rhine-II] [1106:3065] (rev 74)
	Subsystem: Biostar Microtech Int'l Corp Device [1565:2200]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 32 (750ns min, 2000ns max), Cache Line Size: 32 bytes
	Interrupt: pin A routed to IRQ 23
	Region 0: I/O ports at e800 [size=256]
	Region 1: Memory at ee001000 (32-bit, non-prefetchable) [size=256]
	Capabilities: [40] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Kernel driver in use: via-rhine
00: 06 11 65 30 07 00 10 02 74 00 00 02 08 20 00 00
10: 01 e8 00 00 00 10 00 ee 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 65 15 00 22
30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 03 08
40: 01 00 02 fe 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01:00.0 VGA compatible controller [0300]: nVidia Corporation NV11
[GeForce2 MX/MX 400] [10de:0110] (rev a1) (prog-if 00 [VGA
controller])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 32 (1250ns min, 250ns max)
	Interrupt: pin A routed to IRQ 16
	Region 0: Memory at ec000000 (32-bit, non-prefetchable) [size=16M]
	Region 1: Memory at e0000000 (32-bit, prefetchable) [size=128M]
	[virtual] Expansion ROM at ed000000 [disabled] [size=64K]
	Capabilities: [60] Power Management version 2
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [44] AGP version 2.0
		Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA- ITACoh- GART64- HTrans- 64bit-
FW+ AGP3- Rate=x1,x2,x4
		Command: RQ=32 ArqSz=0 Cal=0 SBA- AGP+ GART64- 64bit- FW- Rate=x4
	Kernel driver in use: nouveau
00: de 10 10 01 07 00 b0 02 a1 00 00 03 00 20 00 00
10: 00 00 00 ec 08 00 00 e0 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 60 00 00 00 00 00 00 00 0b 01 05 01
40: 00 00 00 00 02 00 20 00 17 00 00 1f 04 01 00 1f
50: 01 00 00 00 01 00 00 00 ce d6 23 00 0f 00 00 00
60: 01 44 02 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Output of superiotool -deV:

superiotool r5050
Probing for ALi Super I/O at 0x3f0...
  Failed. Returned data: id=0xffff, rev=0xff
Probing for ALi Super I/O at 0x370...
  Failed. Returned data: id=0xffff, rev=0xff
Probing for Fintek Super I/O at 0x2e...
  Failed. Returned data: vid=0x10fe, id=0x1260
Probing for Fintek Super I/O at 0x4e...
  Failed. Returned data: vid=0xffff, id=0xffff
Probing for ITE Super I/O (init=standard) at 0x2e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8761e) at 0x2e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8228e) at 0x2e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=0x87,0x87) at 0x2e...
  Failed. Returned data: id=0x6012, rev=0xf
Probing for ITE Super I/O (init=standard) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8761e) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=it8228e) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=0x87,0x87) at 0x4e...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=legacy/it8661f) at 0x370...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for ITE Super I/O (init=legacy/it8671f) at 0x370...
  Failed. Returned data: id=0xffff, rev=0xf
Probing for NSC Super I/O at 0x2e...
  Failed. Returned data: port=0xff, port+1=0xff
Probing for NSC Super I/O at 0x4e...
  Failed. Returned data: port=0xff, port+1=0xff
Probing for NSC Super I/O at 0x15c...
  Failed. Returned data: port=0xff, port+1=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370...
  Failed. Returned data: id=0xff, rev=0xff
Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370...
  Failed. Returned data: id=0xff, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x2e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x2e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e...
Found Winbond W83697HF/F/HG (id=0x60, rev=0x12) at 0x2e
Register dump:
idx 20 21 22 23 24 25 26 28  29 2a
val 60 12 ff fe 10 00 00 00  00 f0
def 60 NA ff 00 00 00 00 00  00 MM
LDN 0x00 (Floppy)
idx 30 60 61 70 74 f0 f1 f2  f4 f5
val 01 03 f0 06 02 0e 00 ff  00 00
def 01 03 f0 06 02 0e 00 ff  00 00
LDN 0x01 (Parallel port)
idx 30 60 61 70 74 f0
val 01 03 78 07 04 01
def 01 03 78 07 04 3f
LDN 0x02 (COM1)
idx 30 60 61 70 f0
val 01 03 f8 04 00
def 01 03 f8 04 00
LDN 0x03 (COM2)
idx 30 60 61 70 f0 f1
val 00 00 00 00 00 00
def 01 02 f8 03 00 00
LDN 0x06 (Consumer IR)
idx 30 60 61 70
val 00 00 00 00
def 00 00 00 00
LDN 0x07 (Game port, GPIO 1)
idx 30 60 61 62 63 f0 f1 f2
val 01 02 01 00 00 ff 00 00
def 00 02 01 00 00 ff 00 00
LDN 0x08 (MIDI port, GPIO 5)
idx 30 60 61 62 63 70 f0 f1  f2 f3 f4 f5
val 01 03 30 00 00 0a ff 00  00 00 00 00
def 00 03 30 00 00 09 ff 00  00 00 00 00
LDN 0x09 (GPIO 2, GPIO 3, GPIO 4)
idx 30 60 61 f0 f1 f2 f3 f4  f5 f6 f7 f8 f5
val 00 00 00 ff ff ff ff ff  ff ff ff ff ff
def 00 00 00 ff 00 00 ff 00  00 ff 00 00 00
LDN 0x0a (ACPI)
idx 30 70 e0 e1 e2 e5 e6 e7  f0 f1 f3 f4 f6 f7 f9
val 01 00 00 00 ff 00 00 00  00 af 06 08 00 08 05
def 00 00 00 00 NA 00 00 00  00 00 00 00 00 00 00
LDN 0x0b (Hardware monitor)
idx 30 60 61 70
val 01 02 90 00
def 00 00 00 00
Hardware monitor (0x0295)
Probing for Winbond Super I/O (init=0x88) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x370...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x88) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x89) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x86,0x86) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for Winbond Super I/O (init=0x87,0x87) at 0x250...
  Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff
Probing for VIA Super I/O at 0x3f0...
  PCI device 1106:0686 not found.


From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb 27 00:00:16 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 27 Feb 2012 00:00:16 +0100
Subject: [flashrom] flashrom with HP XW9300
In-Reply-To: <5B9632B43753F047BE43BF138DCF777401F3B075@HSNMST02V05.hsn.alice-dsl.net>
References: <5B9632B43753F047BE43BF138DCF777401F3B075@HSNMST02V05.hsn.alice-dsl.net>
Message-ID: <4F4AB980.3080509@gmx.net>

Hi J?rgen,

I remember a similar case where flashrom was unable to write, and that
board also had a second chipset match. We might have the same issue
here: To PCI devices with the same ID, one acts as southbridge and the
other one is unused. We might enable the wrong one here and might have
to refine detection a bit. OTOH, a flash chip is detected, so we know
that write was enabled on the address space mapped to the flash chip
(but that write enable might have not been done by flashrom).

Am 26.02.2012 20:38 schrieb J?rgen Trapp:
> ubuntu at ubuntu:~/coreboot$ sudo flashrom -VV
> flashrom v0.9.5.1-r1508 on Linux 3.0.0-12-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
>
> Calibrating delay loop... OS timer resolution is 4001 usecs, 1093M loops per second, 10 myus = 0 us, 100 myus = 0 us, 1000 myus = 0 us, 10000 myus = 8001 us, 16004 myus = 16001 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "Hewlett-Packard"
> DMI string system-product-name: "HP xw9300 Workstation"
> DMI string system-version: " "
> DMI string baseboard-manufacturer: "Hewlett-Packard"
> DMI string baseboard-product-name: "09C4h"
> DMI string baseboard-version: "Not Specified"
> DMI string chassis-type: "Mini Tower"
> Found chipset "NVIDIA CK804" with PCI ID 10de:0051. Enabling flash write... OK.
> WARNING: unexpected second chipset match: "NVIDIA CK804"

Side note: We should print the PCI ID for the second chipset match as well.


> ignoring, please report lspci and board URL to flashrom at flashrom.org
> with 'CHIPSET: your board name' in the subject line.
> The following protocols are supported: Non-SPI.
> Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content
> [...]

Could you run the following command as root and post the results?
lspci -nnvvxxx

That should help us determine which one of the CK804 southbridges we
should enable.

However, it is possible that we enabled the right southbridge due to
pure luck and there is a separate write protection (jumper or solder
bridge or something controllable in software). If that is the case,
somebody has to find out how to enable writes by reverse engineering or
by looking at the docs if the docs are good.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From c-d.hailfinger.devel.2006 at gmx.net  Mon Feb 27 00:27:32 2012
From: c-d.hailfinger.devel.2006 at gmx.net (Carl-Daniel Hailfinger)
Date: Mon, 27 Feb 2012 00:27:32 +0100
Subject: [flashrom] Test report Biostar M7VIQ - Chip not detected
In-Reply-To: <CAK2gj8oLbnB7oE=Jb7ku+srJzK13YF+3kjGve9n-rWAhjewQTA@mail.gmail.com>
References: <CAK2gj8oLbnB7oE=Jb7ku+srJzK13YF+3kjGve9n-rWAhjewQTA@mail.gmail.com>
Message-ID: <4F4ABFE4.8040503@gmx.net>

Hi Gurken,

Am 26.02.2012 22:46 schrieb Gurken Papst:
> Winbond W49F002U flash chip is not detected on a Biostar M7VIQ.
> Detection and reading flash works using UniFlash 1.40. Writing
> untested.
>
> Output of flashrom -V:
> flashrom v0.9.5-r1503 on Linux 2.6.39.3 (i686), built with libpci
> 3.1.8, GCC 4.6.2, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
>
> Calibrating delay loop... OS timer resolution is 1 usecs, 832M loops
> per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1007 us,
> 10000 myus = 10169 us, 4 myus = 4 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: " "
> DMI string system-product-name: " "
> DMI string system-version: " "
> DMI string baseboard-manufacturer: " "
> DMI string baseboard-product-name: "KM266-8235"
> DMI string baseboard-version: " "
> DMI string chassis-type: "Desktop"
> Found chipset "VIA VT8235" with PCI ID 1106:3177. Enabling flash write... OK.
> The following protocols are supported: Non-SPI.
> Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0xd6, id2
> 0x52, id1 is normal flash content, id2 is normal flash content
> [...]
>
> superiotool -dV:
> [...]
> Found Winbond W83697HF/F/HG (id=0x60, rev=0x12) at 0x2e
> Register dump:
> idx 20 21 22 23 24 25 26 28  29 2a
> val 60 12 ff fe 10 00 00 00  00 f0
> def 60 NA ff 00 00 00 00 00  00 MM

Register 0x24 says ROM size is 2 Mbit.
Register 0x2a says flash translation is enabled.

We should autodetect this Super I/O and set bit 3 in register 0x24 to
enable detection and writing.

> LDN 0x00 (Floppy)
> idx 30 60 61 70 74 f0 f1 f2  f4 f5
> val 01 03 f0 06 02 0e 00 ff  00 00
> def 01 03 f0 06 02 0e 00 ff  00 00

We have a patch for this somewhere, but it is probably pretty bitrotted
and needs to be updated. Would you be willing to test a few patches?

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/



From novoagansk at gmail.com  Mon Feb 27 02:16:06 2012
From: novoagansk at gmail.com (Pavel Petrov)
Date: Mon, 27 Feb 2012 07:16:06 +0600
Subject: [flashrom] send log from ASUS P8H61 PRO bios ver 0605
Message-ID: <CAJuAjbj6NW0qUxi5-7pzrpSYpe9B6S6XUkn0CfVqoC5tci5W_Q@mail.gmail.com>

flashrom -r 1 -V
flashrom v0.9.5.1-r1508 on Linux 3.0.0-16-generic-pae (i686), built with
libpci 3.1.8, GCC 4.6.2, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 3585M loops per
second, 10 myus = 10 us, 100 myus = 114 us, 1000 myus = 1013 us, 10000 myus
= 10252 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "System manufacturer"
DMI string system-product-name: "System Product Name"
DMI string system-version: "System Version"
DMI string baseboard-manufacturer: "ASUSTeK Computer INC."
DMI string baseboard-product-name: "P8H61 PRO"
DMI string baseboard-version: "Rev X.0x"
DMI string chassis-type: "Desktop"
Found chipset "Intel H61" with PCI ID 8086:1c5c.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom please email a report to flashrom at flashrom.org including a
verbose (-V) log. Thank you!
Enabling flash write...
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode enabled
0xffe00000/0xffa00000 FWH decode enabled
0xffd80000/0xff980000 FWH decode enabled
0xffd00000/0xff900000 FWH decode enabled
0xffc80000/0xff880000 FWH decode enabled
0xffc00000/0xff800000 FWH decode enabled
0xff700000/0xff300000 FWH decode disabled
0xff600000/0xff200000 FWH decode disabled
0xff500000/0xff100000 FWH decode disabled
0xff400000/0xff000000 FWH decode disabled
Maximum FWH chip size: 0x100000 bytes
BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0
Root Complex Register Block address = 0xfed1c000
GCS = 0xc24: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3800
0x04: 0x6008 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
Programming OPCODES...
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
0x06: 0x0000 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x08: 0x00001000 (FADDR)
0x50: 0x00000a0b (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x0a, BRRA 0x0b
0x54: 0x00000000 FREG0: WARNING: Flash Descriptor region
(0x00000000-0x00000fff) is read-only.
0x58: 0x03ff0180 FREG1: BIOS region (0x00180000-0x003fffff) is read-write.
0x5C: 0x017f0001 FREG2: WARNING: Management Engine region
(0x00001000-0x0017ffff) is locked.
Please send a verbose log to flashrom at flashrom.org if this board is not
listed on
http://flashrom.org/Supported_hardware#Supported_mainboards yet.
Writes have been disabled. You can enforce write support with the
ich_spi_force programmer option, but it will most likely harm your hardware!
If you force flashrom you will get no support if something breaks.
0x90: 0x84 (SSFS)
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
0x91: 0xf80000 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0
0x94: 0x5006     (PREOP)
0x96: 0x463b     (OPTYPE)
0x98: 0x05d80302 (OPMENU)
0x9C: 0xc79f0190 (OPMENU+4)
0xA0: 0x00000000 (BBAR)
0xC4: 0x00002005 (LVSCC)
LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xC8: 0x00002005 (UVSCC)
UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=0
0xD0: 0x00000000 (FPB)

SPI Read Configuration: prefetching disabled, caching enabled, OK.
The following protocols are supported: FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT25DF641(A), 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4016
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for SST SST25LF040A, 512 kB:
program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190
on-the-fly OPCODE (0xAB) re-programmed, op-pos=2
probe_spi_res2: id1 0x15, id2 0x15
Probing for SST SST25LF080A, 1024 kB: probe_spi_res2: id1 0x15, id2 0x15
Probing for SST SST25VF010, 128 kB: probe_spi_rems: id1 0xef, id2 0x15
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for SST SST25VF040, 512 kB: probe_spi_rems: id1 0xef, id2 0x15
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x15
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for ST M25P05, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for ST M25P10, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Chip status register is 00
Found Winbond flash chip "W25Q32" (4096 kB, SPI) at physical address
0xffc00000.
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2
0x4016
Probing for Unknown SFDP-capable chip, 0 kB:
program_opcodes: preop=5006 optype=462b opmenu=055a0302c79f0190
on-the-fly OPCODE (0x5A) re-programmed, op-pos=2
ID of the mandatory JEDEC SFDP parameter table is not 0 as demanded by
JESD216 (warning only).
Parsing JEDEC flash parameter table...   It seems like this chip supports
the preliminary Intel version of SFDP, skipping processing of double words
3-9.
done.
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4016
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4016
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4016
Probing for Macronix unknown Macronix SPI chip, 0 kB:
probe_spi_rdid_generic: id1 0xef, id2 0x4016
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4016
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4016
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef,
id2 0x4016
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1
0xef, id2 0x4016
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic:
id1 0xef, id2 0x4016
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1
0xef, id2 0x15
Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x28, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xea, id2 0xd0,
id1 is normal flash content, id2 is normal flash content
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x28, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x6f, id2
0xa7, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x28, id2
0x00, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x28, id2 0x00,
id1 parity violation, id1 is normal flash content, id2 is normal flash
content
Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0xa0, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1
is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x28, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x28, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than
supported size 1024 kB of chipset/board/programmer for FWH interface,
probe/read/erase/write may fail. probe_82802ab: id1 0xa0, id2 0xff, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is
normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x28, id2 0x00, id1
parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xea, id2
0xd0, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x28, id2
0x00, id1 parity violation, id1 is normal flash content, id2 is normal
flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1
0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content
Found Winbond flash chip "W25Q32" (4096 kB, SPI).
This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to completely
clone the contents of this chip (see man page for details).
Reading flash... Transaction error!
SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0
SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0
Running OPCODE 0x03 failed at address 0x001000 (payload length was 64).
Read operation failed!
FAILED.
Restoring MMIO space at 0xb776c8a0
Restoring MMIO space at 0xb776c89c
Restoring MMIO space at 0xb776c898
Restoring MMIO space at 0xb776c896
Restoring MMIO space at 0xb776c894
Restoring PCI config space for 00:1f:0 reg 0xdc
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120227/4fdcd01f/attachment-0001.html>

From juergen.trapp at alice.de  Mon Feb 27 07:55:04 2012
From: juergen.trapp at alice.de (=?iso-8859-1?Q?J=FCrgen_Trapp?=)
Date: Mon, 27 Feb 2012 07:55:04 +0100
Subject: [flashrom] flashrom with HP XW9300
References: <5B9632B43753F047BE43BF138DCF777401F3B075@HSNMST02V05.hsn.alice-dsl.net>
	<4F4AB980.3080509@gmx.net>
Message-ID: <5B9632B43753F047BE43BF138DCF777401F3B077@HSNMST02V05.hsn.alice-dsl.net>

lspci -nnvvxxx
00:00.0 Memory controller [0580]: nVidia Corporation CK804 Memory Controller [10de:005e] (rev a3)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Capabilities: <access denied>
00: de 10 5e 00 06 01 b0 00 a3 00 80 05 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 00 00

00:01.0 ISA bridge [0601]: nVidia Corporation CK804 ISA Bridge [10de:0051] (rev a3)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Region 0: I/O ports at fb00 [size=256]
00: de 10 51 00 0f 00 a0 00 a3 00 01 06 00 00 80 00
10: 01 fb 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:01.1 SMBus [0c05]: nVidia Corporation CK804 SMBus [10de:0052] (rev a2)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 11
	Region 0: I/O ports at 2880 [size=32]
	Region 4: I/O ports at 2800 [size=64]
	Region 5: I/O ports at 2840 [size=64]
	Capabilities: <access denied>
	Kernel driver in use: nForce2_smbus
	Kernel modules: i2c-nforce2
00: de 10 52 00 01 00 b0 00 a2 00 05 0c 00 00 80 00
10: 81 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 28 00 00 41 28 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 03 01

00:02.0 USB Controller [0c03]: nVidia Corporation CK804 USB Controller [10de:005a] (rev a2) (prog-if 10 [OHCI])
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0 (750ns min, 250ns max)
	Interrupt: pin A routed to IRQ 61
	Region 0: Memory at f5100000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: <access denied>
	Kernel driver in use: ohci_hcd
00: de 10 5a 00 07 00 b0 00 a2 10 03 0c 00 00 80 00
10: 00 00 10 f5 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01

00:02.1 USB Controller [0c03]: nVidia Corporation CK804 USB Controller [10de:005b] (rev a3) (prog-if 20 [EHCI])
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0 (750ns min, 250ns max)
	Interrupt: pin B routed to IRQ 66
	Region 0: Memory at febf0000 (32-bit, non-prefetchable) [size=256]
	Capabilities: <access denied>
	Kernel driver in use: ehci_hcd
00: de 10 5b 00 06 00 b0 00 a3 20 03 0c 00 00 80 00
10: 00 00 bf fe 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 02 03 01

00:04.0 Multimedia audio controller [0401]: nVidia Corporation CK804 AC'97 Audio Controller [10de:0059] (rev a2)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0 (500ns min, 1250ns max)
	Interrupt: pin A routed to IRQ 67
	Region 0: I/O ports at 2000 [size=256]
	Region 1: I/O ports at 2400 [size=256]
	Region 2: Memory at f5101000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: <access denied>
	Kernel driver in use: Intel ICH
	Kernel modules: snd-intel8x0
00: de 10 59 00 07 00 b0 00 a2 00 01 04 00 00 00 00
10: 01 20 00 00 01 24 00 00 00 10 10 f5 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 02 05

00:06.0 IDE interface [0101]: nVidia Corporation CK804 IDE [10de:0053] (rev f2) (prog-if 8a [Master SecP PriP])
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0 (750ns min, 250ns max)
	Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8]
	Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1]
	Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8]
	Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1]
	Region 4: I/O ports at 28a0 [size=16]
	Capabilities: <access denied>
	Kernel driver in use: pata_amd
	Kernel modules: pata_amd
00: de 10 53 00 05 00 b0 00 f2 8a 01 01 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: a1 28 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 03 01

00:07.0 IDE interface [0101]: nVidia Corporation CK804 Serial ATA Controller [10de:0054] (rev f3) (prog-if 85 [Master SecO PriO])
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0 (750ns min, 250ns max)
	Interrupt: pin A routed to IRQ 61
	Region 0: I/O ports at 28d0 [size=8]
	Region 1: I/O ports at 28f8 [size=4]
	Region 2: I/O ports at 28d8 [size=8]
	Region 3: I/O ports at 28fc [size=4]
	Region 4: I/O ports at 28b0 [size=16]
	Region 5: Memory at f5102000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: <access denied>
	Kernel driver in use: sata_nv
	Kernel modules: sata_nv
00: de 10 54 00 07 00 b0 00 f3 85 01 01 00 00 00 00
10: d1 28 00 00 f9 28 00 00 d9 28 00 00 fd 28 00 00
20: b1 28 00 00 00 20 10 f5 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01

00:08.0 IDE interface [0101]: nVidia Corporation CK804 Serial ATA Controller [10de:0055] (rev f3) (prog-if 85 [Master SecO PriO])
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0 (750ns min, 250ns max)
	Interrupt: pin A routed to IRQ 66
	Region 0: I/O ports at 28e0 [size=8]
	Region 1: I/O ports at 2c00 [size=4]
	Region 2: I/O ports at 28e8 [size=8]
	Region 3: I/O ports at 2c04 [size=4]
	Region 4: I/O ports at 28c0 [size=16]
	Region 5: Memory at f5103000 (32-bit, non-prefetchable) [size=4K]
	Capabilities: <access denied>
	Kernel driver in use: sata_nv
	Kernel modules: sata_nv
00: de 10 55 00 07 00 b0 00 f3 85 01 01 00 00 00 00
10: e1 28 00 00 01 2c 00 00 e9 28 00 00 05 2c 00 00
20: c1 28 00 00 00 30 10 f5 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 03 01

00:09.0 PCI bridge [0604]: nVidia Corporation CK804 PCI Bridge [10de:005c] (rev a2) (prog-if 01 [Subtractive decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Bus: primary=00, secondary=05, subordinate=05, sec-latency=64
	Memory behind bridge: f5000000-f50fffff
	Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR+
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr+ DiscTmrStat- DiscTmrSERREn-
00: de 10 5c 00 07 01 a0 00 a2 01 04 06 00 00 01 00
10: 00 00 00 00 00 00 00 00 00 05 05 40 f0 00 80 a2
20: 00 f5 00 f5 f0 ff 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 06 02

00:0a.0 Bridge [0680]: nVidia Corporation CK804 Ethernet Controller [10de:0057] (rev a3)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+
	Latency: 0 (250ns min, 5000ns max)
	Interrupt: pin A routed to IRQ 67
	Region 0: Memory at f5104000 (32-bit, non-prefetchable) [size=4K]
	Region 1: I/O ports at 28f0 [size=8]
	Capabilities: <access denied>
	Kernel driver in use: forcedeth
	Kernel modules: forcedeth
00: de 10 57 00 07 00 b8 00 a3 00 80 06 00 00 00 00
10: 00 40 10 f5 f1 28 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 01 14

00:0e.0 PCI bridge [0604]: nVidia Corporation CK804 PCIE Bridge [10de:005d] (rev a3) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Bus: primary=00, secondary=0a, subordinate=0a, sec-latency=0
	Memory behind bridge: f3000000-f4ffffff
	Prefetchable memory behind bridge: 00000000c0000000-00000000cfffffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: <access denied>
	Kernel driver in use: pcieport
	Kernel modules: shpchp
00: de 10 5d 00 07 01 10 00 a3 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 0a 0a 00 f1 01 00 00
20: 00 f3 f0 f4 01 c0 f1 cf 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 0a 00

00:18.0 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration [1022:1100]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Capabilities: <access denied>
00: 22 10 00 11 00 00 10 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00

00:18.1 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map [1022:1101]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00: 22 10 01 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:18.2 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller [1022:1102]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:18.3 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [1022:1103]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Kernel driver in use: k8temp
	Kernel modules: k8temp
00: 22 10 03 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:19.0 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration [1022:1100]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Capabilities: <access denied>
00: 22 10 00 11 00 00 10 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00

00:19.1 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map [1022:1101]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00: 22 10 01 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:19.2 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller [1022:1102]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:19.3 Host bridge [0600]: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control [1022:1103]
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Kernel driver in use: k8temp
	Kernel modules: k8temp
00: 22 10 03 11 00 00 00 00 00 00 00 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

05:05.0 FireWire (IEEE 1394) [0c00]: Texas Instruments TSB43AB22A IEEE-1394a-2000 Controller (PHY/Link) [iOHCI-Lynx] [104c:8023] (prog-if 10 [OHCI])
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 66 (500ns min, 1000ns max), Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 66
	Region 0: Memory at f5004000 (32-bit, non-prefetchable) [size=2K]
	Region 1: Memory at f5000000 (32-bit, non-prefetchable) [size=16K]
	Capabilities: <access denied>
	Kernel driver in use: firewire_ohci
	Kernel modules: firewire-ohci
00: 4c 10 23 80 06 01 10 02 00 10 00 0c 10 42 00 00
10: 00 40 00 f5 00 00 00 f5 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 0a 01 02 04

0a:00.0 VGA compatible controller [0300]: nVidia Corporation NV41 [Quadro FX 3450/4000 SDI] [10de:00cd] (rev a2) (prog-if 00 [VGA controller])
	Subsystem: nVidia Corporation wx4300 Workstation [10de:029b]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 5
	Region 0: Memory at f3000000 (32-bit, non-prefetchable) [size=16M]
	Region 1: Memory at c0000000 (64-bit, prefetchable) [size=256M]
	Region 3: Memory at f4000000 (64-bit, non-prefetchable) [size=16M]
	Expansion ROM at <unassigned> [disabled]
	Capabilities: <access denied>
	Kernel modules: nouveau, nvidiafb
00: de 10 cd 00 07 00 10 00 a2 00 00 03 10 00 00 00
10: 00 00 00 f3 0c 00 00 c0 00 00 00 00 04 00 00 f4
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 9b 02
30: 00 00 00 00 60 00 00 00 00 00 00 00 05 01 00 00

40:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 66
	Bus: primary=40, secondary=41, subordinate=41, sec-latency=64
	Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: <access denied>
	Kernel modules: shpchp
00: 22 10 50 74 07 01 30 02 12 00 04 06 00 42 81 00
10: 00 00 00 00 00 00 00 00 40 41 41 40 f1 01 20 22
20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 06 00

40:01.1 PIC [0800]: Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC [1022:7451] (rev 01) (prog-if 10 [IO-APIC])
	Subsystem: Advanced Micro Devices [AMD] Device [1022:7450]
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Region 0: Memory at f2500000 (64-bit, non-prefetchable) [size=4K]
00: 22 10 51 74 06 00 00 02 01 10 00 08 00 00 00 00
10: 04 00 50 f2 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 50 74
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

40:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 66
	Bus: primary=40, secondary=61, subordinate=61, sec-latency=64
	I/O behind bridge: 00001000-00001fff
	Memory behind bridge: f2100000-f24fffff
	Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: <access denied>
	Kernel modules: shpchp
00: 22 10 50 74 07 01 30 02 12 00 04 06 00 42 81 00
10: 00 00 00 00 00 00 00 00 40 61 61 40 11 11 20 02
20: 10 f2 40 f2 f1 ff 01 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 06 00

40:02.1 PIC [0800]: Advanced Micro Devices [AMD] AMD-8131 PCI-X IOAPIC [1022:7451] (rev 01) (prog-if 10 [IO-APIC])
	Subsystem: Advanced Micro Devices [AMD] Device [1022:7450]
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Region 0: Memory at f2501000 (64-bit, non-prefetchable) [size=4K]
00: 22 10 51 74 06 00 00 02 01 10 00 08 00 00 00 00
10: 04 10 50 f2 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 50 74
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

61:06.0 SCSI storage controller [0100]: LSI Logic / Symbios Logic 53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI [1000:0030] (rev 07)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 72 (4000ns min, 1500ns max), Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 61
	Region 0: I/O ports at 1000 [size=256]
	Region 1: Memory at f2100000 (64-bit, non-prefetchable) [size=1M]
	Region 3: Memory at f2200000 (64-bit, non-prefetchable) [size=1M]
	Capabilities: <access denied>
	Kernel driver in use: mptspi
	Kernel modules: mptspi
00: 00 10 30 00 07 01 30 02 07 00 00 01 10 48 80 00
10: 01 10 00 00 04 00 10 f2 00 00 00 00 04 00 20 f2
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 50 00 00 00 00 00 00 00 05 01 10 06

61:06.1 SCSI storage controller [0100]: LSI Logic / Symbios Logic 53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI [1000:0030] (rev 07)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 72 (4000ns min, 1500ns max), Cache Line Size: 64 bytes
	Interrupt: pin B routed to IRQ 66
	Region 0: I/O ports at 1400 [size=256]
	Region 1: Memory at f2300000 (64-bit, non-prefetchable) [size=1M]
	Region 3: Memory at f2400000 (64-bit, non-prefetchable) [size=1M]
	Capabilities: <access denied>
	Kernel driver in use: mptspi
	Kernel modules: mptspi
00: 00 10 30 00 07 01 30 02 07 00 00 01 10 48 80 00
10: 01 14 00 00 04 00 30 f2 00 00 00 00 04 00 40 f2
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 02 10 06

80:00.0 Memory controller [0580]: nVidia Corporation CK804 Memory Controller [10de:005e] (rev a3)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Capabilities: <access denied>
00: de 10 5e 00 06 01 b0 00 a3 00 80 05 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 00 00

80:01.0 Memory controller [0580]: nVidia Corporation CK804 Memory Controller [10de:00d3] (rev a3)
	Subsystem: Hewlett-Packard Company Device [103c:1500]
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Region 0: I/O ports at eb00 [size=256]
	Region 1: Memory at f2000000 (32-bit, non-prefetchable) [size=4K]
00: de 10 d3 00 0f 00 a0 00 a3 00 80 05 00 00 80 00
10: 01 eb 00 00 00 00 00 f2 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3c 10 00 15
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80:0e.0 PCI bridge [0604]: nVidia Corporation CK804 PCIE Bridge [10de:005d] (rev a3) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Bus: primary=80, secondary=81, subordinate=81, sec-latency=0
	Memory behind bridge: f0000000-f1ffffff
	Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: <access denied>
	Kernel driver in use: pcieport
	Kernel modules: shpchp
00: de 10 5d 00 07 01 10 00 a3 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 80 81 81 00 f1 01 00 00
20: 00 f0 f0 f1 01 d0 f1 df 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 06 00

81:00.0 VGA compatible controller [0300]: nVidia Corporation NV41 [Quadro FX 3450/4000 SDI] [10de:00cd] (rev a2) (prog-if 00 [VGA controller])
	Subsystem: nVidia Corporation wx4300 Workstation [10de:029b]
	Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 5
	Region 0: Memory at f0000000 (32-bit, non-prefetchable) [disabled] [size=16M]
	Region 1: Memory at d0000000 (64-bit, prefetchable) [disabled] [size=256M]
	Region 3: Memory at f1000000 (64-bit, non-prefetchable) [disabled] [size=16M]
	Capabilities: <access denied>
	Kernel modules: nouveau, nvidiafb
00: de 10 cd 00 04 00 10 00 a2 00 00 03 10 00 00 00
10: 00 00 00 f0 0c 00 00 d0 00 00 00 00 04 00 00 f1
20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 9b 02
30: 00 00 00 00 60 00 00 00 00 00 00 00 05 01 00 00


cheers

J?rgen


-----Original Message-----
From: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006 at gmx.net]
Sent: Mon 2/27/2012 12:00 AM
To: J?rgen Trapp
Cc: flashrom at flashrom.org
Subject: Re: [flashrom] flashrom with HP XW9300
 
Hi J?rgen,

I remember a similar case where flashrom was unable to write, and that
board also had a second chipset match. We might have the same issue
here: To PCI devices with the same ID, one acts as southbridge and the
other one is unused. We might enable the wrong one here and might have
to refine detection a bit. OTOH, a flash chip is detected, so we know
that write was enabled on the address space mapped to the flash chip
(but that write enable might have not been done by flashrom).

Am 26.02.2012 20:38 schrieb J?rgen Trapp:
> ubuntu at ubuntu:~/coreboot$ sudo flashrom -VV
> flashrom v0.9.5.1-r1508 on Linux 3.0.0-12-generic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
>
> Calibrating delay loop... OS timer resolution is 4001 usecs, 1093M loops per second, 10 myus = 0 us, 100 myus = 0 us, 1000 myus = 0 us, 10000 myus = 8001 us, 16004 myus = 16001 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "Hewlett-Packard"
> DMI string system-product-name: "HP xw9300 Workstation"
> DMI string system-version: " "
> DMI string baseboard-manufacturer: "Hewlett-Packard"
> DMI string baseboard-product-name: "09C4h"
> DMI string baseboard-version: "Not Specified"
> DMI string chassis-type: "Mini Tower"
> Found chipset "NVIDIA CK804" with PCI ID 10de:0051. Enabling flash write... OK.
> WARNING: unexpected second chipset match: "NVIDIA CK804"

Side note: We should print the PCI ID for the second chipset match as well.


> ignoring, please report lspci and board URL to flashrom at flashrom.org
> with 'CHIPSET: your board name' in the subject line.
> The following protocols are supported: Non-SPI.
> Probing for AMD Am29F010A/B, 128 kB: probe_jedec_common: id1 0x65, id2 0xd0, id1 parity violation, id1 is normal flash content, id2 is normal flash content
> [...]

Could you run the following command as root and post the results?
lspci -nnvvxxx

That should help us determine which one of the CK804 southbridges we
should enable.

However, it is possible that we enabled the right southbridge due to
pure luck and there is a separate write protection (jumper or solder
bridge or something controllable in software). If that is the case,
somebody has to find out how to enable writes by reverse engineering or
by looking at the docs if the docs are good.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.flashrom.org/pipermail/flashrom/attachments/20120227/a0638a83/attachment-0001.html>

From svn at flashrom.org  Mon Feb 27 20:44:17 2012
From: svn at flashrom.org (repository service)
Date: Mon, 27 Feb 2012 20:44:17 +0100
Subject: [flashrom] [commit] r1510 - trunk
Message-ID: <E1S26Ub-0001GV-0V@ra.coresystems.de>

Author: stefanct
Date: Mon Feb 27 20:44:16 2012
New Revision: 1510
URL: http://flashrom.org/trac/flashrom/changeset/1510

Log:
nicintel_spi.c: check if write enable is really set (and minor comment changes).

Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer at gmail.com>

Modified:
   trunk/nicintel_spi.c

Modified: trunk/nicintel_spi.c
==============================================================================
--- trunk/nicintel_spi.c	Sun Feb 26 00:40:16 2012	(r1509)
+++ trunk/nicintel_spi.c	Mon Feb 27 20:44:16 2012	(r1510)
@@ -31,12 +31,15 @@
 
 #define PCI_VENDOR_ID_INTEL 0x8086
 
+/* EEPROM/Flash Control & Data Register */
 #define EECD	0x10
+/* Flash Access Register */
 #define FLA	0x1c
 
 /*
  * Register bits of EECD.
- * 
+ * Table 13-6
+ *
  * Bit 04, 05: FWE (Flash Write Enable Control)
  * 00b = not allowed
  * 01b = flash writes disabled
@@ -46,8 +49,9 @@
 #define FLASH_WRITES_DISABLED	0x10 /* FWE: 10000b */
 #define FLASH_WRITES_ENABLED	0x20 /* FWE: 100000b */
 
-/* Flash Access register bits */
-/* Table 13-9 */
+/* Flash Access register bits
+ * Table 13-9
+ */
 #define FL_SCK	0
 #define FL_CS	1
 #define FL_SI	2
@@ -179,6 +183,13 @@
 	tmp |= FLASH_WRITES_ENABLED;
 	pci_mmio_writel(tmp, nicintel_spibar + EECD);
 
+	/* test if FWE is really set to allow writes */
+	tmp = pci_mmio_readl(nicintel_spibar + EECD);
+	if ( (tmp & FLASH_WRITES_DISABLED) || !(tmp & FLASH_WRITES_ENABLED) ) {
+		msg_perr("Enabling flash write access failed.\n");
+		return 1;
+	}
+
 	if (register_shutdown(nicintel_spi_shutdown, NULL))
 		return 1;
 


From stefan.tauner at student.tuwien.ac.at  Mon Feb 27 20:55:11 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Mon, 27 Feb 2012 20:55:11 +0100
Subject: [flashrom] [PATCH 7/8] check if write enable is really set in
 nicintel_spi_init (and minor comment changes).
In-Reply-To: <CAPp9Or=pNbhjQ1=xMvtBtCieBRtEL_8hA8rqDk+447_Fsc1JXg@mail.gmail.com>
References: <cover.1300202693.git.stefan.tauner@student.tuwien.ac.at>
	<24e35011e614961584ddaca4f32fa85e448ee57f.1300202693.git.stefan.tauner@student.tuwien.ac.at>
	<CAPp9Or=pNbhjQ1=xMvtBtCieBRtEL_8hA8rqDk+447_Fsc1JXg@mail.gmail.com>
Message-ID: <201202271955.q1RJtB6A014037@mail2.student.tuwien.ac.at>

On Mon, 20 Feb 2012 19:49:06 +0100
Idwer Vollering <vidwer at gmail.com> wrote:

> 2011/3/15 Stefan Tauner <stefan.tauner at student.tuwien.ac.at>:
> > Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>
> 
> Adding "pci_mmio_writel(FLASH_WRITES_DISABLED, nicintel_spibar +
> EECD);" right after the usage of register_shutdown() works as it
> should:
> 
> Initializing nicintel_spi programmer
> Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:01.0).
> Requested BAR is MEM, 32bit, not prefetchable
> Enabling flash write access failed.
> Error: Programmer initialization failed.
> 
> Acked-by: Idwer Vollering <vidwer at gmail.com>

thanks!
committed in r1510

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From gurken.papst at gmail.com  Mon Feb 27 23:46:31 2012
From: gurken.papst at gmail.com (Gurken Papst)
Date: Mon, 27 Feb 2012 23:46:31 +0100
Subject: [flashrom] Test report Biostar M7VIQ - Chip not detected
In-Reply-To: <4F4ABFE4.8040503@gmx.net>
References: <CAK2gj8oLbnB7oE=Jb7ku+srJzK13YF+3kjGve9n-rWAhjewQTA@mail.gmail.com>
	<4F4ABFE4.8040503@gmx.net>
Message-ID: <CAK2gj8obvZ0XwzrqeMJg6bNToCtzgkeMHtwq8H3FGG-VSNHteg@mail.gmail.com>

On Mon, Feb 27, 2012 at 00:27, Carl-Daniel Hailfinger wrote:
> Would you be willing to test a few patches?

Sure. I am not used to patch/build, but I think I will be able to get
it done. The instructions on <http://www.flashrom.org/Downloads> don't
seem too hard. It will take some time however, until I can test the
patched version on the mainboard. I expect to be able to test it on
one of the next weekends.


From stefan.tauner at student.tuwien.ac.at  Tue Feb 28 02:48:01 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Tue, 28 Feb 2012 02:48:01 +0100
Subject: [flashrom] [PATCH] ft2232_spi.c: add frequency divider parameter.
In-Reply-To: <4EA3C847.5010501@gmail.com>
References: <4EA3C847.5010501@gmail.com>
Message-ID: <1330393681-12334-1-git-send-email-stefan.tauner@student.tuwien.ac.at>

This adds an extra argument when using the ft2232_spi programmer to set
the frequency divider. The valid values for the divider is any even integer
between 2 and 131072.

Signed-off-by: Samir Ibrad?i? <sibradzic at gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner at student.tuwien.ac.at>

---
this was totally broken even without Samir's version of the patch applied.
it might be a better idea to let the user specify the actual frequency instead of
the divisor like some other programmers do (serprog and buspirate).
TODO: man page
---
 ft2232_spi.c |   54 +++++++++++++++++++++++++++++++++++++-----------------
 1 files changed, 37 insertions(+), 17 deletions(-)

diff --git a/ft2232_spi.c b/ft2232_spi.c
index 122866f..7d598b1 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -64,17 +64,8 @@ const struct usbdev_status devs_ft2232spi[] = {
 	{},
 };
 
-/*
- * The 'H' chips can run internally at either 12MHz or 60MHz.
- * The non-H chips can only run at 12MHz.
- */
-static uint8_t clock_5x = 1;
 
-/*
- * In either case, the divisor is a simple integer clock divider.
- * If clock_5x is set, this divisor divides 30MHz, else it divides 6MHz.
- */
-#define DIVIDE_BY 3  /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */
+#define DEFAULT_DIVISOR 2
 
 #define BITMODE_BITBANG_NORMAL	1
 #define BITMODE_BITBANG_SPI	2
@@ -162,12 +153,28 @@ static const struct spi_programmer spi_programmer_ft2232 = {
 /* Returns 0 upon success, a negative number upon errors. */
 int ft2232_spi_init(void)
 {
-	int f, ret = 0;
+	int ret = 0;
 	struct ftdi_context *ftdic = &ftdic_context;
 	unsigned char buf[512];
 	int ft2232_vid = FTDI_VID;
 	int ft2232_type = FTDI_FT4232H_PID;
 	enum ftdi_interface ft2232_interface = INTERFACE_B;
+	/*
+	 * The 'H' chips can run with an internal clock of either 12 MHz or 60 MHz,
+	 * but the non-H chips can only run at 12 MHz. We enable the divide-by-5
+	 * prescaler on the former to run on the same speed.
+	 */
+	uint8_t clock_5x = 1;
+	/* In addition to the prescaler mentioned above there is also another
+	 * configurable one on all versions of the chips. Its divisor div can be
+	 * set by a 16 bit value x according to the following formula:
+	 * div = (1 + x) * 2 <-> x = div / 2 - 1
+	 * Hence the expressible divisors are all even numbers between 2 and
+	 * 2^17 (=131072) resulting in SCK frequencies of 2 MHz down to about
+	 * 92 Hz for 12 MHz inputs.
+	 */
+	uint32_t divisor = DEFAULT_DIVISOR;
+	int f;
 	char *arg;
 	double mpsse_clk;
 
@@ -243,6 +250,21 @@ int ft2232_spi_init(void)
 		}
 	}
 	free(arg);
+	arg = extract_programmer_param("divisor");
+	if (arg && strlen(arg)) {
+		unsigned int temp = 0;
+		char *endptr;
+		temp = strtoul(arg, &endptr, 10);
+		if (*endptr || temp < 2 || temp > 131072 || temp & 0x1) {
+			msg_perr("Error: Invalid SPI frequency divisor specified: \"%s\".\n"
+				 "Valid are even values between 2 and 131072.\n", arg);
+			free(arg);
+			return -2;
+		} else {
+			divisor = (uint32_t)temp;
+		}
+	}
+	free(arg);
 	msg_pdbg("Using device type %s %s ",
 		 get_ft2232_vendorname(ft2232_vid, ft2232_type),
 		 get_ft2232_devicename(ft2232_vid, ft2232_type));
@@ -303,17 +325,15 @@ int ft2232_spi_init(void)
 
 	msg_pdbg("Set clock divisor\n");
 	buf[0] = 0x86;		/* command "set divisor" */
-	/* valueL/valueH are (desired_divisor - 1) */
-	buf[1] = (DIVIDE_BY - 1) & 0xff;
-	buf[2] = ((DIVIDE_BY - 1) >> 8) & 0xff;
 	if (send_buf(ftdic, buf, 3)) {
 		ret = -6;
 		goto ftdi_err;
 	}
+	buf[1] = (divisor / 2 - 1) & 0xff;
+	buf[2] = ((divisor / 2 - 1) >> 8) & 0xff;
 
-	msg_pdbg("MPSSE clock: %f MHz divisor: %d "
-		 "SPI clock: %f MHz\n", mpsse_clk, DIVIDE_BY,
-		 (double)(mpsse_clk / (((DIVIDE_BY - 1) + 1) * 2)));
+	msg_pdbg("MPSSE clock: %f MHz, divisor: %u, SPI clock: %f MHz\n",
+		 mpsse_clk, divisor, (double)(mpsse_clk / divisor));
 
 	/* Disconnect TDI/DO to TDO/DI for loopback. */
 	msg_pdbg("No loopback of TDI/DO TDO/DI\n");
-- 
1.7.1



From sibradzic at gmail.com  Tue Feb 28 03:50:37 2012
From: sibradzic at gmail.com (=?UTF-8?B?U2FtaXIgSWJyYWTFvmnEhw==?=)
Date: Tue, 28 Feb 2012 11:50:37 +0900
Subject: [flashrom] [PATCH] ft2232_spi.c: add frequency divider
	parameter.
In-Reply-To: <1330393681-12334-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
References: <4EA3C847.5010501@gmail.com>
	<1330393681-12334-1-git-send-email-stefan.tauner@student.tuwien.ac.at>
Message-ID: <4F4C40FD.5020800@gmail.com>



On 2012?02?28? 10:48, Stefan Tauner wrote:
> This adds an extra argument when using the ft2232_spi programmer to set
> the frequency divider. The valid values for the divider is any even integer
> between 2 and 131072.
>
> Signed-off-by: Samir Ibrad?i?<sibradzic at gmail.com>
> Signed-off-by: Stefan Tauner<stefan.tauner at student.tuwien.ac.at>
>
> ---
> this was totally broken even without Samir's version of the patch applied.
> it might be a better idea to let the user specify the actual frequency instead of
> the divisor like some other programmers do (serprog and buspirate).

Well, it may be more clear to specify exact frequencies, but we may end 
up with weird set of frequencies for all these large dividers.
Maybe it would be better to support a limited set of "standard" dividers 
and their corresponding frequencies, like:

divider | freq
--------+--------
2       | 30MHz
4       | 15MHz
6       | 10MHz
8       | 7.5MHz
10      | 6MHz
12      | 5MHz
20      | 3MHz
30      | 2MHz
60      | 1MHz
80      | 750KHz
100     | 600KHz
120     | 500KHz
150     | 400KHz
200     | 300KHz
300     | 200KHz
600     | 100KHz
800     | 75KHz
1000    | 60KHz
1200    | 50KHz
1500    | 40KHz
2000    | 30KHz
3000    | 20KHz
6000    | 10KHz
8000    | 7.5KHz
(and so on)

But i vote for supporting specific divider after all, one can never know 
if there is some obscure device out there in the wild that supports only 
6365372Hz.

> TODO: man page
> ---
>   ft2232_spi.c |   54 +++++++++++++++++++++++++++++++++++++-----------------
>   1 files changed, 37 insertions(+), 17 deletions(-)
>
> diff --git a/ft2232_spi.c b/ft2232_spi.c
> index 122866f..7d598b1 100644
> --- a/ft2232_spi.c
> +++ b/ft2232_spi.c
> @@ -64,17 +64,8 @@ const struct usbdev_status devs_ft2232spi[] = {
>   	{},
>   };
>
> -/*
> - * The 'H' chips can run internally at either 12MHz or 60MHz.
> - * The non-H chips can only run at 12MHz.
> - */
> -static uint8_t clock_5x = 1;
>
> -/*
> - * In either case, the divisor is a simple integer clock divider.
> - * If clock_5x is set, this divisor divides 30MHz, else it divides 6MHz.
> - */
> -#define DIVIDE_BY 3  /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */
> +#define DEFAULT_DIVISOR 2
>
>   #define BITMODE_BITBANG_NORMAL	1
>   #define BITMODE_BITBANG_SPI	2
> @@ -162,12 +153,28 @@ static const struct spi_programmer spi_programmer_ft2232 = {
>   /* Returns 0 upon success, a negative number upon errors. */
>   int ft2232_spi_init(void)
>   {
> -	int f, ret = 0;
> +	int ret = 0;
>   	struct ftdi_context *ftdic =&ftdic_context;
>   	unsigned char buf[512];
>   	int ft2232_vid = FTDI_VID;
>   	int ft2232_type = FTDI_FT4232H_PID;
>   	enum ftdi_interface ft2232_interface = INTERFACE_B;
> +	/*
> +	 * The 'H' chips can run with an internal clock of either 12 MHz or 60 MHz,
> +	 * but the non-H chips can only run at 12 MHz. We enable the divide-by-5
> +	 * prescaler on the former to run on the same speed.
> +	 */
> +	uint8_t clock_5x = 1;
> +	/* In addition to the prescaler mentioned above there is also another
> +	 * configurable one on all versions of the chips. Its divisor div can be
> +	 * set by a 16 bit value x according to the following formula:
> +	 * div = (1 + x) * 2<->  x = div / 2 - 1
> +	 * Hence the expressible divisors are all even numbers between 2 and
> +	 * 2^17 (=131072) resulting in SCK frequencies of 2 MHz down to about
> +	 * 92 Hz for 12 MHz inputs.
> +	 */
> +	uint32_t divisor = DEFAULT_DIVISOR;
> +	int f;
>   	char *arg;
>   	double mpsse_clk;
>
> @@ -243,6 +250,21 @@ int ft2232_spi_init(void)
>   		}
>   	}
>   	free(arg);
> +	arg = extract_programmer_param("divisor");
> +	if (arg&&  strlen(arg)) {
> +		unsigned int temp = 0;
> +		char *endptr;
> +		temp = strtoul(arg,&endptr, 10);
> +		if (*endptr || temp<  2 || temp>  131072 || temp&  0x1) {
> +			msg_perr("Error: Invalid SPI frequency divisor specified: \"%s\".\n"
> +				 "Valid are even values between 2 and 131072.\n", arg);
> +			free(arg);
> +			return -2;
> +		} else {
> +			divisor = (uint32_t)temp;
> +		}
> +	}
> +	free(arg);
>   	msg_pdbg("Using device type %s %s ",
>   		 get_ft2232_vendorname(ft2232_vid, ft2232_type),
>   		 get_ft2232_devicename(ft2232_vid, ft2232_type));
> @@ -303,17 +325,15 @@ int ft2232_spi_init(void)
>
>   	msg_pdbg("Set clock divisor\n");
>   	buf[0] = 0x86;		/* command "set divisor" */
> -	/* valueL/valueH are (desired_divisor - 1) */
> -	buf[1] = (DIVIDE_BY - 1)&  0xff;
> -	buf[2] = ((DIVIDE_BY - 1)>>  8)&  0xff;
>   	if (send_buf(ftdic, buf, 3)) {
>   		ret = -6;
>   		goto ftdi_err;
>   	}
> +	buf[1] = (divisor / 2 - 1)&  0xff;
> +	buf[2] = ((divisor / 2 - 1)>>  8)&  0xff;
>
> -	msg_pdbg("MPSSE clock: %f MHz divisor: %d "
> -		 "SPI clock: %f MHz\n", mpsse_clk, DIVIDE_BY,
> -		 (double)(mpsse_clk / (((DIVIDE_BY - 1) + 1) * 2)));
> +	msg_pdbg("MPSSE clock: %f MHz, divisor: %u, SPI clock: %f MHz\n",
> +		 mpsse_clk, divisor, (double)(mpsse_clk / divisor));
>
>   	/* Disconnect TDI/DO to TDO/DI for loopback. */
>   	msg_pdbg("No loopback of TDI/DO TDO/DI\n");


From erappleman at gmail.com  Tue Feb 28 15:51:00 2012
From: erappleman at gmail.com (Eric Appleman)
Date: Tue, 28 Feb 2012 14:51:00 +0000 (UTC)
Subject: [flashrom] Some specs for IT8518 buried in my laptops ESM
Message-ID: <loom.20120228T154945-963@post.gmane.org>

http://www.mediafire.com/?t77ue8xx1cv49g9

Page 87 has a full blown schematic.

Enjoy.

- Eric



From stefan.tauner at student.tuwien.ac.at  Wed Feb 29 00:02:39 2012
From: stefan.tauner at student.tuwien.ac.at (Stefan Tauner)
Date: Wed, 29 Feb 2012 00:02:39 +0100
Subject: [flashrom] flashrom with HP XW9300
In-Reply-To: <5B9632B43753F047BE43BF138DCF777401F3B077@HSNMST02V05.hsn.alice-dsl.net>
References: <5B9632B43753F047BE43BF138DCF777401F3B075@HSNMST02V05.hsn.alice-dsl.net>
	<4F4AB980.3080509@gmx.net>
	<5B9632B43753F047BE43BF138DCF777401F3B077@HSNMST02V05.hsn.alice-dsl.net>
Message-ID: <201202282302.q1SN2dgA025912@mail2.student.tuwien.ac.at>

On Mon, 27 Feb 2012 07:55:04 +0100
J?rgen Trapp <juergen.trapp at alice.de> wrote:

> lspci -nnvvxxx
> [?]

Hello J?rgen!

The last thing we heard from you was that you are trying to find and
play with a write protection jumper. Did you succeed?

-- 
Kind regards/Mit freundlichen Gr??en, Stefan Tauner


From svetoslav.trochev at gmail.com  Wed Feb 29 20:53:40 2012
From: svetoslav.trochev at gmail.com (Svetoslav Trochev)
Date: Wed, 29 Feb 2012 11:53:40 -0800
Subject: [flashrom] Support for ASRock 890GX Extreme3 mainboard
Message-ID: <CAGM9zkO=knmKs_2gVPGA2AqT0cgO8jEsQfhDuZK9pBab3eTZgQ@mail.gmail.com>

Hi Everybody,

I am new here, so my apology if I am doing something wrong.
I have ASRock 890GX Extreme3 mainboard. This board has ability to be
flashed using standard BIOS, but never the less I decided to test
Flashrom.
I read the "Board Testing HOWTO" [1]. First signs are that this board
will work out of the box with "flashrom v0.9.4-r1394 on Linux
3.0.4-pmagic (i686), built with libpci 3.1.7, GCC 4.6.1, little
endian"
What I have done so far:
1. Ran 'flashrom' command and it detected the chip: Winbond W25Q80.
2. Ran 'flashrom -R xxxx.rom' and it completed with no errors. I
examine the file and it looks like normal ROM file.
3. Ran 'flashrom -V' I am attaching the output.
4. I try comparing the backup copy of the EEPROM with the original
file provided by ASRock. It is different. They have exact same header,
but quite different.
5. Because I am not 100% sure that I have good backup I decided to
order spare chip and continue with the test later. ( I have external
EEPROM programmer ) I will continue this weekend.

Thank you and any comments are welcome and highly appreciated,
Svetoslav Trochev

[1] http://www.flashrom.org/Board_Testing_HOWTO
-------------- next part --------------
flashrom v0.9.4-r1394 on Linux 3.0.4-pmagic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... OS timer resolution is 1 usecs, 1651M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1001 us, 10000 myus = 10003 us, 4 myus = 4 us, OK.
Initializing internal programmer
No coreboot table found.
DMI string system-manufacturer: "To Be Filled By O.E.M."
DMI string system-product-name: "To Be Filled By O.E.M."
DMI string system-version: "To Be Filled By O.E.M."
DMI string baseboard-manufacturer: "ASRock"
DMI string baseboard-product-name: "890GX Extreme3"
DMI string baseboard-version: "                      "
DMI string chassis-type: "Desktop"
Found chipset "AMD SB700/SB710/SB750/SB850" with PCI ID 1002:439d. Enabling flash write... SPI base address is at 0xfec10000
AltSpiCSEnable=0, SpiRomEnable=1, AbortEnable=0
PrefetchEnSPIFromIMC=0, PrefetchEnSPIFromHost=1, SpiOpEnInLpcMode=1
SpiArbEnable=1, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1, ArbWaitCount=7, SpiBridgeDisable=1, DropOneClkOnRd=0
NormSpeed is 33 MHz
GPIO11 used for SPI_DO
GPIO12 used for SPI_DI
GPIO31 used for SPI_HOLD
GPIO32 used for SPI_CS
GPIO47 used for SPI_CLK
SB700 IMC is not active.
ROM strap override is not active
OK.
This chipset supports the following protocols: LPC, FWH, SPI.
Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x2c, id2 0xe9, id1 is normal flash content, id2 is normal flash content
Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13
Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x13
Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x2c, id2 0xe9, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0x8f, id2 0xdb, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x2c, id2 0xe9, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x2c, id2 0xe9, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID.
Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID.
Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID.
Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x2c, id2 0xe9, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Chip status register is 00
Found Winbond flash chip "W25Q80" (1024 kB, SPI) at physical address 0xfff00000.
Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x2c, id2 0xe9, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x2c, id2 0xe9, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0x4d, id2 0x49, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x77, id2 0x36, id1 parity violation, id1 is normal flash content, id2 is normal flash content
Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4014
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x13
No operations were specified.