The patch to board_enable.c needs to be updated to apply cleanly with the new DMI identification stuff, but otherwise this patch applied cleanly for me and I was able to add a superio entry to do some very basic testing -- My superio isn't fully supported (yet), but I was able to run through the probing steps successfully.<br>
<br><div class="gmail_quote">On Wed, Jan 20, 2010 at 2:02 PM, Luc Verhaegen <span dir="ltr"><<a href="mailto:libv@skynet.be">libv@skynet.be</a>></span> wrote:<br><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
> +/**<br>
> + *<br>
> + */<br>
> +static struct superio superios[] = {<br>
> + {it87xx_detect, 0x8701, ITE_IT8703, NULL, it8703_gpio_set},<br>
> + {it87xx_detect, 0x8705, ITE_IT8705, it8705f_write_enable, NULL},<br>
> + {it87xx_detect, 0x8712, ITE_IT8712, NULL, it8712f_gpio_set},<br>
> + {it87xx_detect, 0x8716, ITE_IT8716, it8716_spi_init, NULL},<br>
> + {it87xx_detect, 0x8718, ITE_IT8718, it8716_spi_init, NULL},<br>
> + {w836xx_detect, 0x3C, VIA_VT1211, NULL, NULL},<br>
> + {w836xx_detect, 0x52, WB_W83627HF, NULL, w83627hf_gpio_set},<br>
> + //{w836xx_detect, 0x60, WB_W83697HF, w83697hf_memw_enable, NULL},<br>
<br>
Guess what i tested here :)<br>
<br>
> + {w836xx_detect, 0x82, WB_W83627THF, NULL, w83627thf_gpio_set},<br>
> + {w836xx_detect, 0x88, WB_W83627EHF, NULL, NULL},<br>
> + {w836xx_detect, 0xA0, WB_W83627DHG, w83627dhg_spi_init, NULL},<br>
> +<br>
> + {NULL, 0, SIO_NONE, NULL, NULL} /* end marker */<br>
> +};<br>
<br>
Table with the action.<br></blockquote><div><br>There are three similar-but-different tables used in this file -- One in superio_chip_name(), one in superio_probe(), and then the larger superios[] table. Maybe we can find a way to use a single table to satisfy the needs of all the helper functions?<br>
<br></div><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
<br>
> +int<br>
> +superio_probe(void)<br>
> +{<br>
> + struct superio_detect {<br>
> + uint16_t port;<br>
> + uint16_t (*detect) (uint16_t port);<br>
> + char *name;<br>
> + } superio_detects[] = {<br>
> + {0x2E, w836xx_detect, "Winbond W836xx"},<br>
> + {0x4E, w836xx_detect, "Winbond W836xx"},<br>
> + {0x2E, it87xx_detect, "ITE IT87xx"},<br>
> + {0x4E, it87xx_detect, "ITE IT87xx"},<br>
> +<br>
> + {0, NULL} /* end marker */<br>
> + };<br>
> +<br>
> + int i, j;<br>
> + uint16_t id;<br>
> +<br>
> + for (i = 0; superio_detects[i].detect; i++) {<br>
> +<br>
> + id = superio_detects[i].detect(superio_detects[i].port);<br>
> + if ((id == 0xFF) || (id == 0xFFFF))<br>
> + continue;<br>
> +<br>
> + msg_pdbg("Superio detection for \"%s\" on 0x%X"<br>
> + " returned 0x%0X\n", superio_detects[i].name,<br>
> + superio_detects[i].port, id);<br>
> +<br>
> + for (j = 0; superios[j].detect; j++) {<br>
> + if ((superios[j].detect == superio_detects[i].detect) &&<br>
> + (id == superios[j].id)) {<br>
> + superio = &superios[j];<br>
> + superio_port = superio_detects[i].port;<br>
> + break;<br>
> + }<br>
> + }<br>
> +<br>
> + if (!superio)<br>
> + msg_perr("No matching superio found for \"%s\" (0x%X) :"<br>
> + " 0x%0X\n", superio_detects[i].name,<br>
> + superio_detects[i].port, id);<br>
> + }<br>
> +<br>
> + if (superio)<br>
> + msg_pinfo("Superio \"%s\" detected on 0x%0X.\n",<br>
> + superio_chip_name(superio->chip), superio_port);<br>
> + else<br>
> + msg_pdbg("No Superio chip detected.\n");<br>
> +<br>
> + return 0;<br>
> +}<br>
<br>
Here we do the detection in a clean way with little noise.<br>
<br>
> +++ b/superio.h<br>
> @@ -0,0 +1,107 @@<br>
> +/*<br>
> + * This file is part of the flashrom project.<br>
> + *<br>
> + * This program is free software; you can redistribute it and/or modify<br>
> + * it under the terms of the GNU General Public License as published by<br>
> + * the Free Software Foundation; version 2 of the License.<br>
> + *<br>
> + * This program is distributed in the hope that it will be useful,<br>
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>
> + * GNU General Public License for more details.<br>
> + *<br>
> + * You should have received a copy of the GNU General Public License<br>
> + * along with this program; if not, write to the Free Software<br>
> + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA<br>
> + */<br>
> +#ifndef HAVE_SUPERIO_H<br>
> +#define HAVE_SUPERIO_H 1<br>
> +<br>
> +/*<br>
> + *<br>
> + */<br>
> +enum superio_chip {<br>
> + SIO_NONE = 0,<br>
> +<br>
> + /* ITE */<br>
> + ITE_IT8703,<br>
> + ITE_IT8705,<br>
> + ITE_IT8708,<br>
> + ITE_IT8712,<br>
> + ITE_IT8716,<br>
> + ITE_IT8718,<br>
> +<br>
> + /* A lonesome VIA superio */<br>
> + VIA_VT1211,<br>
> +<br>
> + /* Winbond */<br>
> + WB_W83627DHG,<br>
> + WB_W83627EHF,<br>
> + WB_W83627HF,<br>
> + WB_W83627THF,<br>
> + WB_W83697HF,<br>
> +<br>
> + SIO_UNKNOWN<br>
> +};<br>
> +<br>
> +/*<br>
> + *<br>
> + */<br>
> +struct superio {<br>
> + uint16_t (*detect) (uint16_t port);<br>
> + uint16_t id;<br>
> +<br>
> + enum superio_chip chip;<br>
> +<br>
> + int (*init) (uint16_t port);<br>
> + int (*gpio_set) (uint16_t port, int gpio, int raise);<br>
> +};<br>
> +<br>
> +struct superio *superio;<br>
> +uint16_t superio_port;<br>
> +<br>
> +uint8_t sio_read(uint16_t port, uint8_t reg);<br>
> +void sio_write(uint16_t port, uint8_t reg, uint8_t data);<br>
> +void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);<br>
> +<br>
> +void w836xx_ext_enter(uint16_t port);<br>
> +void w836xx_ext_leave(uint16_t port);<br>
> +<br>
> +void ite_conf_mode_enter(uint16_t port);<br>
> +void ite_conf_mode_exit(uint16_t port);<br>
> +<br>
> +/*<br>
> + * High level calls.<br>
> + */<br>
> +int superio_probe(void);<br>
> +int superio_init(void);<br>
> +int superio_gpio_set(int gpio, int raise);<br>
> +<br>
> +/*<br>
> + *<br>
> + * Will someone please pour the programmer infrastructure in a struct with<br>
> + * callbacks that gets created by the init functions below? This lack of<br>
> + * abstraction now causes us to have to include horrible flash.h before<br>
> + * this file.<br>
> + *<br>
> + */<br>
> +<br>
> +/*<br>
> + * it87spi.c<br>
> + */<br>
> +int it8716_spi_init(uint16_t port);<br>
> +int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,<br>
> + const unsigned char *writearr, unsigned char *readarr);<br>
> +int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);<br>
> +int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf);<br>
> +<br>
> +/*<br>
> + * wbsio_spi.c<br>
> + */<br>
> +int w83627dhg_spi_init(uint16_t port);<br>
> +int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,<br>
> + const unsigned char *writearr, unsigned char *readarr);<br>
> +int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);<br>
> +int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf);<br>
> +<br>
> +#endif /* HAVE_SUPERIO_H */<br>
<br>
Anyway, here is an example of two test runs last weeks:<br>
<br>
n the asus A7V8X-MX SE (which up until now required a board enable to init the superio).<br>
<br>
With just superio_probe():<br>
<br>
> /tmp/flashrom_superio# ./flashrom<br>
> flashrom v0.9.1-runknown<br>
> No coreboot table found.<br>
> Found chipset "VIA VT8235", enabling flash write... OK.<br>
> This chipset supports the following protocols: Non-SPI.<br>
> Superio "Winbond W83697HF" detected on 0x2E.<br>
> Calibrating delay loop... OK.<br>
> No EEPROM/flash device found.<br>
> If you know which flash chip you have, and if this version of flashrom<br>
> supports a similar flash chip, you can try to force read your chip. Run:<br>
> flashrom -f -r -c similar_supported_flash_chip filename<br>
><br>
> Note: flashrom can never write when the flash chip isn't found automatically.<br>
<br>
After adding superio_init(), which runs the initialisation code, when a<br>
superio has been identified and when the init callback is there:<br>
<br>
> /tmp/flashrom_superio# ./flashrom<br>
> flashrom v0.9.1-runknown<br>
> No coreboot table found.<br>
> Found chipset "VIA VT8235", enabling flash write... OK.<br>
> This chipset supports the following protocols: Non-SPI.<br>
> Superio "Winbond W83697HF" detected on 0x2E.<br>
> Initialising "Winbond W83697HF" superio<br>
> Calibrating delay loop... OK.<br>
> Found chip "SST SST39SF020A" (256 KB, Parallel) at physical address 0xfffc0000.<br>
> No operations were specified.<br>
<br>
SO with the above comment not there, we are already able to scrap 6 board enables!<br>
<br>
Luc Verhaegen.<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><br>-- <br>David Hendricks (dhendrix)<br>Systems Software Engineer, Google Inc.<br>