Index: hwaccess.c =================================================================== --- hwaccess.c (revision 913) +++ hwaccess.c (working copy) @@ -25,6 +25,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" #if defined(__FreeBSD__) || defined(__DragonFly__) int io_fd; Index: flash.h =================================================================== --- flash.h (revision 913) +++ flash.h (working copy) @@ -27,7 +27,6 @@ #include #include #include -#include "hwaccess.h" #ifdef _WIN32 #include #undef min @@ -250,88 +249,14 @@ extern struct flashchip flashchips[]; -#if INTERNAL_SUPPORT == 1 -struct penable { - uint16_t vendor_id; - uint16_t device_id; - int status; - const char *vendor_name; - const char *device_name; - int (*doit) (struct pci_dev *dev, const char *name); -}; - -extern const struct penable chipset_enables[]; - -struct board_pciid_enable { - /* Any device, but make it sensible, like the ISA bridge. */ - uint16_t first_vendor; - uint16_t first_device; - uint16_t first_card_vendor; - uint16_t first_card_device; - - /* Any device, but make it sensible, like - * the host bridge. May be NULL. - */ - uint16_t second_vendor; - uint16_t second_device; - uint16_t second_card_vendor; - uint16_t second_card_device; - - /* Pattern to match DMI entries */ - const char *dmi_pattern; - - /* The vendor / part name from the coreboot table. */ - const char *lb_vendor; - const char *lb_part; - - const char *vendor_name; - const char *board_name; - - int max_rom_decode_parallel; - int (*enable) (const char *name); -}; - -extern struct board_pciid_enable board_pciid_enables[]; - -struct board_info { - const char *vendor; - const char *name; -}; - -extern const struct board_info boards_ok[]; -extern const struct board_info boards_bad[]; -extern const struct board_info laptops_ok[]; -extern const struct board_info laptops_bad[]; -#endif - /* udelay.c */ void myusec_delay(int usecs); void myusec_calibrate_delay(void); void internal_delay(int usecs); -#if NEED_PCI == 1 -/* pcidev.c */ - -extern uint32_t io_base_addr; -extern struct pci_access *pacc; -extern struct pci_dev *pcidev_dev; -struct pcidev_status { - uint16_t vendor_id; - uint16_t device_id; - int status; - const char *vendor_name; - const char *device_name; -}; -uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs); -uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf); -#endif - /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); -#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) -void print_supported_pcidevs(struct pcidev_status *devs); -#endif void print_supported_wiki(void); /* board_enable.c */ @@ -363,43 +288,6 @@ void dmi_init(void); int dmi_match(const char *pattern); -/* internal.c */ -#if NEED_PCI == 1 -struct superio { - uint16_t vendor; - uint16_t port; - uint16_t model; -}; -extern struct superio superio; -#define SUPERIO_VENDOR_NONE 0x0 -#define SUPERIO_VENDOR_ITE 0x1 -struct pci_dev *pci_dev_find_filter(struct pci_filter filter); -struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device); -#endif -void get_io_perms(void); -void release_io_perms(void); -#if INTERNAL_SUPPORT == 1 -void probe_superio(void); -int internal_init(void); -int internal_shutdown(void); -void internal_chip_writeb(uint8_t val, chipaddr addr); -void internal_chip_writew(uint16_t val, chipaddr addr); -void internal_chip_writel(uint32_t val, chipaddr addr); -uint8_t internal_chip_readb(const chipaddr addr); -uint16_t internal_chip_readw(const chipaddr addr); -uint32_t internal_chip_readl(const chipaddr addr); -void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); -#endif -void mmio_writeb(uint8_t val, void *addr); -void mmio_writew(uint16_t val, void *addr); -void mmio_writel(uint32_t val, void *addr); -uint8_t mmio_readb(void *addr); -uint16_t mmio_readw(void *addr); -uint32_t mmio_readl(void *addr); - /* programmer.c */ int noop_shutdown(void); void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); @@ -437,7 +325,6 @@ int nic3com_shutdown(void); void nic3com_chip_writeb(uint8_t val, chipaddr addr); uint8_t nic3com_chip_readb(const chipaddr addr); -extern struct pcidev_status nics_3com[]; #endif /* gfxnvidia.c */ @@ -446,7 +333,6 @@ int gfxnvidia_shutdown(void); void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr); uint8_t gfxnvidia_chip_readb(const chipaddr addr); -extern struct pcidev_status gfx_nvidia[]; #endif /* drkaiser.c */ @@ -455,7 +341,6 @@ int drkaiser_shutdown(void); void drkaiser_chip_writeb(uint8_t val, chipaddr addr); uint8_t drkaiser_chip_readb(const chipaddr addr); -extern struct pcidev_status drkaiser_pcidev[]; #endif /* satasii.c */ @@ -464,7 +349,6 @@ int satasii_shutdown(void); void satasii_chip_writeb(uint8_t val, chipaddr addr); uint8_t satasii_chip_readb(const chipaddr addr); -extern struct pcidev_status satas_sii[]; #endif /* atahpt.c */ @@ -473,7 +357,6 @@ int atahpt_shutdown(void); void atahpt_chip_writeb(uint8_t val, chipaddr addr); uint8_t atahpt_chip_readb(const chipaddr addr); -extern struct pcidev_status ata_hpt[]; #endif /* ft2232_spi.c */ @@ -681,6 +564,4 @@ int serialport_write(unsigned char *buf, unsigned int writecnt); int serialport_read(unsigned char *buf, unsigned int readcnt); -#include "chipdrivers.h" - #endif /* !__FLASH_H__ */ Index: spi25.c =================================================================== --- spi25.c (revision 913) +++ spi25.c (working copy) @@ -19,165 +19,17 @@ */ /* - * Contains the generic SPI framework + * Contains the common SPI chip driver functions */ #include #include "flash.h" #include "flashchips.h" +#include "chipdrivers.h" #include "spi.h" -enum spi_controller spi_controller = SPI_CONTROLLER_NONE; -void *spibar = NULL; - void spi_prettyprint_status_register(struct flashchip *flash); -const struct spi_programmer spi_programmer[] = { - { /* SPI_CONTROLLER_NONE */ - .command = NULL, - .multicommand = NULL, - .read = NULL, - .write_256 = NULL, - }, - -#if INTERNAL_SUPPORT == 1 - { /* SPI_CONTROLLER_ICH7 */ - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, - }, - - { /* SPI_CONTROLLER_ICH9 */ - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, - }, - - { /* SPI_CONTROLLER_IT87XX */ - .command = it8716f_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = it8716f_spi_chip_read, - .write_256 = it8716f_spi_chip_write_256, - }, - - { /* SPI_CONTROLLER_SB600 */ - .command = sb600_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = sb600_spi_read, - .write_256 = sb600_spi_write_1, - }, - - { /* SPI_CONTROLLER_VIA */ - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = ich_spi_read, - .write_256 = ich_spi_write_256, - }, - - { /* SPI_CONTROLLER_WBSIO */ - .command = wbsio_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = wbsio_spi_read, - .write_256 = wbsio_spi_write_1, - }, -#endif - -#if FT2232_SPI_SUPPORT == 1 - { /* SPI_CONTROLLER_FT2232 */ - .command = ft2232_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = ft2232_spi_read, - .write_256 = ft2232_spi_write_256, - }, -#endif - -#if DUMMY_SUPPORT == 1 - { /* SPI_CONTROLLER_DUMMY */ - .command = dummy_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = NULL, - .write_256 = NULL, - }, -#endif - -#if BUSPIRATE_SPI_SUPPORT == 1 - { /* SPI_CONTROLLER_BUSPIRATE */ - .command = buspirate_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = buspirate_spi_read, - .write_256 = spi_chip_write_1, - }, -#endif - -#if DEDIPROG_SUPPORT == 1 - { /* SPI_CONTROLLER_DEDIPROG */ - .command = dediprog_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = dediprog_spi_read, - .write_256 = spi_chip_write_1, - }, -#endif - - {}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */ -}; - -const int spi_programmer_count = ARRAY_SIZE(spi_programmer); - -int spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) -{ - if (!spi_programmer[spi_controller].command) { - fprintf(stderr, "%s called, but SPI is unsupported on this " - "hardware. Please report a bug.\n", __func__); - return 1; - } - - return spi_programmer[spi_controller].command(writecnt, readcnt, - writearr, readarr); -} - -int spi_send_multicommand(struct spi_command *cmds) -{ - if (!spi_programmer[spi_controller].multicommand) { - fprintf(stderr, "%s called, but SPI is unsupported on this " - "hardware. Please report a bug.\n", __func__); - return 1; - } - - return spi_programmer[spi_controller].multicommand(cmds); -} - -int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, - const unsigned char *writearr, unsigned char *readarr) -{ - struct spi_command cmd[] = { - { - .writecnt = writecnt, - .readcnt = readcnt, - .writearr = writearr, - .readarr = readarr, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - return spi_send_multicommand(cmd); -} - -int default_spi_send_multicommand(struct spi_command *cmds) -{ - int result = 0; - for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) { - result = spi_send_command(cmds->writecnt, cmds->readcnt, - cmds->writearr, cmds->readarr); - } - return result; -} - static int spi_rdid(unsigned char *readarr, int bytes) { const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; @@ -654,7 +506,12 @@ .readarr = NULL, }, { .writecnt = JEDEC_BE_52_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BE_52, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .writearr = (const unsigned char[]){ + JEDEC_BE_52, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff) + }, .readcnt = 0, .readarr = NULL, }, { @@ -698,7 +555,12 @@ .readarr = NULL, }, { .writecnt = JEDEC_BE_D8_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BE_D8, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .writearr = (const unsigned char[]){ + JEDEC_BE_D8, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff) + }, .readcnt = 0, .readarr = NULL, }, { @@ -740,7 +602,12 @@ .readarr = NULL, }, { .writecnt = JEDEC_BE_D7_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BE_D7, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .writearr = (const unsigned char[]){ + JEDEC_BE_D7, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff) + }, .readcnt = 0, .readarr = NULL, }, { @@ -803,7 +670,12 @@ .readarr = NULL, }, { .writecnt = JEDEC_SE_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_SE, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .writearr = (const unsigned char[]){ + JEDEC_SE, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff) + }, .readcnt = 0, .readarr = NULL, }, { @@ -910,7 +782,13 @@ .readarr = NULL, }, { .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BYTE_PROGRAM, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff), databyte }, + .writearr = (const unsigned char[]){ + JEDEC_BYTE_PROGRAM, + (addr >> 16) & 0xff, + (addr >> 8) & 0xff, + (addr & 0xff), + databyte + }, .readcnt = 0, .readarr = NULL, }, { @@ -1045,17 +923,6 @@ return rc; } -int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) -{ - if (!spi_programmer[spi_controller].read) { - fprintf(stderr, "%s called, but SPI read is unsupported on this" - " hardware. Please report a bug.\n", __func__); - return 1; - } - - return spi_programmer[spi_controller].read(flash, buf, start, len); -} - /* * Program chip using byte programming. (SLOW!) * This is for chips which can only handle one byte writes @@ -1086,27 +953,6 @@ return 0; } -/* - * Program chip using page (256 bytes) programming. - * Some SPI masters can't do this, they use single byte programming instead. - */ -int spi_chip_write_256(struct flashchip *flash, uint8_t *buf) -{ - if (!spi_programmer[spi_controller].write_256) { - fprintf(stderr, "%s called, but SPI page write is unsupported " - " on this hardware. Please report a bug.\n", __func__); - return 1; - } - - return spi_programmer[spi_controller].write_256(flash, buf); -} - -uint32_t spi_get_valid_read_addr(void) -{ - /* Need to return BBAR for ICH chipsets. */ - return 0; -} - int spi_aai_write(struct flashchip *flash, uint8_t *buf) { uint32_t pos = 2, size = flash->total_size * 1024; Index: pm49fl00x.c =================================================================== --- pm49fl00x.c (revision 913) +++ pm49fl00x.c (working copy) @@ -21,6 +21,7 @@ */ #include "flash.h" +#include "chipdrivers.h" void write_lockbits_49fl00x(chipaddr bios, int size, unsigned char bits, int block_size) Index: drkaiser.c =================================================================== --- drkaiser.c (revision 913) +++ drkaiser.c (working copy) @@ -22,6 +22,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" #define PCI_VENDOR_ID_DRKAISER 0x1803 Index: hwaccess.h =================================================================== --- hwaccess.h (revision 913) +++ hwaccess.h (working copy) @@ -149,4 +149,141 @@ int freebsd_wrmsr(int addr, msr_t msr); #endif +#if INTERNAL_SUPPORT == 1 +struct penable { + uint16_t vendor_id; + uint16_t device_id; + int status; + const char *vendor_name; + const char *device_name; + int (*doit) (struct pci_dev *dev, const char *name); +}; + +extern const struct penable chipset_enables[]; + +struct board_pciid_enable { + /* Any device, but make it sensible, like the ISA bridge. */ + uint16_t first_vendor; + uint16_t first_device; + uint16_t first_card_vendor; + uint16_t first_card_device; + + /* Any device, but make it sensible, like + * the host bridge. May be NULL. + */ + uint16_t second_vendor; + uint16_t second_device; + uint16_t second_card_vendor; + uint16_t second_card_device; + + /* Pattern to match DMI entries */ + const char *dmi_pattern; + + /* The vendor / part name from the coreboot table. */ + const char *lb_vendor; + const char *lb_part; + + const char *vendor_name; + const char *board_name; + + int max_rom_decode_parallel; + int (*enable) (const char *name); +}; + +extern struct board_pciid_enable board_pciid_enables[]; + +struct board_info { + const char *vendor; + const char *name; +}; + +extern const struct board_info boards_ok[]; +extern const struct board_info boards_bad[]; +extern const struct board_info laptops_ok[]; +extern const struct board_info laptops_bad[]; +#endif + +#if NEED_PCI == 1 +/* pcidev.c */ + +extern uint32_t io_base_addr; +extern struct pci_access *pacc; +extern struct pci_dev *pcidev_dev; +struct pcidev_status { + uint16_t vendor_id; + uint16_t device_id; + int status; + const char *vendor_name; + const char *device_name; +}; +uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, struct pcidev_status *devs); +uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, struct pcidev_status *devs, char *pcidev_bdf); +#endif + +#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) +void print_supported_pcidevs(struct pcidev_status *devs); +#endif + +/* nic3com.c */ +#if NIC3COM_SUPPORT == 1 +extern struct pcidev_status nics_3com[]; +#endif + +/* gfxnvidia.c */ +#if GFXNVIDIA_SUPPORT == 1 +extern struct pcidev_status gfx_nvidia[]; +#endif + +/* drkaiser.c */ +#if DRKAISER_SUPPORT == 1 +extern struct pcidev_status drkaiser_pcidev[]; +#endif + +/* satasii.c */ +#if SATASII_SUPPORT == 1 +extern struct pcidev_status satas_sii[]; +#endif + +/* atahpt.c */ +#if ATAHPT_SUPPORT == 1 +extern struct pcidev_status ata_hpt[]; +#endif + +/* internal.c */ +#if NEED_PCI == 1 +struct superio { + uint16_t vendor; + uint16_t port; + uint16_t model; +}; +extern struct superio superio; +#define SUPERIO_VENDOR_NONE 0x0 +#define SUPERIO_VENDOR_ITE 0x1 +struct pci_dev *pci_dev_find_filter(struct pci_filter filter); +struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); +struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); +struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, + uint16_t card_vendor, uint16_t card_device); +#endif +void get_io_perms(void); +void release_io_perms(void); +#if INTERNAL_SUPPORT == 1 +void probe_superio(void); +int internal_init(void); +int internal_shutdown(void); +void internal_chip_writeb(uint8_t val, chipaddr addr); +void internal_chip_writew(uint16_t val, chipaddr addr); +void internal_chip_writel(uint32_t val, chipaddr addr); +uint8_t internal_chip_readb(const chipaddr addr); +uint16_t internal_chip_readw(const chipaddr addr); +uint32_t internal_chip_readl(const chipaddr addr); +void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); +#endif +void mmio_writeb(uint8_t val, void *addr); +void mmio_writew(uint16_t val, void *addr); +void mmio_writel(uint32_t val, void *addr); +uint8_t mmio_readb(void *addr); +uint16_t mmio_readw(void *addr); +uint32_t mmio_readl(void *addr); + #endif /* !__HWACCESS_H__ */ Index: it87spi.c =================================================================== --- it87spi.c (revision 913) +++ it87spi.c (working copy) @@ -26,7 +26,9 @@ #include #include #include "flash.h" +#include "chipdrivers.h" #include "spi.h" +#include "hwaccess.h" #define ITE_SUPERIO_PORT1 0x2e #define ITE_SUPERIO_PORT2 0x4e Index: buspirate_spi.c =================================================================== --- buspirate_spi.c (revision 913) +++ buspirate_spi.c (working copy) @@ -23,6 +23,7 @@ #include #include #include "flash.h" +#include "chipdrivers.h" #include "spi.h" /* Change this to #define if you want to test without a serial implementation */ Index: jedec.c =================================================================== --- jedec.c (revision 913) +++ jedec.c (working copy) @@ -23,6 +23,7 @@ */ #include "flash.h" +#include "chipdrivers.h" #define MAX_REFLASH_TRIES 0x10 #define MASK_FULL 0xffff Index: pcidev.c =================================================================== --- pcidev.c (revision 913) +++ pcidev.c (working copy) @@ -22,6 +22,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" uint32_t io_base_addr; struct pci_access *pacc; Index: w29ee011.c =================================================================== --- w29ee011.c (revision 913) +++ w29ee011.c (working copy) @@ -20,6 +20,7 @@ #include #include "flash.h" +#include "chipdrivers.h" int probe_w29ee011(struct flashchip *flash) { Index: physmap.c =================================================================== --- physmap.c (revision 913) +++ physmap.c (working copy) @@ -26,6 +26,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" #ifdef __DARWIN__ #include Index: sst49lfxxxc.c =================================================================== --- sst49lfxxxc.c (revision 913) +++ sst49lfxxxc.c (working copy) @@ -22,6 +22,7 @@ #include #include "flash.h" +#include "chipdrivers.h" #define SECTOR_ERASE 0x30 #define BLOCK_ERASE 0x20 Index: flashchips.c =================================================================== --- flashchips.c (revision 913) +++ flashchips.c (working copy) @@ -24,6 +24,7 @@ #include "flash.h" #include "flashchips.h" +#include "chipdrivers.h" /** * List of supported flash chips. Index: sharplhf00l04.c =================================================================== --- sharplhf00l04.c (revision 913) +++ sharplhf00l04.c (working copy) @@ -20,6 +20,7 @@ #include #include "flash.h" +#include "chipdrivers.h" // I need that Berkeley bit-map printer void print_lhf00l04_status(uint8_t status) Index: spi.c =================================================================== --- spi.c (revision 913) +++ spi.c (working copy) @@ -25,6 +25,7 @@ #include #include "flash.h" #include "flashchips.h" +#include "chipdrivers.h" #include "spi.h" enum spi_controller spi_controller = SPI_CONTROLLER_NONE; @@ -178,873 +179,6 @@ return result; } -static int spi_rdid(unsigned char *readarr, int bytes) -{ - const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; - int ret; - int i; - - ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr); - if (ret) - return ret; - printf_debug("RDID returned"); - for (i = 0; i < bytes; i++) - printf_debug(" 0x%02x", readarr[i]); - printf_debug(". "); - return 0; -} - -static int spi_rems(unsigned char *readarr) -{ - unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 }; - uint32_t readaddr; - int ret; - - ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr); - if (ret == SPI_INVALID_ADDRESS) { - /* Find the lowest even address allowed for reads. */ - readaddr = (spi_get_valid_read_addr() + 1) & ~1; - cmd[1] = (readaddr >> 16) & 0xff, - cmd[2] = (readaddr >> 8) & 0xff, - cmd[3] = (readaddr >> 0) & 0xff, - ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr); - } - if (ret) - return ret; - printf_debug("REMS returned %02x %02x. ", readarr[0], readarr[1]); - return 0; -} - -static int spi_res(unsigned char *readarr) -{ - unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 }; - uint32_t readaddr; - int ret; - - ret = spi_send_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr); - if (ret == SPI_INVALID_ADDRESS) { - /* Find the lowest even address allowed for reads. */ - readaddr = (spi_get_valid_read_addr() + 1) & ~1; - cmd[1] = (readaddr >> 16) & 0xff, - cmd[2] = (readaddr >> 8) & 0xff, - cmd[3] = (readaddr >> 0) & 0xff, - ret = spi_send_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr); - } - if (ret) - return ret; - printf_debug("RES returned %02x. ", readarr[0]); - return 0; -} - -int spi_write_enable(void) -{ - const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN }; - int result; - - /* Send WREN (Write Enable) */ - result = spi_send_command(sizeof(cmd), 0, cmd, NULL); - - if (result) - fprintf(stderr, "%s failed\n", __func__); - - return result; -} - -int spi_write_disable(void) -{ - const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI }; - - /* Send WRDI (Write Disable) */ - return spi_send_command(sizeof(cmd), 0, cmd, NULL); -} - -static int probe_spi_rdid_generic(struct flashchip *flash, int bytes) -{ - unsigned char readarr[4]; - uint32_t id1; - uint32_t id2; - - if (spi_rdid(readarr, bytes)) - return 0; - - if (!oddparity(readarr[0])) - printf_debug("RDID byte 0 parity violation. "); - - /* Check if this is a continuation vendor ID */ - if (readarr[0] == 0x7f) { - if (!oddparity(readarr[1])) - printf_debug("RDID byte 1 parity violation. "); - id1 = (readarr[0] << 8) | readarr[1]; - id2 = readarr[2]; - if (bytes > 3) { - id2 <<= 8; - id2 |= readarr[3]; - } - } else { - id1 = readarr[0]; - id2 = (readarr[1] << 8) | readarr[2]; - } - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); - - if (id1 == flash->manufacture_id && id2 == flash->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - - return 1; - } - - /* Test if this is a pure vendor match. */ - if (id1 == flash->manufacture_id && - GENERIC_DEVICE_ID == flash->model_id) - return 1; - - /* Test if there is any vendor ID. */ - if (GENERIC_MANUF_ID == flash->manufacture_id && - id1 != 0xff) - return 1; - - return 0; -} - -int probe_spi_rdid(struct flashchip *flash) -{ - return probe_spi_rdid_generic(flash, 3); -} - -/* support 4 bytes flash ID */ -int probe_spi_rdid4(struct flashchip *flash) -{ - /* only some SPI chipsets support 4 bytes commands */ - switch (spi_controller) { -#if INTERNAL_SUPPORT == 1 - case SPI_CONTROLLER_ICH7: - case SPI_CONTROLLER_ICH9: - case SPI_CONTROLLER_VIA: - case SPI_CONTROLLER_SB600: - case SPI_CONTROLLER_WBSIO: -#endif -#if FT2232_SPI_SUPPORT == 1 - case SPI_CONTROLLER_FT2232: -#endif -#if DUMMY_SUPPORT == 1 - case SPI_CONTROLLER_DUMMY: -#endif -#if BUSPIRATE_SPI_SUPPORT == 1 - case SPI_CONTROLLER_BUSPIRATE: -#endif -#if DEDIPROG_SUPPORT == 1 - case SPI_CONTROLLER_DEDIPROG: -#endif - return probe_spi_rdid_generic(flash, 4); - default: - printf_debug("4b ID not supported on this SPI controller\n"); - } - - return 0; -} - -int probe_spi_rems(struct flashchip *flash) -{ - unsigned char readarr[JEDEC_REMS_INSIZE]; - uint32_t id1, id2; - - if (spi_rems(readarr)) - return 0; - - id1 = readarr[0]; - id2 = readarr[1]; - - printf_debug("%s: id1 0x%x, id2 0x%x\n", __func__, id1, id2); - - if (id1 == flash->manufacture_id && id2 == flash->model_id) { - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - - return 1; - } - - /* Test if this is a pure vendor match. */ - if (id1 == flash->manufacture_id && - GENERIC_DEVICE_ID == flash->model_id) - return 1; - - /* Test if there is any vendor ID. */ - if (GENERIC_MANUF_ID == flash->manufacture_id && - id1 != 0xff) - return 1; - - return 0; -} - -int probe_spi_res(struct flashchip *flash) -{ - unsigned char readarr[3]; - uint32_t id2; - const unsigned char allff[] = {0xff, 0xff, 0xff}; - const unsigned char all00[] = {0x00, 0x00, 0x00}; - - /* Check if RDID is usable and does not return 0xff 0xff 0xff or - * 0x00 0x00 0x00. In that case, RES is pointless. - */ - if (!spi_rdid(readarr, 3) && memcmp(readarr, allff, 3) && - memcmp(readarr, all00, 3)) { - msg_cdbg("Ignoring RES in favour of RDID.\n"); - return 0; - } - /* Check if REMS is usable and does not return 0xff 0xff or - * 0x00 0x00. In that case, RES is pointless. - */ - if (!spi_rems(readarr) && memcmp(readarr, allff, JEDEC_REMS_INSIZE) && - memcmp(readarr, all00, JEDEC_REMS_INSIZE)) { - msg_cdbg("Ignoring RES in favour of REMS.\n"); - return 0; - } - - if (spi_res(readarr)) - return 0; - - /* FIXME: Handle the case where RES gives a 2-byte response. */ - id2 = readarr[0]; - printf_debug("%s: id 0x%x\n", __func__, id2); - if (id2 != flash->model_id) - return 0; - - /* Print the status register to tell the - * user about possible write protection. - */ - spi_prettyprint_status_register(flash); - return 1; -} - -uint8_t spi_read_status_register(void) -{ - const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; - /* FIXME: No workarounds for driver/hardware bugs in generic code. */ - unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */ - int ret; - - /* Read Status Register */ - ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr); - if (ret) - fprintf(stderr, "RDSR failed!\n"); - - return readarr[0]; -} - -/* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_common(uint8_t status) -{ - printf_debug("Chip status register: Bit 5 / Block Protect 3 (BP3) is " - "%sset\n", (status & (1 << 5)) ? "" : "not "); - printf_debug("Chip status register: Bit 4 / Block Protect 2 (BP2) is " - "%sset\n", (status & (1 << 4)) ? "" : "not "); - printf_debug("Chip status register: Bit 3 / Block Protect 1 (BP1) is " - "%sset\n", (status & (1 << 3)) ? "" : "not "); - printf_debug("Chip status register: Bit 2 / Block Protect 0 (BP0) is " - "%sset\n", (status & (1 << 2)) ? "" : "not "); - printf_debug("Chip status register: Write Enable Latch (WEL) is " - "%sset\n", (status & (1 << 1)) ? "" : "not "); - printf_debug("Chip status register: Write In Progress (WIP/BUSY) is " - "%sset\n", (status & (1 << 0)) ? "" : "not "); -} - -/* Prettyprint the status register. Works for - * ST M25P series - * MX MX25L series - */ -void spi_prettyprint_status_register_st_m25p(uint8_t status) -{ - printf_debug("Chip status register: Status Register Write Disable " - "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not "); - printf_debug("Chip status register: Bit 6 is " - "%sset\n", (status & (1 << 6)) ? "" : "not "); - spi_prettyprint_status_register_common(status); -} - -void spi_prettyprint_status_register_sst25(uint8_t status) -{ - printf_debug("Chip status register: Block Protect Write Disable " - "(BPL) is %sset\n", (status & (1 << 7)) ? "" : "not "); - printf_debug("Chip status register: Auto Address Increment Programming " - "(AAI) is %sset\n", (status & (1 << 6)) ? "" : "not "); - spi_prettyprint_status_register_common(status); -} - -/* Prettyprint the status register. Works for - * SST 25VF016 - */ -void spi_prettyprint_status_register_sst25vf016(uint8_t status) -{ - const char *bpt[] = { - "none", - "1F0000H-1FFFFFH", - "1E0000H-1FFFFFH", - "1C0000H-1FFFFFH", - "180000H-1FFFFFH", - "100000H-1FFFFFH", - "all", "all" - }; - spi_prettyprint_status_register_sst25(status); - printf_debug("Resulting block protection : %s\n", - bpt[(status & 0x1c) >> 2]); -} - -void spi_prettyprint_status_register_sst25vf040b(uint8_t status) -{ - const char *bpt[] = { - "none", - "0x70000-0x7ffff", - "0x60000-0x7ffff", - "0x40000-0x7ffff", - "all blocks", "all blocks", "all blocks", "all blocks" - }; - spi_prettyprint_status_register_sst25(status); - printf_debug("Resulting block protection : %s\n", - bpt[(status & 0x1c) >> 2]); -} - -void spi_prettyprint_status_register(struct flashchip *flash) -{ - uint8_t status; - - status = spi_read_status_register(); - printf_debug("Chip status register is %02x\n", status); - switch (flash->manufacture_id) { - case ST_ID: - if (((flash->model_id & 0xff00) == 0x2000) || - ((flash->model_id & 0xff00) == 0x2500)) - spi_prettyprint_status_register_st_m25p(status); - break; - case MX_ID: - if ((flash->model_id & 0xff00) == 0x2000) - spi_prettyprint_status_register_st_m25p(status); - break; - case SST_ID: - switch (flash->model_id) { - case 0x2541: - spi_prettyprint_status_register_sst25vf016(status); - break; - case 0x8d: - case 0x258d: - spi_prettyprint_status_register_sst25vf040b(status); - break; - default: - spi_prettyprint_status_register_sst25(status); - break; - } - break; - } -} - -int spi_chip_erase_60(struct flashchip *flash) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_CE_60_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_CE_60 }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_disable_blockprotect(); - if (result) { - fprintf(stderr, "spi_disable_blockprotect failed\n"); - return result; - } - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 1-85 s, so wait in 1 s steps. - */ - /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(1000 * 1000); - if (check_erased_range(flash, 0, flash->total_size * 1024)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - return 0; -} - -int spi_chip_erase_c7(struct flashchip *flash) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_CE_C7_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_CE_C7 }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_disable_blockprotect(); - if (result) { - fprintf(stderr, "spi_disable_blockprotect failed\n"); - return result; - } - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution\n", __func__); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 1-85 s, so wait in 1 s steps. - */ - /* FIXME: We assume spi_read_status_register will never fail. */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(1000 * 1000); - if (check_erased_range(flash, 0, flash->total_size * 1024)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - return 0; -} - -int spi_chip_erase_60_c7(struct flashchip *flash) -{ - int result; - result = spi_chip_erase_60(flash); - if (result) { - printf_debug("spi_chip_erase_60 failed, trying c7\n"); - result = spi_chip_erase_c7(flash); - } - return result; -} - -int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_52_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BE_52, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(100 * 1000); - if (check_erased_range(flash, addr, blocklen)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - return 0; -} - -/* Block size is usually - * 64k for Macronix - * 32k for SST - * 4-32k non-uniform for EON - */ -int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_D8_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BE_D8, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(100 * 1000); - if (check_erased_range(flash, addr, blocklen)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - return 0; -} - -/* Block size is usually - * 4k for PMC - */ -int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_D7_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BE_D7, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(100 * 1000); - if (check_erased_range(flash, addr, blocklen)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - return 0; -} - -int spi_chip_erase_d8(struct flashchip *flash) -{ - int i, rc = 0; - int total_size = flash->total_size * 1024; - int erase_size = 64 * 1024; - - spi_disable_blockprotect(); - - printf("Erasing chip: \n"); - - for (i = 0; i < total_size / erase_size; i++) { - rc = spi_block_erase_d8(flash, i * erase_size, erase_size); - if (rc) { - fprintf(stderr, "Error erasing block at 0x%x\n", i); - break; - } - } - - printf("\n"); - - return rc; -} - -/* Sector size is usually 4k, though Macronix eliteflash has 64k */ -int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_SE_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_SE, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 15-800 ms, so wait in 10 ms steps. - */ - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(10 * 1000); - if (check_erased_range(flash, addr, blocklen)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - return 0; -} - -int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ - if ((addr != 0) || (blocklen != flash->total_size * 1024)) { - fprintf(stderr, "%s called with incorrect arguments\n", - __func__); - return -1; - } - return spi_chip_erase_60(flash); -} - -int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen) -{ - if ((addr != 0) || (blocklen != flash->total_size * 1024)) { - fprintf(stderr, "%s called with incorrect arguments\n", - __func__); - return -1; - } - return spi_chip_erase_c7(flash); -} - -int spi_write_status_enable(void) -{ - const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; - int result; - - /* Send EWSR (Enable Write Status Register). */ - result = spi_send_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); - - if (result) - fprintf(stderr, "%s failed\n", __func__); - - return result; -} - -/* - * This is according the SST25VF016 datasheet, who knows it is more - * generic that this... - */ -int spi_write_status_register(int status) -{ - int result; - struct spi_command cmds[] = { - { - /* FIXME: WRSR requires either EWSR or WREN depending on chip type. */ - .writecnt = JEDEC_EWSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_EWSR }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_WRSR_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution\n", - __func__); - } - return result; -} - -int spi_byte_program(int addr, uint8_t databyte) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_BYTE_PROGRAM, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff), databyte }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -int spi_nbyte_program(int addr, uint8_t *bytes, int len) -{ - int result; - /* FIXME: Switch to malloc based on len unless that kills speed. */ - unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { - JEDEC_BYTE_PROGRAM, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff, - }; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + len, - .writearr = cmd, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - if (!len) { - fprintf(stderr, "%s called for zero-length write\n", __func__); - return 1; - } - if (len > 256) { - fprintf(stderr, "%s called for too long a write\n", __func__); - return 1; - } - - memcpy(&cmd[4], bytes, len); - - result = spi_send_multicommand(cmds); - if (result) { - fprintf(stderr, "%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -int spi_disable_blockprotect(void) -{ - uint8_t status; - int result; - - status = spi_read_status_register(); - /* If there is block protection in effect, unprotect it first. */ - if ((status & 0x3c) != 0) { - printf_debug("Some block protection in effect, disabling\n"); - result = spi_write_status_register(status & ~0x3c); - if (result) { - fprintf(stderr, "spi_write_status_register failed\n"); - return result; - } - } - return 0; -} - -int spi_nbyte_read(int address, uint8_t *bytes, int len) -{ - const unsigned char cmd[JEDEC_READ_OUTSIZE] = { - JEDEC_READ, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, - }; - - /* Send Read */ - return spi_send_command(sizeof(cmd), len, cmd, bytes); -} - -/* - * Read a complete flash chip. - * Each page is read separately in chunks with a maximum size of chunksize. - */ -int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize) -{ - int rc = 0; - int i, j, starthere, lenhere; - int page_size = flash->page_size; - int toread; - - /* Warning: This loop has a very unusual condition and body. - * The loop needs to go through each page with at least one affected - * byte. The lowest page number is (start / page_size) since that - * division rounds down. The highest page number we want is the page - * where the last byte of the range lives. That last byte has the - * address (start + len - 1), thus the highest page number is - * (start + len - 1) / page_size. Since we want to include that last - * page as well, the loop condition uses <=. - */ - for (i = start / page_size; i <= (start + len - 1) / page_size; i++) { - /* Byte position of the first byte in the range in this page. */ - /* starthere is an offset to the base address of the chip. */ - starthere = max(start, i * page_size); - /* Length of bytes in the range in this page. */ - lenhere = min(start + len, (i + 1) * page_size) - starthere; - for (j = 0; j < lenhere; j += chunksize) { - toread = min(chunksize, lenhere - j); - rc = spi_nbyte_read(starthere + j, buf + starthere - start + j, toread); - if (rc) - break; - } - if (rc) - break; - } - - return rc; -} - int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len) { if (!spi_programmer[spi_controller].read) { @@ -1057,36 +191,6 @@ } /* - * Program chip using byte programming. (SLOW!) - * This is for chips which can only handle one byte writes - * and for chips where memory mapped programming is impossible - * (e.g. due to size constraints in IT87* for over 512 kB) - */ -int spi_chip_write_1(struct flashchip *flash, uint8_t *buf) -{ - int total_size = 1024 * flash->total_size; - int i, result = 0; - - spi_disable_blockprotect(); - /* Erase first */ - printf("Erasing flash before programming... "); - if (erase_flash(flash)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - printf("done.\n"); - for (i = 0; i < total_size; i++) { - result = spi_byte_program(i, buf[i]); - if (result) - return 1; - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(10); - } - - return 0; -} - -/* * Program chip using page (256 bytes) programming. * Some SPI masters can't do this, they use single byte programming instead. */ @@ -1106,41 +210,3 @@ /* Need to return BBAR for ICH chipsets. */ return 0; } - -int spi_aai_write(struct flashchip *flash, uint8_t *buf) -{ - uint32_t pos = 2, size = flash->total_size * 1024; - unsigned char w[6] = {0xad, 0, 0, 0, buf[0], buf[1]}; - int result; - - switch (spi_controller) { -#if INTERNAL_SUPPORT == 1 - case SPI_CONTROLLER_WBSIO: - fprintf(stderr, "%s: impossible with Winbond SPI masters," - " degrading to byte program\n", __func__); - return spi_chip_write_1(flash, buf); -#endif - default: - break; - } - if (erase_flash(flash)) { - fprintf(stderr, "ERASE FAILED!\n"); - return -1; - } - /* FIXME: This will fail on ICH/VIA SPI. */ - result = spi_write_enable(); - if (result) - return result; - spi_send_command(6, 0, w, NULL); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(5); /* SST25VF040B Tbp is max 10us */ - while (pos < size) { - w[1] = buf[pos++]; - w[2] = buf[pos++]; - spi_send_command(3, 0, w, NULL); - while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) - programmer_delay(5); /* SST25VF040B Tbp is max 10us */ - } - spi_write_disable(); - return 0; -} Index: nic3com.c =================================================================== --- nic3com.c (revision 913) +++ nic3com.c (working copy) @@ -22,6 +22,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" #define BIOS_ROM_ADDR 0x04 #define BIOS_ROM_DATA 0x08 Index: Makefile =================================================================== --- Makefile (revision 913) +++ Makefile (working copy) @@ -43,7 +43,7 @@ CHIP_OBJS = jedec.o stm50flw0x0x.o w39v040c.o w39v080fa.o sharplhf00l04.o w29ee011.o \ sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ - sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o + sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o LIB_OBJS = layout.o Index: satasii.c =================================================================== --- satasii.c (revision 913) +++ satasii.c (working copy) @@ -23,6 +23,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" #define PCI_VENDOR_ID_SII 0x1095 Index: wbsio_spi.c =================================================================== --- wbsio_spi.c (revision 913) +++ wbsio_spi.c (working copy) @@ -20,6 +20,8 @@ #include #include "flash.h" +#include "chipdrivers.h" +#include "hwaccess.h" #include "spi.h" #define WBSIO_PORT1 0x2e Index: w39v040c.c =================================================================== --- w39v040c.c (revision 913) +++ w39v040c.c (working copy) @@ -19,6 +19,7 @@ */ #include "flash.h" +#include "chipdrivers.h" int probe_w39v040c(struct flashchip *flash) { Index: sst28sf040.c =================================================================== --- sst28sf040.c (revision 913) +++ sst28sf040.c (working copy) @@ -21,6 +21,7 @@ */ #include "flash.h" +#include "chipdrivers.h" #define AUTO_PG_ERASE1 0x20 #define AUTO_PG_ERASE2 0xD0 Index: stm50flw0x0x.c =================================================================== --- stm50flw0x0x.c (revision 913) +++ stm50flw0x0x.c (working copy) @@ -31,6 +31,7 @@ #include #include "flash.h" #include "flashchips.h" +#include "chipdrivers.h" static void wait_stm50flw0x0x(chipaddr bios) { Index: sst_fwhub.c =================================================================== --- sst_fwhub.c (revision 913) +++ sst_fwhub.c (working copy) @@ -25,6 +25,7 @@ #include #include #include "flash.h" +#include "chipdrivers.h" // I need that Berkeley bit-map printer void print_sst_fwhub_status(uint8_t status) Index: chipset_enable.c =================================================================== --- chipset_enable.c (revision 913) +++ chipset_enable.c (working copy) @@ -33,6 +33,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" extern int ichspi_lock; Index: sb600spi.c =================================================================== --- sb600spi.c (revision 913) +++ sb600spi.c (working copy) @@ -22,6 +22,8 @@ #include #include "flash.h" +#include "chipdrivers.h" +#include "hwaccess.h" #include "spi.h" /* This struct is unused, but helps visualize the SB600 SPI BAR layout. Index: w39v080fa.c =================================================================== --- w39v080fa.c (revision 913) +++ w39v080fa.c (working copy) @@ -19,6 +19,7 @@ */ #include "flash.h" +#include "chipdrivers.h" static int unlock_block_winbond_fwhub(struct flashchip *flash, int offset) { Index: flashrom.c =================================================================== --- flashrom.c (revision 913) +++ flashrom.c (working copy) @@ -29,6 +29,7 @@ #include #include "flash.h" #include "flashchips.h" +#include "hwaccess.h" const char *flashrom_version = FLASHROM_VERSION; char *chip_to_probe = NULL; Index: internal.c =================================================================== --- internal.c (revision 913) +++ internal.c (working copy) @@ -26,6 +26,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" #if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter) Index: ichspi.c =================================================================== --- ichspi.c (revision 913) +++ ichspi.c (working copy) @@ -35,7 +35,9 @@ #include #include "flash.h" +#include "chipdrivers.h" #include "spi.h" +#include "hwaccess.h" /* Change this to #define if you want lowlevel debugging of commands * sent to the ICH/VIA SPI controller. Index: 82802ab.c =================================================================== --- 82802ab.c (revision 913) +++ 82802ab.c (working copy) @@ -29,6 +29,7 @@ #include #include #include "flash.h" +#include "chipdrivers.h" // I need that Berkeley bit-map printer void print_82802ab_status(uint8_t status) Index: m29f400bt.c =================================================================== --- m29f400bt.c (revision 913) +++ m29f400bt.c (working copy) @@ -19,6 +19,7 @@ */ #include "flash.h" +#include "chipdrivers.h" /* WARNING! This chip uses the standard JEDEC Addresses in 16-bit mode as word Index: print.c =================================================================== --- print.c (revision 913) +++ print.c (working copy) @@ -23,6 +23,7 @@ #include #include "flash.h" #include "flashchips.h" +#include "hwaccess.h" /* * Return a string corresponding to the bustype parameter. Index: dediprog.c =================================================================== --- dediprog.c (revision 913) +++ dediprog.c (working copy) @@ -23,6 +23,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" #include "spi.h" #define DEFAULT_TIMEOUT 3000 Index: board_enable.c =================================================================== --- board_enable.c (revision 913) +++ board_enable.c (working copy) @@ -27,6 +27,7 @@ #include #include #include "flash.h" +#include "hwaccess.h" /* * Helper functions for many Winbond Super I/Os of the W836xx range.