2010/7/21 rayer <span dir="ltr"><<a href="mailto:rayer@seznam.cz">rayer@seznam.cz</a>></span><br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
Thanks, I'll try...<br>
Please could you place the dos binary to some stable loacation so i could link it from my web?<br></blockquote><div><br>What exactly is unstable about khepri ? Nothing, if you ask me :)<br>Feel free to link to that download location.<br>
<br>Idwer<br><br></div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
M,<br>
<br>
Idwer Vollering wrote:<br>
<blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
2010/7/21 Carl-Daniel Hailfinger <<a href="mailto:c-d.hailfinger.devel.2006@gmx.net" target="_blank">c-d.hailfinger.devel.2006@gmx.net</a> <mailto:<a href="mailto:c-d.hailfinger.devel.2006@gmx.net" target="_blank">c-d.hailfinger.devel.2006@gmx.net</a>>><div class="im">
<br>
<br>
Speed up RayeR SPIPGM driver in flashrom by a factor of 2.<br>
<br>
Allow specification of an alternate base port with<br>
flashrom -p rayer_spi:lptport=0x278<br>
Any port number is allowed as long as it is nonzero, below 65536 and a<br>
multiple of four.<br>
<br>
Untested, should work.<br>
<br>
Martin, this one should hopefully reach the speed of SPIPGM.exe for<br>
reads. I'll ask Idwer to provide a DOS binary for you.<br>
<br>
<br>
</div><a href="http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/" target="_blank">http://khepri.coresystems.de/~idwer/flashrom/r1093-patchwork-1666/</a> <<a href="http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/" target="_blank">http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/</a>><div class="im">
<br>
<br>
<br>
Signed-off-by: Carl-Daniel Hailfinger<br>
<<a href="mailto:c-d.hailfinger.devel.2006@gmx.net" target="_blank">c-d.hailfinger.devel.2006@gmx.net</a><br></div>
<mailto:<a href="mailto:c-d.hailfinger.devel.2006@gmx.net" target="_blank">c-d.hailfinger.devel.2006@gmx.net</a>>><div><div></div><div class="h5"><br>
<br>
Index: flashrom-bitbang_spi_rayer_faster/flashrom.8<br>
===================================================================<br>
--- flashrom-bitbang_spi_rayer_faster/flashrom.8 (Revision<br>
1093)<br>
+++ flashrom-bitbang_spi_rayer_faster/flashrom.8 (Arbeitskopie)<br>
@@ -394,7 +394,18 @@<br>
(in Hz). The default is the maximum frequency of 8 MHz.<br>
.TP<br>
.BR "rayer_spi " programmer<br>
-No parameters defined yet. More information about the hardware is<br>
available at<br>
+The default I/O base address used for the parallel port is 0x378<br>
and you can use<br>
+the optional<br>
+.B lptport<br>
+parameter to specify an alternate base I/O address with the<br>
+.sp<br>
+.B " flashrom \-p rayer_spi:lptport=portnum"<br>
+.sp<br>
+syntax where<br>
+.B portnum<br>
+is the I/O port number of your parallel port which must be a<br>
multiple of 4.<br>
+.sp<br>
+More information about the hardware is available at<br>
<a href="http://rayer.ic.cz/elektro/spipgm.htm" target="_blank">http://rayer.ic.cz/elektro/spipgm.htm</a><br>
.SH EXIT STATUS<br>
flashrom exits with 0 on success, 1 on most failures but with 2<br>
if /dev/mem<br>
Index: flashrom-bitbang_spi_rayer_faster/rayer_spi.c<br>
===================================================================<br>
--- flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Revision<br>
1093)<br>
+++ flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Arbeitskopie)<br>
@@ -30,6 +30,7 @@<br>
*/<br>
#if defined(__i386__) || defined(__x86_64__)<br>
<br>
+#include <stdlib.h><br>
#include "flash.h"<br>
<br>
/* We have two sets of pins, out and in. The numbers for both<br>
sets are<br>
@@ -42,7 +43,7 @@<br>
/* Pins for slave->master direction */<br>
#define SPI_MISO_PIN 6<br>
<br>
-static int lpt_iobase;<br>
+static uint16_t lpt_iobase;<br>
<br>
/* FIXME: All rayer_bitbang_set_* functions could use caching of<br>
the value<br>
* stored at port lpt_iobase to avoid unnecessary INB. In theory,<br>
only one<br>
@@ -50,37 +51,31 @@<br>
* value.<br>
*/<br>
<br>
-void rayer_bitbang_set_cs(int val)<br>
+/* Cached value of last byte sent. */<br>
+static uint8_t lpt_outval;<br>
+<br>
+static void rayer_bitbang_set_cs(int val)<br>
{<br>
- uint8_t tmp;<br>
-<br>
- tmp = INB(lpt_iobase);<br>
- tmp &= ~(1 << SPI_CS_PIN);<br>
- tmp |= (val << SPI_CS_PIN);<br>
- OUTB(tmp, lpt_iobase);<br>
+ lpt_outval &= ~(1 << SPI_CS_PIN);<br>
+ lpt_outval |= (val << SPI_CS_PIN);<br>
+ OUTB(lpt_outval, lpt_iobase);<br>
}<br>
<br>
-void rayer_bitbang_set_sck(int val)<br>
+static void rayer_bitbang_set_sck(int val)<br>
{<br>
- uint8_t tmp;<br>
-<br>
- tmp = INB(lpt_iobase);<br>
- tmp &= ~(1 << SPI_SCK_PIN);<br>
- tmp |= (val << SPI_SCK_PIN);<br>
- OUTB(tmp, lpt_iobase);<br>
+ lpt_outval &= ~(1 << SPI_SCK_PIN);<br>
+ lpt_outval |= (val << SPI_SCK_PIN);<br>
+ OUTB(lpt_outval, lpt_iobase);<br>
}<br>
<br>
-void rayer_bitbang_set_mosi(int val)<br>
+static void rayer_bitbang_set_mosi(int val)<br>
{<br>
- uint8_t tmp;<br>
-<br>
- tmp = INB(lpt_iobase);<br>
- tmp &= ~(1 << SPI_MOSI_PIN);<br>
- tmp |= (val << SPI_MOSI_PIN);<br>
- OUTB(tmp, lpt_iobase);<br>
+ lpt_outval &= ~(1 << SPI_MOSI_PIN);<br>
+ lpt_outval |= (val << SPI_MOSI_PIN);<br>
+ OUTB(lpt_outval, lpt_iobase);<br>
}<br>
<br>
-int rayer_bitbang_get_miso(void)<br>
+static int rayer_bitbang_get_miso(void)<br>
{<br>
uint8_t tmp;<br>
<br>
@@ -99,16 +94,49 @@<br>
<br>
int rayer_spi_init(void)<br>
{<br>
- /* Pick a default value for now. */<br>
- lpt_iobase = 0x378;<br>
+ char *portpos = NULL;<br>
<br>
+ /* Non-default port requested? */<br>
+ portpos = extract_programmer_param("lptport");<br>
+ if (portpos) {<br>
+ char *endptr = NULL;<br>
+ unsigned long tmp;<br>
+ tmp = strtoul(portpos, &endptr, 0);<br>
+ /* Port 0, port >0x1000, unaligned ports and<br>
garbage strings<br>
+ * are rejected.<br>
+ */<br>
+ if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) ||<br>
+ (*endptr != '\0')) {<br>
+ /* Using ports below 0x100 is a really bad<br>
idea, and<br>
+ * should only be done if no port between<br>
0x100 and<br>
+ * 0xfffc works due to routing issues.<br>
+ */<br>
+ msg_perr("Error: lptport specified, but no<br>
valid "<br>
+ "port specified.\nPort must be a<br>
multiple of "<br>
+ "0x4 and lie between 0x100 and<br>
0xfffc.\n");<br>
+ free(portpos);<br>
+ return 1;<br>
+ } else {<br>
+ lpt_iobase = (uint16_t)tmp;<br>
+ msg_pinfo("Non-default I/O base requested.<br>
This will "<br>
+ "not change the hardware<br>
settings.\n");<br>
+ }<br>
+ } else {<br>
+ /* Pick a default value for the I/O base. */<br>
+ lpt_iobase = 0x378;<br>
+ }<br>
+ free(portpos);<br>
+<br>
msg_pdbg("Using port 0x%x as I/O base for parallel port<br>
access.\n",<br>
lpt_iobase);<br>
<br>
get_io_perms();<br>
<br>
- /* 1 usec halfperiod delay for now. */<br>
- if (bitbang_spi_init(&bitbang_spi_master_rayer, 1))<br>
+ /* Get the initial value before writing to any line. */<br>
+ lpt_outval = INB(lpt_iobase);<br>
+<br>
+ /* Zero halfperiod delay. */<br>
+ if (bitbang_spi_init(&bitbang_spi_master_rayer, 0))<br>
return 1;<br>
<br>
buses_supported = CHIP_BUSTYPE_SPI;<br>
<br>
<br>
--<br>
<a href="http://www.hailfinger.org/" target="_blank">http://www.hailfinger.org/</a><br>
<br>
<br>
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<br>
<br>
</div></blockquote>
<br>
</blockquote></div><br>