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<DIV dir=ltr align=left><SPAN class=081030821-05082010>></SPAN>If only we
could have saved you from doing this twice</DIV>
<DIV dir=ltr align=left><FONT color=#0000ff size=2
face=Arial></FONT> </DIV>
<DIV dir=ltr align=left><SPAN class=081030821-05082010><FONT color=#0000ff
size=2 face=Arial>But why are these chipsets still not
integrated?</FONT></SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=081030821-05082010><FONT color=#0000ff
size=2 face=Arial></FONT></SPAN> </DIV>
<DIV dir=ltr align=left><SPAN class=081030821-05082010>>Do you perchance have
a verbose log of flashrom (flashrom -V) from that chipset ?<BR></SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=081030821-05082010><FONT color=#0000ff
size=2 face=Arial>No, sorry! The only chipset i have here is the QM57. That's
why i have marked that (and only that) as tested.</FONT></SPAN><SPAN
class=081030821-05082010></DIV></SPAN>
<DIV dir=ltr align=left><SPAN class=081030821-05082010><FONT color=#0000ff
size=2 face=Arial></FONT></SPAN> </DIV><BR>
<DIV dir=ltr lang=en-us class=OutlookMessageHeader align=left>
<HR tabIndex=-1>
<FONT size=2 face=Tahoma><B>From:</B> Idwer Vollering [mailto:vidwer@gmail.com]
<BR><B>Sent:</B> Donnerstag, 5. August 2010 20:56<BR><B>To:</B> Wagner, Helge
(GE Intelligent Platforms)<BR><B>Cc:</B>
flashrom@flashrom.org<BR><B>Subject:</B> Re: [flashrom] New Intel
Chipsets<BR></FONT><BR></DIV>
<DIV></DIV>2010/8/5 Wagner, Helge (GE Intelligent Platforms) <SPAN
dir=ltr><<A
href="mailto:Helge.Wagner@ge.com">Helge.Wagner@ge.com</A>></SPAN><BR>
<DIV class=gmail_quote>
<BLOCKQUOTE
style="BORDER-LEFT: rgb(204,204,204) 1px solid; MARGIN: 0pt 0pt 0pt 0.8ex; PADDING-LEFT: 1ex"
class=gmail_quote>I have added support for some new intel
chipsets.<BR></BLOCKQUOTE>
<DIV><BR>If only we could have saved you from doing this twice:<BR><BR><A
href="http://www.flashrom.org/pipermail/flashrom/2010-April/thread.html#2896">http://www.flashrom.org/pipermail/flashrom/2010-April/thread.html#2896</A><BR><A
href="http://patchwork.coreboot.org/patch/1208/">http://patchwork.coreboot.org/patch/1208/</A><BR> <BR></DIV>
<BLOCKQUOTE
style="BORDER-LEFT: rgb(204,204,204) 1px solid; MARGIN: 0pt 0pt 0pt 0.8ex; PADDING-LEFT: 1ex"
class=gmail_quote><BR>(At least) for the QM57 which i have tested an
additional patch was<BR>needed as some reserved bits in the "Software
Sequencing Flash Control<BR>Register" (SSFC) needs to be programmed to 1 in
the QM57.<BR></BLOCKQUOTE>
<BLOCKQUOTE
style="BORDER-LEFT: rgb(204,204,204) 1px solid; MARGIN: 0pt 0pt 0pt 0.8ex; PADDING-LEFT: 1ex"
class=gmail_quote><BR>Signed-off-by: Helge Wagner <<A
href="mailto:helge.wagner@ge.com">helge.wagner@ge.com</A>><BR></BLOCKQUOTE>
<BLOCKQUOTE
style="BORDER-LEFT: rgb(204,204,204) 1px solid; MARGIN: 0pt 0pt 0pt 0.8ex; PADDING-LEFT: 1ex"
class=gmail_quote><BR>diff -urN flashrom-0.9.2/chipset_enable.c
flashrom/chipset_enable.c<BR>--- flashrom-0.9.2/chipset_enable.c
2010-08-01 01:16:09.000000000<BR>+0200<BR>+++ flashrom/chipset_enable.c
2010-08-05 13:28:29.000000000 +0200<BR>@@ -1011,7 +1011,21 @@<BR>
{0x1166, 0x0205, OK, "Broadcom",
"HT-1000",<BR>enable_flash_ht1000},<BR> {0x8086,
0x3b00, NT, "Intel", "3400 Desktop",<BR>enable_flash_ich10},<BR>
{0x8086, 0x3b01, NT, "Intel", "3400
Mobile",<BR>enable_flash_ich10},<BR>+ {0x8086, 0x3b02,
NT, "Intel", "P55",<BR>enable_flash_ich10},<BR>+ {0x8086,
0x3b03, NT, "Intel", "PM55",<BR>enable_flash_ich10},<BR>+
{0x8086, 0x3b06, NT, "Intel", "H55",<BR>enable_flash_ich10},<BR>+
{0x8086, 0x3b07, OK, "Intel",
"QM57",<BR>enable_flash_ich10},<BR>+ {0x8086, 0x3b08, NT,
"Intel", "H57",<BR>enable_flash_ich10},<BR>+ {0x8086,
0x3b09, NT, "Intel", "HM55",<BR>enable_flash_ich10},<BR>+
{0x8086, 0x3b0a, NT, "Intel", "Q57",<BR>enable_flash_ich10},<BR>+
{0x8086, 0x3b0b, NT, "Intel",
"HM57",<BR>enable_flash_ich10},<BR> {0x8086, 0x3b0d,
NT, "Intel", "3400 Mobile SFF",<BR>enable_flash_ich10},<BR>+
{0x8086, 0x3b0e, NT, "Intel",
"B55",<BR>enable_flash_ich10},<BR></BLOCKQUOTE>
<DIV><BR>See below<BR> <BR></DIV>
<DIV></DIV>
<BLOCKQUOTE
style="BORDER-LEFT: rgb(204,204,204) 1px solid; MARGIN: 0pt 0pt 0pt 0.8ex; PADDING-LEFT: 1ex"
class=gmail_quote>+ {0x8086, 0x3b0f, NT, "Intel",
"QS57",<BR>enable_flash_ich10},<BR>+ {0x8086, 0x3b12, NT,
"Intel", "3400",<BR>enable_flash_ich10},<BR>+ {0x8086,
0x3b14, NT, "Intel", "3420",<BR>enable_flash_ich10},<BR>+
{0x8086, 0x3b16, NT, "Intel", "3450",<BR>enable_flash_ich10},<BR>+
{0x8086, 0x3b1e, NT, "Intel",
"B55",<BR>enable_flash_ich10},<BR></BLOCKQUOTE>
<DIV><BR>Thanks for finding/adding "B55": the friendly name for this chipset is
empty in forementioned patch (see patchwork).<BR>Do you perchance have a verbose
log of flashrom (flashrom -V) from that chipset ?<BR><BR></DIV>
<BLOCKQUOTE
style="BORDER-LEFT: rgb(204,204,204) 1px solid; MARGIN: 0pt 0pt 0pt 0.8ex; PADDING-LEFT: 1ex"
class=gmail_quote> {0x8086, 0x7198, OK, "Intel",
"440MX",<BR>enable_flash_piix4},<BR> {0x8086,
0x25a1, OK, "Intel", "6300ESB",<BR>enable_flash_ich_4e},<BR>
{0x8086, 0x2670, OK, "Intel",
"631xESB/632xESB/3100",<BR>enable_flash_ich_dc},<BR>diff -urN
flashrom-0.9.2/ichspi.c flashrom/ichspi.c<BR>--- flashrom-0.9.2/ichspi.c
2010-07-28 00:41:39.000000000 +0200<BR>+++ flashrom/ichspi.c
2010-08-05 13:30:32.000000000 +0200<BR>@@ -560,7 +560,9 @@<BR>
}<BR><BR> /* Assemble SSFS +
SSFC */<BR>- temp32 = 0;<BR>+ /*
keep reserved bits (23-19,7,0) */<BR>+ temp32 =
REGREAD32(ICH9_REG_SSFS);<BR>+ temp32 &=
0xF8008100;<BR><BR> /* clear error status registers
*/<BR> temp32 |= (SSFS_CDS +
SSFS_FCERR);<BR><BR><BR><BR>_______________________________________________<BR>flashrom
mailing list<BR><A
href="mailto:flashrom@flashrom.org">flashrom@flashrom.org</A><BR><A
href="http://www.flashrom.org/mailman/listinfo/flashrom"
target=_blank>http://www.flashrom.org/mailman/listinfo/flashrom</A><BR></BLOCKQUOTE></DIV><BR></BODY></HTML>