2010/10/27 Carl-Daniel Hailfinger <span dir="ltr"><<a href="mailto:c-d.hailfinger.devel.2006@gmx.net">c-d.hailfinger.devel.2006@gmx.net</a>></span><br><div class="gmail_quote"><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
Fix internal offset calculations for SPI BYTE PROGRAM and SPI AAI PROGRAM.<br>
The bug was invisible so far because we always started at offset 0. The<br>
pending partial write patch uses nonzero start offsets and trips over<br>
this bug.<br>
<br>
Clarify a few comments in IT87 SPI.<br>
<br>
Thanks to Idwer Vollering for reporting write breakage with my latest<br>
partial write patch. This patch should fix the underlying problem.<br></blockquote><div><br>With this patch applied: <a href="http://patchwork.coreboot.org/patch/2160/">http://patchwork.coreboot.org/patch/2160/</a><br><br>
<pre>$ sudo ./flashrom -p nicintel_spi -V -w nicintel_spi.rom -c M25P10.RES<br>flashrom v0.9.3-r1215 on FreeBSD 8.1-RELEASE (i386), built with libpci 3.1.7, GCC 4.2.1 20070719 [FreeBSD], little endian<br>flashrom is free software, get the source code at <a href="http://www.flashrom.org">http://www.flashrom.org</a><br>
<br>Calibrating delay loop... OS timer resolution is 1 usecs, 1685M loops per second, delay more than 10% too short (got 85% of expected delay), recalculating... 1929M loops per second, 10 myus = 11 us, 100 myus = 115 us, 1000 myus = 1280 us, 10000 myus = 22197 us, 4 myus = 10 us, OK.<br>
Initializing nicintel_spi programmer<br>Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0).<br>Requested BAR is MEM, 32bit, not prefetchable<br>Probing for ST M25P10.RES, 128 KB: probe_spi_res1: id 0x10<br>
Chip status register is 00<br>Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000.<br>===<br>This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE<br>The test status of this chip may have been updated in the latest development<br>
version of flashrom. If you are running the latest development version,<br>please email a report to <a href="mailto:flashrom@flashrom.org">flashrom@flashrom.org</a> if any of the above operations<br>work correctly for you with this flash part. Please include the flashrom<br>
output with the additional -V option for all operations you tested (-V, -Vr,<br>-Vw, -VE), and mention which mainboard or programmer you tested.<br>Please mention your board in the subject line. Thanks for your help!<br>Reading old flash chip contents...<br>
Erasing and writing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x007fff:W, 0x008000-0x00ffff:W, 0x010000-0x017fff:W, 0x018000-0x01ffff:S<br><br>Done.<br>Verifying flash... VERIFY FAILED at 0x00008000! Expected=0xc6, Read=0x15, failed byte count from 0x00000000-0x0001ffff: 0x8d75<br>
Your flash chip is in an unknown state.<br>Get help on IRC at <a href="http://irc.freenode.net">irc.freenode.net</a> (channel #flashrom) or<br>mail <a href="mailto:flashrom@flashrom.org">flashrom@flashrom.org</a> with FAILED: your board name in the subject line!<br>
-------------------------------------------------------------------------------<br>DO NOT REBOOT OR POWEROFF!</pre> </div><div>With <a href="http://patchwork.coreboot.org/patch/2188/">http://patchwork.coreboot.org/patch/2188/</a><br>
<br>$ sudo ./flashrom -p nicintel_spi -V -w nicintel_spi.rom -c M25P10.RES<br>flashrom v0.9.3-r1216 on FreeBSD 8.1-RELEASE (i386), built with libpci 3.1.7, GCC 4.2.1 20070719 [FreeBSD], little endian<br>flashrom is free software, get the source code at <a href="http://www.flashrom.org">http://www.flashrom.org</a><br>
<br>Calibrating delay loop... OS timer resolution is 5 usecs, 1814M loops per second, 10 myus = 11 us, 100 myus = 106 us, 1000 myus = 925 us, 10000 myus = 8902 us, 20 myus = 38 us, OK.<br>Initializing nicintel_spi programmer<br>
Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0).<br>Requested BAR is MEM, 32bit, not prefetchable<br>Probing for ST M25P10.RES, 128 KB: probe_spi_res1: id 0x10<br>Chip status register is 00<br>
Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000.<br>===<br>This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE<br>The test status of this chip may have been updated in the latest development<br>
version of flashrom. If you are running the latest development version,<br>please email a report to <a href="mailto:flashrom@flashrom.org">flashrom@flashrom.org</a> if any of the above operations<br>work correctly for you with this flash part. Please include the flashrom<br>
output with the additional -V option for all operations you tested (-V, -Vr,<br>-Vw, -VE), and mention which mainboard or programmer you tested.<br>Please mention your board in the subject line. Thanks for your help!<br>Reading old flash chip contents...<br>
Erasing and writing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x007fff:W, 0x008000-0x00ffff:W, 0x010000-0x017fff:W, 0x018000-0x01ffff:S<br><br>Done.<br>Verifying flash... VERIFIED.<br> </div>
<blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
<br>
Signed-off-by: Carl-Daniel Hailfinger <<a href="mailto:c-d.hailfinger.devel.2006@gmx.net">c-d.hailfinger.devel.2006@gmx.net</a>><br></blockquote><div><br>Acked-by: Idwer Vollering <<a href="mailto:vidwer@gmail.com">vidwer@gmail.com</a>><br>
<br></div><blockquote class="gmail_quote" style="margin: 0pt 0pt 0pt 0.8ex; border-left: 1px solid rgb(204, 204, 204); padding-left: 1ex;">
<br>
Index: flashrom-partial_write_spi_fix_offset_calc/it87spi.c<br>
===================================================================<br>
--- flashrom-partial_write_spi_fix_offset_calc/it87spi.c (Revision 1216)<br>
+++ flashrom-partial_write_spi_fix_offset_calc/it87spi.c (Arbeitskopie)<br>
@@ -339,7 +339,10 @@<br>
{<br>
/*<br>
* IT8716F only allows maximum of 512 kb SPI chip size for memory<br>
- * mapped access. It also can't write more than 1+3+256 bytes at once.<br>
+ * mapped access. It also can't write more than 1+3+256 bytes at once,<br>
+ * so page_size > 256 bytes needs a fallback.<br>
+ * FIXME: Split too big page writes into chunks IT87* can handle instead<br>
+ * of degrading to single-byte program.<br>
*/<br>
if ((programmer == PROGRAMMER_IT87SPI) ||<br>
(flash->total_size * 1024 > 512 * 1024) ||<br>
@@ -349,9 +352,8 @@<br>
int lenhere;<br>
<br>
if (start % flash->page_size) {<br>
- /* start to the end of the page or start + len,<br>
- * whichever is smaller. Page length is hardcoded to<br>
- * 256 bytes (IT87 SPI hardware limitation).<br>
+ /* start to the end of the page or to start + len,<br>
+ * whichever is smaller.<br>
*/<br>
lenhere = min(len, flash->page_size - start % flash->page_size);<br>
spi_chip_write_1(flash, buf, start, lenhere);<br>
@@ -360,7 +362,6 @@<br>
buf += lenhere;<br>
}<br>
<br>
- /* FIXME: Handle chips which have max writechunk size >1 and <256. */<br>
while (len >= flash->page_size) {<br>
it8716f_spi_page_program(flash, buf, start);<br>
start += flash->page_size;<br>
Index: flashrom-partial_write_spi_fix_offset_calc/spi25.c<br>
===================================================================<br>
--- flashrom-partial_write_spi_fix_offset_calc/spi25.c (Revision 1216)<br>
+++ flashrom-partial_write_spi_fix_offset_calc/spi25.c (Arbeitskopie)<br>
@@ -1309,7 +1309,7 @@<br>
int i, result = 0;<br>
<br>
for (i = start; i < start + len; i++) {<br>
- result = spi_byte_program(i, buf[i]);<br>
+ result = spi_byte_program(i, buf[i - start]);<br>
if (result)<br>
return 1;<br>
while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)<br>
@@ -1377,6 +1377,14 @@<br>
if (spi_chip_write_1(flash, buf, start, start % 2))<br>
return SPI_GENERIC_ERROR;<br>
pos += start % 2;<br>
+ cmds[1].writearr = (const unsigned char[]){<br>
+ JEDEC_AAI_WORD_PROGRAM,<br>
+ (pos >> 16) & 0xff,<br>
+ (pos >> 8) & 0xff,<br>
+ (pos & 0xff),<br>
+ buf[pos - start],<br>
+ buf[pos - start + 1]<br>
+ };<br>
/* Do not return an error for now. */<br>
//return SPI_GENERIC_ERROR;<br>
}<br>
@@ -1406,8 +1414,8 @@<br>
<br>
/* Are there at least two more bytes to write? */<br>
while (pos < start + len - 1) {<br>
- cmd[1] = buf[pos++];<br>
- cmd[2] = buf[pos++];<br>
+ cmd[1] = buf[pos++ - start];<br>
+ cmd[2] = buf[pos++ - start];<br>
spi_send_command(JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL);<br>
while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)<br>
programmer_delay(10);<br>
@@ -1420,7 +1428,7 @@<br>
<br>
/* Write remaining byte (if any). */<br>
if (pos < start + len) {<br>
- if (spi_chip_write_1(flash, buf + pos, pos, pos % 2))<br>
+ if (spi_chip_write_1(flash, buf + pos - start, pos, pos % 2))<br>
return SPI_GENERIC_ERROR;<br>
pos += pos % 2;<br>
}<br>
<font color="#888888"><br>
<br>
--<br>
<a href="http://www.hailfinger.org/" target="_blank">http://www.hailfinger.org/</a><br>
<br>
<br>
_______________________________________________<br>
flashrom mailing list<br>
<a href="mailto:flashrom@flashrom.org">flashrom@flashrom.org</a><br>
<a href="http://www.flashrom.org/mailman/listinfo/flashrom" target="_blank">http://www.flashrom.org/mailman/listinfo/flashrom</a><br>
</font></blockquote></div><br>