Lenovo n200 flash enable BAR table: PMBASE 00:1f.0[0x40] GPIOBASE 00:1f.0[0x48] EC_IO 0xff2c Port definition table: PM1_CNT PMBASE + 0x04 (Power Management 1 Control, 4 bytes) SCI_EN (1 << 0) (SCI Enable) SMI_EN PMBASE + 0x30 (SMI Control and Enable, 4 bytes) GBL_SMI_EN (1 << 0) GP_IO_SEL GPIOBASE + 0x04 (GPIO Input/Output Select, 4 bytes) GP_LVL GPIOBASE + 0x0C (GPIO Level for Input or Output, 4 bytes) EC_IDX_H EC_IO + 1 (EC Indexed IO High Address, 1 byte) EC_IDX_L EC_IO + 2 (EC Indexed IO Low Address, 1 byte) EC_IDX_DATA EC_IO + 3 (EC Indexed IO Data, 1 byte) PCI register table: GEN2_DEC 00:1f.0[0x88] (LPC I/F Generic Decode Range 2, 4 bytes) GEN2_EN (1 << 0) (Generic Decode Range 2 Enable) BIOS_CNTL 00:1f.0[0xdc] (BIOS Control, 1 byte) BIOSWE (1 << 0) (BIOS Write Enable) EC register table: PXCFG 0xff14 (EC 8051 On-Chip Control) PC_CNTL (1 << 0) (When bit is set, EC is held in reset w/PC=0) EC KBC indices: SYS_ST_NOTIF 0x59 (System State Notification) EC KBC commands: DIS_FAN_FULL_ON 0x77 (Disable Fan Speed Full On) ENTER_FLASH 0xf2 (Enter Flash Mode) EC command procedure: 1. Loop: 1a. Read 0x64 1b. If bit 0 is clear, break 1c. Read 0x60 2. Loop: 2a. Read 0x64 2b. If bit 1 is clear, break 3. Write desired EC KBD index to 0x64 3a. Perform the loop in step 2 4. Write desired EC KBD command to 0x60 4a. Perform the loop in step 2 EC indexed IO read: 1. Write the low byte of the desired EC IO space to EC_IDX_L 2. Write the high byte of the desired EC IO space to EC_IDX_H 3. Read from EC_IDX_DATA EC indexed IO write: 1. Write the low byte of the desired EC IO space to EC_IDX_L 2. Write the high byte of the desired EC IO space to EC_IDX_H 3. Write the desired data to EC_IDX_DATA Board enable procedure: 1. BIOS_CNTL |= BIOSWE 2. Allow IO access to EC_IO 2a. GEN2_DEC[0,1] = EC_IO 2b. GEN2_DEC |= GEN2_EN 3. [check bit 0 (SCI_EN) in port PM1_CNT] 3a. If if is set, skip to step 5 4. [twiddle USB bits] 5. Send an EC command with index SYS_ST_NOTIF and command DIS_FAN_FULL_ON 6. Send an EC command with index SYS_ST_NOTIF and command ENTER_FLASH 7. Loop: 7a. Read the EC indexed IO data from 0xf554 (EC_XRAM + 0x0154) 7b. If the data is equal to 0xa5, break 8. PXCFG |= PC_CNTL (via EC indexed IO) 9. Lower ICH GPIO24 9a. SMI_EN &= ~(GBL_SMI_EN) 9b. GP_IO_SEL[3] &= 0xfe 9c. GP_LVL[3] &= 0xfe 10. Raise or lower ICH GPIO27 depending on a configuration parameter 10a. GP_LVL[3] |= 0x08 10b. If $FOO: GP_LVL[3] &= 0xf7