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<div class="moz-cite-prefix"> Hello David,<br>
<br>
We have same issue, here.<br>
We used some tool, from Intel, to change the layout of Region 0,
and now, it comes to 0x001FFFFF.<br>
With this, all works.<br>
<br>
Another solution, highlighted by Stefan, is to use --layout
option. We did not try it yet, though, but<br>
it would work with only read or write (I do not remember).<br>
<br>
Stephan.<br>
<br>
Le 16/01/2015 07:41, David Mirabito a écrit :<br>
</div>
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cite="mid:CACJTkKG_9Uzkq=ukM6x23hhF16rGRS+ACtfUxG6F_dsK9capwA@mail.gmail.com"
type="cite">
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<div>Hello,</div>
<div><br>
</div>
<div>We have a Rangely-based board and would strongly prefer to
be able to update the bios via flashrom, and I'm coming across
two issues here:</div>
<div><br>
</div>
<div>Attached is the output from </div>
<div>'./flashrom --programmer
internal:laptop=this_is_not_a_laptop -o vanilla.log -VV'</div>
<div><br>
</div>
<div>1) Note the descriptor table:</div>
<div>
<div>--- Details ---</div>
<div>Region 0 (Descr.) 0x00000000 - 0x0000ffff</div>
<div>Region 1 (BIOS ) 0x00200000 - 0x007fffff</div>
<div>Region 2 (ME ) is unused.</div>
<div>Region 3 (GbE ) is unused.</div>
<div>Region 4 (Platf.) is unused.</div>
</div>
<div><br>
</div>
<div>The gap between Regions 0 and 1 appears unreadable, and I
get transaction failures at 0x00010000. Modifying flashrom to
only dump the final 6MB works as expected.</div>
<div><br>
</div>
<div>2) Given the above modifications (which ideally I'll roll
properly into the layout file infrastructure) I am still
having trouble writing to Region 1.</div>
<div><br>
</div>
<div>After making sure that nothing is attempting to read or
write outside the required range, the write transaction still
fails at the first access (see fail.log):</div>
<div><br>
</div>
<div>
<div>ETransaction error!</div>
<div>SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0</div>
<div>SSFC: SCGO=0, ACS=1, SPOP=0, COP=2, DBC=0, SME=0, SCF=0</div>
<div>Running OPCODE 0x20 failed at address 0x400000 (payload
length was 0).</div>
<div>spi_block_erase_20 failed during command execution at
address 0x400000</div>
</div>
<div><br>
</div>
<div>(interestingly, last time I tried this I had the same error
at 0x200000)</div>
<div><br>
</div>
<div>It appears to me that it should be writiable, is this not
the case?</div>
<div><br>
</div>
<div>-----</div>
<div><br>
</div>
<div>Thanks for any input! Additionally we may have some input
with the BIOS vendor (and ability to write via JTAG or
EFIshell), so if there's anything specific we might ask for as
far as leaving chipset registers in a certain state, then this
may be a posisbility if it comes to that.</div>
<div><br>
</div>
<div>Cheers,</div>
<div>DavidM</div>
<div>
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<pre wrap="">_______________________________________________
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