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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p><b><span style='font-size:9.0pt;font-family:"Trebuchet MS","sans-serif";color:#AAAAAA'>Dell - Internal Use - Confidential </span></b><o:p></o:p></p><p class=MsoNormal>Hello,<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Thanks for your help in this matter. I’m following up with the latest.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The board has actual part Spansion S25FL128SAGNFI003<o:p></o:p></p><p class=MsoNormal>The flashrom message says:<o:p></o:p></p><p class=MsoNormal>> Multiple flash chip definitions match the detected chip(s): "S25FL127S-64kB", "S25FL127S-256kB", "S25FL128P......0", "S25FL128P......1", "S25FL128S......0", "S25FL128S......1", "S25FL129P......0", "S25FL129P......1"<br>> Please specify which chip definition to use with the -c option.<br><br><o:p></o:p></p><p class=MsoNormal>I choose options starting with “S25FL128S” which only leaves "S25FL128S......0", "S25FL128S......1”<o:p></o:p></p><p class=MsoNormal>I have tried with the following commands, but read still fails, see output below.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Also, in the output I see instruction to add:<o:p></o:p></p><p class=MsoNormal style='text-indent:.5in'>-p internal:laptop=this_is_not_a_laptop<o:p></o:p></p><p class=MsoNormal>and<o:p></o:p></p><p class=MsoNormal> -p internal:ich_spi_force=yes<o:p></o:p></p><p class=MsoNormal>Assuming we get to the write stage, can these be chained together, e.g.:<o:p></o:p></p><p class=MsoNormal> -p internal:laptop=this_is_not_a_laptop:ich_spi_force=yes<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><b>READ Commands that failed, with logs:<o:p></o:p></b></p><p class=MsoNormal><b><span style='font-size:12.0pt'># ./flashrom.0.9.8 -p internal:laptop=this_is_not_a_laptop -c S25FL128S......0 -r curr<o:p></o:p></span></b></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>flashrom v0.9.8-rc1-r1883 on Linux 3.14.0-rc8 (x86_64)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>flashrom is free software, get the source code at http://www.flashrom.org<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'><o:p> </o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Calibrating delay loop... OK.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>========================================================================<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>WARNING! You may be running flashrom on an unsupported laptop. We could<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>not detect this for sure because your vendor has not setup the SMBIOS<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>tables correctly. You can enforce execution by adding<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>'-p internal:laptop=this_is_not_a_laptop' to the command line, but<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>please read the following warning if you are not sure.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'><o:p> </o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Laptops, notebooks and netbooks are difficult to support and we<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>recommend to use the vendor flashing utility. The embedded controller<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>(EC) in these machines often interacts badly with flashing.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>See the manpage and http://www.flashrom.org/Laptops for details.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'><o:p> </o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>If flash is shared with the EC, erase is guaranteed to brick your laptop<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>and write may brick your laptop.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Read and probe may irritate your EC and cause fan failure, backlight<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>failure and sudden poweroff.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>You have been warned.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>========================================================================<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Proceeding anyway because user forced us to.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Found chipset "Intel Avoton/Rangeley".<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>This chipset is marked as untested. If you are using an up-to-date version<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>of flashrom *and* were (not) able to successfully update your firmware with it,<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>then please email a report to flashrom@flashrom.org including a verbose (-V) log.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Thank you!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Enabling flash write... Warning: SPI Configuration Lockdown activated.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>FREG0: Warning: Flash Descriptor region (0x00000000-0x0000ffff) is read-only.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Not all flash regions are freely accessible by flashrom. This is most likely<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>due to an active ME. Please see http://flashrom.org/ME for details.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Writes have been disabled for safety reasons. You can enforce write<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>support with the ich_spi_force programmer option, but you will most likely<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>harm your hardware! If you force flashrom you will get no support if<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>something breaks. On a few mainboards it is possible to enable write<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>access by setting a jumper (see its documentation or the board itself).<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>OK.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Found Spansion flash chip "S25FL128S......0" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>===<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>The test status of this chip may have been updated in the latest development<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>version of flashrom. If you are running the latest development version,<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>please email a report to flashrom@flashrom.org if any of the above operations<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>work correctly for you with this flash chip. Please include the flashrom log<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>file for all operations you tested (see the man page for details), and mention<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>which mainboard or programmer you tested in the subject line.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Thanks for your help!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Reading flash... Transaction error!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>Read operation failed!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:10.0pt'>FAILED.<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal><b><span style='font-size:12.0pt'># ./flashrom.0.9.8 -p internal:laptop=this_is_not_a_laptop -c S25FL128S......1 –Vr curr<o:p></o:p></span></b></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>flashrom v0.9.8-rc1-r1883 on Linux 3.14.0-rc8 (x86_64)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>flashrom is free software, get the source code at http://www.flashrom.org<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'><o:p> </o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>flashrom was built with libpci 3.2.1, GCC 4.8.2, little endian<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Command line (6 args): ./flashrom.0.9.8 -p internal:laptop=this_is_not_a_laptop -c S25FL128S......1 -Vr curr<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Calibrating delay loop... OS timer resolution is 2 usecs, 799M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1000 us, 10000 myus = 10014 us, 8 myus = 9 us, OK.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Initializing internal programmer<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>No coreboot table found.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Using Internal DMI decoder.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>DMI chassis-type is not specific enough.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>DMI string system-manufacturer: "To be filled by O.E.M."<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>DMI string system-product-name: "To be filled by O.E.M."<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>DMI string system-version: "To be filled by O.E.M."<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>DMI string baseboard-manufacturer: "To be filled by O.E.M."<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>DMI string baseboard-product-name: "To be filled by O.E.M."<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>DMI string baseboard-version: "To be filled by O.E.M."<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>========================================================================<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>WARNING! You may be running flashrom on an unsupported laptop. We could<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>not detect this for sure because your vendor has not setup the SMBIOS<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>tables correctly. You can enforce execution by adding<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>'-p internal:laptop=this_is_not_a_laptop' to the command line, but<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>please read the following warning if you are not sure.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'><o:p> </o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Laptops, notebooks and netbooks are difficult to support and we<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>recommend to use the vendor flashing utility. The embedded controller<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>(EC) in these machines often interacts badly with flashing.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>See the manpage and http://www.flashrom.org/Laptops for details.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'><o:p> </o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>If flash is shared with the EC, erase is guaranteed to brick your laptop<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>and write may brick your laptop.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Read and probe may irritate your EC and cause fan failure, backlight<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>failure and sudden poweroff.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>You have been warned.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>========================================================================<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Proceeding anyway because user forced us to.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Found chipset "Intel Avoton/Rangeley" with PCI ID 8086:1f38.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>This chipset is marked as untested. If you are using an up-to-date version<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>of flashrom *and* were (not) able to successfully update your firmware with it,<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>then please email a report to flashrom@flashrom.org including a verbose (-V) log.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Thank you!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Enabling flash write... Root Complex Register Block address = 0xfed1c000<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>GCS = 0x40000c01: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Top Swap: not enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xfff80000/0xffb80000 FWH IDSEL: 0x0<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xfff00000/0xffb00000 FWH IDSEL: 0x0<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffe80000/0xffa80000 FWH IDSEL: 0x1<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffe00000/0xffa00000 FWH IDSEL: 0x1<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffd80000/0xff980000 FWH IDSEL: 0x2<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffd00000/0xff900000 FWH IDSEL: 0x2<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffc80000/0xff880000 FWH IDSEL: 0x3<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffc00000/0xff800000 FWH IDSEL: 0x3<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xfff80000/0xffb80000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xfff00000/0xffb00000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffe80000/0xffa80000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffe00000/0xffa00000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffd80000/0xff980000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffd00000/0xff900000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffc80000/0xff880000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xffc00000/0xff800000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xff700000/0xff300000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xff600000/0xff200000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xff500000/0xff100000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xff400000/0xff000000 FWH decode enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Maximum FWH chip size: 0x100000 bytes<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>SPI_BASE_ADDRESS = 0xfed01000<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>SPI Read Configuration: prefetching disabled, caching enabled,<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x04: 0xe01c (HSFS)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>HSFS: FDONE=0, FCERR=0, AEL=1, BERASE=3, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Warning: SPI Configuration Lockdown activated.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Reading OPCODES... done<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x06: 0x0000 (HSFC)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x50: 0x00007a7b (FRAP)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>BMWAG 0x00, BMRAG 0x00, BRWA 0x7a, BRRA 0x7b<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x54: 0x000f0000 FREG0: Warning: Flash Descriptor region (0x00000000-0x0000ffff) is read-only.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x58: 0x07ff0200 FREG1: BIOS region (0x00200000-0x007fffff) is read-write.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Not all flash regions are freely accessible by flashrom. This is most likely<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>due to an active ME. Please see http://flashrom.org/ME for details.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Writes have been disabled for safety reasons. You can enforce write<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>support with the ich_spi_force programmer option, but you will most likely<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>harm your hardware! If you force flashrom you will get no support if<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>something breaks. On a few mainboards it is possible to enable write<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>access by setting a jumper (see its documentation or the board itself).<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x90: 0x94 (SSFS)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=1<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x91: 0xf80000 (SSFC)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span lang=NL style='font-size:9.0pt'>0x94: 0x0006 (PREOP)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span lang=NL style='font-size:9.0pt'>0x96: 0x043b (OPTYPE)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x98: 0x05d80302 (OPMENU)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0x9C: 0x0000019f (OPMENU+4)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xC4: 0x0080d807 (LVSCC)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>LVSCC: BES=0x3, WG=1, WSR=0, WEWS=0, EO=0xd8, VCL=1<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xC8: 0x0000d807 (UVSCC)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>UVSCC: BES=0x3, WG=1, WSR=0, WEWS=0, EO=0xd8<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>0xD0: 0x00000000 (FPB)<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>OK.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>The following protocols are supported: FWH, SPI.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Probing for Spansion S25FL128S......1, 16384 kB: probe_spi_rdid_generic: id1 0x01, id2 0x2018<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Found Spansion flash chip "S25FL128S......1" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register is 0x00.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Program Fail Flag (P_FAIL) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Erase Fail Flag (E_FAIL) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Block Protect 2 (BP2) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Block Protect 1 (BP1) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Block Protect 0 (BP0) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Write Enable Latch (WEL) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Chip status register: Write In Progress (WIP/BUSY) is not set<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>This chip may contain one-time programmable memory. flashrom cannot read<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>and may never be able to write it, hence it may not be able to completely<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>clone the contents of this chip (see man page for details).<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>===<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>The test status of this chip may have been updated in the latest development<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>version of flashrom. If you are running the latest development version,<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>please email a report to flashrom@flashrom.org if any of the above operations<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>work correctly for you with this flash chip. Please include the flashrom log<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>file for all operations you tested (see the man page for details), and mention<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>which mainboard or programmer you tested in the subject line.<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Thanks for your help!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Reading flash... Transaction error!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=1<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Running OPCODE 0x03 failed at address 0x010000 (payload length was 64).<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>Read operation failed!<o:p></o:p></span></p><p class=MsoNormal style='margin-left:.5in'><span style='font-size:9.0pt'>FAILED.<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Thanks,<o:p></o:p></p><p class=MsoNormal>Ron<o:p></o:p></p><p>-----Original Message-----<br>From: Antonio Ospite [mailto:ao2@ao2.it]<br>Sent: Tuesday, February 17, 2015 12:38 AM<br>To: flashrom@flashrom.org<br>Cc: vidwer@gmail.com; Taylor, Ron; Natarajan, Kannan; flashrom@flashrom.org<br>Subject: Re: [flashrom] flashrom support for Spansion S25FL128S<br><br>On Mon, 16 Feb 2015 20:50:39 -0600<br>wrote:<br><br>> <br>> Hi Idwer<br>> <br>> I had fixed the compilation issues and could generate the binary.<br>> I tried to read the bios chip first, but it does not seem to recognize <br>> S25FL128S<br>> <br>> (1) It lists the chip as supported:<br>> flashrom# ./flashrom --list-supported | grep S25FL128S<br>> Spansion S25FL128S......0 16384 SPI <br>> Spansion S25FL128S......1 16384 SPI <br>> <br>> <br>> (2) However when it is specified with --chip options, it says not supported or unknown.<br>> <br>> flashrom# ./flashrom --chip S25FL128S<br><br>flashrom# ./flashrom --chip "SS25FL128S......0"<br><br>or the other one depending on your actual chip.<br><br>The dots are placeholders for variable characters in the chip name for different chip variants.<br><br>And remember to add the -c option also when you perform the other operations, flashrom still can't discriminate between the variants on its own.<br><br>> flashrom v0.9.8-rc1-r1883 on Linux 3.14.0-rc8 (x86_64) flashrom is <br>> free software, get the source code at http://www.flashrom.org<br>> <br>> Error: Unknown chip 'S25FL128S' specified.<br>> Run flashrom -L to view the hardware supported in this flashrom version.<br>> <br>> <br>> (3) Tried to read the chip first. It could not determine the chip type.<br>> <br>> <br>> ./flashrom -p internal:laptop=this_is_not_a_laptop -r file_name.bin <br>> flashrom v0.9.8-rc1-r1883 on Linux 3.14.0-rc8 (x86_64) flashrom is <br>> free software, get the source code at http://www.flashrom.org<br>> <br>> Calibrating delay loop... OK.<br>> ======================================================================<br>> == WARNING! You may be running flashrom on an unsupported laptop. We <br>> could not detect this for sure because your vendor has not setup the <br>> SMBIOS tables correctly. You can enforce execution by adding '-p <br>> internal:laptop=this_is_not_a_laptop' to the command line, but please <br>> read the following warning if you are not sure.<br>> <br>> Laptops, notebooks and netbooks are difficult to support and we <br>> recommend to use the vendor flashing utility. The embedded controller<br>> (EC) in these machines often interacts badly with flashing.<br>> See the manpage and http://www.flashrom.org/Laptops for details.<br>> <br>> If flash is shared with the EC, erase is guaranteed to brick your <br>> laptop and write may brick your laptop.<br>> Read and probe may irritate your EC and cause fan failure, backlight <br>> failure and sudden poweroff.<br>> You have been warned.<br>> ======================================================================<br>> == Proceeding anyway because user forced us to.<br>> Found chipset "Intel Avoton/Rangeley".<br>> This chipset is marked as untested. If you are using an up-to-date <br>> version of flashrom *and* were (not) able to successfully update your <br>> firmware with it, then please email a report to flashrom@flashrom.org including a verbose (-V) log.<br>> Thank you!<br>> Enabling flash write... Warning: SPI Configuration Lockdown activated.<br>> OK.<br>> Found Spansion flash chip "S25FL127S-64kB" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Found Spansion flash chip "S25FL127S-256kB" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Found Spansion flash chip "S25FL128P......0" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Found Spansion flash chip "S25FL128P......1" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Found Spansion flash chip "S25FL128S......0" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Found Spansion flash chip "S25FL128S......1" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Found Spansion flash chip "S25FL129P......0" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Found Spansion flash chip "S25FL129P......1" (16384 kB, SPI) mapped at physical address 0x00000000ff000000.<br>> Multiple flash chip definitions match the detected chip(s): "S25FL127S-64kB", "S25FL127S-256kB", "S25FL128P......0", "S25FL128P......1", "S25FL128S......0", "S25FL128S......1", "S25FL129P......0", "S25FL129P......1"<br>> Please specify which chip definition to use with the -c option.<br>> <br><br>IOT just do what flashrom is telling you here :)<br><br>Ciao,<br>Antonio<br><br>--<br>Antonio Ospite<br>http://ao2.it<br><br>A: Because it messes up the order in which people normally read text.<br>See http://en.wikipedia.org/wiki/Posting_style<br>Q: Why is top-posting such a bad thing?<o:p></o:p></p></div></body></html>