<div dir="ltr">Looks like it failed to overwrite the descriptor region (Intel ME-related headache): <a href="https://www.flashrom.org/ME">https://www.flashrom.org/ME</a><br><div><br></div><div>You can target regions more carefully using a layout file. It appears the other regions (ME, BIOS, GbE) are unlocked, so you can try creating a layout that includes only those regions.</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Dec 19, 2016 at 7:54 PM, Shawn <span dir="ltr"><<a href="mailto:citypw@gmail.com" target="_blank">citypw@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi flashrom maintainers,<br>
<br>
I failed to write a modified ROM to the flash via internal. Maybe this<br>
chipset can only be writable via external programmer?<br>
<br>
root@sysresccd /root % flashrom -p internal<br>
flashrom v0.9.8-r1888 on Linux 4.4.28-std490-amd64 (x86_64)<br>
flashrom is free software, get the source code at <a href="http://www.flashrom.org" rel="noreferrer" target="_blank">http://www.flashrom.org</a><br>
<br>
Calibrating delay loop... OK.<br>
Found chipset "Intel B75".<br>
Enabling flash write... Warning: SPI Configuration Lockdown activated.<br>
OK.<br>
Found Macronix flash chip "MX25L6405" (8192 kB, SPI) mapped at<br>
physical address 0xff800000.<br>
Found Macronix flash chip "MX25L6405D" (8192 kB, SPI) mapped at<br>
physical address 0xff800000.<br>
Found Macronix flash chip "MX25L6406E/MX25L6408E" (8192 kB, SPI)<br>
mapped at physical address 0xff800000.<br>
Found Macronix flash chip<br>
"MX25L6436E/MX25L6445E/<wbr>MX25L6465E/MX25L6473E" (8192 kB, SPI) mapped at<br>
physical address 0xff800000.<br>
Multiple flash chip definitions match the detected chip(s):<br>
"MX25L6405", "MX25L6405D", "MX25L6406E/MX25L6408E",<br>
"MX25L6436E/MX25L6445E/<wbr>MX25L6465E/MX25L6473E"<br>
Please specify which chip definition to use with the -c <chipname> option.<br>
<br>
<br>
root@sysresccd /root % flashrom -VV -p internal -c MX25L6405 -w<br>
factory_giga1.bin.new.new<br>
flashrom v0.9.8-r1888 on Linux 4.4.28-std490-amd64 (x86_64)<br>
flashrom is free software, get the source code at <a href="http://www.flashrom.org" rel="noreferrer" target="_blank">http://www.flashrom.org</a><br>
<br>
flashrom was built with libpci 3.4.1, GCC 4.8.5, little endian<br>
Command line (7 args): flashrom -VV -p internal -c MX25L6405 -w<br>
factory_giga1.bin.new.new<br>
Calibrating delay loop... OS timer resolution is 1 usecs, 1944M loops<br>
per second, 10 myus = 10 us, 100 myus = 117 us, 1000 myus = 1021 us,<br>
10000 myus = 10021 us, 4 myus = 4 us, OK.<br>
Initializing internal programmer<br>
No coreboot table found.<br>
Using Internal DMI decoder.<br>
DMI string chassis-type: "Desktop"<br>
DMI string system-manufacturer: "Gigabyte Technology Co., Ltd."<br>
DMI string system-product-name: "To be filled by O.E.M."<br>
DMI string system-version: "To be filled by O.E.M."<br>
DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd."<br>
DMI string baseboard-product-name: "B75M-D3V"<br>
DMI string baseboard-version: "To be filled by O.E.M."<br>
Found ITE Super I/O, ID 0x8728 on port 0x2e<br>
Found chipset "Intel B75" with PCI ID 8086:1e49.<br>
Enabling flash write... Root Complex Register Block address = 0xfed1c000<br>
GCS = 0xc64: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x3 (SPI)<br>
Top Swap: enabled (A16(+) inverted)<br>
0xfff80000/0xffb80000 FWH IDSEL: 0x0<br>
0xfff00000/0xffb00000 FWH IDSEL: 0x0<br>
0xffe80000/0xffa80000 FWH IDSEL: 0x1<br>
0xffe00000/0xffa00000 FWH IDSEL: 0x1<br>
0xffd80000/0xff980000 FWH IDSEL: 0x2<br>
0xffd00000/0xff900000 FWH IDSEL: 0x2<br>
0xffc80000/0xff880000 FWH IDSEL: 0x3<br>
0xffc00000/0xff800000 FWH IDSEL: 0x3<br>
0xff700000/0xff300000 FWH IDSEL: 0x4<br>
0xff600000/0xff200000 FWH IDSEL: 0x5<br>
0xff500000/0xff100000 FWH IDSEL: 0x6<br>
0xff400000/0xff000000 FWH IDSEL: 0x7<br>
0xfff80000/0xffb80000 FWH decode enabled<br>
0xfff00000/0xffb00000 FWH decode enabled<br>
0xffe80000/0xffa80000 FWH decode enabled<br>
0xffe00000/0xffa00000 FWH decode enabled<br>
0xffd80000/0xff980000 FWH decode enabled<br>
0xffd00000/0xff900000 FWH decode enabled<br>
0xffc80000/0xff880000 FWH decode enabled<br>
0xffc00000/0xff800000 FWH decode enabled<br>
0xff700000/0xff300000 FWH decode enabled<br>
0xff600000/0xff200000 FWH decode enabled<br>
0xff500000/0xff100000 FWH decode enabled<br>
0xff400000/0xff000000 FWH decode enabled<br>
Maximum FWH chip size: 0x100000 bytes<br>
SPI Read Configuration: prefetching enabled, caching enabled,<br>
BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled<br>
SPIBAR = 0xf7795000 + 0x3800<br>
0x04: 0xe008 (HSFS)<br>
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1<br>
Warning: SPI Configuration Lockdown activated.<br>
Reading OPCODES... done<br>
OP Type Pre-OP<br>
op[0]: 0x02, write w/ addr, none<br>
op[1]: 0x03, read w/ addr, none<br>
op[2]: 0x20, write w/ addr, none<br>
op[3]: 0x05, read w/o addr, none<br>
op[4]: 0x9f, read w/o addr, none<br>
op[5]: 0x01, write w/o addr, none<br>
op[6]: 0x00, read w/o addr, none<br>
op[7]: 0x00, read w/o addr, none<br>
Pre-OP 0: 0x06, Pre-OP 1: 0x00<br>
0x06: 0x0000 (HSFC)<br>
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0<br>
0x08: 0x00000000 (FADDR)<br>
0x50: 0x0000ffff (FRAP)<br>
BMWAG 0x00, BMRAG 0x00, BRWA 0xff, BRRA 0xff<br>
0x54: 0x00000000 FREG0: Flash Descriptor region<br>
(0x00000000-0x00000fff) is read-write.<br>
0x58: 0x07ff0000 FREG1: BIOS region (0x00000000-0x007fffff) is read-write.<br>
0x5C: 0x04ff0001 FREG2: Management Engine region<br>
(0x00001000-0x004fffff) is read-write.<br>
0x60: 0x00001fff FREG3: Gigabit Ethernet region is unused.<br>
0x64: 0x00001fff FREG4: Platform Data region is unused.<br>
0x74: 0x00000000 (PR0 is unused)<br>
0x78: 0x00000000 (PR1 is unused)<br>
0x7C: 0x00000000 (PR2 is unused)<br>
0x80: 0x00000000 (PR3 is unused)<br>
0x84: 0x00000000 (PR4 is unused)<br>
0x90: 0x84 (SSFS)<br>
SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0<br>
0x91: 0xf94240 (SSFC)<br>
SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=2, SME=0, SCF=1<br>
0x94: 0x0006 (PREOP)<br>
0x96: 0x043b (OPTYPE)<br>
0x98: 0x05200302 (OPMENU)<br>
0x9C: 0x0000019f (OPMENU+4)<br>
0xA0: 0x00000000 (BBAR)<br>
0xC4: 0x00802005 (LVSCC)<br>
LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1<br>
0xC8: 0x00002005 (UVSCC)<br>
UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20<br>
0xD0: 0x00000000 (FPB)<br>
Reading flash descriptors mapped by the chipset via FDOC/FDOD... done.<br>
=== Content Section ===<br>
FLVALSIG 0x0ff0a55a<br>
FLMAP0 0x02040003<br>
FLMAP1 0x12100206<br>
FLMAP2 0x00210120<br>
<br>
--- Details ---<br>
NR (Number of Regions): 3<br>
FRBA (Flash Region Base Address): 0x040<br>
NC (Number of Components): 1<br>
FCBA (Flash Component Base Address): 0x030<br>
ISL (ICH/PCH Strap Length): 18<br>
FISBA/FPSBA (Flash ICH/PCH Strap Base Address): 0x100<br>
NM (Number of Masters): 3<br>
FMBA (Flash Master Base Address): 0x060<br>
MSL/PSL (MCH/PROC Strap Length): 1<br>
FMSBA (Flash MCH/PROC Strap Base Address): 0x200<br>
<br>
=== Component Section ===<br>
FLCOMP 0x09300024<br>
FLILL 0x00000000<br>
<br>
--- Details ---<br>
Component 1 density: 8 MB<br>
Component 2 is not used.<br>
Read Clock Frequency: 20 MHz<br>
Read ID and Status Clock Freq.: 33 MHz<br>
Write and Erase Clock Freq.: 33 MHz<br>
Fast Read is supported.<br>
Fast Read Clock Frequency: 33 MHz<br>
Dual Output Fast Read Support: enabled<br>
No forbidden opcodes.<br>
<br>
=== Region Section ===<br>
FLREG0 0x00000000<br>
FLREG1 0x07ff0000<br>
FLREG2 0x04ff0001<br>
FLREG3 0x00001fff<br>
FLREG4 0x00001fff<br>
<br>
--- Details ---<br>
Region 0 (Descr.) 0x00000000 - 0x00000fff<br>
Region 1 (BIOS ) 0x00000000 - 0x007fffff<br>
Region 2 (ME ) 0x00001000 - 0x004fffff<br>
Region 3 (GbE ) is unused.<br>
Region 4 (Platf.) is unused.<br>
<br>
=== Master Section ===<br>
FLMSTR1 0xffff0000<br>
FLMSTR2 0xffff0000<br>
FLMSTR3 0xffff0118<br>
<br>
--- Details ---<br>
Descr. BIOS ME GbE Platf.<br>
BIOS rw rw rw rw rw<br>
ME rw rw rw rw rw<br>
GbE rw rw rw rw rw<br>
<br>
OK.<br>
No IT87* serial flash segment enabled.<br>
The following protocols are supported: FWH, SPI.<br>
Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1<br>
0xc2, id2 0x2017<br>
Found Macronix flash chip "MX25L6405" (8192 kB, SPI) mapped at<br>
physical address 0xff800000.<br>
Chip status register is 0x00.<br>
Chip status register: Status Register Write Disable (SRWD, SRP, ...) is not set<br>
Chip status register: Bit 6 is not set<br>
Chip status register: Block Protect 3 (BP3) is not set<br>
Chip status register: Block Protect 2 (BP2) is not set<br>
Chip status register: Block Protect 1 (BP1) is not set<br>
Chip status register: Block Protect 0 (BP0) is not set<br>
Chip status register: Write Enable Latch (WEL) is not set<br>
Chip status register: Write In Progress (WIP/BUSY) is not set<br>
Block protection is disabled.<br>
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.<br>
Reading old flash chip contents... done.<br>
Erasing and writing flash chip... Trying erase function 0...<br>
0x000000-0x00ffff:EFAILED at 0x00001000! Expected=0xff, Found=0x20,<br>
failed byte count from 0x00000000-0x0000ffff: 0xb55d<br>
ERASE FAILED!<br>
Reading current flash chip contents... done. Looking for another erase function.<br>
Trying erase function 1... 0x000000-0x00ffff:EInvalid OPCODE 0x06,<br>
will not execute.<br>
spi_block_erase_d8 failed during command execution at address 0x0<br>
Reading current flash chip contents... done. Looking for another erase function.<br>
Trying erase function 2... 0x000000-0x7fffff:EInvalid OPCODE 0x06,<br>
will not execute.<br>
spi_chip_erase_60 failed during command execution<br>
Reading current flash chip contents... done. Looking for another erase function.<br>
Trying erase function 3... 0x000000-0x7fffff:EInvalid OPCODE 0x06,<br>
will not execute.<br>
spi_chip_erase_c7 failed during command execution<br>
Looking for another erase function.<br>
No usable erase functions left.<br>
FAILED!<br>
Uh oh. Erase/write failed. Checking if anything has changed.<br>
Reading current flash chip contents... done.<br>
Apparently at least some data has changed.<br>
Your flash chip is in an unknown state.<br>
Get help on IRC at <a href="http://chat.freenode.net" rel="noreferrer" target="_blank">chat.freenode.net</a> (channel #flashrom) or<br>
mail <a href="mailto:flashrom@flashrom.org">flashrom@flashrom.org</a> with the subject "FAILED: <your board name>"!<br>
------------------------------<wbr>------------------------------<wbr>-------------------<br>
DO NOT REBOOT OR POWEROFF!<br>
Restoring MMIO space at 0xf77988a0<br>
Restoring PCI config space for 00:1f:0 reg 0xdc<br>
<span class="HOEnZb"><font color="#888888"><br>
<br>
--<br>
GNU powered it...<br>
GPL protect it...<br>
God blessing it...<br>
<br>
regards<br>
Shawn<br>
<br>
______________________________<wbr>_________________<br>
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<a href="mailto:flashrom@flashrom.org">flashrom@flashrom.org</a><br>
<a href="https://www.flashrom.org/mailman/listinfo/flashrom" rel="noreferrer" target="_blank">https://www.flashrom.org/<wbr>mailman/listinfo/flashrom</a><br>
</font></span></blockquote></div><br></div>