source: trunk/a25.c @ 1474

Revision 1474, 3.7 KB checked in by hailfinger, 5 months ago (diff)

Add struct flashctx * parameter to all functions accessing flash chips.

All programmer access function prototypes except init have been made
static and moved to the respective file.

A few internal functions in flash chip drivers had chipaddr parameters
which are no longer needed.

The lines touched by flashctx changes have been adjusted to 80 columns
except in header files.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@…>
Acked-by: Michael Karcher <flashrom@…>
Line 
1/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
18 */
19
20#include "flash.h"
21#include "chipdrivers.h"
22#include "spi.h"
23
24/* Prettyprint the status register. Works for AMIC A25L series. */
25
26static void spi_prettyprint_status_register_amic_a25_srwd(uint8_t status)
27{
28        msg_cdbg("Chip status register: Status Register Write Disable "
29                     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
30}
31
32int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash)
33{
34        uint8_t status;
35
36        status = spi_read_status_register(flash);
37        msg_cdbg("Chip status register is %02x\n", status);
38
39        spi_prettyprint_status_register_amic_a25_srwd(status);
40        spi_prettyprint_status_register_bit(status, 6);
41        spi_prettyprint_status_register_bit(status, 5);
42        spi_prettyprint_status_register_bit(status, 4);
43        spi_prettyprint_status_register_bp3210(status, 1);
44        spi_prettyprint_status_register_welwip(status);
45        return 0;
46}
47
48int spi_prettyprint_status_register_amic_a25l40p(struct flashctx *flash)
49{
50        uint8_t status;
51
52        status = spi_read_status_register(flash);
53        msg_cdbg("Chip status register is %02x\n", status);
54
55        spi_prettyprint_status_register_amic_a25_srwd(status);
56        spi_prettyprint_status_register_bit(status, 6);
57        spi_prettyprint_status_register_bit(status, 5);
58        spi_prettyprint_status_register_bp3210(status, 2);
59        spi_prettyprint_status_register_welwip(status);
60        return 0;
61}
62
63int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
64{
65        uint8_t status;
66
67        status = spi_read_status_register(flash);
68        msg_cdbg("Chip status register is %02x\n", status);
69
70        spi_prettyprint_status_register_amic_a25_srwd(status);
71        msg_cdbg("Chip status register: Sector Protect Size (SEC) "
72                 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
73        msg_cdbg("Chip status register: Top/Bottom (TB) "
74                 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
75        spi_prettyprint_status_register_bp3210(status, 2);
76        spi_prettyprint_status_register_welwip(status);
77        msg_cdbg("Chip status register 2 is NOT decoded!\n");
78        return 0;
79}
80
81int spi_prettyprint_status_register_amic_a25lq032(struct flashctx *flash)
82{
83        uint8_t status;
84
85        status = spi_read_status_register(flash);
86        msg_cdbg("Chip status register is %02x\n", status);
87
88        spi_prettyprint_status_register_amic_a25_srwd(status);
89        msg_cdbg("Chip status register: Sector Protect Size (SEC) "
90                 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
91        msg_cdbg("Chip status register: Top/Bottom (TB) "
92                 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
93        spi_prettyprint_status_register_bp3210(status, 2);
94        spi_prettyprint_status_register_welwip(status);
95        msg_cdbg("Chip status register 2 is NOT decoded!\n");
96        return 0;
97}
98
99/* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
100 * spi_prettyprint_status_register_amic_a25l05p or
101 * spi_prettyprint_status_register_amic_a25l40p.
102 * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
103 * spi_prettyprint_status_register_amic_a25l032 or
104 * spi_prettyprint_status_register_amic_a25lq032 if those have locks controlled
105 * by the second status register.
106 */
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