| 1 | /* |
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| 2 | * This file is part of the flashrom project. |
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| 3 | * |
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| 4 | * Copyright (C) 2009,2010 Carl-Daniel Hailfinger |
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| 5 | * |
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| 6 | * This program is free software; you can redistribute it and/or modify |
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| 7 | * it under the terms of the GNU General Public License as published by |
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| 8 | * the Free Software Foundation; either version 2 of the License, or |
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| 9 | * (at your option) any later version. |
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| 10 | * |
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| 11 | * This program is distributed in the hope that it will be useful, |
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| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 14 | * GNU General Public License for more details. |
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| 15 | * |
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| 16 | * You should have received a copy of the GNU General Public License |
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| 17 | * along with this program; if not, write to the Free Software |
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| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 19 | */ |
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| 20 | |
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| 21 | #include <stdint.h> |
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| 22 | #include <string.h> |
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| 23 | #include <stdlib.h> |
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| 24 | #include <sys/types.h> |
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| 25 | #if !defined (__DJGPP__) && !defined(__LIBPAYLOAD__) |
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| 26 | #include <unistd.h> |
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| 27 | #include <fcntl.h> |
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| 28 | #endif |
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| 29 | #if !defined (__DJGPP__) |
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| 30 | #include <errno.h> |
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| 31 | #endif |
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| 32 | #include "flash.h" |
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| 33 | |
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| 34 | #if defined(__i386__) || defined(__x86_64__) |
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| 35 | |
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| 36 | /* sync primitive is not needed because x86 uses uncached accesses |
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| 37 | * which have a strongly ordered memory model. |
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| 38 | */ |
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| 39 | static inline void sync_primitive(void) |
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| 40 | { |
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| 41 | } |
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| 42 | |
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| 43 | #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) |
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| 44 | int io_fd; |
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| 45 | #endif |
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| 46 | |
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| 47 | void get_io_perms(void) |
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| 48 | { |
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| 49 | #if defined(__DJGPP__) || defined(__LIBPAYLOAD__) |
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| 50 | /* We have full permissions by default. */ |
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| 51 | return; |
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| 52 | #else |
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| 53 | #if defined (__sun) && (defined(__i386) || defined(__amd64)) |
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| 54 | if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { |
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| 55 | #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__) |
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| 56 | if ((io_fd = open("/dev/io", O_RDWR)) < 0) { |
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| 57 | #else |
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| 58 | if (iopl(3) != 0) { |
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| 59 | #endif |
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| 60 | msg_perr("ERROR: Could not get I/O privileges (%s).\n" |
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| 61 | "You need to be root.\n", strerror(errno)); |
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| 62 | #if defined (__OpenBSD__) |
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| 63 | msg_perr("Please set securelevel=-1 in /etc/rc.securelevel " |
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| 64 | "and reboot, or reboot into \n"); |
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| 65 | msg_perr("single user mode.\n"); |
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| 66 | #endif |
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| 67 | exit(1); |
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| 68 | } |
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| 69 | #endif |
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| 70 | } |
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| 71 | |
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| 72 | void release_io_perms(void) |
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| 73 | { |
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| 74 | #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) |
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| 75 | close(io_fd); |
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| 76 | #endif |
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| 77 | } |
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| 78 | |
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| 79 | #elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__) |
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| 80 | |
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| 81 | static inline void sync_primitive(void) |
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| 82 | { |
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| 83 | /* Prevent reordering and/or merging of reads/writes to hardware. |
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| 84 | * Such reordering and/or merging would break device accesses which |
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| 85 | * depend on the exact access order. |
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| 86 | */ |
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| 87 | asm("eieio" : : : "memory"); |
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| 88 | } |
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| 89 | |
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| 90 | /* PCI port I/O is not yet implemented on PowerPC. */ |
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| 91 | void get_io_perms(void) |
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| 92 | { |
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| 93 | } |
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| 94 | |
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| 95 | /* PCI port I/O is not yet implemented on PowerPC. */ |
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| 96 | void release_io_perms(void) |
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| 97 | { |
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| 98 | } |
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| 99 | |
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| 100 | #elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips) |
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| 101 | |
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| 102 | /* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses |
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| 103 | * in mode 2 which has a strongly ordered memory model. |
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| 104 | */ |
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| 105 | static inline void sync_primitive(void) |
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| 106 | { |
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| 107 | } |
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| 108 | |
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| 109 | /* PCI port I/O is not yet implemented on MIPS. */ |
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| 110 | void get_io_perms(void) |
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| 111 | { |
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| 112 | } |
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| 113 | |
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| 114 | /* PCI port I/O is not yet implemented on MIPS. */ |
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| 115 | void release_io_perms(void) |
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| 116 | { |
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| 117 | } |
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| 118 | |
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| 119 | #elif defined (__arm__) |
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| 120 | |
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| 121 | static inline void sync_primitive(void) |
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| 122 | { |
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| 123 | } |
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| 124 | |
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| 125 | void get_io_perms(void) |
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| 126 | { |
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| 127 | } |
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| 128 | |
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| 129 | void release_io_perms(void) |
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| 130 | { |
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| 131 | } |
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| 132 | |
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| 133 | #else |
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| 134 | |
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| 135 | #error Unknown architecture |
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| 136 | |
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| 137 | #endif |
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| 138 | |
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| 139 | void mmio_writeb(uint8_t val, void *addr) |
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| 140 | { |
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| 141 | *(volatile uint8_t *) addr = val; |
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| 142 | sync_primitive(); |
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| 143 | } |
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| 144 | |
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| 145 | void mmio_writew(uint16_t val, void *addr) |
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| 146 | { |
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| 147 | *(volatile uint16_t *) addr = val; |
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| 148 | sync_primitive(); |
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| 149 | } |
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| 150 | |
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| 151 | void mmio_writel(uint32_t val, void *addr) |
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| 152 | { |
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| 153 | *(volatile uint32_t *) addr = val; |
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| 154 | sync_primitive(); |
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| 155 | } |
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| 156 | |
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| 157 | uint8_t mmio_readb(void *addr) |
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| 158 | { |
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| 159 | return *(volatile uint8_t *) addr; |
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| 160 | } |
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| 161 | |
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| 162 | uint16_t mmio_readw(void *addr) |
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| 163 | { |
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| 164 | return *(volatile uint16_t *) addr; |
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| 165 | } |
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| 166 | |
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| 167 | uint32_t mmio_readl(void *addr) |
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| 168 | { |
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| 169 | return *(volatile uint32_t *) addr; |
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| 170 | } |
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| 171 | |
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| 172 | void mmio_readn(void *addr, uint8_t *buf, size_t len) |
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| 173 | { |
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| 174 | memcpy(buf, addr, len); |
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| 175 | return; |
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| 176 | } |
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| 177 | |
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| 178 | void mmio_le_writeb(uint8_t val, void *addr) |
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| 179 | { |
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| 180 | mmio_writeb(cpu_to_le8(val), addr); |
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| 181 | } |
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| 182 | |
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| 183 | void mmio_le_writew(uint16_t val, void *addr) |
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| 184 | { |
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| 185 | mmio_writew(cpu_to_le16(val), addr); |
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| 186 | } |
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| 187 | |
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| 188 | void mmio_le_writel(uint32_t val, void *addr) |
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| 189 | { |
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| 190 | mmio_writel(cpu_to_le32(val), addr); |
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| 191 | } |
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| 192 | |
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| 193 | uint8_t mmio_le_readb(void *addr) |
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| 194 | { |
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| 195 | return le_to_cpu8(mmio_readb(addr)); |
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| 196 | } |
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| 197 | |
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| 198 | uint16_t mmio_le_readw(void *addr) |
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| 199 | { |
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| 200 | return le_to_cpu16(mmio_readw(addr)); |
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| 201 | } |
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| 202 | |
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| 203 | uint32_t mmio_le_readl(void *addr) |
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| 204 | { |
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| 205 | return le_to_cpu32(mmio_readl(addr)); |
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| 206 | } |
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| 207 | |
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| 208 | enum mmio_write_type { |
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| 209 | mmio_write_type_b, |
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| 210 | mmio_write_type_w, |
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| 211 | mmio_write_type_l, |
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| 212 | }; |
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| 213 | |
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| 214 | struct undo_mmio_write_data { |
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| 215 | void *addr; |
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| 216 | int reg; |
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| 217 | enum mmio_write_type type; |
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| 218 | union { |
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| 219 | uint8_t bdata; |
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| 220 | uint16_t wdata; |
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| 221 | uint32_t ldata; |
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| 222 | }; |
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| 223 | }; |
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| 224 | |
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| 225 | int undo_mmio_write(void *p) |
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| 226 | { |
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| 227 | struct undo_mmio_write_data *data = p; |
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| 228 | msg_pdbg("Restoring MMIO space at %p\n", data->addr); |
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| 229 | switch (data->type) { |
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| 230 | case mmio_write_type_b: |
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| 231 | mmio_writeb(data->bdata, data->addr); |
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| 232 | break; |
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| 233 | case mmio_write_type_w: |
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| 234 | mmio_writew(data->wdata, data->addr); |
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| 235 | break; |
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| 236 | case mmio_write_type_l: |
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| 237 | mmio_writel(data->ldata, data->addr); |
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| 238 | break; |
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| 239 | } |
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| 240 | /* p was allocated in register_undo_mmio_write. */ |
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| 241 | free(p); |
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| 242 | return 0; |
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| 243 | } |
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| 244 | |
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| 245 | #define register_undo_mmio_write(a, c) \ |
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| 246 | { \ |
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| 247 | struct undo_mmio_write_data *undo_mmio_write_data; \ |
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| 248 | undo_mmio_write_data = malloc(sizeof(struct undo_mmio_write_data)); \ |
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| 249 | if (!undo_mmio_write_data) { \ |
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| 250 | msg_gerr("Out of memory!\n"); \ |
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| 251 | exit(1); \ |
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| 252 | } \ |
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| 253 | undo_mmio_write_data->addr = a; \ |
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| 254 | undo_mmio_write_data->type = mmio_write_type_##c; \ |
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| 255 | undo_mmio_write_data->c##data = mmio_read##c(a); \ |
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| 256 | register_shutdown(undo_mmio_write, undo_mmio_write_data); \ |
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| 257 | } |
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| 258 | |
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| 259 | #define register_undo_mmio_writeb(a) register_undo_mmio_write(a, b) |
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| 260 | #define register_undo_mmio_writew(a) register_undo_mmio_write(a, w) |
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| 261 | #define register_undo_mmio_writel(a) register_undo_mmio_write(a, l) |
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| 262 | |
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| 263 | void rmmio_writeb(uint8_t val, void *addr) |
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| 264 | { |
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| 265 | register_undo_mmio_writeb(addr); |
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| 266 | mmio_writeb(val, addr); |
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| 267 | } |
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| 268 | |
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| 269 | void rmmio_writew(uint16_t val, void *addr) |
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| 270 | { |
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| 271 | register_undo_mmio_writew(addr); |
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| 272 | mmio_writew(val, addr); |
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| 273 | } |
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| 274 | |
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| 275 | void rmmio_writel(uint32_t val, void *addr) |
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| 276 | { |
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| 277 | register_undo_mmio_writel(addr); |
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| 278 | mmio_writel(val, addr); |
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| 279 | } |
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| 280 | |
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| 281 | void rmmio_le_writeb(uint8_t val, void *addr) |
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| 282 | { |
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| 283 | register_undo_mmio_writeb(addr); |
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| 284 | mmio_le_writeb(val, addr); |
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| 285 | } |
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| 286 | |
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| 287 | void rmmio_le_writew(uint16_t val, void *addr) |
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| 288 | { |
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| 289 | register_undo_mmio_writew(addr); |
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| 290 | mmio_le_writew(val, addr); |
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| 291 | } |
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| 292 | |
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| 293 | void rmmio_le_writel(uint32_t val, void *addr) |
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| 294 | { |
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| 295 | register_undo_mmio_writel(addr); |
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| 296 | mmio_le_writel(val, addr); |
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| 297 | } |
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| 298 | |
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| 299 | void rmmio_valb(void *addr) |
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| 300 | { |
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| 301 | register_undo_mmio_writeb(addr); |
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| 302 | } |
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| 303 | |
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| 304 | void rmmio_valw(void *addr) |
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| 305 | { |
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| 306 | register_undo_mmio_writew(addr); |
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| 307 | } |
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| 308 | |
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| 309 | void rmmio_vall(void *addr) |
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| 310 | { |
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| 311 | register_undo_mmio_writel(addr); |
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| 312 | } |
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