Changeset 1137 for trunk/chipset_enable.c

Timestamp:

08/11/10 23:06:10 (22 months ago)

Author:

mkarcher

Message:

Add support for Intel 5 Series / 3400 Series chipsets

(At least) for the QM57 which i have tested an additional patch was
needed as some reserved bits in the "Software Sequencing Flash Control
Register" (SSFC) needs to be programmed to 1 in the QM57.

Signed-off-by: Helge Wagner <helge.wagner@…>
Acked-by: Michael Karcher <flashrom@…>

File:

• trunk/chipset_enable.c (modified) (1 diff)

trunk/chipset_enable.c

@@ -1012 +1012 @@
         {0x8086, 0x3b00, NT, "Intel", "3400 Desktop",   enable_flash_ich10},
         {0x8086, 0x3b01, NT, "Intel", "3400 Mobile",    enable_flash_ich10},
+        {0x8086, 0x3b02, NT, "Intel", "P55",            enable_flash_ich10},
+        {0x8086, 0x3b03, NT, "Intel", "PM55",           enable_flash_ich10},
+        {0x8086, 0x3b06, NT, "Intel", "H55",            enable_flash_ich10},
+        {0x8086, 0x3b07, OK, "Intel", "QM57",           enable_flash_ich10},
+        {0x8086, 0x3b08, NT, "Intel", "H57",            enable_flash_ich10},
+        {0x8086, 0x3b09, NT, "Intel", "HM55",           enable_flash_ich10},
+        {0x8086, 0x3b0a, NT, "Intel", "Q57",            enable_flash_ich10},
+        {0x8086, 0x3b0b, NT, "Intel", "HM57",           enable_flash_ich10},
         {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10},
+        {0x8086, 0x3b0e, NT, "Intel", "B55",            enable_flash_ich10},
+        {0x8086, 0x3b0f, NT, "Intel", "QS57",           enable_flash_ich10},
+        {0x8086, 0x3b12, NT, "Intel", "3400",           enable_flash_ich10},
+        {0x8086, 0x3b14, NT, "Intel", "3420",           enable_flash_ich10},
+        {0x8086, 0x3b16, NT, "Intel", "3450",           enable_flash_ich10},
+        {0x8086, 0x3b1e, NT, "Intel", "B55",            enable_flash_ich10},
         {0x8086, 0x7198, OK, "Intel", "440MX",          enable_flash_piix4},
         {0x8086, 0x25a1, OK, "Intel", "6300ESB",        enable_flash_ich_4e},