Changeset 1409
- Timestamp:
- 08/09/11 03:49:34 (10 months ago)
- File:
-
- 1 edited
-
trunk/ichspi.c (modified) (11 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/ichspi.c
r1397 r1409 7 7 * Copyright (C) 2008 coresystems GmbH <info@coresystems.de> 8 8 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger 9 * Copyright (C) 2011 Stefan Tauner 9 10 * 10 11 * This program is free software; you can redistribute it and/or modify … … 21 22 * along with this program; if not, write to the Free Software 22 23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 23 */24 25 /*26 * This module is designed for supporting the devices27 * ST M25P4028 * ST M25P8029 * ST M25P1630 * ST M25P32 already tested31 * ST M25P6432 * AT 25DF321 already tested33 * ... and many more SPI flash devices34 *35 24 */ 36 25 … … 294 283 295 284 /* pretty printing functions */ 296 static void pretty _print_opcodes(OPCODES *ops)285 static void prettyprint_opcodes(OPCODES *ops) 297 286 { 298 287 if(ops == NULL) … … 593 582 } 594 583 584 /* Read len bytes from the fdata/spid register into the data array. 585 * 586 * Note that using len > spi_programmer->max_data_read will return garbage or 587 * may even crash. 588 */ 589 static void ich_read_data(uint8_t *data, int len, int reg0_off) 590 { 591 int i; 592 uint32_t temp32 = 0; 593 594 for (i = 0; i < len; i++) { 595 if ((i % 4) == 0) 596 temp32 = REGREAD32(reg0_off + i); 597 598 data[i] = (temp32 >> ((i % 4) * 8)) & 0xff; 599 } 600 } 601 602 /* Fill len bytes from the data array into the fdata/spid registers. 603 * 604 * Note that using len > spi_programmer->max_data_write will trash the registers 605 * following the data registers. 606 */ 607 static void ich_fill_data(const uint8_t *data, int len, int reg0_off) 608 { 609 uint32_t temp32 = 0; 610 int i; 611 612 if (len <= 0) 613 return; 614 615 for (i = 0; i < len; i++) { 616 if ((i % 4) == 0) 617 temp32 = 0; 618 619 temp32 |= ((uint32_t) data[i]) << ((i % 4) * 8); 620 621 if ((i % 4) == 3) /* 32 bits are full, write them to regs. */ 622 REGWRITE32(reg0_off + (i - (i % 4)), temp32); 623 } 624 i--; 625 if ((i % 4) != 3) /* Write remaining data to regs. */ 626 REGWRITE32(reg0_off + (i - (i % 4)), temp32); 627 } 628 595 629 /* This function generates OPCODES from or programs OPCODES to ICH according to 596 630 * the chipset's SPI configuration lock. … … 628 662 curopcodes = curopcodes_done; 629 663 msg_pdbg("done\n"); 630 pretty _print_opcodes(curopcodes);664 prettyprint_opcodes(curopcodes); 631 665 msg_pdbg("\n"); 632 666 return 0; … … 639 673 int write_cmd = 0; 640 674 int timeout; 641 uint32_t temp32 = 0;675 uint32_t temp32; 642 676 uint16_t temp16; 643 uint32_t a;644 677 uint64_t opmenu; 645 678 int opcode_index; … … 665 698 666 699 /* Program data into SPID0 to N */ 667 if (write_cmd && (datalength != 0)) { 668 temp32 = 0; 669 for (a = 0; a < datalength; a++) { 670 if ((a % 4) == 0) { 671 temp32 = 0; 672 } 673 674 temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); 675 676 if ((a % 4) == 3) { 677 REGWRITE32(ICH7_REG_SPID0 + (a - (a % 4)), 678 temp32); 679 } 680 } 681 if (((a - 1) % 4) != 3) { 682 REGWRITE32(ICH7_REG_SPID0 + 683 ((a - 1) - ((a - 1) % 4)), temp32); 684 } 685 686 } 700 if (write_cmd && (datalength != 0)) 701 ich_fill_data(data, datalength, ICH7_REG_SPID0); 687 702 688 703 /* Assemble SPIS */ … … 765 780 } 766 781 767 if ((!write_cmd) && (datalength != 0)) { 768 for (a = 0; a < datalength; a++) { 769 if ((a % 4) == 0) { 770 temp32 = REGREAD32(ICH7_REG_SPID0 + (a)); 771 } 772 773 data[a] = 774 (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) 775 >> ((a % 4) * 8); 776 } 777 } 782 if ((!write_cmd) && (datalength != 0)) 783 ich_read_data(data, datalength, ICH7_REG_SPID0); 778 784 779 785 return 0; … … 786 792 int timeout; 787 793 uint32_t temp32; 788 uint32_t a;789 794 uint64_t opmenu; 790 795 int opcode_index; … … 811 816 812 817 /* Program data into FDATA0 to N */ 813 if (write_cmd && (datalength != 0)) { 814 temp32 = 0; 815 for (a = 0; a < datalength; a++) { 816 if ((a % 4) == 0) { 817 temp32 = 0; 818 } 819 820 temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); 821 822 if ((a % 4) == 3) { 823 REGWRITE32(ICH9_REG_FDATA0 + (a - (a % 4)), 824 temp32); 825 } 826 } 827 if (((a - 1) % 4) != 3) { 828 REGWRITE32(ICH9_REG_FDATA0 + 829 ((a - 1) - ((a - 1) % 4)), temp32); 830 } 831 } 818 if (write_cmd && (datalength != 0)) 819 ich_fill_data(data, datalength, ICH9_REG_FDATA0); 832 820 833 821 /* Assemble SSFS + SSFC */ … … 917 905 } 918 906 919 if ((!write_cmd) && (datalength != 0)) { 920 for (a = 0; a < datalength; a++) { 921 if ((a % 4) == 0) { 922 temp32 = REGREAD32(ICH9_REG_FDATA0 + (a)); 923 } 924 925 data[a] = 926 (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) 927 >> ((a % 4) * 8); 928 } 929 } 907 if ((!write_cmd) && (datalength != 0)) 908 ich_read_data(data, datalength, ICH9_REG_FDATA0); 930 909 931 910 return 0;
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