Changeset 1423


Ignore:
Timestamp:
08/27/11 23:19:56 (9 months ago)
Author:
stefanct
Message:

Fix printing of the Boot BIOS Straps on Intel chipsets

The meaning of the bits involved has changed several times in the past.
This patch takes these changes into account and hence fixes the output of the
pretty printing of GCS on all SPI-supported Intel chipsets that are not ICH7 or
NM10 (the latter were unaffected, because the defaults were correct).

This patch also allows to differentiate Ibex Peak and Cougar Point chipsets from
the earlier chipset series (ICH10) by adding new wrapper functions that set
"ich_generation" to 11 and 12 respectively. This should not change behavior
outside of enable_flash_ich_dc_spi, because the code path for
ich_generation >=9 is equal.

Signed-off-by: Stefan Tauner <stefan.tauner@…>
Acked-by: Uwe Hermann <uwe@…>
---
defining all those arrays is not very elegant, but i think it is at least very
readable this way. improvements are welcome!
reviewers should have an eye on the codepaths for ich_generation >= 9. i did not
spot a problem, but it should be checked again.

alternatively we could just remove the pretty printing of GCS and just output
the bits involved. i would like to keep the pch differentiation anyway though,
because i feel it will become handy in the future.

tested on my QS57-based thinkpad (probe + partial read)

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/chipset_enable.c

    r1422 r1423  
    441441} 
    442442 
    443 #define ICH_STRAP_RSVD 0x00 
    444 #define ICH_STRAP_SPI  0x01 
    445 #define ICH_STRAP_PCI  0x02 
    446 #define ICH_STRAP_LPC  0x03 
    447  
    448443static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) 
    449444{ 
    … …  
    459454        uint32_t tmp, gcs; 
    460455        void *rcrb; 
    461  
    462         /* 
    463          * TODO: These names are incorrect for EP80579. For that, the solution 
    464          * would look like the commented line below. 
    465          */ 
    466         // static const char *straps_names[] = {"SPI", "reserved", "reserved", "LPC" }; 
    467         static const char *straps_names[] = { "reserved", "SPI", "PCI", "LPC" }; 
     456        const char *const *straps_names; 
     457 
     458        static const char *const straps_names_EP80579[] = { "SPI", "reserved", "reserved", "LPC" }; 
     459        static const char *const straps_names_ich7_nm10[] = { "reserved", "SPI", "PCI", "LPC" }; 
     460        static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" }; 
     461        static const char *const straps_names_pch56[] = { "LPC", "reserved", "PCI", "SPI" }; 
     462        static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" }; 
     463 
     464        switch (ich_generation) { 
     465        case 7: 
     466                /* EP80579 may need further changes, but this is the least 
     467                 * intrusive way to get correct BOOT Strap printing without 
     468                 * changing the rest of its code path). */ 
     469                if (strcmp(name, "EP80579") == 0) 
     470                        straps_names = straps_names_EP80579; 
     471                else 
     472                        straps_names = straps_names_ich7_nm10; 
     473                break; 
     474        case 8: 
     475        case 9: 
     476        case 10: 
     477                straps_names = straps_names_ich8910; 
     478                break; 
     479        case 11: 
     480        case 12: 
     481                straps_names = straps_names_pch56; 
     482                break; 
     483        default: 
     484                msg_gerr("%s: unknown ICH generation. Please report!\n", 
     485                         __func__); 
     486                straps_names = straps_names_unknown; 
     487                break; 
     488        } 
    468489 
    469490        /* Enable Flash Writes */ 
    … …  
    482503                 (gcs & 0x1) ? "en" : "dis"); 
    483504        bbs = (gcs >> 10) & 0x3; 
    484         msg_pdbg("BOOT BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); 
     505        msg_pdbg("Boot BIOS Straps: 0x%x (%s)\n", bbs, straps_names[bbs]); 
    485506 
    486507        buc = mmio_readb(rcrb + 0x3414); 
    … …  
    492513         * on ICH7 when the southbridge is strapped to LPC 
    493514         */ 
    494  
    495515        buses_supported = BUS_FWH; 
    496516        if (ich_generation == 7) { 
    497                 if (bbs == ICH_STRAP_LPC) { 
    498                         /* No further SPI initialization required */ 
     517                if (bbs == 0x03) { 
     518                        /* If strapped to LPC, no further SPI initialization is 
     519                         * required. */ 
    499520                        return ret; 
    500521                } else { 
    … …  
    531552{ 
    532553        return enable_flash_ich_dc_spi(dev, name, 10); 
     554} 
     555 
     556/* Ibex Peak aka. 5 series & 3400 series */ 
     557static int enable_flash_pch5(struct pci_dev *dev, const char *name) 
     558{ 
     559        return enable_flash_ich_dc_spi(dev, name, 11); 
     560} 
     561 
     562/* Cougar Point aka. 6 series & c200 series */ 
     563static int enable_flash_pch6(struct pci_dev *dev, const char *name) 
     564{ 
     565        return enable_flash_ich_dc_spi(dev, name, 12); 
    533566} 
    534567 
    … …  
    11601193        {0x8086, 0x122e, OK, "Intel", "PIIX",           enable_flash_piix4}, 
    11611194        {0x8086, 0x1234, NT, "Intel", "MPIIX",          enable_flash_piix4}, 
    1162         {0x8086, 0x1c44, NT, "Intel", "Z68",            enable_flash_ich10}, 
    1163         {0x8086, 0x1c46, NT, "Intel", "P67",            enable_flash_ich10}, 
    1164         {0x8086, 0x1c47, NT, "Intel", "UM67",           enable_flash_ich10}, 
    1165         {0x8086, 0x1c49, NT, "Intel", "HM65",           enable_flash_ich10}, 
    1166         {0x8086, 0x1c4a, NT, "Intel", "H67",            enable_flash_ich10}, 
    1167         {0x8086, 0x1c4b, NT, "Intel", "HM67",           enable_flash_ich10}, 
    1168         {0x8086, 0x1c4c, NT, "Intel", "Q65",            enable_flash_ich10}, 
    1169         {0x8086, 0x1c4d, NT, "Intel", "QS67",           enable_flash_ich10}, 
    1170         {0x8086, 0x1c4e, NT, "Intel", "Q67",            enable_flash_ich10}, 
    1171         {0x8086, 0x1c4f, NT, "Intel", "QM67",           enable_flash_ich10}, 
    1172         {0x8086, 0x1c50, NT, "Intel", "B65",            enable_flash_ich10}, 
    1173         {0x8086, 0x1c52, NT, "Intel", "C202",           enable_flash_ich10}, 
    1174         {0x8086, 0x1c54, NT, "Intel", "C204",           enable_flash_ich10}, 
    1175         {0x8086, 0x1c56, NT, "Intel", "C206",           enable_flash_ich10}, 
    1176         {0x8086, 0x1c5c, NT, "Intel", "H61",            enable_flash_ich10}, 
     1195        {0x8086, 0x1c44, NT, "Intel", "Z68",            enable_flash_pch6}, 
     1196        {0x8086, 0x1c46, NT, "Intel", "P67",            enable_flash_pch6}, 
     1197        {0x8086, 0x1c47, NT, "Intel", "UM67",           enable_flash_pch6}, 
     1198        {0x8086, 0x1c49, NT, "Intel", "HM65",           enable_flash_pch6}, 
     1199        {0x8086, 0x1c4a, NT, "Intel", "H67",            enable_flash_pch6}, 
     1200        {0x8086, 0x1c4b, NT, "Intel", "HM67",           enable_flash_pch6}, 
     1201        {0x8086, 0x1c4c, NT, "Intel", "Q65",            enable_flash_pch6}, 
     1202        {0x8086, 0x1c4d, NT, "Intel", "QS67",           enable_flash_pch6}, 
     1203        {0x8086, 0x1c4e, NT, "Intel", "Q67",            enable_flash_pch6}, 
     1204        {0x8086, 0x1c4f, NT, "Intel", "QM67",           enable_flash_pch6}, 
     1205        {0x8086, 0x1c50, NT, "Intel", "B65",            enable_flash_pch6}, 
     1206        {0x8086, 0x1c52, NT, "Intel", "C202",           enable_flash_pch6}, 
     1207        {0x8086, 0x1c54, NT, "Intel", "C204",           enable_flash_pch6}, 
     1208        {0x8086, 0x1c56, NT, "Intel", "C206",           enable_flash_pch6}, 
     1209        {0x8086, 0x1c5c, NT, "Intel", "H61",            enable_flash_pch6}, 
    11771210        {0x8086, 0x2410, OK, "Intel", "ICH",            enable_flash_ich_4e}, 
    11781211        {0x8086, 0x2420, OK, "Intel", "ICH0",           enable_flash_ich_4e}, 
    … …  
    12131246        {0x8086, 0x3a1a, OK, "Intel", "ICH10D",         enable_flash_ich10}, 
    12141247        {0x8086, 0x3a1e, NT, "Intel", "ICH10 Engineering Sample", enable_flash_ich10}, 
    1215         {0x8086, 0x3b00, NT, "Intel", "3400 Desktop",   enable_flash_ich10}, 
    1216         {0x8086, 0x3b01, NT, "Intel", "3400 Mobile",    enable_flash_ich10}, 
    1217         {0x8086, 0x3b02, NT, "Intel", "P55",            enable_flash_ich10}, 
    1218         {0x8086, 0x3b03, NT, "Intel", "PM55",           enable_flash_ich10}, 
    1219         {0x8086, 0x3b06, NT, "Intel", "H55",            enable_flash_ich10}, 
    1220         {0x8086, 0x3b07, OK, "Intel", "QM57",           enable_flash_ich10}, 
    1221         {0x8086, 0x3b08, NT, "Intel", "H57",            enable_flash_ich10}, 
    1222         {0x8086, 0x3b09, NT, "Intel", "HM55",           enable_flash_ich10}, 
    1223         {0x8086, 0x3b0a, NT, "Intel", "Q57",            enable_flash_ich10}, 
    1224         {0x8086, 0x3b0b, NT, "Intel", "HM57",           enable_flash_ich10}, 
    1225         {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, 
    1226         {0x8086, 0x3b0e, NT, "Intel", "B55",            enable_flash_ich10}, 
    1227         {0x8086, 0x3b0f, OK, "Intel", "QS57",           enable_flash_ich10}, 
    1228         {0x8086, 0x3b12, NT, "Intel", "3400",           enable_flash_ich10}, 
    1229         {0x8086, 0x3b14, NT, "Intel", "3420",           enable_flash_ich10}, 
    1230         {0x8086, 0x3b16, NT, "Intel", "3450",           enable_flash_ich10}, 
    1231         {0x8086, 0x3b1e, NT, "Intel", "B55",            enable_flash_ich10}, 
     1248        {0x8086, 0x3b00, NT, "Intel", "3400 Desktop",   enable_flash_pch5}, 
     1249        {0x8086, 0x3b01, NT, "Intel", "3400 Mobile",    enable_flash_pch5}, 
     1250        {0x8086, 0x3b02, NT, "Intel", "P55",            enable_flash_pch5}, 
     1251        {0x8086, 0x3b03, NT, "Intel", "PM55",           enable_flash_pch5}, 
     1252        {0x8086, 0x3b06, NT, "Intel", "H55",            enable_flash_pch5}, 
     1253        {0x8086, 0x3b07, OK, "Intel", "QM57",           enable_flash_pch5}, 
     1254        {0x8086, 0x3b08, NT, "Intel", "H57",            enable_flash_pch5}, 
     1255        {0x8086, 0x3b09, NT, "Intel", "HM55",           enable_flash_pch5}, 
     1256        {0x8086, 0x3b0a, NT, "Intel", "Q57",            enable_flash_pch5}, 
     1257        {0x8086, 0x3b0b, NT, "Intel", "HM57",           enable_flash_pch5}, 
     1258        {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_pch5}, 
     1259        {0x8086, 0x3b0e, NT, "Intel", "B55",            enable_flash_pch5}, 
     1260        {0x8086, 0x3b0f, OK, "Intel", "QS57",           enable_flash_pch5}, 
     1261        {0x8086, 0x3b12, NT, "Intel", "3400",           enable_flash_pch5}, 
     1262        {0x8086, 0x3b14, NT, "Intel", "3420",           enable_flash_pch5}, 
     1263        {0x8086, 0x3b16, NT, "Intel", "3450",           enable_flash_pch5}, 
     1264        {0x8086, 0x3b1e, NT, "Intel", "B55",            enable_flash_pch5}, 
    12321265        {0x8086, 0x5031, OK, "Intel", "EP80579",        enable_flash_ich7}, 
    12331266        {0x8086, 0x7000, OK, "Intel", "PIIX3",          enable_flash_piix4}, 
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