Changeset 1445

Timestamp:

09/17/11 23:21:42 (8 months ago)

Author:

stefanct

Message:

ichspi: don't touch the nonexistent(?) BBAR register on ICH8

There is no sign of BBAR (BIOS Base Address Configuration Register)
in the public datasheet (or specification update) of the ICH8. Also,
the offset of that register has changed between ICH7 (SPIBAR + 50h)
and ICH9 (SPIBAR + A0h), so we have no clue if or where it is on
ICH8. Better don't try to touch it at all and assume/hope it is 0.

Signed-off-by: Stefan Tauner <stefan.tauner@…>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@…>

File:

• trunk/ichspi.c (modified) (6 diffs)

trunk/ichspi.c

@@ -571 +571 @@
  * it didn't stick.
  */
-static void ich_set_bbar(uint32_t min_addr)
+static void ich_set_bbar(int ich_generation, uint32_t min_addr)
 {
         int bbar_off;
-        switch (spi_programmer->type) {
-        case SPI_CONTROLLER_ICH7:
-        case SPI_CONTROLLER_VIA:
+        switch (ich_generation) {
+        case 7:
                 bbar_off = 0x50;
                 break;
-        case SPI_CONTROLLER_ICH9:
+        case 8:
+                msg_perr("BBAR offset is unknown on ICH8!\n");
+                return;
+        default:                /* Future version might behave the same */
                 bbar_off = ICH9_REG_BBAR;
                 break;
-        default:
-                msg_perr("Unknown chipset for BBAR setting!\n");
-                return;
         }
         
@@ -601 +600 @@
          */
         if (ichspi_bbar != min_addr)
-                msg_perr("Setting BBAR failed!\n");
+                msg_perr("Setting BBAR to 0x%08x failed! New value: 0x%08x.\n",
+                         min_addr, ichspi_bbar);
 }
 
@@ -670 +670 @@
                 curopcodes_done = &O_ST_M25P;
                 rc = program_opcodes(curopcodes_done, 1);
-                /* Technically not part of opcode init, but it allows opcodes
-                 * to run without transaction errors by setting the lowest
-                 * allowed address to zero.
-                 */
-                ich_set_bbar(0);
         }
 
@@ -1271 +1266 @@
                         ichspi_lock = 1;
                 }
+                ich_set_bbar(ich_generation, 0);
                 ich_init_opcodes();
                 break;
@@ -1352 +1348 @@
                         tmp = mmio_readl(ich_spibar + ICH9_REG_FPB);
                         msg_pdbg("0xD0: 0x%08x (FPB)\n", tmp);
+                        ich_set_bbar(ich_generation, 0);
                 }
 
@@ -1440 +1437 @@
         }
 
+        ich_set_bbar(7, 0);
         ich_init_opcodes();