Ignore:
Timestamp:
11/10/11 00:40:00 (6 months ago)
Author:
hailfinger
Message:

Register Parallel/LPC/FWH programmers the same way SPI programmers are registered.

All programmers are now calling programmer registration functions and
direct manipulations of buses_supported are not needed/possible anymore.

Note: Programmers without parallel/LPC/FWH chip support should not call
register_par_programmer().

Additional fixes:
Set max_rom_decode.parallel for drkaiser.
Remove abuse of programmer_map_flash_region in it85spi.
Annotate several FIXMEs in it85spi.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@…>
Acked-By: Michael Karcher <flashrom@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/chipset_enable.c

    r1461 r1463  
    214214        uint16_t xbcs = 0x4e;   /* X-Bus Chip Select register. */ 
    215215 
    216         buses_supported = BUS_PARALLEL; 
     216        internal_buses_supported = BUS_PARALLEL; 
    217217 
    218218        old = pci_read_word(dev, xbcs); 
     
    304304         * FB_DEC_EN2. 
    305305         */ 
    306         buses_supported = BUS_FWH; 
     306        internal_buses_supported = BUS_FWH; 
    307307        return enable_flash_ich(dev, name, 0x4e); 
    308308} 
     
    413413 
    414414        /* If we're called by enable_flash_ich_dc_spi, it will override 
    415          * buses_supported anyway. 
     415         * internal_buses_supported anyway. 
    416416         */ 
    417         buses_supported = BUS_FWH; 
     417        internal_buses_supported = BUS_FWH; 
    418418        return enable_flash_ich(dev, name, 0xdc); 
    419419} 
     
    435435                rpci_write_byte(dev, 0xd9, new); 
    436436 
    437         buses_supported = BUS_FWH; 
     437        internal_buses_supported = BUS_FWH; 
    438438        return 0; 
    439439} 
     
    469469        if (bnt & 0x02) { 
    470470                /* If strapped to LPC, no SPI initialization is required */ 
    471                 buses_supported = BUS_FWH; 
     471                internal_buses_supported = BUS_FWH; 
    472472                return 0; 
    473473        } 
    474474 
    475475        /* This adds BUS_SPI */ 
    476         buses_supported = BUS_SPI; 
    477476        if (ich_init_spi(dev, tmp, rcrb, 7) != 0) { 
    478477                if (!ret) 
     
    557556         * on ICH7 when the southbridge is strapped to LPC 
    558557         */ 
    559         buses_supported = BUS_FWH; 
     558        internal_buses_supported = BUS_FWH; 
    560559        if (ich_generation == CHIPSET_ICH7) { 
    561560                if (bbs == 0x03) { 
     
    565564                } else { 
    566565                        /* Disable LPC/FWH if strapped to PCI or SPI */ 
    567                         buses_supported = 0; 
     566                        internal_buses_supported = BUS_NONE; 
    568567                } 
    569568        } 
     
    670669#define CS5530_ENABLE_SA20              (1 << 6) 
    671670 
    672         buses_supported = BUS_PARALLEL; 
     671        internal_buses_supported = BUS_PARALLEL; 
    673672        /* Decode 0x000E0000-0x000FFFFF (128 kB), not just 64 kB, and 
    674673         * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 kB. 
     
    823822        } 
    824823 
    825         buses_supported = BUS_LPC | BUS_FWH; 
     824        internal_buses_supported = BUS_LPC | BUS_FWH; 
    826825 
    827826        ret = sb600_probe_spi(dev); 
     
    917916        uint8_t tmp; 
    918917 
    919         buses_supported = BUS_PARALLEL; 
     918        internal_buses_supported = BUS_PARALLEL; 
    920919 
    921920        tmp = INB(0xc06); 
     
    10171016        case 0x0: 
    10181017                ret = enable_flash_mcp55(dev, name); 
    1019                 buses_supported = BUS_LPC; 
     1018                internal_buses_supported = BUS_LPC; 
    10201019                msg_pdbg("Flash bus type is LPC\n"); 
    10211020                break; 
     
    10251024                 * Do we really want to disable LPC in this case? 
    10261025                 */ 
    1027                 buses_supported = BUS_NONE; 
     1026                internal_buses_supported = BUS_NONE; 
    10281027                msg_pdbg("Flash bus type is SPI\n"); 
    10291028                msg_pinfo("SPI on this chipset is WIP. Please report any " 
     
    10331032        default: 
    10341033                /* Should not happen. */ 
    1035                 buses_supported = BUS_NONE; 
     1034                internal_buses_supported = BUS_NONE; 
    10361035                msg_pdbg("Flash bus type is unknown (none)\n"); 
    10371036                msg_pinfo("Something went wrong with bus type detection.\n"); 
     
    13261325        int ret = -2;           /* Nothing! */ 
    13271326        int i; 
    1328         char *s; 
    13291327 
    13301328        /* Now let's try to find the chipset we have... */ 
     
    13781376        } 
    13791377 
    1380         s = flashbuses_to_text(buses_supported); 
    1381         msg_pinfo("This chipset supports the following protocols: %s.\n", s); 
    1382         free(s); 
    1383  
    13841378        return ret; 
    13851379} 
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