Changeset 1474
- Timestamp:
- 12/18/11 16:01:24 (5 months ago)
- Location:
- trunk
- Files:
-
- 42 edited
-
82802ab.c (modified) (13 diffs)
-
a25.c (modified) (4 diffs)
-
at25.c (modified) (11 diffs)
-
atahpt.c (modified) (3 diffs)
-
bitbang_spi.c (modified) (2 diffs)
-
buspirate_spi.c (modified) (2 diffs)
-
chipdrivers.h (modified) (5 diffs)
-
dediprog.c (modified) (1 diff)
-
drkaiser.c (modified) (2 diffs)
-
dummyflasher.c (modified) (8 diffs)
-
flash.h (modified) (3 diffs)
-
flashrom.c (modified) (7 diffs)
-
ft2232_spi.c (modified) (2 diffs)
-
gfxnvidia.c (modified) (2 diffs)
-
ichspi.c (modified) (11 diffs)
-
internal.c (modified) (2 diffs)
-
it85spi.c (modified) (2 diffs)
-
it87spi.c (modified) (4 diffs)
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jedec.c (modified) (22 diffs)
-
linux_spi.c (modified) (4 diffs)
-
m29f400bt.c (modified) (6 diffs)
-
nic3com.c (modified) (3 diffs)
-
nicintel.c (modified) (2 diffs)
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nicnatsemi.c (modified) (3 diffs)
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nicrealtek.c (modified) (3 diffs)
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pm49fl00x.c (modified) (4 diffs)
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programmer.c (modified) (3 diffs)
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programmer.h (modified) (16 diffs)
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satamv.c (modified) (3 diffs)
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satasii.c (modified) (3 diffs)
-
sb600spi.c (modified) (1 diff)
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serprog.c (modified) (8 diffs)
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sharplhf00l04.c (modified) (2 diffs)
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spi.c (modified) (10 diffs)
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spi25.c (modified) (61 diffs)
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sst28sf040.c (modified) (6 diffs)
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sst49lfxxxc.c (modified) (2 diffs)
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sst_fwhub.c (modified) (2 diffs)
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stm50flw0x0x.c (modified) (3 diffs)
-
w29ee011.c (modified) (1 diff)
-
w39.c (modified) (5 diffs)
-
wbsio_spi.c (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/82802ab.c
r1473 r1474 48 48 49 49 /* Reset to get a clean state */ 50 chip_writeb( 0xFF, bios);50 chip_writeb(flash, 0xFF, bios); 51 51 programmer_delay(10); 52 52 53 53 /* Enter ID mode */ 54 chip_writeb( 0x90, bios);55 programmer_delay(10); 56 57 id1 = chip_readb( bios + (0x00 << shifted));58 id2 = chip_readb( bios + (0x01 << shifted));54 chip_writeb(flash, 0x90, bios); 55 programmer_delay(10); 56 57 id1 = chip_readb(flash, bios + (0x00 << shifted)); 58 id2 = chip_readb(flash, bios + (0x01 << shifted)); 59 59 60 60 /* Leave ID mode */ 61 chip_writeb( 0xFF, bios);61 chip_writeb(flash, 0xFF, bios); 62 62 63 63 programmer_delay(10); … … 72 72 * flash contents. 73 73 */ 74 flashcontent1 = chip_readb( bios + (0x00 << shifted));75 flashcontent2 = chip_readb( bios + (0x01 << shifted));74 flashcontent1 = chip_readb(flash, bios + (0x00 << shifted)); 75 flashcontent2 = chip_readb(flash, bios + (0x01 << shifted)); 76 76 77 77 if (id1 == flashcontent1) … … 95 95 chipaddr bios = flash->virtual_memory; 96 96 97 chip_writeb( 0x70, bios);98 if ((chip_readb( bios) & 0x80) == 0) { // it's busy99 while ((chip_readb( bios) & 0x80) == 0) ;100 } 101 102 status = chip_readb( bios);97 chip_writeb(flash, 0x70, bios); 98 if ((chip_readb(flash, bios) & 0x80) == 0) { // it's busy 99 while ((chip_readb(flash, bios) & 0x80) == 0) ; 100 } 101 102 status = chip_readb(flash, bios); 103 103 104 104 /* Reset to get a clean state */ 105 chip_writeb( 0xFF, bios);105 chip_writeb(flash, 0xFF, bios); 106 106 107 107 return status; … … 114 114 115 115 for (i = 0; i < flash->total_size * 1024; i+= flash->page_size) 116 chip_writeb( 0, flash->virtual_registers + i + 2);116 chip_writeb(flash, 0, flash->virtual_registers + i + 2); 117 117 118 118 return 0; … … 126 126 127 127 // clear status register 128 chip_writeb( 0x50, bios + page);128 chip_writeb(flash, 0x50, bios + page); 129 129 130 130 // now start it 131 chip_writeb( 0x20, bios + page);132 chip_writeb( 0xd0, bios + page);131 chip_writeb(flash, 0x20, bios + page); 132 chip_writeb(flash, 0xd0, bios + page); 133 133 programmer_delay(10); 134 134 … … 142 142 143 143 /* chunksize is 1 */ 144 int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) 144 int write_82802ab(struct flashctx *flash, uint8_t *src, unsigned int start, 145 unsigned int len) 145 146 { 146 147 int i; … … 149 150 for (i = 0; i < len; i++) { 150 151 /* transfer data from source to destination */ 151 chip_writeb( 0x40, dst);152 chip_writeb( *src++, dst++);152 chip_writeb(flash, 0x40, dst); 153 chip_writeb(flash, *src++, dst++); 153 154 wait_82802ab(flash); 154 155 } … … 165 166 166 167 /* Clear status register */ 167 chip_writeb( 0x50, bios);168 chip_writeb(flash, 0x50, bios); 168 169 169 170 /* Read identifier codes */ 170 chip_writeb( 0x90, bios);171 chip_writeb(flash, 0x90, bios); 171 172 172 173 /* Read master lock-bit */ 173 mcfg = chip_readb( bios + 0x3);174 mcfg = chip_readb(flash, bios + 0x3); 174 175 msg_cdbg("master lock is "); 175 176 if (mcfg) { … … 182 183 /* Read block lock-bits */ 183 184 for (i = 0; i < flash->total_size * 1024; i+= (64 * 1024)) { 184 bcfg = chip_readb( bios + i + 2); // read block lock config185 bcfg = chip_readb(flash, bios + i + 2); // read block lock config 185 186 msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un"); 186 187 if (bcfg) { … … 190 191 191 192 /* Reset chip */ 192 chip_writeb( 0xFF, bios);193 chip_writeb(flash, 0xFF, bios); 193 194 194 195 /* Unlock: clear block lock-bits, if needed */ 195 196 if (can_unlock && need_unlock) { 196 197 msg_cdbg("Unlock: "); 197 chip_writeb( 0x60, bios);198 chip_writeb( 0xD0, bios);199 chip_writeb( 0xFF, bios);198 chip_writeb(flash, 0x60, bios); 199 chip_writeb(flash, 0xD0, bios); 200 chip_writeb(flash, 0xFF, bios); 200 201 msg_cdbg("Done!\n"); 201 202 } … … 221 222 222 223 /* Read identifier codes */ 223 chip_writeb( 0x90, bios);224 chip_writeb(flash, 0x90, bios); 224 225 225 226 /* Read master lock-bit */ 226 mcfg = chip_readb( bios + 0x3);227 mcfg = chip_readb(flash, bios + 0x3); 227 228 msg_cdbg("master lock is "); 228 229 if (mcfg) { … … 236 237 for (i = 0; i < flash->total_size * 1024; 237 238 i += (i >= (64 * 1024) ? 64 * 1024 : 8 * 1024)) { 238 bcfg = chip_readb( bios + i + 2); /* read block lock config */239 bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */ 239 240 msg_cdbg("block lock at %06x is %slocked!\n", i, 240 241 bcfg ? "" : "un"); … … 244 245 245 246 /* Reset chip */ 246 chip_writeb( 0xFF, bios);247 chip_writeb(flash, 0xFF, bios); 247 248 248 249 /* Unlock: clear block lock-bits, if needed */ 249 250 if (can_unlock && need_unlock) { 250 251 msg_cdbg("Unlock: "); 251 chip_writeb( 0x60, bios);252 chip_writeb( 0xD0, bios);253 chip_writeb( 0xFF, bios);252 chip_writeb(flash, 0x60, bios); 253 chip_writeb(flash, 0xD0, bios); 254 chip_writeb(flash, 0xFF, bios); 254 255 wait_82802ab(flash); 255 256 msg_cdbg("Done!\n"); -
trunk/a25.c
r1473 r1474 34 34 uint8_t status; 35 35 36 status = spi_read_status_register( );36 status = spi_read_status_register(flash); 37 37 msg_cdbg("Chip status register is %02x\n", status); 38 38 … … 50 50 uint8_t status; 51 51 52 status = spi_read_status_register( );52 status = spi_read_status_register(flash); 53 53 msg_cdbg("Chip status register is %02x\n", status); 54 54 … … 65 65 uint8_t status; 66 66 67 status = spi_read_status_register( );67 status = spi_read_status_register(flash); 68 68 msg_cdbg("Chip status register is %02x\n", status); 69 69 … … 83 83 uint8_t status; 84 84 85 status = spi_read_status_register( );85 status = spi_read_status_register(flash); 86 86 msg_cdbg("Chip status register is %02x\n", status); 87 87 -
trunk/at25.c
r1473 r1474 62 62 uint8_t status; 63 63 64 status = spi_read_status_register( );64 status = spi_read_status_register(flash); 65 65 msg_cdbg("Chip status register is %02x\n", status); 66 66 … … 85 85 uint8_t status; 86 86 87 status = spi_read_status_register( );87 status = spi_read_status_register(flash); 88 88 msg_cdbg("Chip status register is %02x\n", status); 89 89 … … 104 104 uint8_t status; 105 105 106 status = spi_read_status_register( );106 status = spi_read_status_register(flash); 107 107 msg_cdbg("Chip status register is %02x\n", status); 108 108 … … 128 128 uint8_t status; 129 129 130 status = spi_read_status_register( );130 status = spi_read_status_register(flash); 131 131 msg_cdbg("Chip status register is %02x\n", status); 132 132 … … 152 152 uint8_t status; 153 153 154 status = spi_read_status_register( );154 status = spi_read_status_register(flash); 155 155 msg_cdbg("Chip status register is %02x\n", status); 156 156 … … 169 169 int result; 170 170 171 status = spi_read_status_register( );171 status = spi_read_status_register(flash); 172 172 /* If block protection is disabled, stop here. */ 173 173 if ((status & (3 << 2)) == 0) … … 196 196 return result; 197 197 } 198 status = spi_read_status_register( );198 status = spi_read_status_register(flash); 199 199 if ((status & (3 << 2)) != 0) { 200 200 msg_cerr("Block protection could not be disabled!\n"); … … 224 224 int result; 225 225 226 status = spi_read_status_register( );226 status = spi_read_status_register(flash); 227 227 /* If block protection is disabled, stop here. */ 228 228 if ((status & 0x6c) == 0) … … 245 245 return result; 246 246 } 247 status = spi_read_status_register( );247 status = spi_read_status_register(flash); 248 248 if ((status & 0x6c) != 0) { 249 249 msg_cerr("Block protection could not be disabled!\n"); … … 258 258 int result; 259 259 260 status = spi_read_status_register( );260 status = spi_read_status_register(flash); 261 261 /* If block protection is disabled, stop here. */ 262 262 if ((status & 0x7c) == 0) … … 279 279 return result; 280 280 } 281 status = spi_read_status_register( );281 status = spi_read_status_register(flash); 282 282 if ((status & 0x7c) != 0) { 283 283 msg_cerr("Block protection could not be disabled!\n"); -
trunk/atahpt.c
r1463 r1474 41 41 }; 42 42 43 static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val, 44 chipaddr addr); 45 static uint8_t atahpt_chip_readb(const struct flashctx *flash, 46 const chipaddr addr); 43 47 static const struct par_programmer par_programmer_atahpt = { 44 48 .chip_readb = atahpt_chip_readb, … … 81 85 } 82 86 83 void atahpt_chip_writeb(uint8_t val, chipaddr addr) 87 static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val, 88 chipaddr addr) 84 89 { 85 90 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); … … 87 92 } 88 93 89 uint8_t atahpt_chip_readb(const chipaddr addr) 94 static uint8_t atahpt_chip_readb(const struct flashctx *flash, 95 const chipaddr addr) 90 96 { 91 97 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); -
trunk/bitbang_spi.c
r1414 r1474 64 64 } 65 65 66 static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, 67 const unsigned char *writearr, unsigned char *readarr); 66 static int bitbang_spi_send_command(struct flashctx *flash, 67 unsigned int writecnt, unsigned int readcnt, 68 const unsigned char *writearr, 69 unsigned char *readarr); 68 70 69 71 static const struct spi_programmer spi_programmer_bitbang = { … … 142 144 } 143 145 144 static int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, 145 const unsigned char *writearr, unsigned char *readarr) 146 static int bitbang_spi_send_command(struct flashctx *flash, 147 unsigned int writecnt, unsigned int readcnt, 148 const unsigned char *writearr, 149 unsigned char *readarr) 146 150 { 147 151 int i; -
trunk/buspirate_spi.c
r1470 r1474 87 87 } 88 88 89 static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, 90 const unsigned char *writearr, unsigned char *readarr); 89 static int buspirate_spi_send_command(struct flashctx *flash, 90 unsigned int writecnt, 91 unsigned int readcnt, 92 const unsigned char *writearr, 93 unsigned char *readarr); 91 94 92 95 static const struct spi_programmer spi_programmer_buspirate = { … … 292 295 } 293 296 294 static int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, 295 const unsigned char *writearr, unsigned char *readarr) 297 static int buspirate_spi_send_command(struct flashctx *flash, 298 unsigned int writecnt, 299 unsigned int readcnt, 300 const unsigned char *writearr, 301 unsigned char *readarr) 296 302 { 297 303 static unsigned char *buf = NULL; -
trunk/chipdrivers.h
r1473 r1474 34 34 int probe_spi_res1(struct flashctx *flash); 35 35 int probe_spi_res2(struct flashctx *flash); 36 int spi_write_enable( void);37 int spi_write_disable( void);36 int spi_write_enable(struct flashctx *flash); 37 int spi_write_disable(struct flashctx *flash); 38 38 int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); 39 39 int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen); … … 45 45 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); 46 46 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len); 47 uint8_t spi_read_status_register( void);47 uint8_t spi_read_status_register(struct flashctx *flash); 48 48 int spi_write_status_register(struct flashctx *flash, int status); 49 49 void spi_prettyprint_status_register_bit(uint8_t status, int bit); … … 52 52 int spi_prettyprint_status_register(struct flashctx *flash); 53 53 int spi_disable_blockprotect(struct flashctx *flash); 54 int spi_byte_program( unsigned int addr, uint8_t databyte);55 int spi_nbyte_program( unsigned int addr, uint8_t *bytes, unsigned int len);56 int spi_nbyte_read( unsigned int addr, uint8_t *bytes, unsigned int len);54 int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte); 55 int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); 56 int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); 57 57 int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); 58 58 int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); … … 96 96 /* jedec.c */ 97 97 uint8_t oddparity(uint8_t val); 98 void toggle_ready_jedec( chipaddr dst);99 void data_polling_jedec( chipaddr dst, uint8_t data);100 int write_byte_program_jedec( chipaddr bios, uint8_t *src,98 void toggle_ready_jedec(struct flashctx *flash, chipaddr dst); 99 void data_polling_jedec(struct flashctx *flash, chipaddr dst, uint8_t data); 100 int write_byte_program_jedec(struct flashctx *flash, chipaddr bios, uint8_t *src, 101 101 chipaddr dst); 102 102 int probe_jedec(struct flashctx *flash); … … 112 112 int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len); 113 113 int write_m29f400bt(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); 114 void protect_m29f400bt( chipaddr bios);114 void protect_m29f400bt(struct flashctx *flash, chipaddr bios); 115 115 116 116 /* pm49fl00x.c */ -
trunk/dediprog.c
r1473 r1474 318 318 } 319 319 320 static int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, 321 const unsigned char *writearr, unsigned char *readarr) 320 static int dediprog_spi_send_command(struct flashctx *flash, 321 unsigned int writecnt, 322 unsigned int readcnt, 323 const unsigned char *writearr, 324 unsigned char *readarr) 322 325 { 323 326 int ret; -
trunk/drkaiser.c
r1463 r1474 40 40 static uint8_t *drkaiser_bar; 41 41 42 static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val, 43 chipaddr addr); 44 static uint8_t drkaiser_chip_readb(const struct flashctx *flash, 45 const chipaddr addr); 42 46 static const struct par_programmer par_programmer_drkaiser = { 43 47 .chip_readb = drkaiser_chip_readb, … … 85 89 } 86 90 87 void drkaiser_chip_writeb(uint8_t val, chipaddr addr) 91 static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val, 92 chipaddr addr) 88 93 { 89 94 pci_mmio_writeb(val, drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); 90 95 } 91 96 92 uint8_t drkaiser_chip_readb(const chipaddr addr) 97 static uint8_t drkaiser_chip_readb(const struct flashctx *flash, 98 const chipaddr addr) 93 99 { 94 100 return pci_mmio_readb(drkaiser_bar + (addr & DRKAISER_MEMMAP_MASK)); -
trunk/dummyflasher.c
r1473 r1474 61 61 static unsigned int spi_write_256_chunksize = 256; 62 62 63 static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, 64 const unsigned char *writearr, unsigned char *readarr); 63 static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt, 64 unsigned int readcnt, 65 const unsigned char *writearr, 66 unsigned char *readarr); 65 67 static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf, 66 68 unsigned int start, unsigned int len); 69 static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, 70 chipaddr addr); 71 static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, 72 chipaddr addr); 73 static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, 74 chipaddr addr); 75 static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf, 76 chipaddr addr, size_t len); 77 static uint8_t dummy_chip_readb(const struct flashctx *flash, 78 const chipaddr addr); 79 static uint16_t dummy_chip_readw(const struct flashctx *flash, 80 const chipaddr addr); 81 static uint32_t dummy_chip_readl(const struct flashctx *flash, 82 const chipaddr addr); 83 static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, 84 const chipaddr addr, size_t len); 67 85 68 86 static const struct spi_programmer spi_programmer_dummyflasher = { … … 264 282 } 265 283 266 void dummy_chip_writeb(uint8_t val, chipaddr addr) 284 static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, 285 chipaddr addr) 267 286 { 268 287 msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val); 269 288 } 270 289 271 void dummy_chip_writew(uint16_t val, chipaddr addr) 290 static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, 291 chipaddr addr) 272 292 { 273 293 msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val); 274 294 } 275 295 276 void dummy_chip_writel(uint32_t val, chipaddr addr) 296 static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, 297 chipaddr addr) 277 298 { 278 299 msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); 279 300 } 280 301 281 void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len) 302 static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf, 303 chipaddr addr, size_t len) 282 304 { 283 305 size_t i; … … 291 313 } 292 314 293 uint8_t dummy_chip_readb(const chipaddr addr) 315 static uint8_t dummy_chip_readb(const struct flashctx *flash, 316 const chipaddr addr) 294 317 { 295 318 msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr); … … 297 320 } 298 321 299 uint16_t dummy_chip_readw(const chipaddr addr) 322 static uint16_t dummy_chip_readw(const struct flashctx *flash, 323 const chipaddr addr) 300 324 { 301 325 msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr); … … 303 327 } 304 328 305 uint32_t dummy_chip_readl(const chipaddr addr) 329 static uint32_t dummy_chip_readl(const struct flashctx *flash, 330 const chipaddr addr) 306 331 { 307 332 msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr); … … 309 334 } 310 335 311 void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) 336 static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, 337 const chipaddr addr, size_t len) 312 338 { 313 339 msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", … … 318 344 319 345 #if EMULATE_SPI_CHIP 320 static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt, 321 const unsigned char *writearr, unsigned char *readarr) 346 static int emulate_spi_chip_response(unsigned int writecnt, 347 unsigned int readcnt, 348 const unsigned char *writearr, 349 unsigned char *readarr) 322 350 { 323 351 unsigned int offs; … … 514 542 #endif 515 543 516 static int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, 517 const unsigned char *writearr, unsigned char *readarr) 544 static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt, 545 unsigned int readcnt, 546 const unsigned char *writearr, 547 unsigned char *readarr) 518 548 { 519 549 int i; -
trunk/flash.h
r1473 r1474 45 45 size_t len); 46 46 void programmer_unmap_flash_region(void *virt_addr, size_t len); 47 void chip_writeb(uint8_t val, chipaddr addr);48 void chip_writew(uint16_t val, chipaddr addr);49 void chip_writel(uint32_t val, chipaddr addr);50 void chip_writen(uint8_t *buf, chipaddr addr, size_t len);51 uint8_t chip_readb(const chipaddr addr);52 uint16_t chip_readw(const chipaddr addr);53 uint32_t chip_readl(const chipaddr addr);54 void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);55 47 void programmer_delay(int usecs); 56 48 … … 213 205 extern const struct flashchip flashchips[]; 214 206 207 void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); 208 void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); 209 void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); 210 void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); 211 uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr); 212 uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr); 213 uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr); 214 void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); 215 215 216 /* print.c */ 216 217 char *flashbuses_to_text(enum chipbustype bustype); … … 293 294 unsigned char *readarr; 294 295 }; 295 int spi_send_command(unsigned int writecnt, unsigned int readcnt, 296 const unsigned char *writearr, unsigned char *readarr); 297 int spi_send_multicommand(struct spi_command *cmds); 298 uint32_t spi_get_valid_read_addr(void); 296 int spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); 297 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds); 298 uint32_t spi_get_valid_read_addr(struct flashctx *flash); 299 299 300 300 #endif /* !__FLASH_H__ */ -
trunk/flashrom.c
r1473 r1474 360 360 } 361 361 362 void chip_writeb(uint8_t val, chipaddr addr) 363 { 364 par_programmer->chip_writeb(val, addr); 365 } 366 367 void chip_writew(uint16_t val, chipaddr addr) 368 { 369 par_programmer->chip_writew(val, addr); 370 } 371 372 void chip_writel(uint32_t val, chipaddr addr) 373 { 374 par_programmer->chip_writel(val, addr); 375 } 376 377 void chip_writen(uint8_t *buf, chipaddr addr, size_t len) 378 { 379 par_programmer->chip_writen(buf, addr, len); 380 } 381 382 uint8_t chip_readb(const chipaddr addr) 383 { 384 return par_programmer->chip_readb(addr); 385 } 386 387 uint16_t chip_readw(const chipaddr addr) 388 { 389 return par_programmer->chip_readw(addr); 390 } 391 392 uint32_t chip_readl(const chipaddr addr) 393 { 394 return par_programmer->chip_readl(addr); 395 } 396 397 void chip_readn(uint8_t *buf, chipaddr addr, size_t len) 398 { 399 par_programmer->chip_readn(buf, addr, len); 362 void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) 363 { 364 par_programmer->chip_writeb(flash, val, addr); 365 } 366 367 void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr) 368 { 369 par_programmer->chip_writew(flash, val, addr); 370 } 371 372 void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr) 373 { 374 par_programmer->chip_writel(flash, val, addr); 375 } 376 377 void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, 378 size_t len) 379 { 380 par_programmer->chip_writen(flash, buf, addr, len); 381 } 382 383 uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr) 384 { 385 return par_programmer->chip_readb(flash, addr); 386 } 387 388 uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr) 389 { 390 return par_programmer->chip_readw(flash, addr); 391 } 392 393 uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr) 394 { 395 return par_programmer->chip_readl(flash, addr); 396 } 397 398 void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr, 399 size_t len) 400 { 401 par_programmer->chip_readn(flash, buf, addr, len); 400 402 } 401 403 … … 413 415 } 414 416 415 int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len) 416 { 417 chip_readn(buf, flash->virtual_memory + start, len); 417 int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, 418 int unsigned len) 419 { 420 chip_readn(flash, buf, flash->virtual_memory + start, len); 418 421 419 422 return 0; … … 536 539 537 540 /* start is an offset to the base address of the flash chip */ 538 int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len) 541 int check_erased_range(struct flashctx *flash, unsigned int start, 542 unsigned int len) 539 543 { 540 544 int ret; … … 559 563 * @return 0 for success, -1 for failure 560 564 */ 561 int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len,562 const char *message)565 int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, 566 unsigned int len, const char *message) 563 567 { 564 568 unsigned int i; … … 1538 1542 * after the members copied from struct flashchip. 1539 1543 */ 1540 if (sizeof(struct flashchip) != offsetof(struct flashctx, virtual_memory)) { 1544 if (sizeof(struct flashchip) != 1545 offsetof(struct flashctx, virtual_memory)) { 1541 1546 msg_gerr("struct flashctx broken!\n"); 1542 1547 ret = 1; … … 1619 1624 * function signature. 1620 1625 */ 1621 int chip_safety_check(struct flashctx *flash, int force, int read_it, int write_it, int erase_it, int verify_it) 1626 int chip_safety_check(struct flashctx *flash, int force, int read_it, 1627 int write_it, int erase_it, int verify_it) 1622 1628 { 1623 1629 if (!programmer_may_write && (write_it || erase_it)) { … … 1680 1686 * Besides that, the function itself is a textbook example of abysmal code flow. 1681 1687 */ 1682 int doit(struct flashctx *flash, int force, const char *filename, int read_it, int write_it, int erase_it, int verify_it) 1688 int doit(struct flashctx *flash, int force, const char *filename, int read_it, 1689 int write_it, int erase_it, int verify_it) 1683 1690 { 1684 1691 uint8_t *oldcontents; -
trunk/ft2232_spi.c
r1453 r1474 145 145 } 146 146 147 static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, 148 const unsigned char *writearr, unsigned char *readarr); 147 static int ft2232_spi_send_command(struct flashctx *flash, 148 unsigned int writecnt, unsigned int readcnt, 149 const unsigned char *writearr, 150 unsigned char *readarr); 149 151 150 152 static const struct spi_programmer spi_programmer_ft2232 = { … … 343 345 344 346 /* Returns 0 upon success, a negative number upon errors. */ 345 static int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, 346 const unsigned char *writearr, unsigned char *readarr) 347 static int ft2232_spi_send_command(struct flashctx *flash, 348 unsigned int writecnt, unsigned int readcnt, 349 const unsigned char *writearr, 350 unsigned char *readarr) 347 351 { 348 352 struct ftdi_context *ftdic = &ftdic_context; -
trunk/gfxnvidia.c
r1463 r1474 62 62 }; 63 63 64 static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val, 65 chipaddr addr); 66 static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash, 67 const chipaddr addr); 64 68 static const struct par_programmer par_programmer_gfxnvidia = { 65 69 .chip_readb = gfxnvidia_chip_readb, … … 113 117 } 114 118 115 void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr) 119 static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val, 120 chipaddr addr) 116 121 { 117 122 pci_mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); 118 123 } 119 124 120 uint8_t gfxnvidia_chip_readb(const chipaddr addr) 125 static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash, 126 const chipaddr addr) 121 127 { 122 128 return pci_mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK)); -
trunk/ichspi.c
r1473 r1474 229 229 static int generate_opcodes(OPCODES * op); 230 230 static int program_opcodes(OPCODES *op, int enable_undo); 231 static int run_opcode( OPCODE op, uint32_t offset,231 static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset, 232 232 uint8_t datalength, uint8_t * data); 233 233 … … 639 639 * may even crash. 640 640 */ 641 static void ich_read_data(uint8_t *data, int len, int reg0_off)641 static void ich_read_data(uint8_t *data, int len, int reg0_off) 642 642 { 643 643 int i; … … 957 957 } 958 958 959 static int run_opcode( OPCODE op, uint32_t offset,959 static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset, 960 960 uint8_t datalength, uint8_t * data) 961 961 { … … 984 984 } 985 985 986 static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, 987 const unsigned char *writearr, unsigned char *readarr) 986 static int ich_spi_send_command(struct flashctx *flash, unsigned int writecnt, 987 unsigned int readcnt, 988 const unsigned char *writearr, 989 unsigned char *readarr) 988 990 { 989 991 int result; … … 1077 1079 } 1078 1080 1079 result = run_opcode( *opcode, addr, count, data);1081 result = run_opcode(flash, *opcode, addr, count, data); 1080 1082 if (result) { 1081 1083 msg_pdbg("Running OPCODE 0x%02x failed ", opcode->opcode); … … 1176 1178 } 1177 1179 1178 int ich_hwseq_probe(struct flashctx *flash)1180 static int ich_hwseq_probe(struct flashctx *flash) 1179 1181 { 1180 1182 uint32_t total_size, boundary; … … 1229 1231 } 1230 1232 1231 int ich_hwseq_block_erase(struct flashctx *flash, 1232 unsigned int addr, 1233 unsigned int len) 1233 static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr, 1234 unsigned int len) 1234 1235 { 1235 1236 uint32_t erase_block; … … 1279 1280 } 1280 1281 1281 int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, unsigned int addr,1282 unsigned int len)1282 static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, 1283 unsigned int addr, unsigned int len) 1283 1284 { 1284 1285 uint16_t hsfc; … … 1317 1318 } 1318 1319 1319 int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, unsigned int addr,1320 unsigned int len)1320 static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf, 1321 unsigned int addr, unsigned int len) 1321 1322 { 1322 1323 uint16_t hsfc; … … 1356 1357 } 1357 1358 1358 static int ich_spi_send_multicommand(struct spi_command *cmds) 1359 static int ich_spi_send_multicommand(struct flashctx *flash, 1360 struct spi_command *cmds) 1359 1361 { 1360 1362 int ret = 0; … … 1406 1408 */ 1407 1409 } 1408 ret = ich_spi_send_command( cmds->writecnt, cmds->readcnt,1410 ret = ich_spi_send_command(flash, cmds->writecnt, cmds->readcnt, 1409 1411 cmds->writearr, cmds->readarr); 1410 1412 /* Reset the type of all opcodes to non-atomic. */ -
trunk/internal.c
r1463 r1474 128 128 int laptop_ok = 0; 129 129 130 static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, 131 chipaddr addr); 132 static void internal_chip_writew(const struct flashctx *flash, uint16_t val, 133 chipaddr addr); 134 static void internal_chip_writel(const struct flashctx *flash, uint32_t val, 135 chipaddr addr); 136 static uint8_t internal_chip_readb(const struct flashctx *flash, 137 const chipaddr addr); 138 static uint16_t internal_chip_readw(const struct flashctx *flash, 139 const chipaddr addr); 140 static uint32_t internal_chip_readl(const struct flashctx *flash, 141 const chipaddr addr); 142 static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, 143 const chipaddr addr, size_t len); 130 144 static const struct par_programmer par_programmer_internal = { 131 145 .chip_readb = internal_chip_readb, … … 325 339 #endif 326 340 327 void internal_chip_writeb(uint8_t val, chipaddr addr) 341 static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, 342 chipaddr addr) 328 343 { 329 344 mmio_writeb(val, (void *) addr); 330 345 } 331 346 332 void internal_chip_writew(uint16_t val, chipaddr addr) 347 static void internal_chip_writew(const struct flashctx *flash, uint16_t val, 348 chipaddr addr) 333 349 { 334 350 mmio_writew(val, (void *) addr); 335 351 } 336 352 337 void internal_chip_writel(uint32_t val, chipaddr addr) 353 static void internal_chip_writel(const struct flashctx *flash, uint32_t val, 354 chipaddr addr) 338 355 { 339 356 mmio_writel(val, (void *) addr); 340 357 } 341 358 342 uint8_t internal_chip_readb(const chipaddr addr) 359 static uint8_t internal_chip_readb(const struct flashctx *flash, 360 const chipaddr addr) 343 361 { 344 362 return mmio_readb((void *) addr); 345 363 } 346 364 347 uint16_t internal_chip_readw(const chipaddr addr) 365 static uint16_t internal_chip_readw(const struct flashctx *flash, 366 const chipaddr addr) 348 367 { 349 368 return mmio_readw((void *) addr); 350 369 } 351 370 352 uint32_t internal_chip_readl(const chipaddr addr) 371 static uint32_t internal_chip_readl(const struct flashctx *flash, 372 const chipaddr addr) 353 373 { 354 374 return mmio_readl((void *) addr); 355 375 } 356 376 357 void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) 377 static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, 378 const chipaddr addr, size_t len) 358 379 { 359 380 memcpy(buf, (void *)addr, len); -
trunk/it85spi.c
r1463 r1474 271 271 } 272 272 273 static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, 274 const unsigned char *writearr, unsigned char *readarr); 273 static int it85xx_spi_send_command(struct flashctx *flash, 274 unsigned int writecnt, unsigned int readcnt, 275 const unsigned char *writearr, 276 unsigned char *readarr); 275 277 276 278 static const struct spi_programmer spi_programmer_it85xx = { … … 321 323 * data from MISO) 322 324 */ 323 static int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt, 324 const unsigned char *writearr, unsigned char *readarr) 325 static int it85xx_spi_send_command(struct flashctx *flash, 326 unsigned int writecnt, unsigned int readcnt, 327 const unsigned char *writearr, 328 unsigned char *readarr) 325 329 { 326 330 int i; -
trunk/it87spi.c
r1473 r1474 104 104 } 105 105 106 static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, 107 const unsigned char *writearr, unsigned char *readarr); 106 static int it8716f_spi_send_command(struct flashctx *flash, 107 unsigned int writecnt, unsigned int readcnt, 108 const unsigned char *writearr, 109 unsigned char *readarr); 108 110 static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf, 109 111 unsigned int start, unsigned int len); … … 248 250 * ordering in case 4 and 5 may seem strange. 249 251 */ 250 static int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt, 251 const unsigned char *writearr, unsigned char *readarr) 252 static int it8716f_spi_send_command(struct flashctx *flash, 253 unsigned int writecnt, unsigned int readcnt, 254 const unsigned char *writearr, 255 unsigned char *readarr) 252 256 { 253 257 uint8_t busy, writeenc; … … 320 324 chipaddr bios = flash->virtual_memory; 321 325 322 result = spi_write_enable( );326 result = spi_write_enable(flash); 323 327 if (result) 324 328 return result; … … 327 331 OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); 328 332 for (i = 0; i < flash->page_size; i++) 329 chip_writeb( buf[i], bios + start + i);333 chip_writeb(flash, buf[i], bios + start + i); 330 334 OUTB(0, it8716f_flashport); 331 335 /* Wait until the Write-In-Progress bit is cleared. 332 336 * This usually takes 1-10 ms, so wait in 1 ms steps. 333 337 */ 334 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)338 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 335 339 programmer_delay(1000); 336 340 return 0; -
trunk/jedec.c
r1473 r1474 38 38 } 39 39 40 static void toggle_ready_jedec_common(chipaddr dst, int delay) 40 static void toggle_ready_jedec_common(const struct flashctx *flash, 41 chipaddr dst, int delay) 41 42 { 42 43 unsigned int i = 0; 43 44 uint8_t tmp1, tmp2; 44 45 45 tmp1 = chip_readb( dst) & 0x40;46 tmp1 = chip_readb(flash, dst) & 0x40; 46 47 47 48 while (i++ < 0xFFFFFFF) { 48 49 if (delay) 49 50 programmer_delay(delay); 50 tmp2 = chip_readb( dst) & 0x40;51 tmp2 = chip_readb(flash, dst) & 0x40; 51 52 if (tmp1 == tmp2) { 52 53 break; … … 58 59 } 59 60 60 void toggle_ready_jedec(c hipaddr dst)61 { 62 toggle_ready_jedec_common( dst, 0);61 void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst) 62 { 63 toggle_ready_jedec_common(flash, dst, 0); 63 64 } 64 65 … … 70 71 * toggle_ready_jedec_slow in erase functions. 71 72 */ 72 static void toggle_ready_jedec_slow(chipaddr dst) 73 { 74 toggle_ready_jedec_common(dst, 8 * 1000); 75 } 76 77 void data_polling_jedec(chipaddr dst, uint8_t data) 73 static void toggle_ready_jedec_slow(const struct flashctx *flash, chipaddr dst) 74 { 75 toggle_ready_jedec_common(flash, dst, 8 * 1000); 76 } 77 78 void data_polling_jedec(const struct flashctx *flash, chipaddr dst, 79 uint8_t data) 78 80 { 79 81 unsigned int i = 0; … … 83 85 84 86 while (i++ < 0xFFFFFFF) { 85 tmp = chip_readb( dst) & 0x80;87 tmp = chip_readb(flash, dst) & 0x80; 86 88 if (tmp == data) { 87 89 break; … … 111 113 } 112 114 113 static void start_program_jedec_common(struct flashctx *flash, unsigned int mask) 114 { 115 chipaddr bios = flash->virtual_memory; 116 chip_writeb(0xAA, bios + (0x5555 & mask)); 117 chip_writeb(0x55, bios + (0x2AAA & mask)); 118 chip_writeb(0xA0, bios + (0x5555 & mask)); 115 static void start_program_jedec_common(struct flashctx *flash, 116 unsigned int mask) 117 { 118 chipaddr bios = flash->virtual_memory; 119 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 120 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 121 chip_writeb(flash, 0xA0, bios + (0x5555 & mask)); 119 122 } 120 123 … … 151 154 if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) 152 155 { 153 chip_writeb( 0xAA, bios + (0x5555 & mask));156 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 154 157 if (probe_timing_exit) 155 158 programmer_delay(10); 156 chip_writeb( 0x55, bios + (0x2AAA & mask));159 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 157 160 if (probe_timing_exit) 158 161 programmer_delay(10); 159 162 } 160 chip_writeb( 0xF0, bios + (0x5555 & mask));163 chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); 161 164 if (probe_timing_exit) 162 165 programmer_delay(probe_timing_exit); 163 166 164 167 /* Issue JEDEC Product ID Entry command */ 165 chip_writeb( 0xAA, bios + (0x5555 & mask));168 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 166 169 if (probe_timing_enter) 167 170 programmer_delay(10); 168 chip_writeb( 0x55, bios + (0x2AAA & mask));171 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 169 172 if (probe_timing_enter) 170 173 programmer_delay(10); 171 chip_writeb( 0x90, bios + (0x5555 & mask));174 chip_writeb(flash, 0x90, bios + (0x5555 & mask)); 172 175 if (probe_timing_enter) 173 176 programmer_delay(probe_timing_enter); 174 177 175 178 /* Read product ID */ 176 id1 = chip_readb( bios);177 id2 = chip_readb( bios + 0x01);179 id1 = chip_readb(flash, bios); 180 id2 = chip_readb(flash, bios + 0x01); 178 181 largeid1 = id1; 179 182 largeid2 = id2; … … 182 185 if (id1 == 0x7F) { 183 186 largeid1 <<= 8; 184 id1 = chip_readb( bios + 0x100);187 id1 = chip_readb(flash, bios + 0x100); 185 188 largeid1 |= id1; 186 189 } 187 190 if (id2 == 0x7F) { 188 191 largeid2 <<= 8; 189 id2 = chip_readb( bios + 0x101);192 id2 = chip_readb(flash, bios + 0x101); 190 193 largeid2 |= id2; 191 194 } … … 194 197 if ((flash->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) 195 198 { 196 chip_writeb( 0xAA, bios + (0x5555 & mask));199 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 197 200 if (probe_timing_exit) 198 201 programmer_delay(10); 199 chip_writeb( 0x55, bios + (0x2AAA & mask));202 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 200 203 if (probe_timing_exit) 201 204 programmer_delay(10); 202 205 } 203 chip_writeb( 0xF0, bios + (0x5555 & mask));206 chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); 204 207 if (probe_timing_exit) 205 208 programmer_delay(probe_timing_exit); … … 210 213 211 214 /* Read the product ID location again. We should now see normal flash contents. */ 212 flashcontent1 = chip_readb( bios);213 flashcontent2 = chip_readb( bios + 0x01);215 flashcontent1 = chip_readb(flash, bios); 216 flashcontent2 = chip_readb(flash, bios + 0x01); 214 217 215 218 /* Check if it is a continuation ID, this should be a while loop. */ 216 219 if (flashcontent1 == 0x7F) { 217 220 flashcontent1 <<= 8; 218 flashcontent1 |= chip_readb( bios + 0x100);221 flashcontent1 |= chip_readb(flash, bios + 0x100); 219 222 } 220 223 if (flashcontent2 == 0x7F) { 221 224 flashcontent2 <<= 8; 222 flashcontent2 |= chip_readb( bios + 0x101);225 flashcontent2 |= chip_readb(flash, bios + 0x101); 223 226 } 224 227 … … 239 242 240 243 static int erase_sector_jedec_common(struct flashctx *flash, unsigned int page, 241 unsigned int pagesize, unsigned int mask)244 unsigned int pagesize, unsigned int mask) 242 245 { 243 246 chipaddr bios = flash->virtual_memory; … … 247 250 248 251 /* Issue the Sector Erase command */ 249 chip_writeb( 0xAA, bios + (0x5555 & mask));250 programmer_delay(delay_us); 251 chip_writeb( 0x55, bios + (0x2AAA & mask));252 programmer_delay(delay_us); 253 chip_writeb( 0x80, bios + (0x5555 & mask));254 programmer_delay(delay_us); 255 256 chip_writeb( 0xAA, bios + (0x5555 & mask));257 programmer_delay(delay_us); 258 chip_writeb( 0x55, bios + (0x2AAA & mask));259 programmer_delay(delay_us); 260 chip_writeb( 0x30, bios + page);252 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 253 programmer_delay(delay_us); 254 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 255 programmer_delay(delay_us); 256 chip_writeb(flash, 0x80, bios + (0x5555 & mask)); 257 programmer_delay(delay_us); 258 259 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 260 programmer_delay(delay_us); 261 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 262 programmer_delay(delay_us); 263 chip_writeb(flash, 0x30, bios + page); 261 264 programmer_delay(delay_us); 262 265 263 266 /* wait for Toggle bit ready */ 264 toggle_ready_jedec_slow( bios);267 toggle_ready_jedec_slow(flash, bios); 265 268 266 269 /* FIXME: Check the status register for errors. */ … … 269 272 270 273 static int erase_block_jedec_common(struct flashctx *flash, unsigned int block, 271 unsigned int blocksize, unsigned int mask)274 unsigned int blocksize, unsigned int mask) 272 275 { 273 276 chipaddr bios = flash->virtual_memory; … … 277 280 278 281 /* Issue the Sector Erase command */ 279 chip_writeb( 0xAA, bios + (0x5555 & mask));280 programmer_delay(delay_us); 281 chip_writeb( 0x55, bios + (0x2AAA & mask));282 programmer_delay(delay_us); 283 chip_writeb( 0x80, bios + (0x5555 & mask));284 programmer_delay(delay_us); 285 286 chip_writeb( 0xAA, bios + (0x5555 & mask));287 programmer_delay(delay_us); 288 chip_writeb( 0x55, bios + (0x2AAA & mask));289 programmer_delay(delay_us); 290 chip_writeb( 0x50, bios + block);282 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 283 programmer_delay(delay_us); 284 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 285 programmer_delay(delay_us); 286 chip_writeb(flash, 0x80, bios + (0x5555 & mask)); 287 programmer_delay(delay_us); 288 289 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 290 programmer_delay(delay_us); 291 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 292 programmer_delay(delay_us); 293 chip_writeb(flash, 0x50, bios + block); 291 294 programmer_delay(delay_us); 292 295 293 296 /* wait for Toggle bit ready */ 294 toggle_ready_jedec_slow( bios);297 toggle_ready_jedec_slow(flash, bios); 295 298 296 299 /* FIXME: Check the status register for errors. */ … … 306 309 307 310 /* Issue the JEDEC Chip Erase command */ 308 chip_writeb( 0xAA, bios + (0x5555 & mask));309 programmer_delay(delay_us); 310 chip_writeb( 0x55, bios + (0x2AAA & mask));311 programmer_delay(delay_us); 312 chip_writeb( 0x80, bios + (0x5555 & mask));313 programmer_delay(delay_us); 314 315 chip_writeb( 0xAA, bios + (0x5555 & mask));316 programmer_delay(delay_us); 317 chip_writeb( 0x55, bios + (0x2AAA & mask));318 programmer_delay(delay_us); 319 chip_writeb( 0x10, bios + (0x5555 & mask));320 programmer_delay(delay_us); 321 322 toggle_ready_jedec_slow( bios);311 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 312 programmer_delay(delay_us); 313 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 314 programmer_delay(delay_us); 315 chip_writeb(flash, 0x80, bios + (0x5555 & mask)); 316 programmer_delay(delay_us); 317 318 chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); 319 programmer_delay(delay_us); 320 chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); 321 programmer_delay(delay_us); 322 chip_writeb(flash, 0x10, bios + (0x5555 & mask)); 323 programmer_delay(delay_us); 324 325 toggle_ready_jedec_slow(flash, bios); 323 326 324 327 /* FIXME: Check the status register for errors. */ … … 327 330 328 331 static int write_byte_program_jedec_common(struct flashctx *flash, uint8_t *src, 329 chipaddr dst, unsigned int mask)332 chipaddr dst, unsigned int mask) 330 333 { 331 334 int tried = 0, failed = 0; … … 342 345 343 346 /* transfer data from source to destination */ 344 chip_writeb( *src, dst);345 toggle_ready_jedec( bios);346 347 if (chip_readb( dst) != *src && tried++ < MAX_REFLASH_TRIES) {347 chip_writeb(flash, *src, dst); 348 toggle_ready_jedec(flash, bios); 349 350 if (chip_readb(flash, dst) != *src && tried++ < MAX_REFLASH_TRIES) { 348 351 goto retry; 349 352 } … … 356 359 357 360 /* chunksize is 1 */ 358 int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) 361 int write_jedec_1(struct flashctx *flash, uint8_t *src, unsigned int start, 362 unsigned int len) 359 363 { 360 364 int i, failed = 0; … … 377 381 } 378 382 379 int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int page_size) 383 int write_page_write_jedec_common(struct flashctx *flash, uint8_t *src, 384 unsigned int start, unsigned int page_size) 380 385 { 381 386 int i, tried = 0, failed; … … 396 401 /* If the data is 0xFF, don't program it */ 397 402 if (*src != 0xFF) 398 chip_writeb( *src, dst);403 chip_writeb(flash, *src, dst); 399 404 dst++; 400 405 src++; 401 406 } 402 407 403 toggle_ready_jedec( dst - 1);408 toggle_ready_jedec(flash, dst - 1); 404 409 405 410 dst = d; … … 425 430 * Each page is written separately in chunks with a maximum size of chunksize. 426 431 */ 427 int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, int unsigned len) 432 int write_jedec(struct flashctx *flash, uint8_t *buf, unsigned int start, 433 int unsigned len) 428 434 { 429 435 unsigned int i, starthere, lenhere; … … 481 487 } 482 488 483 int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int size) 489 int erase_sector_jedec(struct flashctx *flash, unsigned int page, 490 unsigned int size) 484 491 { 485 492 unsigned int mask; … … 489 496 } 490 497 491 int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int size) 498 int erase_block_jedec(struct flashctx *flash, unsigned int page, 499 unsigned int size) 492 500 { 493 501 unsigned int mask; -
trunk/linux_spi.c
r1473 r1474 35 35 36 36 static int linux_spi_shutdown(void *data); 37 static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt, 38 const unsigned char *txbuf, unsigned char *rxbuf); 37 static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt, 38 unsigned int readcnt, 39 const unsigned char *txbuf, 40 unsigned char *rxbuf); 39 41 static int linux_spi_read(struct flashctx *flash, uint8_t *buf, 40 42 unsigned int start, unsigned int len); … … 108 110 } 109 111 110 static int linux_spi_send_command(unsigned int writecnt, unsigned int readcnt, 111 const unsigned char *txbuf, unsigned char *rxbuf) 112 static int linux_spi_send_command(struct flashctx *flash, unsigned int writecnt, 113 unsigned int readcnt, 114 const unsigned char *txbuf, 115 unsigned char *rxbuf) 112 116 { 113 117 struct spi_ioc_transfer msg[2] = { … … 135 139 unsigned int start, unsigned int len) 136 140 { 137 return spi_read_chunked(flash, buf, start, len, (unsigned)getpagesize()); 141 return spi_read_chunked(flash, buf, start, len, 142 (unsigned int)getpagesize()); 138 143 } 139 144 … … 141 146 unsigned int start, unsigned int len) 142 147 { 143 return spi_write_chunked(flash, buf, start, len, ((unsigned)getpagesize()) - 4); 148 return spi_write_chunked(flash, buf, start, len, 149 ((unsigned int)getpagesize()) - 4); 144 150 } -
trunk/m29f400bt.c
r1473 r1474 29 29 30 30 /* chunksize is 1 */ 31 int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) 31 int write_m29f400bt(struct flashctx *flash, uint8_t *src, unsigned int start, 32 unsigned int len) 32 33 { 33 34 int i; … … 36 37 37 38 for (i = 0; i < len; i++) { 38 chip_writeb( 0xAA, bios + 0xAAA);39 chip_writeb( 0x55, bios + 0x555);40 chip_writeb( 0xA0, bios + 0xAAA);39 chip_writeb(flash, 0xAA, bios + 0xAAA); 40 chip_writeb(flash, 0x55, bios + 0x555); 41 chip_writeb(flash, 0xA0, bios + 0xAAA); 41 42 42 43 /* transfer data from source to destination */ 43 chip_writeb( *src, dst);44 toggle_ready_jedec( dst);44 chip_writeb(flash, *src, dst); 45 toggle_ready_jedec(flash, dst); 45 46 #if 0 46 47 /* We only want to print something in the error case. */ 47 48 msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n", 48 (dst - bios), chip_readb( dst), *src);49 (dst - bios), chip_readb(flash, dst), *src); 49 50 #endif 50 51 dst++; … … 61 62 uint8_t id1, id2; 62 63 63 chip_writeb( 0xAA, bios + 0xAAA);64 chip_writeb( 0x55, bios + 0x555);65 chip_writeb( 0x90, bios + 0xAAA);64 chip_writeb(flash, 0xAA, bios + 0xAAA); 65 chip_writeb(flash, 0x55, bios + 0x555); 66 chip_writeb(flash, 0x90, bios + 0xAAA); 66 67 67 68 programmer_delay(10); 68 69 69 id1 = chip_readb( bios);70 id1 = chip_readb(flash, bios); 70 71 /* The data sheet says id2 is at (bios + 0x01) and id2 listed in 71 72 * flash.h does not match. It should be possible to use JEDEC probe. 72 73 */ 73 id2 = chip_readb( bios + 0x02);74 id2 = chip_readb(flash, bios + 0x02); 74 75 75 chip_writeb( 0xAA, bios + 0xAAA);76 chip_writeb( 0x55, bios + 0x555);77 chip_writeb( 0xF0, bios + 0xAAA);76 chip_writeb(flash, 0xAA, bios + 0xAAA); 77 chip_writeb(flash, 0x55, bios + 0x555); 78 chip_writeb(flash, 0xF0, bios + 0xAAA); 78 79 79 80 programmer_delay(10); … … 91 92 chipaddr bios = flash->virtual_memory; 92 93 93 chip_writeb( 0xAA, bios + 0xAAA);94 chip_writeb( 0x55, bios + 0x555);95 chip_writeb( 0x80, bios + 0xAAA);94 chip_writeb(flash, 0xAA, bios + 0xAAA); 95 chip_writeb(flash, 0x55, bios + 0x555); 96 chip_writeb(flash, 0x80, bios + 0xAAA); 96 97 97 chip_writeb( 0xAA, bios + 0xAAA);98 chip_writeb( 0x55, bios + 0x555);99 chip_writeb( 0x10, bios + 0xAAA);98 chip_writeb(flash, 0xAA, bios + 0xAAA); 99 chip_writeb(flash, 0x55, bios + 0x555); 100 chip_writeb(flash, 0x10, bios + 0xAAA); 100 101 101 102 programmer_delay(10); 102 toggle_ready_jedec( bios);103 toggle_ready_jedec(flash, bios); 103 104 104 105 /* FIXME: Check the status register for errors. */ … … 106 107 } 107 108 108 int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, unsigned int len) 109 int block_erase_m29f400bt(struct flashctx *flash, unsigned int start, 110 unsigned int len) 109 111 { 110 112 chipaddr bios = flash->virtual_memory; 111 113 chipaddr dst = bios + start; 112 114 113 chip_writeb( 0xAA, bios + 0xAAA);114 chip_writeb( 0x55, bios + 0x555);115 chip_writeb( 0x80, bios + 0xAAA);115 chip_writeb(flash, 0xAA, bios + 0xAAA); 116 chip_writeb(flash, 0x55, bios + 0x555); 117 chip_writeb(flash, 0x80, bios + 0xAAA); 116 118 117 chip_writeb( 0xAA, bios + 0xAAA);118 chip_writeb( 0x55, bios + 0x555);119 chip_writeb( 0x30, dst);119 chip_writeb(flash, 0xAA, bios + 0xAAA); 120 chip_writeb(flash, 0x55, bios + 0x555); 121 chip_writeb(flash, 0x30, dst); 120 122 121 123 programmer_delay(10); 122 toggle_ready_jedec( bios);124 toggle_ready_jedec(flash, bios); 123 125 124 126 /* FIXME: Check the status register for errors. */ … … 126 128 } 127 129 128 int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, unsigned int blocklen) 130 int block_erase_chip_m29f400bt(struct flashctx *flash, unsigned int address, 131 unsigned int blocklen) 129 132 { 130 133 if ((address != 0) || (blocklen != flash->total_size * 1024)) { -
trunk/nic3com.c
r1463 r1474 56 56 }; 57 57 58 static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val, 59 chipaddr addr); 60 static uint8_t nic3com_chip_readb(const struct flashctx *flash, 61 const chipaddr addr); 58 62 static const struct par_programmer par_programmer_nic3com = { 59 63 .chip_readb = nic3com_chip_readb, … … 117 121 } 118 122 119 void nic3com_chip_writeb(uint8_t val, chipaddr addr) 123 static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val, 124 chipaddr addr) 120 125 { 121 126 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); … … 123 128 } 124 129 125 uint8_t nic3com_chip_readb(const chipaddr addr) 130 static uint8_t nic3com_chip_readb(const struct flashctx *flash, 131 const chipaddr addr) 126 132 { 127 133 OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR); -
trunk/nicintel.c
r1463 r1474 44 44 #define CSR_FCR 0x0c 45 45 46 static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, 47 chipaddr addr); 48 static uint8_t nicintel_chip_readb(const struct flashctx *flash, 49 const chipaddr addr); 46 50 static const struct par_programmer par_programmer_nicintel = { 47 51 .chip_readb = nicintel_chip_readb, … … 118 122 } 119 123 120 void nicintel_chip_writeb(uint8_t val, chipaddr addr) 124 static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, 125 chipaddr addr) 121 126 { 122 127 pci_mmio_writeb(val, nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); 123 128 } 124 129 125 uint8_t nicintel_chip_readb(const chipaddr addr) 130 static uint8_t nicintel_chip_readb(const struct flashctx *flash, 131 const chipaddr addr) 126 132 { 127 133 return pci_mmio_readb(nicintel_bar + (addr & NICINTEL_MEMMAP_MASK)); -
trunk/nicnatsemi.c
r1463 r1474 36 36 }; 37 37 38 static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val, 39 chipaddr addr); 40 static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash, 41 const chipaddr addr); 38 42 static const struct par_programmer par_programmer_nicnatsemi = { 39 43 .chip_readb = nicnatsemi_chip_readb, … … 75 79 } 76 80 77 void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr) 81 static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val, 82 chipaddr addr) 78 83 { 79 84 OUTL((uint32_t)addr & 0x0001FFFF, io_base_addr + BOOT_ROM_ADDR); … … 89 94 } 90 95 91 uint8_t nicnatsemi_chip_readb(const chipaddr addr) 96 static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash, 97 const chipaddr addr) 92 98 { 93 99 OUTL(((uint32_t)addr & 0x0001FFFF), io_base_addr + BOOT_ROM_ADDR); -
trunk/nicrealtek.c
r1463 r1474 37 37 }; 38 38 39 static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, 40 chipaddr addr); 41 static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, 42 const chipaddr addr); 39 43 static const struct par_programmer par_programmer_nicrealtek = { 40 44 .chip_readb = nicrealtek_chip_readb, … … 70 74 } 71 75 72 void nicrealtek_chip_writeb(uint8_t val, chipaddr addr) 76 static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, 77 chipaddr addr) 73 78 { 74 79 /* Output addr and data, set WE to 0, set OE to 1, set CS to 0, … … 84 89 } 85 90 86 uint8_t nicrealtek_chip_readb(const chipaddr addr) 91 static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, 92 const chipaddr addr) 87 93 { 88 94 uint8_t val; -
trunk/pm49fl00x.c
r1473 r1474 23 23 #include "flash.h" 24 24 25 static void write_lockbits_49fl00x(chipaddr bios, unsigned int size, 26 unsigned char bits, unsigned int block_size) 25 static void write_lockbits_49fl00x(const struct flashctx *flash, 26 unsigned int size, unsigned char bits, 27 unsigned int block_size) 27 28 { 28 29 unsigned int i, left = size; 30 chipaddr bios = flash->virtual_registers; 29 31 30 32 for (i = 0; left >= block_size; i++, left -= block_size) { … … 33 35 continue; 34 36 35 chip_writeb( bits, bios + (i * block_size) + 2);37 chip_writeb(flash, bits, bios + (i * block_size) + 2); 36 38 } 37 39 } … … 39 41 int unlock_49fl00x(struct flashctx *flash) 40 42 { 41 write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 0, flash->page_size); 43 write_lockbits_49fl00x(flash, flash->total_size * 1024, 0, 44 flash->page_size); 42 45 return 0; 43 46 } … … 45 48 int lock_49fl00x(struct flashctx *flash) 46 49 { 47 write_lockbits_49fl00x(flash->virtual_registers, flash->total_size * 1024, 1, flash->page_size); 50 write_lockbits_49fl00x(flash, flash->total_size * 1024, 1, 51 flash->page_size); 48 52 return 0; 49 53 } -
trunk/programmer.c
r1463 r1474 2 2 * This file is part of the flashrom project. 3 3 * 4 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger4 * Copyright (C) 2009,2010,2011 Carl-Daniel Hailfinger 5 5 * 6 6 * This program is free software; you can redistribute it and/or modify … … 54 54 55 55 /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */ 56 uint8_t noop_chip_readb(const chipaddr addr)56 uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr) 57 57 { 58 58 return 0xff; … … 60 60 61 61 /* No-op chip_writeb() for drivers not supporting addr/data pair accesses */ 62 void noop_chip_writeb( uint8_t val, chipaddr addr)62 void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) 63 63 { 64 64 } 65 65 66 66 /* Little-endian fallback for drivers not supporting 16 bit accesses */ 67 void fallback_chip_writew(uint16_t val, chipaddr addr) 67 void fallback_chip_writew(const struct flashctx *flash, uint16_t val, 68 chipaddr addr) 68 69 { 69 chip_writeb( val & 0xff, addr);70 chip_writeb( (val >> 8) & 0xff, addr + 1);70 chip_writeb(flash, val & 0xff, addr); 71 chip_writeb(flash, (val >> 8) & 0xff, addr + 1); 71 72 } 72 73 73 74 /* Little-endian fallback for drivers not supporting 16 bit accesses */ 74 uint16_t fallback_chip_readw(const chipaddr addr)75 uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr) 75 76 { 76 77 uint16_t val; 77 val = chip_readb( addr);78 val |= chip_readb( addr + 1) << 8;78 val = chip_readb(flash, addr); 79 val |= chip_readb(flash, addr + 1) << 8; 79 80 return val; 80 81 } 81 82 82 83 /* Little-endian fallback for drivers not supporting 32 bit accesses */ 83 void fallback_chip_writel(uint32_t val, chipaddr addr) 84 void fallback_chip_writel(const struct flashctx *flash, uint32_t val, 85 chipaddr addr) 84 86 { 85 chip_writew( val & 0xffff, addr);86 chip_writew( (val >> 16) & 0xffff, addr + 2);87 chip_writew(flash, val & 0xffff, addr); 88 chip_writew(flash, (val >> 16) & 0xffff, addr + 2); 87 89 } 88 90 89 91 /* Little-endian fallback for drivers not supporting 32 bit accesses */ 90 uint32_t fallback_chip_readl(const chipaddr addr)92 uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr) 91 93 { 92 94 uint32_t val; 93 val = chip_readw( addr);94 val |= chip_readw( addr + 2) << 16;95 val = chip_readw(flash, addr); 96 val |= chip_readw(flash, addr + 2) << 16; 95 97 return val; 96 98 } 97 99 98 void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len) 100 void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, 101 chipaddr addr, size_t len) 99 102 { 100 103 size_t i; 101 104 for (i = 0; i < len; i++) 102 chip_writeb( buf[i], addr + i);105 chip_writeb(flash, buf[i], addr + i); 103 106 return; 104 107 } 105 108 106 void fallback_chip_readn(uint8_t *buf, chipaddr addr, size_t len) 109 void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, 110 chipaddr addr, size_t len) 107 111 { 108 112 size_t i; 109 113 for (i = 0; i < len; i++) 110 buf[i] = chip_readb( addr + i);114 buf[i] = chip_readb(flash, addr + i); 111 115 return; 112 116 } -
trunk/programmer.h
r1473 r1474 94 94 int (*init) (void); 95 95 96 void * (*map_flash_region) (const char *descr, unsigned long phys_addr,97 size_t len);96 void *(*map_flash_region) (const char *descr, unsigned long phys_addr, 97 size_t len); 98 98 void (*unmap_flash_region) (void *virt_addr, size_t len); 99 99 … … 301 301 extern enum chipbustype internal_buses_supported; 302 302 int internal_init(void); 303 void internal_chip_writeb(uint8_t val, chipaddr addr);304 void internal_chip_writew(uint16_t val, chipaddr addr);305 void internal_chip_writel(uint32_t val, chipaddr addr);306 uint8_t internal_chip_readb(const chipaddr addr);307 uint16_t internal_chip_readw(const chipaddr addr);308 uint32_t internal_chip_readl(const chipaddr addr);309 void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);310 303 #endif 311 304 … … 342 335 void rmmio_vall(void *addr); 343 336 344 /* programmer.c */345 int noop_shutdown(void);346 void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);347 void fallback_unmap(void *virt_addr, size_t len);348 uint8_t noop_chip_readb(const chipaddr addr);349 void noop_chip_writeb(uint8_t val, chipaddr addr);350 void fallback_chip_writew(uint16_t val, chipaddr addr);351 void fallback_chip_writel(uint32_t val, chipaddr addr);352 void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);353 uint16_t fallback_chip_readw(const chipaddr addr);354 uint32_t fallback_chip_readl(const chipaddr addr);355 void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);356 struct par_programmer {357 void (*chip_writeb) (uint8_t val, chipaddr addr);358 void (*chip_writew) (uint16_t val, chipaddr addr);359 void (*chip_writel) (uint32_t val, chipaddr addr);360 void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);361 uint8_t (*chip_readb) (const chipaddr addr);362 uint16_t (*chip_readw) (const chipaddr addr);363 uint32_t (*chip_readl) (const chipaddr addr);364 void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);365 };366 extern const struct par_programmer *par_programmer;367 void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);368 369 337 /* dummyflasher.c */ 370 338 #if CONFIG_DUMMY == 1 … … 372 340 void *dummy_map(const char *descr, unsigned long phys_addr, size_t len); 373 341 void dummy_unmap(void *virt_addr, size_t len); 374 void dummy_chip_writeb(uint8_t val, chipaddr addr);375 void dummy_chip_writew(uint16_t val, chipaddr addr);376 void dummy_chip_writel(uint32_t val, chipaddr addr);377 void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);378 uint8_t dummy_chip_readb(const chipaddr addr);379 uint16_t dummy_chip_readw(const chipaddr addr);380 uint32_t dummy_chip_readl(const chipaddr addr);381 void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);382 342 #endif 383 343 … … 385 345 #if CONFIG_NIC3COM == 1 386 346 int nic3com_init(void); 387 void nic3com_chip_writeb(uint8_t val, chipaddr addr);388 uint8_t nic3com_chip_readb(const chipaddr addr);389 347 extern const struct pcidev_status nics_3com[]; 390 348 #endif … … 393 351 #if CONFIG_GFXNVIDIA == 1 394 352 int gfxnvidia_init(void); 395 void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);396 uint8_t gfxnvidia_chip_readb(const chipaddr addr);397 353 extern const struct pcidev_status gfx_nvidia[]; 398 354 #endif … … 401 357 #if CONFIG_DRKAISER == 1 402 358 int drkaiser_init(void); 403 void drkaiser_chip_writeb(uint8_t val, chipaddr addr);404 uint8_t drkaiser_chip_readb(const chipaddr addr);405 359 extern const struct pcidev_status drkaiser_pcidev[]; 406 360 #endif … … 409 363 #if CONFIG_NICREALTEK == 1 410 364 int nicrealtek_init(void); 411 void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);412 uint8_t nicrealtek_chip_readb(const chipaddr addr);413 365 extern const struct pcidev_status nics_realtek[]; 414 366 #endif … … 417 369 #if CONFIG_NICNATSEMI == 1 418 370 int nicnatsemi_init(void); 419 void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr);420 uint8_t nicnatsemi_chip_readb(const chipaddr addr);421 371 extern const struct pcidev_status nics_natsemi[]; 422 372 #endif … … 425 375 #if CONFIG_NICINTEL == 1 426 376 int nicintel_init(void); 427 void nicintel_chip_writeb(uint8_t val, chipaddr addr);428 uint8_t nicintel_chip_readb(const chipaddr addr);429 377 extern const struct pcidev_status nics_intel[]; 430 378 #endif … … 445 393 #if CONFIG_SATAMV == 1 446 394 int satamv_init(void); 447 void satamv_chip_writeb(uint8_t val, chipaddr addr);448 uint8_t satamv_chip_readb(const chipaddr addr);449 395 extern const struct pcidev_status satas_mv[]; 450 396 #endif … … 453 399 #if CONFIG_SATASII == 1 454 400 int satasii_init(void); 455 void satasii_chip_writeb(uint8_t val, chipaddr addr);456 uint8_t satasii_chip_readb(const chipaddr addr);457 401 extern const struct pcidev_status satas_sii[]; 458 402 #endif … … 461 405 #if CONFIG_ATAHPT == 1 462 406 int atahpt_init(void); 463 void atahpt_chip_writeb(uint8_t val, chipaddr addr);464 uint8_t atahpt_chip_readb(const chipaddr addr);465 407 extern const struct pcidev_status ata_hpt[]; 466 408 #endif … … 566 508 unsigned int max_data_read; 567 509 unsigned int max_data_write; 568 int (*command)( unsigned int writecnt, unsigned int readcnt,510 int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, 569 511 const unsigned char *writearr, unsigned char *readarr); 570 int (*multicommand)(struct spi_command *cmds);512 int (*multicommand)(struct flashctx *flash, struct spi_command *cmds); 571 513 572 514 /* Optimized functions for this programmer */ … … 576 518 577 519 extern const struct spi_programmer *spi_programmer; 578 int default_spi_send_command( unsigned int writecnt, unsigned int readcnt,520 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, 579 521 const unsigned char *writearr, unsigned char *readarr); 580 int default_spi_send_multicommand(struct spi_command *cmds);522 int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds); 581 523 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); 582 524 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); … … 633 575 void register_opaque_programmer(const struct opaque_programmer *pgm); 634 576 577 /* programmer.c */ 578 int noop_shutdown(void); 579 void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); 580 void fallback_unmap(void *virt_addr, size_t len); 581 uint8_t noop_chip_readb(const struct flashctx *flash, const chipaddr addr); 582 void noop_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); 583 void fallback_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); 584 void fallback_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); 585 void fallback_chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); 586 uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr); 587 uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr); 588 void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); 589 struct par_programmer { 590 void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr); 591 void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr); 592 void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr); 593 void (*chip_writen) (const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len); 594 uint8_t (*chip_readb) (const struct flashctx *flash, const chipaddr addr); 595 uint16_t (*chip_readw) (const struct flashctx *flash, const chipaddr addr); 596 uint32_t (*chip_readl) (const struct flashctx *flash, const chipaddr addr); 597 void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); 598 }; 599 extern const struct par_programmer *par_programmer; 600 void register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses); 601 635 602 /* serprog.c */ 636 603 #if CONFIG_SERPROG == 1 637 604 int serprog_init(void); 638 void serprog_chip_writeb(uint8_t val, chipaddr addr);639 uint8_t serprog_chip_readb(const chipaddr addr);640 void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);641 605 void serprog_delay(int usecs); 642 606 #endif -
trunk/satamv.c
r1463 r1474 42 42 #define GPIO_PORT_CONTROL 0x104f0 43 43 44 static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val, 45 chipaddr addr); 46 static uint8_t satamv_chip_readb(const struct flashctx *flash, 47 const chipaddr addr); 44 48 static const struct par_programmer par_programmer_satamv = { 45 49 .chip_readb = satamv_chip_readb, … … 184 188 185 189 /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */ 186 void satamv_chip_writeb(uint8_t val, chipaddr addr) 190 static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val, 191 chipaddr addr) 187 192 { 188 193 satamv_indirect_chip_writeb(val, addr); … … 190 195 191 196 /* FIXME: Prefer direct access to BAR2 if BAR2 is active. */ 192 uint8_t satamv_chip_readb(const chipaddr addr) 197 static uint8_t satamv_chip_readb(const struct flashctx *flash, 198 const chipaddr addr) 193 199 { 194 200 return satamv_indirect_chip_readb(addr); -
trunk/satasii.c
r1463 r1474 43 43 }; 44 44 45 static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, 46 chipaddr addr); 47 static uint8_t satasii_chip_readb(const struct flashctx *flash, 48 const chipaddr addr); 45 49 static const struct par_programmer par_programmer_satasii = { 46 50 .chip_readb = satasii_chip_readb, … … 96 100 } 97 101 98 void satasii_chip_writeb(uint8_t val, chipaddr addr) 102 static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, 103 chipaddr addr) 99 104 { 100 105 uint32_t ctrl_reg, data_reg; … … 113 118 } 114 119 115 uint8_t satasii_chip_readb(const chipaddr addr) 120 static uint8_t satasii_chip_readb(const struct flashctx *flash, 121 const chipaddr addr) 116 122 { 117 123 uint32_t ctrl_reg; -
trunk/sb600spi.c
r1422 r1474 89 89 } 90 90 91 static int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, 92 const unsigned char *writearr, unsigned char *readarr) 91 static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt, 92 unsigned int readcnt, 93 const unsigned char *writearr, 94 unsigned char *readarr) 93 95 { 94 96 int count; -
trunk/serprog.c
r1473 r1474 300 300 } 301 301 302 static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, 302 static int serprog_spi_send_command(struct flashctx *flash, 303 unsigned int writecnt, unsigned int readcnt, 303 304 const unsigned char *writearr, 304 305 unsigned char *readarr); … … 315 316 }; 316 317 318 static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, 319 chipaddr addr); 320 static uint8_t serprog_chip_readb(const struct flashctx *flash, 321 const chipaddr addr); 322 static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf, 323 const chipaddr addr, size_t len); 317 324 static const struct par_programmer par_programmer_serprog = { 318 325 .chip_readb = serprog_chip_readb, … … 681 688 } 682 689 683 void serprog_chip_writeb(uint8_t val, chipaddr addr) 690 static void serprog_chip_writeb(const struct flashctx *flash, uint8_t val, 691 chipaddr addr) 684 692 { 685 693 msg_pspew("%s\n", __func__); … … 712 720 } 713 721 714 uint8_t serprog_chip_readb(const chipaddr addr) 722 static uint8_t serprog_chip_readb(const struct flashctx *flash, 723 const chipaddr addr) 715 724 { 716 725 unsigned char c; … … 758 767 759 768 /* The externally called version that makes sure that max_read_n is obeyed. */ 760 void serprog_chip_readn(uint8_t * buf, const chipaddr addr, size_t len) 769 static void serprog_chip_readn(const struct flashctx *flash, uint8_t * buf, 770 const chipaddr addr, size_t len) 761 771 { 762 772 size_t lenm = len; … … 793 803 } 794 804 795 static int serprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, 796 const unsigned char *writearr, 797 unsigned char *readarr) 805 static int serprog_spi_send_command(struct flashctx *flash, 806 unsigned int writecnt, unsigned int readcnt, 807 const unsigned char *writearr, 808 unsigned char *readarr) 798 809 { 799 810 unsigned char *parmbuf; … … 823 834 * non-contiguous address space (like AT45DB161D). When spi_read_chunked is 824 835 * fixed this method can be removed. */ 825 static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 836 static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, 837 unsigned int start, unsigned int len) 826 838 { 827 839 unsigned int i, cur_len; … … 830 842 int ret; 831 843 cur_len = min(max_read, (len - i)); 832 ret = spi_nbyte_read( start + i, buf + i, cur_len);844 ret = spi_nbyte_read(flash, start + i, buf + i, cur_len); 833 845 if (ret) 834 846 return ret; -
trunk/sharplhf00l04.c
r1473 r1474 27 27 */ 28 28 29 int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen) 29 int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, 30 unsigned int blocklen) 30 31 { 31 32 chipaddr bios = flash->virtual_memory + blockaddr; … … 34 35 35 36 // clear status register 36 chip_writeb( 0x50, bios);37 chip_writeb(flash, 0x50, bios); 37 38 status = wait_82802ab(flash); 38 39 print_status_82802ab(status); 39 40 // clear write protect 40 41 msg_cspew("write protect is at 0x%lx\n", (wrprotect)); 41 msg_cspew("write protect is 0x%x\n", chip_readb( wrprotect));42 chip_writeb( 0, wrprotect);43 msg_cspew("write protect is 0x%x\n", chip_readb( wrprotect));42 msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect)); 43 chip_writeb(flash, 0, wrprotect); 44 msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect)); 44 45 45 46 // now start it 46 chip_writeb( 0x20, bios);47 chip_writeb( 0xd0, bios);47 chip_writeb(flash, 0x20, bios); 48 chip_writeb(flash, 0xd0, bios); 48 49 programmer_delay(10); 49 50 // now let's see what the register is -
trunk/spi.c
r1473 r1474 43 43 const struct spi_programmer *spi_programmer = &spi_programmer_none; 44 44 45 int spi_send_command(unsigned int writecnt, unsigned int readcnt, 46 const unsigned char *writearr, unsigned char *readarr) 45 int spi_send_command(struct flashctx *flash, unsigned int writecnt, 46 unsigned int readcnt, const unsigned char *writearr, 47 unsigned char *readarr) 47 48 { 48 49 if (!spi_programmer->command) { … … 53 54 } 54 55 55 return spi_programmer->command( writecnt, readcnt,56 writearr,readarr);57 } 58 59 int spi_send_multicommand(struct spi_command *cmds)56 return spi_programmer->command(flash, writecnt, readcnt, writearr, 57 readarr); 58 } 59 60 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds) 60 61 { 61 62 if (!spi_programmer->multicommand) { … … 66 67 } 67 68 68 return spi_programmer->multicommand(cmds); 69 } 70 71 int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, 72 const unsigned char *writearr, unsigned char *readarr) 69 return spi_programmer->multicommand(flash, cmds); 70 } 71 72 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, 73 unsigned int readcnt, 74 const unsigned char *writearr, 75 unsigned char *readarr) 73 76 { 74 77 struct spi_command cmd[] = { … … 85 88 }}; 86 89 87 return spi_send_multicommand(cmd); 88 } 89 90 int default_spi_send_multicommand(struct spi_command *cmds) 90 return spi_send_multicommand(flash, cmd); 91 } 92 93 int default_spi_send_multicommand(struct flashctx *flash, 94 struct spi_command *cmds) 91 95 { 92 96 int result = 0; 93 97 for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) { 94 result = spi_send_command( cmds->writecnt, cmds->readcnt,98 result = spi_send_command(flash, cmds->writecnt, cmds->readcnt, 95 99 cmds->writearr, cmds->readarr); 96 100 } … … 98 102 } 99 103 100 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 104 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, 105 unsigned int len) 101 106 { 102 107 unsigned int max_data = spi_programmer->max_data_read; … … 110 115 } 111 116 112 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 117 int default_spi_write_256(struct flashctx *flash, uint8_t *buf, 118 unsigned int start, unsigned int len) 113 119 { 114 120 unsigned int max_data = spi_programmer->max_data_write; … … 122 128 } 123 129 124 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 130 int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, 131 unsigned int len) 125 132 { 126 133 unsigned int addrbase = 0; … … 136 143 * means 0xffffff, the highest unsigned 24bit number. 137 144 */ 138 addrbase = spi_get_valid_read_addr( );145 addrbase = spi_get_valid_read_addr(flash); 139 146 if (addrbase + flash->total_size * 1024 > (1 << 24)) { 140 147 msg_perr("Flash chip size exceeds the allowed access window. "); … … 161 168 */ 162 169 /* real chunksize is up to 256, logical chunksize is 256 */ 163 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 170 int spi_chip_write_256(struct flashctx *flash, uint8_t *buf, unsigned int start, 171 unsigned int len) 164 172 { 165 173 if (!spi_programmer->write_256) { … … 178 186 * This is a programmer limitation. 179 187 */ 180 uint32_t spi_get_valid_read_addr( void)188 uint32_t spi_get_valid_read_addr(struct flashctx *flash) 181 189 { 182 190 switch (spi_programmer->type) { -
trunk/spi25.c
r1473 r1474 30 30 #include "spi.h" 31 31 32 static int spi_rdid( unsigned char *readarr, int bytes)32 static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes) 33 33 { 34 34 static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; … … 36 36 int i; 37 37 38 ret = spi_send_command( sizeof(cmd), bytes, cmd, readarr);38 ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); 39 39 if (ret) 40 40 return ret; … … 46 46 } 47 47 48 static int spi_rems( unsigned char *readarr)48 static int spi_rems(struct flashctx *flash, unsigned char *readarr) 49 49 { 50 50 unsigned char cmd[JEDEC_REMS_OUTSIZE] = { JEDEC_REMS, 0, 0, 0 }; … … 52 52 int ret; 53 53 54 ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr); 54 ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, cmd, 55 readarr); 55 56 if (ret == SPI_INVALID_ADDRESS) { 56 57 /* Find the lowest even address allowed for reads. */ 57 readaddr = (spi_get_valid_read_addr( ) + 1) & ~1;58 readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1; 58 59 cmd[1] = (readaddr >> 16) & 0xff, 59 60 cmd[2] = (readaddr >> 8) & 0xff, 60 61 cmd[3] = (readaddr >> 0) & 0xff, 61 ret = spi_send_command(sizeof(cmd), JEDEC_REMS_INSIZE, cmd, readarr); 62 ret = spi_send_command(flash, sizeof(cmd), JEDEC_REMS_INSIZE, 63 cmd, readarr); 62 64 } 63 65 if (ret) … … 67 69 } 68 70 69 static int spi_res( unsigned char *readarr, int bytes)71 static int spi_res(struct flashctx *flash, unsigned char *readarr, int bytes) 70 72 { 71 73 unsigned char cmd[JEDEC_RES_OUTSIZE] = { JEDEC_RES, 0, 0, 0 }; … … 74 76 int i; 75 77 76 ret = spi_send_command( sizeof(cmd), bytes, cmd, readarr);78 ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); 77 79 if (ret == SPI_INVALID_ADDRESS) { 78 80 /* Find the lowest even address allowed for reads. */ 79 readaddr = (spi_get_valid_read_addr( ) + 1) & ~1;81 readaddr = (spi_get_valid_read_addr(flash) + 1) & ~1; 80 82 cmd[1] = (readaddr >> 16) & 0xff, 81 83 cmd[2] = (readaddr >> 8) & 0xff, 82 84 cmd[3] = (readaddr >> 0) & 0xff, 83 ret = spi_send_command( sizeof(cmd), bytes, cmd, readarr);85 ret = spi_send_command(flash, sizeof(cmd), bytes, cmd, readarr); 84 86 } 85 87 if (ret) … … 92 94 } 93 95 94 int spi_write_enable( void)96 int spi_write_enable(struct flashctx *flash) 95 97 { 96 98 static const unsigned char cmd[JEDEC_WREN_OUTSIZE] = { JEDEC_WREN }; … … 98 100 99 101 /* Send WREN (Write Enable) */ 100 result = spi_send_command( sizeof(cmd), 0, cmd, NULL);102 result = spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); 101 103 102 104 if (result) … … 106 108 } 107 109 108 int spi_write_disable( void)110 int spi_write_disable(struct flashctx *flash) 109 111 { 110 112 static const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = { JEDEC_WRDI }; 111 113 112 114 /* Send WRDI (Write Disable) */ 113 return spi_send_command( sizeof(cmd), 0, cmd, NULL);115 return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); 114 116 } 115 117 … … 120 122 uint32_t id2; 121 123 122 if (spi_rdid( readarr, bytes)) {124 if (spi_rdid(flash, readarr, bytes)) { 123 125 return 0; 124 126 } … … 200 202 uint32_t id1, id2; 201 203 202 if (spi_rems( readarr)) {204 if (spi_rems(flash, readarr)) { 203 205 return 0; 204 206 } … … 243 245 * 0x00 0x00 0x00. In that case, RES is pointless. 244 246 */ 245 if (!spi_rdid( readarr, 3) && memcmp(readarr, allff, 3) &&247 if (!spi_rdid(flash, readarr, 3) && memcmp(readarr, allff, 3) && 246 248 memcmp(readarr, all00, 3)) { 247 249 msg_cdbg("Ignoring RES in favour of RDID.\n"); … … 251 253 * 0x00 0x00. In that case, RES is pointless. 252 254 */ 253 if (!spi_rems(readarr) && memcmp(readarr, allff, JEDEC_REMS_INSIZE) && 255 if (!spi_rems(flash, readarr) && 256 memcmp(readarr, allff, JEDEC_REMS_INSIZE) && 254 257 memcmp(readarr, all00, JEDEC_REMS_INSIZE)) { 255 258 msg_cdbg("Ignoring RES in favour of REMS.\n"); … … 257 260 } 258 261 259 if (spi_res( readarr, 1)) {262 if (spi_res(flash, readarr, 1)) { 260 263 return 0; 261 264 } … … 280 283 uint32_t id1, id2; 281 284 282 if (spi_res( readarr, 2)) {285 if (spi_res(flash, readarr, 2)) { 283 286 return 0; 284 287 } … … 299 302 } 300 303 301 uint8_t spi_read_status_register( void)304 uint8_t spi_read_status_register(struct flashctx *flash) 302 305 { 303 306 static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR }; … … 307 310 308 311 /* Read Status Register */ 309 ret = spi_send_command(sizeof(cmd), sizeof(readarr), cmd, readarr); 312 ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, 313 readarr); 310 314 if (ret) 311 315 msg_cerr("RDSR failed!\n"); … … 415 419 uint8_t status; 416 420 417 status = spi_read_status_register( );421 status = spi_read_status_register(flash); 418 422 msg_cdbg("Chip status register is %02x\n", status); 419 423 switch (flash->manufacture_id) { … … 466 470 }}; 467 471 468 result = spi_send_multicommand( cmds);472 result = spi_send_multicommand(flash, cmds); 469 473 if (result) { 470 474 msg_cerr("%s failed during command execution\n", … … 476 480 */ 477 481 /* FIXME: We assume spi_read_status_register will never fail. */ 478 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)482 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 479 483 programmer_delay(1000 * 1000); 480 484 /* FIXME: Check the status register for errors. */ … … 503 507 }}; 504 508 505 result = spi_send_multicommand( cmds);509 result = spi_send_multicommand(flash, cmds); 506 510 if (result) { 507 511 msg_cerr("%s failed during command execution\n", __func__); … … 512 516 */ 513 517 /* FIXME: We assume spi_read_status_register will never fail. */ 514 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)518 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 515 519 programmer_delay(1000 * 1000); 516 520 /* FIXME: Check the status register for errors. */ … … 518 522 } 519 523 520 int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen) 524 int spi_block_erase_52(struct flashctx *flash, unsigned int addr, 525 unsigned int blocklen) 521 526 { 522 527 int result; … … 544 549 }}; 545 550 546 result = spi_send_multicommand( cmds);551 result = spi_send_multicommand(flash, cmds); 547 552 if (result) { 548 553 msg_cerr("%s failed during command execution at address 0x%x\n", … … 553 558 * This usually takes 100-4000 ms, so wait in 100 ms steps. 554 559 */ 555 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)560 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 556 561 programmer_delay(100 * 1000); 557 562 /* FIXME: Check the status register for errors. */ … … 564 569 * 4-32k non-uniform for EON 565 570 */ 566 int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen) 571 int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, 572 unsigned int blocklen) 567 573 { 568 574 int result; … … 590 596 }}; 591 597 592 result = spi_send_multicommand( cmds);598 result = spi_send_multicommand(flash, cmds); 593 599 if (result) { 594 600 msg_cerr("%s failed during command execution at address 0x%x\n", … … 599 605 * This usually takes 100-4000 ms, so wait in 100 ms steps. 600 606 */ 601 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)607 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 602 608 programmer_delay(100 * 1000); 603 609 /* FIXME: Check the status register for errors. */ … … 608 614 * 4k for PMC 609 615 */ 610 int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) 616 int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, 617 unsigned int blocklen) 611 618 { 612 619 int result; … … 634 641 }}; 635 642 636 result = spi_send_multicommand( cmds);643 result = spi_send_multicommand(flash, cmds); 637 644 if (result) { 638 645 msg_cerr("%s failed during command execution at address 0x%x\n", … … 643 650 * This usually takes 100-4000 ms, so wait in 100 ms steps. 644 651 */ 645 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)652 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 646 653 programmer_delay(100 * 1000); 647 654 /* FIXME: Check the status register for errors. */ … … 650 657 651 658 /* Sector size is usually 4k, though Macronix eliteflash has 64k */ 652 int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen) 659 int spi_block_erase_20(struct flashctx *flash, unsigned int addr, 660 unsigned int blocklen) 653 661 { 654 662 int result; … … 676 684 }}; 677 685 678 result = spi_send_multicommand( cmds);686 result = spi_send_multicommand(flash, cmds); 679 687 if (result) { 680 688 msg_cerr("%s failed during command execution at address 0x%x\n", … … 685 693 * This usually takes 15-800 ms, so wait in 10 ms steps. 686 694 */ 687 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)695 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 688 696 programmer_delay(10 * 1000); 689 697 /* FIXME: Check the status register for errors. */ … … 691 699 } 692 700 693 int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen) 701 int spi_block_erase_60(struct flashctx *flash, unsigned int addr, 702 unsigned int blocklen) 694 703 { 695 704 if ((addr != 0) || (blocklen != flash->total_size * 1024)) { … … 701 710 } 702 711 703 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) 712 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, 713 unsigned int blocklen) 704 714 { 705 715 if ((addr != 0) || (blocklen != flash->total_size * 1024)) { … … 711 721 } 712 722 713 int spi_write_status_enable( void)723 int spi_write_status_enable(struct flashctx *flash) 714 724 { 715 725 static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; … … 717 727 718 728 /* Send EWSR (Enable Write Status Register). */ 719 result = spi_send_command( sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);729 result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); 720 730 721 731 if (result) … … 752 762 }}; 753 763 754 result = spi_send_multicommand( cmds);764 result = spi_send_multicommand(flash, cmds); 755 765 if (result) { 756 766 msg_cerr("%s failed during command execution\n", … … 767 777 */ 768 778 programmer_delay(100 * 1000); 769 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP) {779 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { 770 780 if (++i > 490) { 771 781 msg_cerr("Error: WIP bit after WRSR never cleared\n"); … … 800 810 }}; 801 811 802 result = spi_send_multicommand( cmds);812 result = spi_send_multicommand(flash, cmds); 803 813 if (result) { 804 814 msg_cerr("%s failed during command execution\n", … … 815 825 */ 816 826 programmer_delay(100 * 1000); 817 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP) {827 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { 818 828 if (++i > 490) { 819 829 msg_cerr("Error: WIP bit after WRSR never cleared\n"); … … 841 851 } 842 852 843 int spi_byte_program(unsigned int addr, uint8_t databyte) 853 int spi_byte_program(struct flashctx *flash, unsigned int addr, 854 uint8_t databyte) 844 855 { 845 856 int result; … … 868 879 }}; 869 880 870 result = spi_send_multicommand( cmds);881 result = spi_send_multicommand(flash, cmds); 871 882 if (result) { 872 883 msg_cerr("%s failed during command execution at address 0x%x\n", … … 876 887 } 877 888 878 int spi_nbyte_program(unsigned int addr, uint8_t *bytes, unsigned int len) 889 int spi_nbyte_program(struct flashctx *flash, unsigned int addr, uint8_t *bytes, 890 unsigned int len) 879 891 { 880 892 int result; … … 915 927 memcpy(&cmd[4], bytes, len); 916 928 917 result = spi_send_multicommand( cmds);929 result = spi_send_multicommand(flash, cmds); 918 930 if (result) { 919 931 msg_cerr("%s failed during command execution at address 0x%x\n", … … 932 944 int result; 933 945 934 status = spi_read_status_register( );946 status = spi_read_status_register(flash); 935 947 /* If block protection is disabled, stop here. */ 936 948 if ((status & 0x3c) == 0) … … 943 955 return result; 944 956 } 945 status = spi_read_status_register( );957 status = spi_read_status_register(flash); 946 958 if ((status & 0x3c) != 0) { 947 959 msg_cerr("Block protection could not be disabled!\n"); … … 951 963 } 952 964 953 int spi_nbyte_read(unsigned int address, uint8_t *bytes, unsigned int len) 965 int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes, 966 unsigned int len) 954 967 { 955 968 const unsigned char cmd[JEDEC_READ_OUTSIZE] = { … … 961 974 962 975 /* Send Read */ 963 return spi_send_command( sizeof(cmd), len, cmd, bytes);976 return spi_send_command(flash, sizeof(cmd), len, cmd, bytes); 964 977 } 965 978 … … 969 982 * Each page is read separately in chunks with a maximum size of chunksize. 970 983 */ 971 int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) 984 int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, 985 unsigned int len, unsigned int chunksize) 972 986 { 973 987 int rc = 0; … … 992 1006 for (j = 0; j < lenhere; j += chunksize) { 993 1007 toread = min(chunksize, lenhere - j); 994 rc = spi_nbyte_read( starthere + j, buf + starthere - start + j, toread);1008 rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); 995 1009 if (rc) 996 1010 break; … … 1008 1022 * Each page is written separately in chunks with a maximum size of chunksize. 1009 1023 */ 1010 int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize) 1024 int spi_write_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, 1025 unsigned int len, unsigned int chunksize) 1011 1026 { 1012 1027 int rc = 0; … … 1036 1051 for (j = 0; j < lenhere; j += chunksize) { 1037 1052 towrite = min(chunksize, lenhere - j); 1038 rc = spi_nbyte_program( starthere + j, buf + starthere - start + j, towrite);1053 rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); 1039 1054 if (rc) 1040 1055 break; 1041 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)1056 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 1042 1057 programmer_delay(10); 1043 1058 } … … 1056 1071 */ 1057 1072 /* real chunksize is 1, logical chunksize is 1 */ 1058 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 1073 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, 1074 unsigned int len) 1059 1075 { 1060 1076 unsigned int i; … … 1062 1078 1063 1079 for (i = start; i < start + len; i++) { 1064 result = spi_byte_program( i, buf[i - start]);1080 result = spi_byte_program(flash, i, buf[i - start]); 1065 1081 if (result) 1066 1082 return 1; 1067 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)1083 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 1068 1084 programmer_delay(10); 1069 1085 } … … 1072 1088 } 1073 1089 1074 int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 1090 int spi_aai_write(struct flashctx *flash, uint8_t *buf, unsigned int start, 1091 unsigned int len) 1075 1092 { 1076 1093 uint32_t pos = start; … … 1150 1167 1151 1168 1152 result = spi_send_multicommand( cmds);1169 result = spi_send_multicommand(flash, cmds); 1153 1170 if (result) { 1154 1171 msg_cerr("%s failed during start command execution\n", … … 1159 1176 return result; 1160 1177 } 1161 while (spi_read_status_register( ) & JEDEC_RDSR_BIT_WIP)1178 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 1162 1179 programmer_delay(10); 1163 1180 … … 1169 1186 cmd[1] = buf[pos++ - start]; 1170 1187 cmd[2] = buf[pos++ - start]; 1171 spi_send_command(JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); 1172 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) 1188 spi_send_command(flash, JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, 1189 cmd, NULL); 1190 while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) 1173 1191 programmer_delay(10); 1174 1192 } … … 1177 1195 * other non-AAI command. 1178 1196 */ 1179 spi_write_disable( );1197 spi_write_disable(flash); 1180 1198 1181 1199 /* Write remaining byte (if any). */ -
trunk/sst28sf040.c
r1473 r1474 35 35 chipaddr bios = flash->virtual_memory; 36 36 37 chip_readb( bios + 0x1823);38 chip_readb( bios + 0x1820);39 chip_readb( bios + 0x1822);40 chip_readb( bios + 0x0418);41 chip_readb( bios + 0x041B);42 chip_readb( bios + 0x0419);43 chip_readb( bios + 0x040A);37 chip_readb(flash, bios + 0x1823); 38 chip_readb(flash, bios + 0x1820); 39 chip_readb(flash, bios + 0x1822); 40 chip_readb(flash, bios + 0x0418); 41 chip_readb(flash, bios + 0x041B); 42 chip_readb(flash, bios + 0x0419); 43 chip_readb(flash, bios + 0x040A); 44 44 45 45 return 0; … … 50 50 chipaddr bios = flash->virtual_memory; 51 51 52 chip_readb( bios + 0x1823);53 chip_readb( bios + 0x1820);54 chip_readb( bios + 0x1822);55 chip_readb( bios + 0x0418);56 chip_readb( bios + 0x041B);57 chip_readb( bios + 0x0419);58 chip_readb( bios + 0x041A);52 chip_readb(flash, bios + 0x1823); 53 chip_readb(flash, bios + 0x1820); 54 chip_readb(flash, bios + 0x1822); 55 chip_readb(flash, bios + 0x0418); 56 chip_readb(flash, bios + 0x041B); 57 chip_readb(flash, bios + 0x0419); 58 chip_readb(flash, bios + 0x041A); 59 59 60 60 return 0; 61 61 } 62 62 63 int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size) 63 int erase_sector_28sf040(struct flashctx *flash, unsigned int address, 64 unsigned int sector_size) 64 65 { 65 66 chipaddr bios = flash->virtual_memory; 66 67 67 68 /* This command sequence is very similar to erase_block_82802ab. */ 68 chip_writeb( AUTO_PG_ERASE1, bios);69 chip_writeb( AUTO_PG_ERASE2, bios + address);69 chip_writeb(flash, AUTO_PG_ERASE1, bios); 70 chip_writeb(flash, AUTO_PG_ERASE2, bios + address); 70 71 71 72 /* wait for Toggle bit ready */ 72 toggle_ready_jedec( bios);73 toggle_ready_jedec(flash, bios); 73 74 74 75 /* FIXME: Check the status register for errors. */ … … 77 78 78 79 /* chunksize is 1 */ 79 int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len) 80 int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, 81 unsigned int len) 80 82 { 81 83 int i; … … 91 93 } 92 94 /*issue AUTO PROGRAM command */ 93 chip_writeb( AUTO_PGRM, dst);94 chip_writeb( *src++, dst++);95 chip_writeb(flash, AUTO_PGRM, dst); 96 chip_writeb(flash, *src++, dst++); 95 97 96 98 /* wait for Toggle bit ready */ 97 toggle_ready_jedec( bios);99 toggle_ready_jedec(flash, bios); 98 100 } 99 101 … … 105 107 chipaddr bios = flash->virtual_memory; 106 108 107 chip_writeb( CHIP_ERASE, bios);108 chip_writeb( CHIP_ERASE, bios);109 chip_writeb(flash, CHIP_ERASE, bios); 110 chip_writeb(flash, CHIP_ERASE, bios); 109 111 110 112 programmer_delay(10); 111 toggle_ready_jedec( bios);113 toggle_ready_jedec(flash, bios); 112 114 113 115 /* FIXME: Check the status register for errors. */ … … 115 117 } 116 118 117 int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen) 119 int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, 120 unsigned int blocklen) 118 121 { 119 122 if ((addr != 0) || (blocklen != flash->total_size * 1024)) { -
trunk/sst49lfxxxc.c
r1473 r1474 24 24 #include "chipdrivers.h" 25 25 26 static int write_lockbits_block_49lfxxxc(struct flashctx *flash, unsigned long address, unsigned char bits) 26 static int write_lockbits_block_49lfxxxc(struct flashctx *flash, 27 unsigned long address, 28 unsigned char bits) 27 29 { 28 30 unsigned long lock = flash->virtual_registers + address + 2; 29 msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, chip_readb(lock)); 30 chip_writeb(bits, lock); 31 msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, 32 chip_readb(flash, lock)); 33 chip_writeb(flash, bits, lock); 31 34 32 35 return 0; … … 60 63 } 61 64 62 int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size) 65 int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, 66 unsigned int sector_size) 63 67 { 64 68 uint8_t status; 65 69 chipaddr bios = flash->virtual_memory; 66 70 67 chip_writeb( 0x30, bios);68 chip_writeb( 0xD0, bios + address);71 chip_writeb(flash, 0x30, bios); 72 chip_writeb(flash, 0xD0, bios + address); 69 73 70 74 status = wait_82802ab(flash); -
trunk/sst_fwhub.c
r1473 r1474 30 30 uint8_t blockstatus; 31 31 32 blockstatus = chip_readb( registers + offset + 2);32 blockstatus = chip_readb(flash, registers + offset + 2); 33 33 msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ", 34 34 offset, flash->page_size, blockstatus); … … 60 60 if (blockstatus) { 61 61 msg_cdbg("Trying to clear lock for 0x%06x... ", offset); 62 chip_writeb( 0, registers + offset + 2);62 chip_writeb(flash, 0, registers + offset + 2); 63 63 64 64 blockstatus = check_sst_fwhub_block_lock(flash, offset); -
trunk/stm50flw0x0x.c
r1473 r1474 61 61 for (j = 0; j < 0x10000; j += 0x1000) { 62 62 msg_cdbg("unlocking at 0x%x\n", offset + j); 63 chip_writeb(unlock_sector, wrprotect + offset + j); 64 if (chip_readb(wrprotect + offset + j) != unlock_sector) { 63 chip_writeb(flash, unlock_sector, 64 wrprotect + offset + j); 65 if (chip_readb(flash, wrprotect + offset + j) != 66 unlock_sector) { 65 67 msg_cerr("Cannot unlock sector @ 0x%x\n", 66 68 offset + j); … … 70 72 } else { 71 73 msg_cdbg("unlocking at 0x%x\n", offset); 72 chip_writeb( unlock_sector, wrprotect + offset);73 if (chip_readb( wrprotect + offset) != unlock_sector) {74 chip_writeb(flash, unlock_sector, wrprotect + offset); 75 if (chip_readb(flash, wrprotect + offset) != unlock_sector) { 74 76 msg_cerr("Cannot unlock sector @ 0x%x\n", offset); 75 77 return -1; … … 95 97 96 98 /* This function is unused. */ 97 int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, unsigned int sectorsize) 99 int erase_sector_stm50flw0x0x(struct flashctx *flash, unsigned int sector, 100 unsigned int sectorsize) 98 101 { 99 102 chipaddr bios = flash->virtual_memory + sector; 100 103 101 104 // clear status register 102 chip_writeb( 0x50, bios);105 chip_writeb(flash, 0x50, bios); 103 106 // now start it 104 chip_writeb( 0x32, bios);105 chip_writeb( 0xd0, bios);107 chip_writeb(flash, 0x32, bios); 108 chip_writeb(flash, 0xd0, bios); 106 109 programmer_delay(10); 107 110 -
trunk/w29ee011.c
r1473 r1474 39 39 40 40 /* Issue JEDEC Product ID Entry command */ 41 chip_writeb( 0xAA, bios + 0x5555);41 chip_writeb(flash, 0xAA, bios + 0x5555); 42 42 programmer_delay(10); 43 chip_writeb( 0x55, bios + 0x2AAA);43 chip_writeb(flash, 0x55, bios + 0x2AAA); 44 44 programmer_delay(10); 45 chip_writeb( 0x80, bios + 0x5555);45 chip_writeb(flash, 0x80, bios + 0x5555); 46 46 programmer_delay(10); 47 chip_writeb( 0xAA, bios + 0x5555);47 chip_writeb(flash, 0xAA, bios + 0x5555); 48 48 programmer_delay(10); 49 chip_writeb( 0x55, bios + 0x2AAA);49 chip_writeb(flash, 0x55, bios + 0x2AAA); 50 50 programmer_delay(10); 51 chip_writeb( 0x60, bios + 0x5555);51 chip_writeb(flash, 0x60, bios + 0x5555); 52 52 programmer_delay(10); 53 53 54 54 /* Read product ID */ 55 id1 = chip_readb( bios);56 id2 = chip_readb( bios + 0x01);55 id1 = chip_readb(flash, bios); 56 id2 = chip_readb(flash, bios + 0x01); 57 57 58 58 /* Issue JEDEC Product ID Exit command */ 59 chip_writeb( 0xAA, bios + 0x5555);59 chip_writeb(flash, 0xAA, bios + 0x5555); 60 60 programmer_delay(10); 61 chip_writeb( 0x55, bios + 0x2AAA);61 chip_writeb(flash, 0x55, bios + 0x2AAA); 62 62 programmer_delay(10); 63 chip_writeb( 0xF0, bios + 0x5555);63 chip_writeb(flash, 0xF0, bios + 0x5555); 64 64 programmer_delay(10); 65 65 -
trunk/w39.c
r1473 r1474 27 27 uint8_t locking; 28 28 29 locking = chip_readb( wrprotect);29 locking = chip_readb(flash, wrprotect); 30 30 msg_cdbg("Lock status of block at 0x%08x is ", offset); 31 31 switch (locking & 0x7) { … … 65 65 uint8_t locking; 66 66 67 locking = chip_readb( wrprotect);67 locking = chip_readb(flash, wrprotect); 68 68 /* Read or write lock present? */ 69 69 if (locking & ((1 << 2) | (1 << 0))) { … … 74 74 } else { 75 75 msg_cdbg("Unlocking block at 0x%08x\n", offset); 76 chip_writeb( 0, wrprotect);76 chip_writeb(flash, 0, wrprotect); 77 77 } 78 78 } … … 87 87 88 88 /* Product Identification Entry */ 89 chip_writeb( 0xAA, bios + 0x5555);90 chip_writeb( 0x55, bios + 0x2AAA);91 chip_writeb( 0x90, bios + 0x5555);89 chip_writeb(flash, 0xAA, bios + 0x5555); 90 chip_writeb(flash, 0x55, bios + 0x2AAA); 91 chip_writeb(flash, 0x90, bios + 0x5555); 92 92 programmer_delay(10); 93 93 94 94 /* Read something, maybe hardware lock bits */ 95 val = chip_readb( bios + offset);95 val = chip_readb(flash, bios + offset); 96 96 97 97 /* Product Identification Exit */ 98 chip_writeb( 0xAA, bios + 0x5555);99 chip_writeb( 0x55, bios + 0x2AAA);100 chip_writeb( 0xF0, bios + 0x5555);98 chip_writeb(flash, 0xAA, bios + 0x5555); 99 chip_writeb(flash, 0x55, bios + 0x2AAA); 100 chip_writeb(flash, 0xF0, bios + 0x5555); 101 101 programmer_delay(10); 102 102 … … 161 161 } 162 162 163 int printlock_w39l040(struct flashctx * flash)163 int printlock_w39l040(struct flashctx *flash) 164 164 { 165 165 uint8_t lock; -
trunk/wbsio_spi.c
r1473 r1474 61 61 } 62 62 63 static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, 64 const unsigned char *writearr, unsigned char *readarr); 65 static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); 63 static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt, 64 unsigned int readcnt, 65 const unsigned char *writearr, 66 unsigned char *readarr); 67 static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, 68 unsigned int start, unsigned int len); 66 69 67 70 static const struct spi_programmer spi_programmer_wbsio = { … … 111 114 * such a big difference? 112 115 */ 113 static int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt, 114 const unsigned char *writearr, unsigned char *readarr) 116 static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt, 117 unsigned int readcnt, 118 const unsigned char *writearr, 119 unsigned char *readarr) 115 120 { 116 121 int i; … … 195 200 } 196 201 197 static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) 202 static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf, 203 unsigned int start, unsigned int len) 198 204 { 199 205 return read_memmapped(flash, buf, start, len);
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