Difference between revisions of "Bus Pirate"

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The [http://dangerousprototypes.com/docs/Bus_Pirate Bus Pirate] is an open source design for a multi-purpose chip-level serial protocol transceiver and debugger. Flashrom supports the Bus Pirate for [http://dangerousprototypes.com/bus-pirate-manual/bus-pirate-spi-guide/ SPI programming]. It also has  [http://dangerousprototypes.com/docs/Bus_Pirate_binary_SPI_sniffer_utility SPI sniffing] functionality, which may come in useful for analysing chip or programmer behaviour.
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[[File:Buspirate v3 front.jpg|thumb|right|<small>Bus Pirate v3, front</small>]]
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[[File:Buspirate v3 back.jpg|thumb|right|<small>Bus Pirate v3, back</small>]]
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[[File:Lycom-pe115-flashrom-buspirate-2.jpg|thumb|right|<small>Recovering a bricked SPI based device using a Bus Pirate</small>]]
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The [http://dangerousprototypes.com/docs/Bus_Pirate Bus Pirate] is an open source design for a multi-purpose chip-level serial protocol transceiver and debugger. Flashrom supports the Bus Pirate for [http://dangerousprototypes.com/docs/SPI SPI programming]. It also has  [http://dangerousprototypes.com/docs/Bus_Pirate_binary_SPI_sniffer_utility SPI sniffing] functionality, which may come in useful for analysing chip or programmer behaviour.
  
 
They are available for around US$30 from various sources.
 
They are available for around US$30 from various sources.
  
[[File:Lycom-pe115-flashrom-buspirate-2.jpg|320px|thumb|left|Recovering a bricked SPI based device using a Bus Pirate]]
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==Connections==
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The table below shows how a typical SPI flash chip (sitting in the center of the table) needs to be connected (NB: not all flash chips feature all of the pins below, but in general you should always connect all input pins of ICs to some defined potential (usually GND or VCC), ideally with a pull-up/down resistor in between). Most SPI flash chips require a 3.3V supply voltage, but there exist some models that use e.g. 1.8V. Make sure the device in question is compatible before connecting any wires. <small>NB: Some rather rare SPI flash chips (e.g. Atmel AT45DB series) have a completely different layout, please beware.</small>
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{| style="border-collapse: collapse; border: 1px solid black;" cellpadding="5";  border="1" align="center"
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! Description
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! Bus Pirate
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! Dir.
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! colspan="4"|Flash chip
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! Dir.
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! Bus Pirate
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! Description
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|-
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| align="right" | (not) Chip Select    || CS    || <font size="+2">→</font> || style="background: #DDDDDD;" | 1 || align="left" style="background: #DDDDDD;" | /CS      || align="right" style="background: #DDDDDD;" | VCC        || style="background: #DDDDDD;" | 8 || <font size="+2">←</font> || +3.3v || align="left" | Supply
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|-
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| align="right" | Master In, Slave Out || MISO  || <font size="+2">←</font> || style="background: #DDDDDD;" | 2 || align="left" style="background: #DDDDDD;" | DO (IO1)  || align="right" style="background: #DDDDDD;" | /HOLD (IO3) || style="background: #DDDDDD;" | 7 || <font size="+2">←</font> || +3.3v || align="left" | (not) hold (see datasheets)
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|-
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| align="right" | (not) Write Protect  || +3.3v || <font size="+2">→</font> || style="background: #DDDDDD;" | 3 || align="left" style="background: #DDDDDD;" | /WP (IO2) || align="right" style="background: #DDDDDD;" | CLK        || style="background: #DDDDDD;" | 6 || <font size="+2">←</font> || CLK  || align="left" | The SPI clock
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|-
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| align="right" | Ground              || GND  || <font size="+2">→</font> || style="background: #DDDDDD;" | 4 || align="left" style="background: #DDDDDD;" | GND      || align="right" style="background: #DDDDDD;" | DI (IO0)    || style="background: #DDDDDD;" | 5 || <font size="+2">←</font> || MOSI  || align="left" | Master Out, Slave In
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|-
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|}
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== Usage ==
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$ '''flashrom -p buspirate_spi:dev=''/dev/device'',spispeed=''frequency'' '''
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Example:
  
'''Trouble Shooting'''
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$ '''flashrom -p buspirate_spi:dev=/dev/ttyUSB0,spispeed=1M'''
  
The Bus Pirate has various options for SPI communication.  Many SPI chips support the JEDEC standard identify command, which can be issued from the Bus Pirate prompt like this:
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== Troubleshooting ==
  
<code>[0x9f r:4]</code>
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In case of problems probing the chip with flashrom - especially when connecting chips still soldered in a system - please take a look at [[ISP|this page]].
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In circuit programming it often possible, '''so long as no other devices on the SPI bus are trying to access the device'''.
  
You'll need to refer to the flash chip datasheet to see how it should respond to this.
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== Speedup ==
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A beta firmware build exists, to speed up the buspirate. See this post on dangerousprototypes.com:
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http://dangerousprototypes.com/forum/viewtopic.php?f=40&t=3864&start=15#p41505
  
In circuit programming it often possible, '''so long as no other devices on the SPI bus are trying to access the device.'''
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http://dangerousprototypes.com/docs/Bus_Pirate#Firmware_upgrades

Latest revision as of 16:21, 3 April 2013

Bus Pirate v3, front
Bus Pirate v3, back
Recovering a bricked SPI based device using a Bus Pirate

The Bus Pirate is an open source design for a multi-purpose chip-level serial protocol transceiver and debugger. Flashrom supports the Bus Pirate for SPI programming. It also has SPI sniffing functionality, which may come in useful for analysing chip or programmer behaviour.

They are available for around US$30 from various sources.

Connections

The table below shows how a typical SPI flash chip (sitting in the center of the table) needs to be connected (NB: not all flash chips feature all of the pins below, but in general you should always connect all input pins of ICs to some defined potential (usually GND or VCC), ideally with a pull-up/down resistor in between). Most SPI flash chips require a 3.3V supply voltage, but there exist some models that use e.g. 1.8V. Make sure the device in question is compatible before connecting any wires. NB: Some rather rare SPI flash chips (e.g. Atmel AT45DB series) have a completely different layout, please beware.

Description Bus Pirate Dir. Flash chip Dir. Bus Pirate Description
(not) Chip Select CS 1 /CS VCC 8 +3.3v Supply
Master In, Slave Out MISO 2 DO (IO1) /HOLD (IO3) 7 +3.3v (not) hold (see datasheets)
(not) Write Protect +3.3v 3 /WP (IO2) CLK 6 CLK The SPI clock
Ground GND 4 GND DI (IO0) 5 MOSI Master Out, Slave In

Usage

$ flashrom -p buspirate_spi:dev=/dev/device,spispeed=frequency 

Example:

$ flashrom -p buspirate_spi:dev=/dev/ttyUSB0,spispeed=1M

Troubleshooting

In case of problems probing the chip with flashrom - especially when connecting chips still soldered in a system - please take a look at this page. In circuit programming it often possible, so long as no other devices on the SPI bus are trying to access the device.

Speedup

A beta firmware build exists, to speed up the buspirate. See this post on dangerousprototypes.com: http://dangerousprototypes.com/forum/viewtopic.php?f=40&t=3864&start=15#p41505

http://dangerousprototypes.com/docs/Bus_Pirate#Firmware_upgrades