[flashrom] New Intel Chipsets

[Michael Karcher]

Am Montag, den 09.08.2010, 09:55 +0200 schrieb Wagner, Helge (GE
Intelligent Platforms):
> Hi Michael,
> 
> >This patch has one minor issue: flash_enable_ich_dc_spi decodes the
> BIOS type select straps. 
> 
> The function is called "enable_flash_ich_dc_spi" (for those that try to
> find it in the source).
> 
> In this function the BIOS type select strap is not honored at all except
> for ICH7:
> ...
> 	if (ich_generation == 7) {
> 		if(bbs == ICH_STRAP_LPC) {
> 			/* No further SPI initialization required */
> 			return ret;
> 		}
> 		else
> 			/* Disable LPC/FWH if strapped to PCI or SPI */
> 			buses_supported = 0;
> 	}
> ...
> So it should all be ok already for new chipsets. Do you agree?

The state it is now (that the bbs is ignored for newer chipsets) is
becasue we were already aware of the problem. Still the debugging print
in the beginning is wrong, especially for 5 Series/3400 series. I'm
going to commit your patch as it does not break anything, and adds
working support for the new chipsets.

We are checking bbs for ICH7 because that chipset supports *either*
LPC/FWH *or* the SPI interface and never both interfaces run at the same
time. This is different for later chipsets where the SPI chip can be
addressed through the software sequencing registers even if the system
boots from LPC flash.

Regards,
  Michael Karcher