[flashrom] [PATCH] Add support for "ST M25PX16" chip.

[Carl Worth]

This was created by simply copying the M25PX32 block and verifying
with the M25PX16 datasheet which values needed to be changed. (The
only changes are the model_id and the 4 size-related fields).

Also, this commit sets the new M25PX16 as having write support tested,
(where the M25PX32 does not). This is after running successful write
and verify operations to 4 different M25PX16 chips with a Dediprog
SF100.

Signed-off-by: Carl Worth <carl.d.worth at intel.com>
---
 flashchips.c |   29 +++++++++++++++++++++++++++++
 flashchips.h |    1 +
 2 files changed, 30 insertions(+), 0 deletions(-)

diff --git a/flashchips.c b/flashchips.c
index e7a2223..0b84ae1 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6269,6 +6269,35 @@ struct flashchip flashchips[] = {
 
 	{
 		.vendor		= "ST",
+		.name		= "M25PX16",
+		.bustype	= CHIP_BUSTYPE_SPI,
+		.manufacture_id	= ST_ID,
+		.model_id	= ST_M25PX16,
+		.total_size	= 2048,
+		.page_size	= 256,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { { 4 * 1024, 512 } },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {64 * 1024, 32} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {2 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.unlock		= spi_disable_blockprotect,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+	},
+
+	{
+		.vendor		= "ST",
 		.name		= "M25PX32",
 		.bustype	= CHIP_BUSTYPE_SPI,
 		.manufacture_id	= ST_ID,
diff --git a/flashchips.h b/flashchips.h
index 6504edf..bbdb5ae 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -531,6 +531,7 @@
 #define ST_M25P32		0x2016
 #define ST_M25P64		0x2017
 #define ST_M25P128		0x2018
+#define ST_M25PX16		0x7115
 #define ST_M25PX32		0x7116
 #define ST_M25PX64		0x7117
 #define ST_M25PE10		0x8011
-- 
1.7.2.3