[flashrom] Releasing 0.9.2?

[Michael Karcher]

Am Freitag, den 26.02.2010, 08:47 +0100 schrieb Carl-Daniel Hailfinger:
> Here's my personal merge list:
> High priority:
> - Laptop warning.
> - DMI restructure (needed for laptop warning).
Is in.

> - Chip driver fixes in patchwork.
No comment - I don't have any chip driver fixes pending.

> Medium priority:
> - All unacked board support patches (do we want to mark those boards as
> untested?)
My board enables:

Abit IP35 Pro: http://patchwork.coreboot.org/patch/843/
 - Board enable works, but we have one report that the BIOS backflashes
itself. No idea what happens.

Abit VT6X4: http://patchwork.coreboot.org/patch/955/ depending on
http://patchwork.coreboot.org/patch/948/
 - Board enable works: http://coreboot.pastebin.com/f6fd7daa3
IMHO ready for commit. Review of the 948 appreciated.

HP Vectra VL420SFF: http://patchwork.coreboot.org/patch/919/
 - Board enable works, but DMI identifier was not tested. Confirmation
for non-DMI is at http://patchwork.coreboot.org/patch/696/

Intel SE440BX-2: http://patchwork.coreboot.org/patch/842/
 - Board enable does not work. GPO register on PIIX4 is for strange
reasons read-only, see
http://www.flashrom.org/pipermail/flashrom/2010-February/002272.html

HP Vectra VL400: http://patchwork.coreboot.org/patch/721/
 - Board enable works, I was unsure about match quality. But
http://pastebin.com/f6c509179 claims that both IDs I used for matching
are really VL400 specific.

Asus M2NBP-VM CSM: http://patchwork.coreboot.org/patch/717/
 - Board enable works, only confirmation was on IRC. No response on
ping.

MSI MS7207: http://patchwork.coreboot.org/patch/659/
 - Untested. User got impatient and used another way of flashing - no
response on ping.

> - Always read the chip before writing, and only issue the scary error
> message if flash contents changed.
[x] seconded!

Improved suggestion: If flash contents changed, blindly write the old
image (without verifying during write), and if correct afterwards, also
don't bail out. This should help on partly write protected chips.

Regards,
  Michael Karcher