[flashrom] Error Reading BIOS on Dell Optiplex 745

[Carl-Daniel Hailfinger]

On 08.01.2010 16:16, Anthony DeRosa wrote:
> Requested output below.  Invalid opcode?  The MX25L8005 datasheet says the
> part supports opcode 0x03, read data.
>   

As discussed on IRC, the READ opcode 0x03 is not supported by your
chipset configuration.


> ubuntu at ubuntu:~/flashrom$ sudo ./flashrom -c MX25L8005 -V -r backup.bin
>
> flashrom v0.9.1-r837
> No coreboot table found.
> Found chipset "Intel ICH8/ICH8R", enabling flash write...
> [...]
> BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x2
> GCS = 0x460: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI)
> FLOCKDN 1, FDV 0, FDOPSS 1, SCIP 0, BERASE 0, AEL 0, FCERR 0, FDONE 0
> 0x98: 0x029fabab (OPMENU)
> 0x9C: 0x010502d8 (OPMENU+4)
> [...]
> WARNING: SPI Configuration Lockdown activated.
> Generating OPCODES... done
> SPI Read Configuration: prefetching disabled, caching enabled, FAILED!
> This chipset supports the following protocols: FWH,SPI.
> Probing for Macronix MX25L8005, 1024 KB: RDID returned 0xc2 0x20 0x14.
> probe_spi_rdid_generic: id1 0xc2, id2 0x2014
> Chip status register is 00
> Chip status register: Status Register Write Disable (SRWD) is not set
> Chip status register: Bit 6 is not set
> Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
> Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
> Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
> Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> Found chip "Macronix MX25L8005" (1024 KB, SPI) at physical address
> 0xfff00000.
> Reading flash... Invalid OPCODE 0x03
> done.
>   

This is a bug, though. If we encounter an Invalid opcode error during
read, we should NOT write that file at all, and we should NOT report
success. Will fix.

Regards,
Carl-Daniel

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