[flashrom] SuperMicro X8DTU-6TF+: flashrom -Vr failed

Stefan Tauner stefan.tauner at student.tuwien.ac.at
Fri Aug 12 23:05:21 CEST 2011


On Fri, 12 Aug 2011 15:16:16 -0500
Scott Silverman <ssilverman at simplexinvestments.com> wrote:

> # ./flashrom -Vr ../current.bios
> flashrom v0.9.4-r1412 on Linux 2.6.29.6-sxtickless (x86_64), built with
> libpci 3.1.7, GCC 4.1.2 20080704 (Red Hat 4.1.2-50), little endian
> flashrom is free software, get the source code at http://www.flashrom.org
> 
> Calibrating delay loop... OS timer resolution is 1 usecs, 1523M loops per
> second, 10 myus = 11 us, 100 myus = 100 us, 1000 myus = 998 us, 10000 myus =
> 9990 us, 4 myus = 4 us, OK.
> Initializing internal programmer
> No coreboot table found.
> DMI string system-manufacturer: "Supermicro"
> DMI string system-product-name: "X8DTU-6+"
> DMI string system-version: "1234567890"
> DMI string baseboard-manufacturer: "Supermicro"
> DMI string baseboard-product-name: "X8DTU-6+"
> DMI string baseboard-version: "2.01"
> DMI string chassis-type: "Main Server Chassis"
> Found chipset "Intel ICH10R" with PCI ID 8086:3a16. Enabling flash write...
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x0
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x0
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x1
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x1
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x2
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x2
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x3
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x3
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x4
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x5
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x6
> 0x7fffffff/0x7fffffff FWH IDSEL: 0x7
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode enabled
> 0x7fffffff/0x7fffffff FWH decode disabled
> 0x7fffffff/0x7fffffff FWH decode disabled
> 0x7fffffff/0x7fffffff FWH decode disabled
> 0x7fffffff/0x7fffffff FWH decode disabled
> Maximum FWH chip size: 0x100000 bytes
> BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0
> 
> Root Complex Register Block address = 0xfed1c000
> GCS = 0x460: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI)
> Top Swap : not enabled
> SPIBAR = 0xfed1c000 + 0x3800
> 0x04: 0x6008 (HSFS)
> HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
> 0x06: 0x0000 (HSFC)
> HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
> 0x08: 0x00002000 (FADDR)
> 0x50: 0x00001a1b (FRAP)
> BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b
> 0x54: 0x00010000 (FREG0: Flash Descriptor)
> 0x00000000-0x00001fff is read-only
> 0x58: 0x03ff0200 (FREG1: BIOS)
> 0x00200000-0x003fffff is read-write
> 0x5C: 0x01ff0002 (FREG2: Management Engine)
> 0x00002000-0x001fffff is locked
> 0x60: 0x00001fff (FREG3: Gigabit Ethernet)
> Gigabit Ethernet region is unused.
> 0x64: 0x00001fff (FREG4: Platform Data)
> Platform Data region is unused.
> 0x74: 0x00000000 (PR0)
> 0x78: 0x00000000 (PR1)
> 0x7C: 0x00000000 (PR2)
> 0x80: 0x00000000 (PR3)
> 0x84: 0x00000000 (PR4)
> 0x90: 0x04 (SSFS)
> SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0
> 0x91: 0x000000 (SSFC)
> SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=0
> 0x94: 0x3906     (PREOP)
> 0x96: 0xd43b     (OPTYPE)
> 0x98: 0x05200302 (OPMENU)
> 0x9C: 0x3906019f (OPMENU+4)
> 0xA0: 0x00000000 (BBAR)
> 0xD0: 0x00000000 (FPB)
> Programming OPCODES...
> program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
> done
> preop0=0x06, preop1=0x50
> op[0]=0x02, 3, 0
> op[1]=0x03, 2, 0
> op[2]=0xd8, 3, 0
> op[3]=0x05, 0, 0
> op[4]=0x90, 2, 0
> op[5]=0x01, 1, 0
> op[6]=0x9f, 0, 0
> op[7]=0xc7, 1, 0
> 
> SPI Read Configuration: prefetching disabled, caching enabled, OK.
> This chipset supports the following protocols: FWH, SPI.
> […]
> Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2
> 0x4701
> Chip status register is 10
> Found Atmel flash chip "AT25DF321A" (4096 kB, SPI) at physical address
> 0xffc00000.
> Ignoring security lockdown (if present)
> Ignoring status register byte 2
> Chip status register is 10
> Chip status register: Sector Protection Register Lock (SRPL) is not set
> Chip status register: Bit 6 is not set
> Chip status register: Erase/Program Error (EPE) is not set
> Chip status register: WP# pin (WPP) is not asserted
> Chip status register: Software Protection Status (SWP): no sectors are
> protected
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> […]
> ===
> This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE
> The test status of this chip may have been updated in the latest development
> version of flashrom. If you are running the latest development version,
> please email a report to flashrom at flashrom.org if any of the above
> operations
> work correctly for you with this flash part. Please include the flashrom
> output with the additional -V option for all operations you tested (-V, -Vr,
> -Vw, -VE), and mention which mainboard or programmer you tested.
> Please mention your board in the subject line. Thanks for your help!
> Ignoring security lockdown (if present)
> Reading flash... Transaction error!
> SSFS: SCIP=0, FDONE=1, FCERR=1, AEL=0
> SSFC: SCGO=0, ACS=0, SPOP=0, COP=1, DBC=63, SME=0, SCF=0
> Running OPCODE 0x03 failed at address 0x002000 (payload length was 64).
> Read operation failed!
> FAILED.
> Restoring MMIO space at 0x7fe44a3648a0
> Restoring MMIO space at 0x7fe44a36489c
> Restoring MMIO space at 0x7fe44a364898
> Restoring MMIO space at 0x7fe44a364896
> Restoring MMIO space at 0x7fe44a364894
> Restoring PCI config space for 00:1f:0 reg 0xdc

Hello Scott,

Thanks for your report!
I have marked the flash chip as being detectable and will commit that
later.
The transaction error is expected, because the region is locked:
> 0x5C: 0x01ff0002 (FREG2: Management Engine)
> 0x00002000-0x001fffff is locked

we are working on that but dont expect it to be working soon. i'll
add the board to our list of (un)supported boards.

you could try to update the bios region only with the help of a layout
file, but i would not recommend it at all(!). the ME region contains
the firmware for an embedded controller on your board and the (new)
BIOS might not be compatible with the old firmware. this could lead to
a bricked board that requires an external flash programmer and possibly
even desoldering the flash chip to fix it...
please use the vendor tools instead, sorry.
-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner




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